drivers/mtd/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  *
   8  * Copyright (C) 2004
   9  * Ed Okerson
  10  *
  11  * Copyright (C) 2006
  12  * Tolunay Orkun <listmember@orkun.us>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  *
  32  */
  33
  34 /* The DEBUG define must be before common to enable debugging */
  35 /* #define DEBUG        */
  36
  37 #include <common.h>
  38 #include <asm/processor.h>
  39 #include <asm/io.h>
  40 #include <asm/byteorder.h>
  41 #include <environment.h>
  42 #ifdef  CFG_FLASH_CFI_DRIVER
  43
  44 /*
  45  * This file implements a Common Flash Interface (CFI) driver for
  46  * U-Boot.
  47  *
  48  * The width of the port and the width of the chips are determined at
  49  * initialization.  These widths are used to calculate the address for
  50  * access CFI data structures.
  51  *
  52  * References
  53  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  54  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  55  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  56  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  57  * AMD CFI Specification, Release 2.0 December 1, 2001
  58  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  59  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  60  *
  61  * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  62  * reading and writing ... (yes there is such a Hardware).
  63  */
  64
  65 #ifndef CFG_FLASH_BANKS_LIST
  66 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  67 #endif
  68
  69 #define FLASH_CMD_CFI                   0x98
  70 #define FLASH_CMD_READ_ID               0x90
  71 #define FLASH_CMD_RESET                 0xff
  72 #define FLASH_CMD_BLOCK_ERASE           0x20
  73 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  74 #define FLASH_CMD_WRITE                 0x40
  75 #define FLASH_CMD_PROTECT               0x60
  76 #define FLASH_CMD_PROTECT_SET           0x01
  77 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  78 #define FLASH_CMD_CLEAR_STATUS          0x50
  79 #define FLASH_CMD_READ_STATUS           0x70
  80 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  81 #define FLASH_CMD_WRITE_BUFFER_PROG     0xE9
  82 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  83
  84 #define FLASH_STATUS_DONE               0x80
  85 #define FLASH_STATUS_ESS                0x40
  86 #define FLASH_STATUS_ECLBS              0x20
  87 #define FLASH_STATUS_PSLBS              0x10
  88 #define FLASH_STATUS_VPENS              0x08
  89 #define FLASH_STATUS_PSS                0x04
  90 #define FLASH_STATUS_DPS                0x02
  91 #define FLASH_STATUS_R                  0x01
  92 #define FLASH_STATUS_PROTECT            0x01
  93
  94 #define AMD_CMD_RESET                   0xF0
  95 #define AMD_CMD_WRITE                   0xA0
  96 #define AMD_CMD_ERASE_START             0x80
  97 #define AMD_CMD_ERASE_SECTOR            0x30
  98 #define AMD_CMD_UNLOCK_START            0xAA
  99 #define AMD_CMD_UNLOCK_ACK              0x55
 100 #define AMD_CMD_WRITE_TO_BUFFER         0x25
 101 #define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
 102
 103 #define AMD_STATUS_TOGGLE               0x40
 104 #define AMD_STATUS_ERROR                0x20
 105
 106 #define ATM_CMD_UNLOCK_SECT             0x70
 107 #define ATM_CMD_SOFTLOCK_START          0x80
 108 #define ATM_CMD_LOCK_SECT               0x40
 109
 110 #define FLASH_OFFSET_MANUFACTURER_ID    0x00
 111 #define FLASH_OFFSET_DEVICE_ID          0x01
 112 #define FLASH_OFFSET_DEVICE_ID2         0x0E
 113 #define FLASH_OFFSET_DEVICE_ID3         0x0F
 114 #define FLASH_OFFSET_CFI                0x55
 115 #define FLASH_OFFSET_CFI_ALT            0x555
 116 #define FLASH_OFFSET_CFI_RESP           0x10
 117 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 118 /* extended query table primary address */
 119 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
 120 #define FLASH_OFFSET_WTOUT              0x1F
 121 #define FLASH_OFFSET_WBTOUT             0x20
 122 #define FLASH_OFFSET_ETOUT              0x21
 123 #define FLASH_OFFSET_CETOUT             0x22
 124 #define FLASH_OFFSET_WMAX_TOUT          0x23
 125 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 126 #define FLASH_OFFSET_EMAX_TOUT          0x25
 127 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 128 #define FLASH_OFFSET_SIZE               0x27
 129 #define FLASH_OFFSET_INTERFACE          0x28
 130 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 131 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 132 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 133 #define FLASH_OFFSET_PROTECT            0x02
 134 #define FLASH_OFFSET_USER_PROTECTION    0x85
 135 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 136
 137 #define CFI_CMDSET_NONE                 0
 138 #define CFI_CMDSET_INTEL_EXTENDED       1
 139 #define CFI_CMDSET_AMD_STANDARD         2
 140 #define CFI_CMDSET_INTEL_STANDARD       3
 141 #define CFI_CMDSET_AMD_EXTENDED         4
 142 #define CFI_CMDSET_MITSU_STANDARD       256
 143 #define CFI_CMDSET_MITSU_EXTENDED       257
 144 #define CFI_CMDSET_SST                  258
 145 #define CFI_CMDSET_INTEL_PROG_REGIONS   512
 146
 147 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 148 # undef  FLASH_CMD_RESET
 149 # define FLASH_CMD_RESET        AMD_CMD_RESET /* use AMD-Reset instead */
 150 #endif
 151
 152 typedef union {
 153         unsigned char c;
 154         unsigned short w;
 155         unsigned long l;
 156         unsigned long long ll;
 157 } cfiword_t;
 158
 159 #define NUM_ERASE_REGIONS       4 /* max. number of erase regions */
 160
 161 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
 162
 163 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 164 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 165 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 166 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 167 #else
 168 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 169 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 170 #endif
 171
 172 /*
 173  * Check if chip width is defined. If not, start detecting with 8bit.
 174  */
 175 #ifndef CFG_FLASH_CFI_WIDTH
 176 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 177 #endif
 178
 179 typedef unsigned long flash_sect_t;
 180
 181 /* CFI standard query structure */
 182 struct cfi_qry {
 183         u8      qry[3];
 184         u16     p_id;
 185         u16     p_adr;
 186         u16     a_id;
 187         u16     a_adr;
 188         u8      vcc_min;
 189         u8      vcc_max;
 190         u8      vpp_min;
 191         u8      vpp_max;
 192         u8      word_write_timeout_typ;
 193         u8      buf_write_timeout_typ;
 194         u8      block_erase_timeout_typ;
 195         u8      chip_erase_timeout_typ;
 196         u8      word_write_timeout_max;
 197         u8      buf_write_timeout_max;
 198         u8      block_erase_timeout_max;
 199         u8      chip_erase_timeout_max;
 200         u8      dev_size;
 201         u16     interface_desc;
 202         u16     max_buf_write_size;
 203         u8      num_erase_regions;
 204         u32     erase_region_info[NUM_ERASE_REGIONS];
 205 } __attribute__((packed));
 206
 207 struct cfi_pri_hdr {
 208         u8      pri[3];
 209         u8      major_version;
 210         u8      minor_version;
 211 } __attribute__((packed));
 212
 213 static void flash_write8(u8 value, void *addr)
 214 {
 215         __raw_writeb(value, addr);
 216 }
 217
 218 static void flash_write16(u16 value, void *addr)
 219 {
 220         __raw_writew(value, addr);
 221 }
 222
 223 static void flash_write32(u32 value, void *addr)
 224 {
 225         __raw_writel(value, addr);
 226 }
 227
 228 static void flash_write64(u64 value, void *addr)
 229 {
 230         /* No architectures currently implement __raw_writeq() */
 231         *(volatile u64 *)addr = value;
 232 }
 233
 234 static u8 flash_read8(void *addr)
 235 {
 236         return __raw_readb(addr);
 237 }
 238
 239 static u16 flash_read16(void *addr)
 240 {
 241         return __raw_readw(addr);
 242 }
 243
 244 static u32 flash_read32(void *addr)
 245 {
 246         return __raw_readl(addr);
 247 }
 248
 249 static u64 __flash_read64(void *addr)
 250 {
 251         /* No architectures currently implement __raw_readq() */
 252         return *(volatile u64 *)addr;
 253 }
 254
 255 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
 256
 257 /*-----------------------------------------------------------------------
 258  */
 259 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 260 static flash_info_t *flash_get_info(ulong base)
 261 {
 262         int i;
 263         flash_info_t * info = 0;
 264
 265         for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
 266                 info = & flash_info[i];
 267                 if (info->size && info->start[0] <= base &&
 268                     base <= info->start[0] + info->size - 1)
 269                         break;
 270         }
 271
 272         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 273 }
 274 #endif
 275
 276 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 277 {
 278         if (sect != (info->sector_count - 1))
 279                 return info->start[sect + 1] - info->start[sect];
 280         else
 281                 return info->start[0] + info->size - info->start[sect];
 282 }
 283
 284 /*-----------------------------------------------------------------------
 285  * create an address based on the offset and the port width
 286  */
 287 static inline void *
 288 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
 289 {
 290         unsigned int byte_offset = offset * info->portwidth;
 291
 292         return map_physmem(info->start[sect] + byte_offset,
 293                         flash_sector_size(info, sect) - byte_offset,
 294                         MAP_NOCACHE);
 295 }
 296
 297 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 298                 unsigned int offset, void *addr)
 299 {
 300         unsigned int byte_offset = offset * info->portwidth;
 301
 302         unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
 303 }
 304
 305 /*-----------------------------------------------------------------------
 306  * make a proper sized command based on the port and chip widths
 307  */
 308 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 309 {
 310         int i;
 311         int cword_offset;
 312         int cp_offset;
 313 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 314         u32 cmd_le = cpu_to_le32(cmd);
 315 #endif
 316         uchar val;
 317         uchar *cp = (uchar *) cmdbuf;
 318
 319         for (i = info->portwidth; i > 0; i--){
 320                 cword_offset = (info->portwidth-i)%info->chipwidth;
 321 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 322                 cp_offset = info->portwidth - i;
 323                 val = *((uchar*)&cmd_le + cword_offset);
 324 #else
 325                 cp_offset = i - 1;
 326                 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
 327 #endif
 328                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 329         }
 330 }
 331
 332 #ifdef DEBUG
 333 /*-----------------------------------------------------------------------
 334  * Debug support
 335  */
 336 static void print_longlong (char *str, unsigned long long data)
 337 {
 338         int i;
 339         char *cp;
 340
 341         cp = (unsigned char *) &data;
 342         for (i = 0; i < 8; i++)
 343                 sprintf (&str[i * 2], "%2.2x", *cp++);
 344 }
 345
 346 static void flash_printqry (struct cfi_qry *qry)
 347 {
 348         u8 *p = (u8 *)qry;
 349         int x, y;
 350
 351         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 352                 debug("%02x : ", x);
 353                 for (y = 0; y < 16; y++)
 354                         debug("%2.2x ", p[x + y]);
 355                 debug(" ");
 356                 for (y = 0; y < 16; y++) {
 357                         unsigned char c = p[x + y];
 358                         if (c >= 0x20 && c <= 0x7e)
 359                                 debug("%c", c);
 360                         else
 361                                 debug(".");
 362                 }
 363                 debug("\n");
 364         }
 365 }
 366 #endif
 367
 368
 369 /*-----------------------------------------------------------------------
 370  * read a character at a port width address
 371  */
 372 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 373 {
 374         uchar *cp;
 375         uchar retval;
 376
 377         cp = flash_map (info, 0, offset);
 378 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 379         retval = flash_read8(cp);
 380 #else
 381         retval = flash_read8(cp + info->portwidth - 1);
 382 #endif
 383         flash_unmap (info, 0, offset, cp);
 384         return retval;
 385 }
 386
 387 /*-----------------------------------------------------------------------
 388  * read a word at a port width address, assume 16bit bus
 389  */
 390 static inline ushort flash_read_word (flash_info_t * info, uint offset)
 391 {
 392         ushort *addr, retval;
 393
 394         addr = flash_map (info, 0, offset);
 395         retval = flash_read16 (addr);
 396         flash_unmap (info, 0, offset, addr);
 397         return retval;
 398 }
 399
 400
 401 /*-----------------------------------------------------------------------
 402  * read a long word by picking the least significant byte of each maximum
 403  * port size word. Swap for ppc format.
 404  */
 405 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
 406                               uint offset)
 407 {
 408         uchar *addr;
 409         ulong retval;
 410
 411 #ifdef DEBUG
 412         int x;
 413 #endif
 414         addr = flash_map (info, sect, offset);
 415
 416 #ifdef DEBUG
 417         debug ("long addr is at %p info->portwidth = %d\n", addr,
 418                info->portwidth);
 419         for (x = 0; x < 4 * info->portwidth; x++) {
 420                 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 421         }
 422 #endif
 423 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 424         retval = ((flash_read8(addr) << 16) |
 425                   (flash_read8(addr + info->portwidth) << 24) |
 426                   (flash_read8(addr + 2 * info->portwidth)) |
 427                   (flash_read8(addr + 3 * info->portwidth) << 8));
 428 #else
 429         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 430                   (flash_read8(addr + info->portwidth - 1) << 16) |
 431                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 432                   (flash_read8(addr + 3 * info->portwidth - 1)));
 433 #endif
 434         flash_unmap(info, sect, offset, addr);
 435
 436         return retval;
 437 }
 438
 439 /*
 440  * Write a proper sized command to the correct address
 441  */
 442 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
 443                              uint offset, u32 cmd)
 444 {
 445
 446         void *addr;
 447         cfiword_t cword;
 448
 449         addr = flash_map (info, sect, offset);
 450         flash_make_cmd (info, cmd, &cword);
 451         switch (info->portwidth) {
 452         case FLASH_CFI_8BIT:
 453                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 454                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 455                 flash_write8(cword.c, addr);
 456                 break;
 457         case FLASH_CFI_16BIT:
 458                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 459                        cmd, cword.w,
 460                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 461                 flash_write16(cword.w, addr);
 462                 break;
 463         case FLASH_CFI_32BIT:
 464                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
 465                        cmd, cword.l,
 466                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 467                 flash_write32(cword.l, addr);
 468                 break;
 469         case FLASH_CFI_64BIT:
 470 #ifdef DEBUG
 471                 {
 472                         char str[20];
 473
 474                         print_longlong (str, cword.ll);
 475
 476                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 477                                addr, cmd, str,
 478                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 479                 }
 480 #endif
 481                 flash_write64(cword.ll, addr);
 482                 break;
 483         }
 484
 485         /* Ensure all the instructions are fully finished */
 486         sync();
 487
 488         flash_unmap(info, sect, offset, addr);
 489 }
 490
 491 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 492 {
 493         flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 494         flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 495 }
 496
 497 /*-----------------------------------------------------------------------
 498  */
 499 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
 500                           uint offset, uchar cmd)
 501 {
 502         void *addr;
 503         cfiword_t cword;
 504         int retval;
 505
 506         addr = flash_map (info, sect, offset);
 507         flash_make_cmd (info, cmd, &cword);
 508
 509         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 510         switch (info->portwidth) {
 511         case FLASH_CFI_8BIT:
 512                 debug ("is= %x %x\n", flash_read8(addr), cword.c);
 513                 retval = (flash_read8(addr) == cword.c);
 514                 break;
 515         case FLASH_CFI_16BIT:
 516                 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
 517                 retval = (flash_read16(addr) == cword.w);
 518                 break;
 519         case FLASH_CFI_32BIT:
 520                 debug ("is= %8.8lx %8.8lx\n", flash_read32(addr), cword.l);
 521                 retval = (flash_read32(addr) == cword.l);
 522                 break;
 523         case FLASH_CFI_64BIT:
 524 #ifdef DEBUG
 525                 {
 526                         char str1[20];
 527                         char str2[20];
 528
 529                         print_longlong (str1, flash_read64(addr));
 530                         print_longlong (str2, cword.ll);
 531                         debug ("is= %s %s\n", str1, str2);
 532                 }
 533 #endif
 534                 retval = (flash_read64(addr) == cword.ll);
 535                 break;
 536         default:
 537                 retval = 0;
 538                 break;
 539         }
 540         flash_unmap(info, sect, offset, addr);
 541
 542         return retval;
 543 }
 544
 545 /*-----------------------------------------------------------------------
 546  */
 547 static int flash_isset (flash_info_t * info, flash_sect_t sect,
 548                         uint offset, uchar cmd)
 549 {
 550         void *addr;
 551         cfiword_t cword;
 552         int retval;
 553
 554         addr = flash_map (info, sect, offset);
 555         flash_make_cmd (info, cmd, &cword);
 556         switch (info->portwidth) {
 557         case FLASH_CFI_8BIT:
 558                 retval = ((flash_read8(addr) & cword.c) == cword.c);
 559                 break;
 560         case FLASH_CFI_16BIT:
 561                 retval = ((flash_read16(addr) & cword.w) == cword.w);
 562                 break;
 563         case FLASH_CFI_32BIT:
 564                 retval = ((flash_read32(addr) & cword.l) == cword.l);
 565                 break;
 566         case FLASH_CFI_64BIT:
 567                 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
 568                 break;
 569         default:
 570                 retval = 0;
 571                 break;
 572         }
 573         flash_unmap(info, sect, offset, addr);
 574
 575         return retval;
 576 }
 577
 578 /*-----------------------------------------------------------------------
 579  */
 580 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
 581                          uint offset, uchar cmd)
 582 {
 583         void *addr;
 584         cfiword_t cword;
 585         int retval;
 586
 587         addr = flash_map (info, sect, offset);
 588         flash_make_cmd (info, cmd, &cword);
 589         switch (info->portwidth) {
 590         case FLASH_CFI_8BIT:
 591                 retval = flash_read8(addr) != flash_read8(addr);
 592                 break;
 593         case FLASH_CFI_16BIT:
 594                 retval = flash_read16(addr) != flash_read16(addr);
 595                 break;
 596         case FLASH_CFI_32BIT:
 597                 retval = flash_read32(addr) != flash_read32(addr);
 598                 break;
 599         case FLASH_CFI_64BIT:
 600                 retval = flash_read64(addr) != flash_read64(addr);
 601                 break;
 602         default:
 603                 retval = 0;
 604                 break;
 605         }
 606         flash_unmap(info, sect, offset, addr);
 607
 608         return retval;
 609 }
 610
 611 /*
 612  * flash_is_busy - check to see if the flash is busy
 613  *
 614  * This routine checks the status of the chip and returns true if the
 615  * chip is busy.
 616  */
 617 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 618 {
 619         int retval;
 620
 621         switch (info->vendor) {
 622         case CFI_CMDSET_INTEL_PROG_REGIONS:
 623         case CFI_CMDSET_INTEL_STANDARD:
 624         case CFI_CMDSET_INTEL_EXTENDED:
 625                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 626                 break;
 627         case CFI_CMDSET_AMD_STANDARD:
 628         case CFI_CMDSET_AMD_EXTENDED:
 629 #ifdef CONFIG_FLASH_CFI_LEGACY
 630         case CFI_CMDSET_AMD_LEGACY:
 631 #endif
 632                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 633                 break;
 634         default:
 635                 retval = 0;
 636         }
 637         debug ("flash_is_busy: %d\n", retval);
 638         return retval;
 639 }
 640
 641 /*-----------------------------------------------------------------------
 642  *  wait for XSR.7 to be set. Time out with an error if it does not.
 643  *  This routine does not set the flash to read-array mode.
 644  */
 645 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 646                                ulong tout, char *prompt)
 647 {
 648         ulong start;
 649
 650 #if CFG_HZ != 1000
 651         tout *= CFG_HZ/1000;
 652 #endif
 653
 654         /* Wait for command completion */
 655         start = get_timer (0);
 656         while (flash_is_busy (info, sector)) {
 657                 if (get_timer (start) > tout) {
 658                         printf ("Flash %s timeout at address %lx data %lx\n",
 659                                 prompt, info->start[sector],
 660                                 flash_read_long (info, sector, 0));
 661                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 662                         return ERR_TIMOUT;
 663                 }
 664                 udelay (1);             /* also triggers watchdog */
 665         }
 666         return ERR_OK;
 667 }
 668
 669 /*-----------------------------------------------------------------------
 670  * Wait for XSR.7 to be set, if it times out print an error, otherwise
 671  * do a full status check.
 672  *
 673  * This routine sets the flash to read-array mode.
 674  */
 675 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 676                                     ulong tout, char *prompt)
 677 {
 678         int retcode;
 679
 680         retcode = flash_status_check (info, sector, tout, prompt);
 681         switch (info->vendor) {
 682         case CFI_CMDSET_INTEL_PROG_REGIONS:
 683         case CFI_CMDSET_INTEL_EXTENDED:
 684         case CFI_CMDSET_INTEL_STANDARD:
 685                 if ((retcode == ERR_OK)
 686                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 687                         retcode = ERR_INVAL;
 688                         printf ("Flash %s error at address %lx\n", prompt,
 689                                 info->start[sector]);
 690                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
 691                                          FLASH_STATUS_PSLBS)) {
 692                                 puts ("Command Sequence Error.\n");
 693                         } else if (flash_isset (info, sector, 0,
 694                                                 FLASH_STATUS_ECLBS)) {
 695                                 puts ("Block Erase Error.\n");
 696                                 retcode = ERR_NOT_ERASED;
 697                         } else if (flash_isset (info, sector, 0,
 698                                                 FLASH_STATUS_PSLBS)) {
 699                                 puts ("Locking Error\n");
 700                         }
 701                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 702                                 puts ("Block locked.\n");
 703                                 retcode = ERR_PROTECTED;
 704                         }
 705                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 706                                 puts ("Vpp Low Error.\n");
 707                 }
 708                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 709                 break;
 710         default:
 711                 break;
 712         }
 713         return retcode;
 714 }
 715
 716 /*-----------------------------------------------------------------------
 717  */
 718 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 719 {
 720 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 721         unsigned short  w;
 722         unsigned int    l;
 723         unsigned long long ll;
 724 #endif
 725
 726         switch (info->portwidth) {
 727         case FLASH_CFI_8BIT:
 728                 cword->c = c;
 729                 break;
 730         case FLASH_CFI_16BIT:
 731 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 732                 w = c;
 733                 w <<= 8;
 734                 cword->w = (cword->w >> 8) | w;
 735 #else
 736                 cword->w = (cword->w << 8) | c;
 737 #endif
 738                 break;
 739         case FLASH_CFI_32BIT:
 740 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 741                 l = c;
 742                 l <<= 24;
 743                 cword->l = (cword->l >> 8) | l;
 744 #else
 745                 cword->l = (cword->l << 8) | c;
 746 #endif
 747                 break;
 748         case FLASH_CFI_64BIT:
 749 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 750                 ll = c;
 751                 ll <<= 56;
 752                 cword->ll = (cword->ll >> 8) | ll;
 753 #else
 754                 cword->ll = (cword->ll << 8) | c;
 755 #endif
 756                 break;
 757         }
 758 }
 759
 760 /* loop through the sectors from the highest address when the passed
 761  * address is greater or equal to the sector address we have a match
 762  */
 763 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
 764 {
 765         flash_sect_t sector;
 766
 767         for (sector = info->sector_count - 1; sector >= 0; sector--) {
 768                 if (addr >= info->start[sector])
 769                         break;
 770         }
 771         return sector;
 772 }
 773
 774 /*-----------------------------------------------------------------------
 775  */
 776 static int flash_write_cfiword (flash_info_t * info, ulong dest,
 777                                 cfiword_t cword)
 778 {
 779         void *dstaddr;
 780         int flag;
 781
 782         dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
 783
 784         /* Check if Flash is (sufficiently) erased */
 785         switch (info->portwidth) {
 786         case FLASH_CFI_8BIT:
 787                 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
 788                 break;
 789         case FLASH_CFI_16BIT:
 790                 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
 791                 break;
 792         case FLASH_CFI_32BIT:
 793                 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
 794                 break;
 795         case FLASH_CFI_64BIT:
 796                 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
 797                 break;
 798         default:
 799                 flag = 0;
 800                 break;
 801         }
 802         if (!flag) {
 803                 unmap_physmem(dstaddr, info->portwidth);
 804                 return ERR_NOT_ERASED;
 805         }
 806
 807         /* Disable interrupts which might cause a timeout here */
 808         flag = disable_interrupts ();
 809
 810         switch (info->vendor) {
 811         case CFI_CMDSET_INTEL_PROG_REGIONS:
 812         case CFI_CMDSET_INTEL_EXTENDED:
 813         case CFI_CMDSET_INTEL_STANDARD:
 814                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 815                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
 816                 break;
 817         case CFI_CMDSET_AMD_EXTENDED:
 818         case CFI_CMDSET_AMD_STANDARD:
 819 #ifdef CONFIG_FLASH_CFI_LEGACY
 820         case CFI_CMDSET_AMD_LEGACY:
 821 #endif
 822                 flash_unlock_seq (info, 0);
 823                 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 824                 break;
 825         }
 826
 827         switch (info->portwidth) {
 828         case FLASH_CFI_8BIT:
 829                 flash_write8(cword.c, dstaddr);
 830                 break;
 831         case FLASH_CFI_16BIT:
 832                 flash_write16(cword.w, dstaddr);
 833                 break;
 834         case FLASH_CFI_32BIT:
 835                 flash_write32(cword.l, dstaddr);
 836                 break;
 837         case FLASH_CFI_64BIT:
 838                 flash_write64(cword.ll, dstaddr);
 839                 break;
 840         }
 841
 842         /* re-enable interrupts if necessary */
 843         if (flag)
 844                 enable_interrupts ();
 845
 846         unmap_physmem(dstaddr, info->portwidth);
 847
 848         return flash_full_status_check (info, find_sector (info, dest),
 849                                         info->write_tout, "write");
 850 }
 851
 852 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 853
 854 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 855                                   int len)
 856 {
 857         flash_sect_t sector;
 858         int cnt;
 859         int retcode;
 860         void *src = cp;
 861         void *dst = map_physmem(dest, len, MAP_NOCACHE);
 862         void *dst2 = dst;
 863         int flag = 0;
 864         uint offset = 0;
 865         unsigned int shift;
 866         uchar write_cmd;
 867
 868         switch (info->portwidth) {
 869         case FLASH_CFI_8BIT:
 870                 shift = 0;
 871                 break;
 872         case FLASH_CFI_16BIT:
 873                 shift = 1;
 874                 break;
 875         case FLASH_CFI_32BIT:
 876                 shift = 2;
 877                 break;
 878         case FLASH_CFI_64BIT:
 879                 shift = 3;
 880                 break;
 881         default:
 882                 retcode = ERR_INVAL;
 883                 goto out_unmap;
 884         }
 885
 886         cnt = len >> shift;
 887
 888         while ((cnt-- > 0) && (flag == 0)) {
 889                 switch (info->portwidth) {
 890                 case FLASH_CFI_8BIT:
 891                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
 892                                 flash_read8(src));
 893                         src += 1, dst2 += 1;
 894                         break;
 895                 case FLASH_CFI_16BIT:
 896                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
 897                                 flash_read16(src));
 898                         src += 2, dst2 += 2;
 899                         break;
 900                 case FLASH_CFI_32BIT:
 901                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
 902                                 flash_read32(src));
 903                         src += 4, dst2 += 4;
 904                         break;
 905                 case FLASH_CFI_64BIT:
 906                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
 907                                 flash_read64(src));
 908                         src += 8, dst2 += 8;
 909                         break;
 910                 }
 911         }
 912         if (!flag) {
 913                 retcode = ERR_NOT_ERASED;
 914                 goto out_unmap;
 915         }
 916
 917         src = cp;
 918         sector = find_sector (info, dest);
 919
 920         switch (info->vendor) {
 921         case CFI_CMDSET_INTEL_PROG_REGIONS:
 922         case CFI_CMDSET_INTEL_STANDARD:
 923         case CFI_CMDSET_INTEL_EXTENDED:
 924                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 925                                         FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
 926                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 927                 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
 928                 flash_write_cmd (info, sector, 0, write_cmd);
 929                 retcode = flash_status_check (info, sector,
 930                                               info->buffer_write_tout,
 931                                               "write to buffer");
 932                 if (retcode == ERR_OK) {
 933                         /* reduce the number of loops by the width of
 934                          * the port */
 935                         cnt = len >> shift;
 936                         flash_write_cmd (info, sector, 0, cnt - 1);
 937                         while (cnt-- > 0) {
 938                                 switch (info->portwidth) {
 939                                 case FLASH_CFI_8BIT:
 940                                         flash_write8(flash_read8(src), dst);
 941                                         src += 1, dst += 1;
 942                                         break;
 943                                 case FLASH_CFI_16BIT:
 944                                         flash_write16(flash_read16(src), dst);
 945                                         src += 2, dst += 2;
 946                                         break;
 947                                 case FLASH_CFI_32BIT:
 948                                         flash_write32(flash_read32(src), dst);
 949                                         src += 4, dst += 4;
 950                                         break;
 951                                 case FLASH_CFI_64BIT:
 952                                         flash_write64(flash_read64(src), dst);
 953                                         src += 8, dst += 8;
 954                                         break;
 955                                 default:
 956                                         retcode = ERR_INVAL;
 957                                         goto out_unmap;
 958                                 }
 959                         }
 960                         flash_write_cmd (info, sector, 0,
 961                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
 962                         retcode = flash_full_status_check (
 963                                 info, sector, info->buffer_write_tout,
 964                                 "buffer write");
 965                 }
 966
 967                 break;
 968
 969         case CFI_CMDSET_AMD_STANDARD:
 970         case CFI_CMDSET_AMD_EXTENDED:
 971                 flash_unlock_seq(info,0);
 972
 973 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
 974                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
 975 #endif
 976                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
 977                 cnt = len >> shift;
 978                 flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
 979
 980                 switch (info->portwidth) {
 981                 case FLASH_CFI_8BIT:
 982                         while (cnt-- > 0) {
 983                                 flash_write8(flash_read8(src), dst);
 984                                 src += 1, dst += 1;
 985                         }
 986                         break;
 987                 case FLASH_CFI_16BIT:
 988                         while (cnt-- > 0) {
 989                                 flash_write16(flash_read16(src), dst);
 990                                 src += 2, dst += 2;
 991                         }
 992                         break;
 993                 case FLASH_CFI_32BIT:
 994                         while (cnt-- > 0) {
 995                                 flash_write32(flash_read32(src), dst);
 996                                 src += 4, dst += 4;
 997                         }
 998                         break;
 999                 case FLASH_CFI_64BIT:
1000                         while (cnt-- > 0) {
1001                                 flash_write64(flash_read64(src), dst);
1002                                 src += 8, dst += 8;
1003                         }
1004                         break;
1005                 default:
1006                         retcode = ERR_INVAL;
1007                         goto out_unmap;
1008                 }
1009
1010                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1011                 retcode = flash_full_status_check (info, sector,
1012                                                    info->buffer_write_tout,
1013                                                    "buffer write");
1014                 break;
1015
1016         default:
1017                 debug ("Unknown Command Set\n");
1018                 retcode = ERR_INVAL;
1019                 break;
1020         }
1021
1022 out_unmap:
1023         unmap_physmem(dst, len);
1024         return retcode;
1025 }
1026 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1027
1028
1029 /*-----------------------------------------------------------------------
1030  */
1031 int flash_erase (flash_info_t * info, int s_first, int s_last)
1032 {
1033         int rcode = 0;
1034         int prot;
1035         flash_sect_t sect;
1036
1037         if (info->flash_id != FLASH_MAN_CFI) {
1038                 puts ("Can't erase unknown flash type - aborted\n");
1039                 return 1;
1040         }
1041         if ((s_first < 0) || (s_first > s_last)) {
1042                 puts ("- no sectors to erase\n");
1043                 return 1;
1044         }
1045
1046         prot = 0;
1047         for (sect = s_first; sect <= s_last; ++sect) {
1048                 if (info->protect[sect]) {
1049                         prot++;
1050                 }
1051         }
1052         if (prot) {
1053                 printf ("- Warning: %d protected sectors will not be erased!\n",
1054                         prot);
1055         } else {
1056                 putc ('\n');
1057         }
1058
1059
1060         for (sect = s_first; sect <= s_last; sect++) {
1061                 if (info->protect[sect] == 0) { /* not protected */
1062                         switch (info->vendor) {
1063                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1064                         case CFI_CMDSET_INTEL_STANDARD:
1065                         case CFI_CMDSET_INTEL_EXTENDED:
1066                                 flash_write_cmd (info, sect, 0,
1067                                                  FLASH_CMD_CLEAR_STATUS);
1068                                 flash_write_cmd (info, sect, 0,
1069                                                  FLASH_CMD_BLOCK_ERASE);
1070                                 flash_write_cmd (info, sect, 0,
1071                                                  FLASH_CMD_ERASE_CONFIRM);
1072                                 break;
1073                         case CFI_CMDSET_AMD_STANDARD:
1074                         case CFI_CMDSET_AMD_EXTENDED:
1075                                 flash_unlock_seq (info, sect);
1076                                 flash_write_cmd (info, sect,
1077                                                 info->addr_unlock1,
1078                                                 AMD_CMD_ERASE_START);
1079                                 flash_unlock_seq (info, sect);
1080                                 flash_write_cmd (info, sect, 0,
1081                                                  AMD_CMD_ERASE_SECTOR);
1082                                 break;
1083 #ifdef CONFIG_FLASH_CFI_LEGACY
1084                         case CFI_CMDSET_AMD_LEGACY:
1085                                 flash_unlock_seq (info, 0);
1086                                 flash_write_cmd (info, 0, info->addr_unlock1,
1087                                                 AMD_CMD_ERASE_START);
1088                                 flash_unlock_seq (info, 0);
1089                                 flash_write_cmd (info, sect, 0,
1090                                                 AMD_CMD_ERASE_SECTOR);
1091                                 break;
1092 #endif
1093                         default:
1094                                 debug ("Unkown flash vendor %d\n",
1095                                        info->vendor);
1096                                 break;
1097                         }
1098
1099                         if (flash_full_status_check
1100                             (info, sect, info->erase_blk_tout, "erase")) {
1101                                 rcode = 1;
1102                         } else
1103                                 putc ('.');
1104                 }
1105         }
1106         puts (" done\n");
1107         return rcode;
1108 }
1109
1110 /*-----------------------------------------------------------------------
1111  */
1112 void flash_print_info (flash_info_t * info)
1113 {
1114         int i;
1115
1116         if (info->flash_id != FLASH_MAN_CFI) {
1117                 puts ("missing or unknown FLASH type\n");
1118                 return;
1119         }
1120
1121         printf ("%s FLASH (%d x %d)",
1122                 info->name,
1123                 (info->portwidth << 3), (info->chipwidth << 3));
1124         if (info->size < 1024*1024)
1125                 printf ("  Size: %ld kB in %d Sectors\n",
1126                         info->size >> 10, info->sector_count);
1127         else
1128                 printf ("  Size: %ld MB in %d Sectors\n",
1129                         info->size >> 20, info->sector_count);
1130         printf ("  ");
1131         switch (info->vendor) {
1132                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1133                         printf ("Intel Prog Regions");
1134                         break;
1135                 case CFI_CMDSET_INTEL_STANDARD:
1136                         printf ("Intel Standard");
1137                         break;
1138                 case CFI_CMDSET_INTEL_EXTENDED:
1139                         printf ("Intel Extended");
1140                         break;
1141                 case CFI_CMDSET_AMD_STANDARD:
1142                         printf ("AMD Standard");
1143                         break;
1144                 case CFI_CMDSET_AMD_EXTENDED:
1145                         printf ("AMD Extended");
1146                         break;
1147 #ifdef CONFIG_FLASH_CFI_LEGACY
1148                 case CFI_CMDSET_AMD_LEGACY:
1149                         printf ("AMD Legacy");
1150                         break;
1151 #endif
1152                 default:
1153                         printf ("Unknown (%d)", info->vendor);
1154                         break;
1155         }
1156         printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1157                 info->manufacturer_id, info->device_id);
1158         if (info->device_id == 0x7E) {
1159                 printf("%04X", info->device_id2);
1160         }
1161         printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1162                 info->erase_blk_tout,
1163                 info->write_tout);
1164         if (info->buffer_size > 1) {
1165                 printf ("  Buffer write timeout: %ld ms, "
1166                         "buffer size: %d bytes\n",
1167                 info->buffer_write_tout,
1168                 info->buffer_size);
1169         }
1170
1171         puts ("\n  Sector Start Addresses:");
1172         for (i = 0; i < info->sector_count; ++i) {
1173                 if ((i % 5) == 0)
1174                         printf ("\n");
1175 #ifdef CFG_FLASH_EMPTY_INFO
1176                 int k;
1177                 int size;
1178                 int erased;
1179                 volatile unsigned long *flash;
1180
1181                 /*
1182                  * Check if whole sector is erased
1183                  */
1184                 size = flash_sector_size(info, i);
1185                 erased = 1;
1186                 flash = (volatile unsigned long *) info->start[i];
1187                 size = size >> 2;       /* divide by 4 for longword access */
1188                 for (k = 0; k < size; k++) {
1189                         if (*flash++ != 0xffffffff) {
1190                                 erased = 0;
1191                                 break;
1192                         }
1193                 }
1194
1195                 /* print empty and read-only info */
1196                 printf ("  %08lX %c %s ",
1197                         info->start[i],
1198                         erased ? 'E' : ' ',
1199                         info->protect[i] ? "RO" : "  ");
1200 #else   /* ! CFG_FLASH_EMPTY_INFO */
1201                 printf ("  %08lX   %s ",
1202                         info->start[i],
1203                         info->protect[i] ? "RO" : "  ");
1204 #endif
1205         }
1206         putc ('\n');
1207         return;
1208 }
1209
1210 /*-----------------------------------------------------------------------
1211  * This is used in a few places in write_buf() to show programming
1212  * progress.  Making it a function is nasty because it needs to do side
1213  * effect updates to digit and dots.  Repeated code is nasty too, so
1214  * we define it once here.
1215  */
1216 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1217 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1218         dots -= dots_sub; \
1219         if ((scale > 0) && (dots <= 0)) { \
1220                 if ((digit % 5) == 0) \
1221                         printf ("%d", digit / 5); \
1222                 else \
1223                         putc ('.'); \
1224                 digit--; \
1225                 dots += scale; \
1226         }
1227 #else
1228 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1229 #endif
1230
1231 /*-----------------------------------------------------------------------
1232  * Copy memory to flash, returns:
1233  * 0 - OK
1234  * 1 - write timeout
1235  * 2 - Flash not erased
1236  */
1237 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1238 {
1239         ulong wp;
1240         uchar *p;
1241         int aln;
1242         cfiword_t cword;
1243         int i, rc;
1244 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1245         int buffered_size;
1246 #endif
1247 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1248         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1249         int scale = 0;
1250         int dots  = 0;
1251
1252         /*
1253          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1254          */
1255         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1256                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1257                         CONFIG_FLASH_SHOW_PROGRESS);
1258         }
1259 #endif
1260
1261         /* get lower aligned address */
1262         wp = (addr & ~(info->portwidth - 1));
1263
1264         /* handle unaligned start */
1265         if ((aln = addr - wp) != 0) {
1266                 cword.l = 0;
1267                 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1268                 for (i = 0; i < aln; ++i)
1269                         flash_add_byte (info, &cword, flash_read8(p + i));
1270
1271                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1272                         flash_add_byte (info, &cword, *src++);
1273                         cnt--;
1274                 }
1275                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1276                         flash_add_byte (info, &cword, flash_read8(p + i));
1277
1278                 rc = flash_write_cfiword (info, wp, cword);
1279                 unmap_physmem(p, info->portwidth);
1280                 if (rc != 0)
1281                         return rc;
1282
1283                 wp += i;
1284                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1285         }
1286
1287         /* handle the aligned part */
1288 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1289         buffered_size = (info->portwidth / info->chipwidth);
1290         buffered_size *= info->buffer_size;
1291         while (cnt >= info->portwidth) {
1292                 /* prohibit buffer write when buffer_size is 1 */
1293                 if (info->buffer_size == 1) {
1294                         cword.l = 0;
1295                         for (i = 0; i < info->portwidth; i++)
1296                                 flash_add_byte (info, &cword, *src++);
1297                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1298                                 return rc;
1299                         wp += info->portwidth;
1300                         cnt -= info->portwidth;
1301                         continue;
1302                 }
1303
1304                 /* write buffer until next buffered_size aligned boundary */
1305                 i = buffered_size - (wp % buffered_size);
1306                 if (i > cnt)
1307                         i = cnt;
1308                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1309                         return rc;
1310                 i -= i & (info->portwidth - 1);
1311                 wp += i;
1312                 src += i;
1313                 cnt -= i;
1314                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1315         }
1316 #else
1317         while (cnt >= info->portwidth) {
1318                 cword.l = 0;
1319                 for (i = 0; i < info->portwidth; i++) {
1320                         flash_add_byte (info, &cword, *src++);
1321                 }
1322                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1323                         return rc;
1324                 wp += info->portwidth;
1325                 cnt -= info->portwidth;
1326                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1327         }
1328 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1329
1330         if (cnt == 0) {
1331                 return (0);
1332         }
1333
1334         /*
1335          * handle unaligned tail bytes
1336          */
1337         cword.l = 0;
1338         p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1339         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1340                 flash_add_byte (info, &cword, *src++);
1341                 --cnt;
1342         }
1343         for (; i < info->portwidth; ++i)
1344                 flash_add_byte (info, &cword, flash_read8(p + i));
1345         unmap_physmem(p, info->portwidth);
1346
1347         return flash_write_cfiword (info, wp, cword);
1348 }
1349
1350 /*-----------------------------------------------------------------------
1351  */
1352 #ifdef CFG_FLASH_PROTECTION
1353
1354 int flash_real_protect (flash_info_t * info, long sector, int prot)
1355 {
1356         int retcode = 0;
1357
1358         switch (info->vendor) {
1359                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1360                 case CFI_CMDSET_INTEL_STANDARD:
1361                         flash_write_cmd (info, sector, 0,
1362                                          FLASH_CMD_CLEAR_STATUS);
1363                         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1364                         if (prot)
1365                                 flash_write_cmd (info, sector, 0,
1366                                         FLASH_CMD_PROTECT_SET);
1367                         else
1368                                 flash_write_cmd (info, sector, 0,
1369                                         FLASH_CMD_PROTECT_CLEAR);
1370                         break;
1371                 case CFI_CMDSET_AMD_EXTENDED:
1372                 case CFI_CMDSET_AMD_STANDARD:
1373 #ifdef CONFIG_FLASH_CFI_LEGACY
1374                 case CFI_CMDSET_AMD_LEGACY:
1375 #endif
1376                         /* U-Boot only checks the first byte */
1377                         if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1378                                 if (prot) {
1379                                         flash_unlock_seq (info, 0);
1380                                         flash_write_cmd (info, 0,
1381                                                         info->addr_unlock1,
1382                                                         ATM_CMD_SOFTLOCK_START);
1383                                         flash_unlock_seq (info, 0);
1384                                         flash_write_cmd (info, sector, 0,
1385                                                         ATM_CMD_LOCK_SECT);
1386                                 } else {
1387                                         flash_write_cmd (info, 0,
1388                                                         info->addr_unlock1,
1389                                                         AMD_CMD_UNLOCK_START);
1390                                         if (info->device_id == ATM_ID_BV6416)
1391                                                 flash_write_cmd (info, sector,
1392                                                         0, ATM_CMD_UNLOCK_SECT);
1393                                 }
1394                         }
1395                         break;
1396         };
1397
1398         if ((retcode =
1399              flash_full_status_check (info, sector, info->erase_blk_tout,
1400                                       prot ? "protect" : "unprotect")) == 0) {
1401
1402                 info->protect[sector] = prot;
1403
1404                 /*
1405                  * On some of Intel's flash chips (marked via legacy_unlock)
1406                  * unprotect unprotects all locking.
1407                  */
1408                 if ((prot == 0) && (info->legacy_unlock)) {
1409                         flash_sect_t i;
1410
1411                         for (i = 0; i < info->sector_count; i++) {
1412                                 if (info->protect[i])
1413                                         flash_real_protect (info, i, 1);
1414                         }
1415                 }
1416         }
1417         return retcode;
1418 }
1419
1420 /*-----------------------------------------------------------------------
1421  * flash_read_user_serial - read the OneTimeProgramming cells
1422  */
1423 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1424                              int len)
1425 {
1426         uchar *src;
1427         uchar *dst;
1428
1429         dst = buffer;
1430         src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1431         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1432         memcpy (dst, src + offset, len);
1433         flash_write_cmd (info, 0, 0, info->cmd_reset);
1434         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1435 }
1436
1437 /*
1438  * flash_read_factory_serial - read the device Id from the protection area
1439  */
1440 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1441                                 int len)
1442 {
1443         uchar *src;
1444
1445         src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1446         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1447         memcpy (buffer, src + offset, len);
1448         flash_write_cmd (info, 0, 0, info->cmd_reset);
1449         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1450 }
1451
1452 #endif /* CFG_FLASH_PROTECTION */
1453
1454 /*-----------------------------------------------------------------------
1455  * Reverse the order of the erase regions in the CFI QRY structure.
1456  * This is needed for chips that are either a) correctly detected as
1457  * top-boot, or b) buggy.
1458  */
1459 static void cfi_reverse_geometry(struct cfi_qry *qry)
1460 {
1461         unsigned int i, j;
1462         u32 tmp;
1463
1464         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1465                 tmp = qry->erase_region_info[i];
1466                 qry->erase_region_info[i] = qry->erase_region_info[j];
1467                 qry->erase_region_info[j] = tmp;
1468         }
1469 }
1470
1471 /*-----------------------------------------------------------------------
1472  * read jedec ids from device and set corresponding fields in info struct
1473  *
1474  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1475  *
1476  */
1477 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1478 {
1479         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1480         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1481         udelay(1000); /* some flash are slow to respond */
1482         info->manufacturer_id = flash_read_uchar (info,
1483                                         FLASH_OFFSET_MANUFACTURER_ID);
1484         info->device_id = flash_read_uchar (info,
1485                                         FLASH_OFFSET_DEVICE_ID);
1486         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1487 }
1488
1489 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1490 {
1491         info->cmd_reset = FLASH_CMD_RESET;
1492
1493         cmdset_intel_read_jedec_ids(info);
1494         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1495
1496 #ifdef CFG_FLASH_PROTECTION
1497         /* read legacy lock/unlock bit from intel flash */
1498         if (info->ext_addr) {
1499                 info->legacy_unlock = flash_read_uchar (info,
1500                                 info->ext_addr + 5) & 0x08;
1501         }
1502 #endif
1503
1504         return 0;
1505 }
1506
1507 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1508 {
1509         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1510         flash_unlock_seq(info, 0);
1511         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1512         udelay(1000); /* some flash are slow to respond */
1513
1514         info->manufacturer_id = flash_read_uchar (info,
1515                                         FLASH_OFFSET_MANUFACTURER_ID);
1516
1517         switch (info->chipwidth){
1518         case FLASH_CFI_8BIT:
1519                 info->device_id = flash_read_uchar (info,
1520                                                 FLASH_OFFSET_DEVICE_ID);
1521                 if (info->device_id == 0x7E) {
1522                         /* AMD 3-byte (expanded) device ids */
1523                         info->device_id2 = flash_read_uchar (info,
1524                                                 FLASH_OFFSET_DEVICE_ID2);
1525                         info->device_id2 <<= 8;
1526                         info->device_id2 |= flash_read_uchar (info,
1527                                                 FLASH_OFFSET_DEVICE_ID3);
1528                 }
1529                 break;
1530         case FLASH_CFI_16BIT:
1531                 info->device_id = flash_read_word (info,
1532                                                 FLASH_OFFSET_DEVICE_ID);
1533                 break;
1534         default:
1535                 break;
1536         }
1537         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1538 }
1539
1540 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1541 {
1542         info->cmd_reset = AMD_CMD_RESET;
1543
1544         cmdset_amd_read_jedec_ids(info);
1545         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1546
1547         return 0;
1548 }
1549
1550 #ifdef CONFIG_FLASH_CFI_LEGACY
1551 static void flash_read_jedec_ids (flash_info_t * info)
1552 {
1553         info->manufacturer_id = 0;
1554         info->device_id       = 0;
1555         info->device_id2      = 0;
1556
1557         switch (info->vendor) {
1558         case CFI_CMDSET_INTEL_PROG_REGIONS:
1559         case CFI_CMDSET_INTEL_STANDARD:
1560         case CFI_CMDSET_INTEL_EXTENDED:
1561                 cmdset_intel_read_jedec_ids(info);
1562                 break;
1563         case CFI_CMDSET_AMD_STANDARD:
1564         case CFI_CMDSET_AMD_EXTENDED:
1565                 cmdset_amd_read_jedec_ids(info);
1566                 break;
1567         default:
1568                 break;
1569         }
1570 }
1571
1572 /*-----------------------------------------------------------------------
1573  * Call board code to request info about non-CFI flash.
1574  * board_flash_get_legacy needs to fill in at least:
1575  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1576  */
1577 static int flash_detect_legacy(ulong base, int banknum)
1578 {
1579         flash_info_t *info = &flash_info[banknum];
1580
1581         if (board_flash_get_legacy(base, banknum, info)) {
1582                 /* board code may have filled info completely. If not, we
1583                    use JEDEC ID probing. */
1584                 if (!info->vendor) {
1585                         int modes[] = {
1586                                 CFI_CMDSET_AMD_STANDARD,
1587                                 CFI_CMDSET_INTEL_STANDARD
1588                         };
1589                         int i;
1590
1591                         for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1592                                 info->vendor = modes[i];
1593                                 info->start[0] = base;
1594                                 if (info->portwidth == FLASH_CFI_8BIT
1595                                         && info->interface == FLASH_CFI_X8X16) {
1596                                         info->addr_unlock1 = 0x2AAA;
1597                                         info->addr_unlock2 = 0x5555;
1598                                 } else {
1599                                         info->addr_unlock1 = 0x5555;
1600                                         info->addr_unlock2 = 0x2AAA;
1601                                 }
1602                                 flash_read_jedec_ids(info);
1603                                 debug("JEDEC PROBE: ID %x %x %x\n",
1604                                                 info->manufacturer_id,
1605                                                 info->device_id,
1606                                                 info->device_id2);
1607                                 if (jedec_flash_match(info, base))
1608                                         break;
1609                         }
1610                 }
1611
1612                 switch(info->vendor) {
1613                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1614                 case CFI_CMDSET_INTEL_STANDARD:
1615                 case CFI_CMDSET_INTEL_EXTENDED:
1616                         info->cmd_reset = FLASH_CMD_RESET;
1617                         break;
1618                 case CFI_CMDSET_AMD_STANDARD:
1619                 case CFI_CMDSET_AMD_EXTENDED:
1620                 case CFI_CMDSET_AMD_LEGACY:
1621                         info->cmd_reset = AMD_CMD_RESET;
1622                         break;
1623                 }
1624                 info->flash_id = FLASH_MAN_CFI;
1625                 return 1;
1626         }
1627         return 0; /* use CFI */
1628 }
1629 #else
1630 static inline int flash_detect_legacy(ulong base, int banknum)
1631 {
1632         return 0; /* use CFI */
1633 }
1634 #endif
1635
1636 /*-----------------------------------------------------------------------
1637  * detect if flash is compatible with the Common Flash Interface (CFI)
1638  * http://www.jedec.org/download/search/jesd68.pdf
1639  */
1640 static void flash_read_cfi (flash_info_t *info, void *buf,
1641                 unsigned int start, size_t len)
1642 {
1643         u8 *p = buf;
1644         unsigned int i;
1645
1646         for (i = 0; i < len; i++)
1647                 p[i] = flash_read_uchar(info, start + i);
1648 }
1649
1650 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1651 {
1652         int cfi_offset;
1653
1654         /* We do not yet know what kind of commandset to use, so we issue
1655            the reset command in both Intel and AMD variants, in the hope
1656            that AMD flash roms ignore the Intel command. */
1657         flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1658         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1659
1660         for (cfi_offset=0;
1661              cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1662              cfi_offset++) {
1663                 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1664                                  FLASH_CMD_CFI);
1665                 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1666                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1667                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1668                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1669                                         sizeof(struct cfi_qry));
1670                         info->interface = le16_to_cpu(qry->interface_desc);
1671
1672                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1673                         debug ("device interface is %d\n",
1674                                info->interface);
1675                         debug ("found port %d chip %d ",
1676                                info->portwidth, info->chipwidth);
1677                         debug ("port %d bits chip %d bits\n",
1678                                info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1679                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1680
1681                         /* calculate command offsets as in the Linux driver */
1682                         info->addr_unlock1 = 0x555;
1683                         info->addr_unlock2 = 0x2aa;
1684
1685                         /*
1686                          * modify the unlock address if we are
1687                          * in compatibility mode
1688                          */
1689                         if (    /* x8/x16 in x8 mode */
1690                                 ((info->chipwidth == FLASH_CFI_BY8) &&
1691                                         (info->interface == FLASH_CFI_X8X16)) ||
1692                                 /* x16/x32 in x16 mode */
1693                                 ((info->chipwidth == FLASH_CFI_BY16) &&
1694                                         (info->interface == FLASH_CFI_X16X32)))
1695                         {
1696                                 info->addr_unlock1 = 0xaaa;
1697                                 info->addr_unlock2 = 0x555;
1698                         }
1699
1700                         info->name = "CFI conformant";
1701                         return 1;
1702                 }
1703         }
1704
1705         return 0;
1706 }
1707
1708 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1709 {
1710         debug ("flash detect cfi\n");
1711
1712         for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1713              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1714                 for (info->chipwidth = FLASH_CFI_BY8;
1715                      info->chipwidth <= info->portwidth;
1716                      info->chipwidth <<= 1)
1717                         if (__flash_detect_cfi(info, qry))
1718                                 return 1;
1719         }
1720         debug ("not found\n");
1721         return 0;
1722 }
1723
1724 /*
1725  * Manufacturer-specific quirks. Add workarounds for geometry
1726  * reversal, etc. here.
1727  */
1728 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1729 {
1730         /* check if flash geometry needs reversal */
1731         if (qry->num_erase_regions > 1) {
1732                 /* reverse geometry if top boot part */
1733                 if (info->cfi_version < 0x3131) {
1734                         /* CFI < 1.1, try to guess from device id */
1735                         if ((info->device_id & 0x80) != 0)
1736                                 cfi_reverse_geometry(qry);
1737                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1738                         /* CFI >= 1.1, deduct from top/bottom flag */
1739                         /* note: ext_addr is valid since cfi_version > 0 */
1740                         cfi_reverse_geometry(qry);
1741                 }
1742         }
1743 }
1744
1745 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1746 {
1747         int reverse_geometry = 0;
1748
1749         /* Check the "top boot" bit in the PRI */
1750         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1751                 reverse_geometry = 1;
1752
1753         /* AT49BV6416(T) list the erase regions in the wrong order.
1754          * However, the device ID is identical with the non-broken
1755          * AT49BV642D since u-boot only reads the low byte (they
1756          * differ in the high byte.) So leave out this fixup for now.
1757          */
1758 #if 0
1759         if (info->device_id == 0xd6 || info->device_id == 0xd2)
1760                 reverse_geometry = !reverse_geometry;
1761 #endif
1762
1763         if (reverse_geometry)
1764                 cfi_reverse_geometry(qry);
1765 }
1766
1767 /*
1768  * The following code cannot be run from FLASH!
1769  *
1770  */
1771 ulong flash_get_size (ulong base, int banknum)
1772 {
1773         flash_info_t *info = &flash_info[banknum];
1774         int i, j;
1775         flash_sect_t sect_cnt;
1776         unsigned long sector;
1777         unsigned long tmp;
1778         int size_ratio;
1779         uchar num_erase_regions;
1780         int erase_region_size;
1781         int erase_region_count;
1782         struct cfi_qry qry;
1783
1784         memset(&qry, 0, sizeof(qry));
1785
1786         info->ext_addr = 0;
1787         info->cfi_version = 0;
1788 #ifdef CFG_FLASH_PROTECTION
1789         info->legacy_unlock = 0;
1790 #endif
1791
1792         info->start[0] = base;
1793
1794         if (flash_detect_cfi (info, &qry)) {
1795                 info->vendor = le16_to_cpu(qry.p_id);
1796                 info->ext_addr = le16_to_cpu(qry.p_adr);
1797                 num_erase_regions = qry.num_erase_regions;
1798
1799                 if (info->ext_addr) {
1800                         info->cfi_version = (ushort) flash_read_uchar (info,
1801                                                 info->ext_addr + 3) << 8;
1802                         info->cfi_version |= (ushort) flash_read_uchar (info,
1803                                                 info->ext_addr + 4);
1804                 }
1805
1806 #ifdef DEBUG
1807                 flash_printqry (&qry);
1808 #endif
1809
1810                 switch (info->vendor) {
1811                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1812                 case CFI_CMDSET_INTEL_STANDARD:
1813                 case CFI_CMDSET_INTEL_EXTENDED:
1814                         cmdset_intel_init(info, &qry);
1815                         break;
1816                 case CFI_CMDSET_AMD_STANDARD:
1817                 case CFI_CMDSET_AMD_EXTENDED:
1818                         cmdset_amd_init(info, &qry);
1819                         break;
1820                 default:
1821                         printf("CFI: Unknown command set 0x%x\n",
1822                                         info->vendor);
1823                         /*
1824                          * Unfortunately, this means we don't know how
1825                          * to get the chip back to Read mode. Might
1826                          * as well try an Intel-style reset...
1827                          */
1828                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1829                         return 0;
1830                 }
1831
1832                 /* Do manufacturer-specific fixups */
1833                 switch (info->manufacturer_id) {
1834                 case 0x0001:
1835                         flash_fixup_amd(info, &qry);
1836                         break;
1837                 case 0x001f:
1838                         flash_fixup_atmel(info, &qry);
1839                         break;
1840                 }
1841
1842                 debug ("manufacturer is %d\n", info->vendor);
1843                 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1844                 debug ("device id is 0x%x\n", info->device_id);
1845                 debug ("device id2 is 0x%x\n", info->device_id2);
1846                 debug ("cfi version is 0x%04x\n", info->cfi_version);
1847
1848                 size_ratio = info->portwidth / info->chipwidth;
1849                 /* if the chip is x8/x16 reduce the ratio by half */
1850                 if ((info->interface == FLASH_CFI_X8X16)
1851                     && (info->chipwidth == FLASH_CFI_BY8)) {
1852                         size_ratio >>= 1;
1853                 }
1854                 debug ("size_ratio %d port %d bits chip %d bits\n",
1855                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1856                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1857                 debug ("found %d erase regions\n", num_erase_regions);
1858                 sect_cnt = 0;
1859                 sector = base;
1860                 for (i = 0; i < num_erase_regions; i++) {
1861                         if (i > NUM_ERASE_REGIONS) {
1862                                 printf ("%d erase regions found, only %d used\n",
1863                                         num_erase_regions, NUM_ERASE_REGIONS);
1864                                 break;
1865                         }
1866
1867                         tmp = le32_to_cpu(qry.erase_region_info[i]);
1868                         debug("erase region %u: 0x%08lx\n", i, tmp);
1869
1870                         erase_region_count = (tmp & 0xffff) + 1;
1871                         tmp >>= 16;
1872                         erase_region_size =
1873                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1874                         debug ("erase_region_count = %d erase_region_size = %d\n",
1875                                 erase_region_count, erase_region_size);
1876                         for (j = 0; j < erase_region_count; j++) {
1877                                 if (sect_cnt >= CFG_MAX_FLASH_SECT) {
1878                                         printf("ERROR: too many flash sectors\n");
1879                                         break;
1880                                 }
1881                                 info->start[sect_cnt] = sector;
1882                                 sector += (erase_region_size * size_ratio);
1883
1884                                 /*
1885                                  * Only read protection status from
1886                                  * supported devices (intel...)
1887                                  */
1888                                 switch (info->vendor) {
1889                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1890                                 case CFI_CMDSET_INTEL_EXTENDED:
1891                                 case CFI_CMDSET_INTEL_STANDARD:
1892                                         info->protect[sect_cnt] =
1893                                                 flash_isset (info, sect_cnt,
1894                                                              FLASH_OFFSET_PROTECT,
1895                                                              FLASH_STATUS_PROTECT);
1896                                         break;
1897                                 default:
1898                                         /* default: not protected */
1899                                         info->protect[sect_cnt] = 0;
1900                                 }
1901
1902                                 sect_cnt++;
1903                         }
1904                 }
1905
1906                 info->sector_count = sect_cnt;
1907                 info->size = 1 << qry.dev_size;
1908                 /* multiply the size by the number of chips */
1909                 info->size *= size_ratio;
1910                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1911                 tmp = 1 << qry.block_erase_timeout_typ;
1912                 info->erase_blk_tout = tmp *
1913                         (1 << qry.block_erase_timeout_max);
1914                 tmp = (1 << qry.buf_write_timeout_typ) *
1915                         (1 << qry.buf_write_timeout_max);
1916
1917                 /* round up when converting to ms */
1918                 info->buffer_write_tout = (tmp + 999) / 1000;
1919                 tmp = (1 << qry.word_write_timeout_typ) *
1920                         (1 << qry.word_write_timeout_max);
1921                 /* round up when converting to ms */
1922                 info->write_tout = (tmp + 999) / 1000;
1923                 info->flash_id = FLASH_MAN_CFI;
1924                 if ((info->interface == FLASH_CFI_X8X16) &&
1925                     (info->chipwidth == FLASH_CFI_BY8)) {
1926                         /* XXX - Need to test on x8/x16 in parallel. */
1927                         info->portwidth >>= 1;
1928                 }
1929         }
1930
1931         flash_write_cmd (info, 0, 0, info->cmd_reset);
1932         return (info->size);
1933 }
1934
1935 /*-----------------------------------------------------------------------
1936  */
1937 unsigned long flash_init (void)
1938 {
1939         unsigned long size = 0;
1940         int i;
1941 #if defined(CFG_FLASH_AUTOPROTECT_LIST)
1942         struct apl_s {
1943                 ulong start;
1944                 ulong size;
1945         } apl[] = CFG_FLASH_AUTOPROTECT_LIST;
1946 #endif
1947
1948 #ifdef CFG_FLASH_PROTECTION
1949         char *s = getenv("unlock");
1950 #endif
1951
1952         /* Init: no FLASHes known */
1953         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
1954                 flash_info[i].flash_id = FLASH_UNKNOWN;
1955
1956                 if (!flash_detect_legacy (bank_base[i], i))
1957                         flash_get_size (bank_base[i], i);
1958                 size += flash_info[i].size;
1959                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1960 #ifndef CFG_FLASH_QUIET_TEST
1961                         printf ("## Unknown FLASH on Bank %d "
1962                                 "- Size = 0x%08lx = %ld MB\n",
1963                                 i+1, flash_info[i].size,
1964                                 flash_info[i].size << 20);
1965 #endif /* CFG_FLASH_QUIET_TEST */
1966                 }
1967 #ifdef CFG_FLASH_PROTECTION
1968                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
1969                         /*
1970                          * Only the U-Boot image and it's environment
1971                          * is protected, all other sectors are
1972                          * unprotected (unlocked) if flash hardware
1973                          * protection is used (CFG_FLASH_PROTECTION)
1974                          * and the environment variable "unlock" is
1975                          * set to "yes".
1976                          */
1977                         if (flash_info[i].legacy_unlock) {
1978                                 int k;
1979
1980                                 /*
1981                                  * Disable legacy_unlock temporarily,
1982                                  * since flash_real_protect would
1983                                  * relock all other sectors again
1984                                  * otherwise.
1985                                  */
1986                                 flash_info[i].legacy_unlock = 0;
1987
1988                                 /*
1989                                  * Legacy unlocking (e.g. Intel J3) ->
1990                                  * unlock only one sector. This will
1991                                  * unlock all sectors.
1992                                  */
1993                                 flash_real_protect (&flash_info[i], 0, 0);
1994
1995                                 flash_info[i].legacy_unlock = 1;
1996
1997                                 /*
1998                                  * Manually mark other sectors as
1999                                  * unlocked (unprotected)
2000                                  */
2001                                 for (k = 1; k < flash_info[i].sector_count; k++)
2002                                         flash_info[i].protect[k] = 0;
2003                         } else {
2004                                 /*
2005                                  * No legancy unlocking -> unlock all sectors
2006                                  */
2007                                 flash_protect (FLAG_PROTECT_CLEAR,
2008                                                flash_info[i].start[0],
2009                                                flash_info[i].start[0]
2010                                                + flash_info[i].size - 1,
2011                                                &flash_info[i]);
2012                         }
2013                 }
2014 #endif /* CFG_FLASH_PROTECTION */
2015         }
2016
2017         /* Monitor protection ON by default */
2018 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
2019         flash_protect (FLAG_PROTECT_SET,
2020                        CFG_MONITOR_BASE,
2021                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
2022                        flash_get_info(CFG_MONITOR_BASE));
2023 #endif
2024
2025         /* Environment protection ON by default */
2026 #ifdef CFG_ENV_IS_IN_FLASH
2027         flash_protect (FLAG_PROTECT_SET,
2028                        CFG_ENV_ADDR,
2029                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
2030                        flash_get_info(CFG_ENV_ADDR));
2031 #endif
2032
2033         /* Redundant environment protection ON by default */
2034 #ifdef CFG_ENV_ADDR_REDUND
2035         flash_protect (FLAG_PROTECT_SET,
2036                        CFG_ENV_ADDR_REDUND,
2037                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
2038                        flash_get_info(CFG_ENV_ADDR_REDUND));
2039 #endif
2040
2041 #if defined(CFG_FLASH_AUTOPROTECT_LIST)
2042         for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2043                 debug("autoprotecting from %08x to %08x\n",
2044                       apl[i].start, apl[i].start + apl[i].size - 1);
2045                 flash_protect (FLAG_PROTECT_SET,
2046                                apl[i].start,
2047                                apl[i].start + apl[i].size - 1,
2048                                flash_get_info(apl[i].start));
2049         }
2050 #endif
2051         return (size);
2052 }
2053
2054 #endif /* CFG_FLASH_CFI */