drivers/mtd/cfi_flash.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2002-2004
   4  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   5  *
   6  * Copyright (C) 2003 Arabella Software Ltd.
   7  * Yuli Barcohen <yuli@arabellasw.com>
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  *
  12  * Copyright (C) 2006
  13  * Tolunay Orkun <listmember@orkun.us>
  14  */
  15
  16 /* The DEBUG define must be before common to enable debugging */
  17 /* #define DEBUG        */
  18
  19 #include <common.h>
  20 #include <console.h>
  21 #include <dm.h>
  22 #include <env.h>
  23 #include <errno.h>
  24 #include <fdt_support.h>
  25 #include <flash.h>
  26 #include <irq_func.h>
  27 #include <asm/processor.h>
  28 #include <asm/io.h>
  29 #include <asm/byteorder.h>
  30 #include <asm/unaligned.h>
  31 #include <env_internal.h>
  32 #include <mtd/cfi_flash.h>
  33 #include <watchdog.h>
  34
  35 /*
  36  * This file implements a Common Flash Interface (CFI) driver for
  37  * U-Boot.
  38  *
  39  * The width of the port and the width of the chips are determined at
  40  * initialization.  These widths are used to calculate the address for
  41  * access CFI data structures.
  42  *
  43  * References
  44  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  45  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  46  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  47  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  48  * AMD CFI Specification, Release 2.0 December 1, 2001
  49  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  50  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  51  *
  52  * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  53  * reading and writing ... (yes there is such a Hardware).
  54  */
  55
  56 DECLARE_GLOBAL_DATA_PTR;
  57
  58 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  59 #ifdef CONFIG_FLASH_CFI_MTD
  60 static uint flash_verbose = 1;
  61 #else
  62 #define flash_verbose 1
  63 #endif
  64
  65 flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
  66
  67 /*
  68  * Check if chip width is defined. If not, start detecting with 8bit.
  69  */
  70 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  71 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
  72 #endif
  73
  74 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  75 #define __maybe_weak __weak
  76 #else
  77 #define __maybe_weak static
  78 #endif
  79
  80 /*
  81  * 0xffff is an undefined value for the configuration register. When
  82  * this value is returned, the configuration register shall not be
  83  * written at all (default mode).
  84  */
  85 static u16 cfi_flash_config_reg(int i)
  86 {
  87 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  88         return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  89 #else
  90         return 0xffff;
  91 #endif
  92 }
  93
  94 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  95 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  96 #else
  97 int cfi_flash_num_flash_banks;
  98 #endif
  99
 100 #ifdef CONFIG_CFI_FLASH /* for driver model */
 101 static void cfi_flash_init_dm(void)
 102 {
 103         struct udevice *dev;
 104
 105         cfi_flash_num_flash_banks = 0;
 106         /*
 107          * The uclass_first_device() will probe the first device and
 108          * uclass_next_device() will probe the rest if they exist. So
 109          * that cfi_flash_probe() will get called assigning the base
 110          * addresses that are available.
 111          */
 112         for (uclass_first_device(UCLASS_MTD, &dev);
 113              dev;
 114              uclass_next_device(&dev)) {
 115         }
 116 }
 117
 118 phys_addr_t cfi_flash_bank_addr(int i)
 119 {
 120         return flash_info[i].base;
 121 }
 122 #else
 123 __weak phys_addr_t cfi_flash_bank_addr(int i)
 124 {
 125         return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
 126 }
 127 #endif
 128
 129 __weak unsigned long cfi_flash_bank_size(int i)
 130 {
 131 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
 132         return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
 133 #else
 134         return 0;
 135 #endif
 136 }
 137
 138 __maybe_weak void flash_write8(u8 value, void *addr)
 139 {
 140         __raw_writeb(value, addr);
 141 }
 142
 143 __maybe_weak void flash_write16(u16 value, void *addr)
 144 {
 145         __raw_writew(value, addr);
 146 }
 147
 148 __maybe_weak void flash_write32(u32 value, void *addr)
 149 {
 150         __raw_writel(value, addr);
 151 }
 152
 153 __maybe_weak void flash_write64(u64 value, void *addr)
 154 {
 155         /* No architectures currently implement __raw_writeq() */
 156         *(volatile u64 *)addr = value;
 157 }
 158
 159 __maybe_weak u8 flash_read8(void *addr)
 160 {
 161         return __raw_readb(addr);
 162 }
 163
 164 __maybe_weak u16 flash_read16(void *addr)
 165 {
 166         return __raw_readw(addr);
 167 }
 168
 169 __maybe_weak u32 flash_read32(void *addr)
 170 {
 171         return __raw_readl(addr);
 172 }
 173
 174 __maybe_weak u64 flash_read64(void *addr)
 175 {
 176         /* No architectures currently implement __raw_readq() */
 177         return *(volatile u64 *)addr;
 178 }
 179
 180 /*-----------------------------------------------------------------------
 181  */
 182 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
 183         (defined(CONFIG_SYS_MONITOR_BASE) && \
 184         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
 185 static flash_info_t *flash_get_info(ulong base)
 186 {
 187         int i;
 188         flash_info_t *info;
 189
 190         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 191                 info = &flash_info[i];
 192                 if (info->size && info->start[0] <= base &&
 193                     base <= info->start[0] + info->size - 1)
 194                         return info;
 195         }
 196
 197         return NULL;
 198 }
 199 #endif
 200
 201 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 202 {
 203         if (sect != (info->sector_count - 1))
 204                 return info->start[sect + 1] - info->start[sect];
 205         else
 206                 return info->start[0] + info->size - info->start[sect];
 207 }
 208
 209 /*-----------------------------------------------------------------------
 210  * create an address based on the offset and the port width
 211  */
 212 static inline void *
 213 flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
 214 {
 215         unsigned int byte_offset = offset * info->portwidth;
 216
 217         return (void *)(info->start[sect] + byte_offset);
 218 }
 219
 220 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 221                                unsigned int offset, void *addr)
 222 {
 223 }
 224
 225 /*-----------------------------------------------------------------------
 226  * make a proper sized command based on the port and chip widths
 227  */
 228 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 229 {
 230         int i;
 231         int cword_offset;
 232         int cp_offset;
 233 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 234         u32 cmd_le = cpu_to_le32(cmd);
 235 #endif
 236         uchar val;
 237         uchar *cp = (uchar *) cmdbuf;
 238
 239         for (i = info->portwidth; i > 0; i--) {
 240                 cword_offset = (info->portwidth - i) % info->chipwidth;
 241 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 242                 cp_offset = info->portwidth - i;
 243                 val = *((uchar *)&cmd_le + cword_offset);
 244 #else
 245                 cp_offset = i - 1;
 246                 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
 247 #endif
 248                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 249         }
 250 }
 251
 252 #ifdef DEBUG
 253 /*-----------------------------------------------------------------------
 254  * Debug support
 255  */
 256 static void print_longlong(char *str, unsigned long long data)
 257 {
 258         int i;
 259         char *cp;
 260
 261         cp = (char *)&data;
 262         for (i = 0; i < 8; i++)
 263                 sprintf(&str[i * 2], "%2.2x", *cp++);
 264 }
 265
 266 static void flash_printqry(struct cfi_qry *qry)
 267 {
 268         u8 *p = (u8 *)qry;
 269         int x, y;
 270
 271         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 272                 debug("%02x : ", x);
 273                 for (y = 0; y < 16; y++)
 274                         debug("%2.2x ", p[x + y]);
 275                 debug(" ");
 276                 for (y = 0; y < 16; y++) {
 277                         unsigned char c = p[x + y];
 278
 279                         if (c >= 0x20 && c <= 0x7e)
 280                                 debug("%c", c);
 281                         else
 282                                 debug(".");
 283                 }
 284                 debug("\n");
 285         }
 286 }
 287 #endif
 288
 289 /*-----------------------------------------------------------------------
 290  * read a character at a port width address
 291  */
 292 static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
 293 {
 294         uchar *cp;
 295         uchar retval;
 296
 297         cp = flash_map(info, 0, offset);
 298 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 299         retval = flash_read8(cp);
 300 #else
 301         retval = flash_read8(cp + info->portwidth - 1);
 302 #endif
 303         flash_unmap(info, 0, offset, cp);
 304         return retval;
 305 }
 306
 307 /*-----------------------------------------------------------------------
 308  * read a word at a port width address, assume 16bit bus
 309  */
 310 static inline ushort flash_read_word(flash_info_t *info, uint offset)
 311 {
 312         ushort *addr, retval;
 313
 314         addr = flash_map(info, 0, offset);
 315         retval = flash_read16(addr);
 316         flash_unmap(info, 0, offset, addr);
 317         return retval;
 318 }
 319
 320 /*-----------------------------------------------------------------------
 321  * read a long word by picking the least significant byte of each maximum
 322  * port size word. Swap for ppc format.
 323  */
 324 static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 325                               uint offset)
 326 {
 327         uchar *addr;
 328         ulong retval;
 329
 330 #ifdef DEBUG
 331         int x;
 332 #endif
 333         addr = flash_map(info, sect, offset);
 334
 335 #ifdef DEBUG
 336         debug("long addr is at %p info->portwidth = %d\n", addr,
 337               info->portwidth);
 338         for (x = 0; x < 4 * info->portwidth; x++)
 339                 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 340 #endif
 341 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 342         retval = ((flash_read8(addr) << 16) |
 343                   (flash_read8(addr + info->portwidth) << 24) |
 344                   (flash_read8(addr + 2 * info->portwidth)) |
 345                   (flash_read8(addr + 3 * info->portwidth) << 8));
 346 #else
 347         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 348                   (flash_read8(addr + info->portwidth - 1) << 16) |
 349                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 350                   (flash_read8(addr + 3 * info->portwidth - 1)));
 351 #endif
 352         flash_unmap(info, sect, offset, addr);
 353
 354         return retval;
 355 }
 356
 357 /*
 358  * Write a proper sized command to the correct address
 359  */
 360 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 361                             uint offset, u32 cmd)
 362 {
 363         void *addr;
 364         cfiword_t cword;
 365
 366         addr = flash_map(info, sect, offset);
 367         flash_make_cmd(info, cmd, &cword);
 368         switch (info->portwidth) {
 369         case FLASH_CFI_8BIT:
 370                 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 371                       cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 372                 flash_write8(cword.w8, addr);
 373                 break;
 374         case FLASH_CFI_16BIT:
 375                 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 376                       cmd, cword.w16,
 377                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 378                 flash_write16(cword.w16, addr);
 379                 break;
 380         case FLASH_CFI_32BIT:
 381                 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
 382                       cmd, cword.w32,
 383                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 384                 flash_write32(cword.w32, addr);
 385                 break;
 386         case FLASH_CFI_64BIT:
 387 #ifdef DEBUG
 388                 {
 389                         char str[20];
 390
 391                         print_longlong(str, cword.w64);
 392
 393                         debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 394                               addr, cmd, str,
 395                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 396                 }
 397 #endif
 398                 flash_write64(cword.w64, addr);
 399                 break;
 400         }
 401
 402         /* Ensure all the instructions are fully finished */
 403         sync();
 404
 405         flash_unmap(info, sect, offset, addr);
 406 }
 407
 408 static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
 409 {
 410         flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 411         flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 412 }
 413
 414 /*-----------------------------------------------------------------------
 415  */
 416 static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
 417                          uchar cmd)
 418 {
 419         void *addr;
 420         cfiword_t cword;
 421         int retval;
 422
 423         addr = flash_map(info, sect, offset);
 424         flash_make_cmd(info, cmd, &cword);
 425
 426         debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 427         switch (info->portwidth) {
 428         case FLASH_CFI_8BIT:
 429                 debug("is= %x %x\n", flash_read8(addr), cword.w8);
 430                 retval = (flash_read8(addr) == cword.w8);
 431                 break;
 432         case FLASH_CFI_16BIT:
 433                 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
 434                 retval = (flash_read16(addr) == cword.w16);
 435                 break;
 436         case FLASH_CFI_32BIT:
 437                 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
 438                 retval = (flash_read32(addr) == cword.w32);
 439                 break;
 440         case FLASH_CFI_64BIT:
 441 #ifdef DEBUG
 442                 {
 443                         char str1[20];
 444                         char str2[20];
 445
 446                         print_longlong(str1, flash_read64(addr));
 447                         print_longlong(str2, cword.w64);
 448                         debug("is= %s %s\n", str1, str2);
 449                 }
 450 #endif
 451                 retval = (flash_read64(addr) == cword.w64);
 452                 break;
 453         default:
 454                 retval = 0;
 455                 break;
 456         }
 457         flash_unmap(info, sect, offset, addr);
 458
 459         return retval;
 460 }
 461
 462 /*-----------------------------------------------------------------------
 463  */
 464 static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
 465                        uchar cmd)
 466 {
 467         void *addr;
 468         cfiword_t cword;
 469         int retval;
 470
 471         addr = flash_map(info, sect, offset);
 472         flash_make_cmd(info, cmd, &cword);
 473         switch (info->portwidth) {
 474         case FLASH_CFI_8BIT:
 475                 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
 476                 break;
 477         case FLASH_CFI_16BIT:
 478                 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
 479                 break;
 480         case FLASH_CFI_32BIT:
 481                 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
 482                 break;
 483         case FLASH_CFI_64BIT:
 484                 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
 485                 break;
 486         default:
 487                 retval = 0;
 488                 break;
 489         }
 490         flash_unmap(info, sect, offset, addr);
 491
 492         return retval;
 493 }
 494
 495 /*-----------------------------------------------------------------------
 496  */
 497 static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
 498                         uchar cmd)
 499 {
 500         u8 *addr;
 501         cfiword_t cword;
 502         int retval;
 503
 504         addr = flash_map(info, sect, offset);
 505         flash_make_cmd(info, cmd, &cword);
 506         switch (info->portwidth) {
 507         case FLASH_CFI_8BIT:
 508                 retval = flash_read8(addr) != flash_read8(addr);
 509                 break;
 510         case FLASH_CFI_16BIT:
 511                 retval = flash_read16(addr) != flash_read16(addr);
 512                 break;
 513         case FLASH_CFI_32BIT:
 514                 retval = flash_read32(addr) != flash_read32(addr);
 515                 break;
 516         case FLASH_CFI_64BIT:
 517                 retval = ((flash_read32(addr) != flash_read32(addr)) ||
 518                            (flash_read32(addr + 4) != flash_read32(addr + 4)));
 519                 break;
 520         default:
 521                 retval = 0;
 522                 break;
 523         }
 524         flash_unmap(info, sect, offset, addr);
 525
 526         return retval;
 527 }
 528
 529 /*
 530  * flash_is_busy - check to see if the flash is busy
 531  *
 532  * This routine checks the status of the chip and returns true if the
 533  * chip is busy.
 534  */
 535 static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 536 {
 537         int retval;
 538
 539         switch (info->vendor) {
 540         case CFI_CMDSET_INTEL_PROG_REGIONS:
 541         case CFI_CMDSET_INTEL_STANDARD:
 542         case CFI_CMDSET_INTEL_EXTENDED:
 543                 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
 544                 break;
 545         case CFI_CMDSET_AMD_STANDARD:
 546         case CFI_CMDSET_AMD_EXTENDED:
 547 #ifdef CONFIG_FLASH_CFI_LEGACY
 548         case CFI_CMDSET_AMD_LEGACY:
 549 #endif
 550                 if (info->sr_supported) {
 551                         flash_write_cmd(info, sect, info->addr_unlock1,
 552                                         FLASH_CMD_READ_STATUS);
 553                         retval = !flash_isset(info, sect, 0,
 554                                               FLASH_STATUS_DONE);
 555                 } else {
 556                         retval = flash_toggle(info, sect, 0,
 557                                               AMD_STATUS_TOGGLE);
 558                 }
 559
 560                 break;
 561         default:
 562                 retval = 0;
 563         }
 564         debug("%s: %d\n", __func__, retval);
 565         return retval;
 566 }
 567
 568 /*-----------------------------------------------------------------------
 569  *  wait for XSR.7 to be set. Time out with an error if it does not.
 570  *  This routine does not set the flash to read-array mode.
 571  */
 572 static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 573                               ulong tout, char *prompt)
 574 {
 575         ulong start;
 576
 577 #if CONFIG_SYS_HZ != 1000
 578         /* Avoid overflow for large HZ */
 579         if ((ulong)CONFIG_SYS_HZ > 100000)
 580                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 581         else
 582                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 583 #endif
 584
 585         /* Wait for command completion */
 586 #ifdef CONFIG_SYS_LOW_RES_TIMER
 587         reset_timer();
 588 #endif
 589         start = get_timer(0);
 590         WATCHDOG_RESET();
 591         while (flash_is_busy(info, sector)) {
 592                 if (get_timer(start) > tout) {
 593                         printf("Flash %s timeout at address %lx data %lx\n",
 594                                prompt, info->start[sector],
 595                                flash_read_long(info, sector, 0));
 596                         flash_write_cmd(info, sector, 0, info->cmd_reset);
 597                         udelay(1);
 598                         return ERR_TIMEOUT;
 599                 }
 600                 udelay(1);              /* also triggers watchdog */
 601         }
 602         return ERR_OK;
 603 }
 604
 605 /*-----------------------------------------------------------------------
 606  * Wait for XSR.7 to be set, if it times out print an error, otherwise
 607  * do a full status check.
 608  *
 609  * This routine sets the flash to read-array mode.
 610  */
 611 static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 612                                    ulong tout, char *prompt)
 613 {
 614         int retcode;
 615
 616         retcode = flash_status_check(info, sector, tout, prompt);
 617         switch (info->vendor) {
 618         case CFI_CMDSET_INTEL_PROG_REGIONS:
 619         case CFI_CMDSET_INTEL_EXTENDED:
 620         case CFI_CMDSET_INTEL_STANDARD:
 621                 if (retcode == ERR_OK &&
 622                     !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 623                         retcode = ERR_INVAL;
 624                         printf("Flash %s error at address %lx\n", prompt,
 625                                info->start[sector]);
 626                         if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
 627                                          FLASH_STATUS_PSLBS)) {
 628                                 puts("Command Sequence Error.\n");
 629                         } else if (flash_isset(info, sector, 0,
 630                                                 FLASH_STATUS_ECLBS)) {
 631                                 puts("Block Erase Error.\n");
 632                                 retcode = ERR_NOT_ERASED;
 633                         } else if (flash_isset(info, sector, 0,
 634                                                 FLASH_STATUS_PSLBS)) {
 635                                 puts("Locking Error\n");
 636                         }
 637                         if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
 638                                 puts("Block locked.\n");
 639                                 retcode = ERR_PROTECTED;
 640                         }
 641                         if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
 642                                 puts("Vpp Low Error.\n");
 643                 }
 644                 flash_write_cmd(info, sector, 0, info->cmd_reset);
 645                 udelay(1);
 646                 break;
 647         default:
 648                 break;
 649         }
 650         return retcode;
 651 }
 652
 653 static int use_flash_status_poll(flash_info_t *info)
 654 {
 655 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 656         if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
 657             info->vendor == CFI_CMDSET_AMD_STANDARD)
 658                 return 1;
 659 #endif
 660         return 0;
 661 }
 662
 663 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 664                              ulong tout, char *prompt)
 665 {
 666 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 667         ulong start;
 668         int ready;
 669
 670 #if CONFIG_SYS_HZ != 1000
 671         /* Avoid overflow for large HZ */
 672         if ((ulong)CONFIG_SYS_HZ > 100000)
 673                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 674         else
 675                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 676 #endif
 677
 678         /* Wait for command completion */
 679 #ifdef CONFIG_SYS_LOW_RES_TIMER
 680         reset_timer();
 681 #endif
 682         start = get_timer(0);
 683         WATCHDOG_RESET();
 684         while (1) {
 685                 switch (info->portwidth) {
 686                 case FLASH_CFI_8BIT:
 687                         ready = flash_read8(dst) == flash_read8(src);
 688                         break;
 689                 case FLASH_CFI_16BIT:
 690                         ready = flash_read16(dst) == flash_read16(src);
 691                         break;
 692                 case FLASH_CFI_32BIT:
 693                         ready = flash_read32(dst) == flash_read32(src);
 694                         break;
 695                 case FLASH_CFI_64BIT:
 696                         ready = flash_read64(dst) == flash_read64(src);
 697                         break;
 698                 default:
 699                         ready = 0;
 700                         break;
 701                 }
 702                 if (ready)
 703                         break;
 704                 if (get_timer(start) > tout) {
 705                         printf("Flash %s timeout at address %lx data %lx\n",
 706                                prompt, (ulong)dst, (ulong)flash_read8(dst));
 707                         return ERR_TIMEOUT;
 708                 }
 709                 udelay(1);              /* also triggers watchdog */
 710         }
 711 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
 712         return ERR_OK;
 713 }
 714
 715 /*-----------------------------------------------------------------------
 716  */
 717 static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
 718 {
 719 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 720         unsigned short  w;
 721         unsigned int    l;
 722         unsigned long long ll;
 723 #endif
 724
 725         switch (info->portwidth) {
 726         case FLASH_CFI_8BIT:
 727                 cword->w8 = c;
 728                 break;
 729         case FLASH_CFI_16BIT:
 730 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 731                 w = c;
 732                 w <<= 8;
 733                 cword->w16 = (cword->w16 >> 8) | w;
 734 #else
 735                 cword->w16 = (cword->w16 << 8) | c;
 736 #endif
 737                 break;
 738         case FLASH_CFI_32BIT:
 739 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 740                 l = c;
 741                 l <<= 24;
 742                 cword->w32 = (cword->w32 >> 8) | l;
 743 #else
 744                 cword->w32 = (cword->w32 << 8) | c;
 745 #endif
 746                 break;
 747         case FLASH_CFI_64BIT:
 748 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 749                 ll = c;
 750                 ll <<= 56;
 751                 cword->w64 = (cword->w64 >> 8) | ll;
 752 #else
 753                 cword->w64 = (cword->w64 << 8) | c;
 754 #endif
 755                 break;
 756         }
 757 }
 758
 759 /*
 760  * Loop through the sector table starting from the previously found sector.
 761  * Searches forwards or backwards, dependent on the passed address.
 762  */
 763 static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 764 {
 765         static flash_sect_t saved_sector; /* previously found sector */
 766         static flash_info_t *saved_info; /* previously used flash bank */
 767         flash_sect_t sector = saved_sector;
 768
 769         if (info != saved_info || sector >= info->sector_count)
 770                 sector = 0;
 771
 772         while ((sector < info->sector_count - 1) &&
 773                (info->start[sector] < addr))
 774                 sector++;
 775         while ((info->start[sector] > addr) && (sector > 0))
 776                 /*
 777                  * also decrements the sector in case of an overshot
 778                  * in the first loop
 779                  */
 780                 sector--;
 781
 782         saved_sector = sector;
 783         saved_info = info;
 784         return sector;
 785 }
 786
 787 /*-----------------------------------------------------------------------
 788  */
 789 static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
 790 {
 791         void *dstaddr = (void *)dest;
 792         int flag;
 793         flash_sect_t sect = 0;
 794         char sect_found = 0;
 795
 796         /* Check if Flash is (sufficiently) erased */
 797         switch (info->portwidth) {
 798         case FLASH_CFI_8BIT:
 799                 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
 800                 break;
 801         case FLASH_CFI_16BIT:
 802                 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
 803                 break;
 804         case FLASH_CFI_32BIT:
 805                 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
 806                 break;
 807         case FLASH_CFI_64BIT:
 808                 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
 809                 break;
 810         default:
 811                 flag = 0;
 812                 break;
 813         }
 814         if (!flag)
 815                 return ERR_NOT_ERASED;
 816
 817         /* Disable interrupts which might cause a timeout here */
 818         flag = disable_interrupts();
 819
 820         switch (info->vendor) {
 821         case CFI_CMDSET_INTEL_PROG_REGIONS:
 822         case CFI_CMDSET_INTEL_EXTENDED:
 823         case CFI_CMDSET_INTEL_STANDARD:
 824                 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 825                 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
 826                 break;
 827         case CFI_CMDSET_AMD_EXTENDED:
 828         case CFI_CMDSET_AMD_STANDARD:
 829                 sect = find_sector(info, dest);
 830                 flash_unlock_seq(info, sect);
 831                 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 832                 sect_found = 1;
 833                 break;
 834 #ifdef CONFIG_FLASH_CFI_LEGACY
 835         case CFI_CMDSET_AMD_LEGACY:
 836                 sect = find_sector(info, dest);
 837                 flash_unlock_seq(info, 0);
 838                 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 839                 sect_found = 1;
 840                 break;
 841 #endif
 842         }
 843
 844         switch (info->portwidth) {
 845         case FLASH_CFI_8BIT:
 846                 flash_write8(cword.w8, dstaddr);
 847                 break;
 848         case FLASH_CFI_16BIT:
 849                 flash_write16(cword.w16, dstaddr);
 850                 break;
 851         case FLASH_CFI_32BIT:
 852                 flash_write32(cword.w32, dstaddr);
 853                 break;
 854         case FLASH_CFI_64BIT:
 855                 flash_write64(cword.w64, dstaddr);
 856                 break;
 857         }
 858
 859         /* re-enable interrupts if necessary */
 860         if (flag)
 861                 enable_interrupts();
 862
 863         if (!sect_found)
 864                 sect = find_sector(info, dest);
 865
 866         if (use_flash_status_poll(info))
 867                 return flash_status_poll(info, &cword, dstaddr,
 868                                          info->write_tout, "write");
 869         else
 870                 return flash_full_status_check(info, sect,
 871                                                info->write_tout, "write");
 872 }
 873
 874 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 875
 876 static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 877                                  int len)
 878 {
 879         flash_sect_t sector;
 880         int cnt;
 881         int retcode;
 882         u8 *src = cp;
 883         u8 *dst = (u8 *)dest;
 884         u8 *dst2 = dst;
 885         int flag = 1;
 886         uint offset = 0;
 887         unsigned int shift;
 888         uchar write_cmd;
 889
 890         switch (info->portwidth) {
 891         case FLASH_CFI_8BIT:
 892                 shift = 0;
 893                 break;
 894         case FLASH_CFI_16BIT:
 895                 shift = 1;
 896                 break;
 897         case FLASH_CFI_32BIT:
 898                 shift = 2;
 899                 break;
 900         case FLASH_CFI_64BIT:
 901                 shift = 3;
 902                 break;
 903         default:
 904                 retcode = ERR_INVAL;
 905                 goto out_unmap;
 906         }
 907
 908         cnt = len >> shift;
 909
 910         while ((cnt-- > 0) && (flag == 1)) {
 911                 switch (info->portwidth) {
 912                 case FLASH_CFI_8BIT:
 913                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
 914                                 flash_read8(src));
 915                         src += 1, dst2 += 1;
 916                         break;
 917                 case FLASH_CFI_16BIT:
 918                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
 919                                 flash_read16(src));
 920                         src += 2, dst2 += 2;
 921                         break;
 922                 case FLASH_CFI_32BIT:
 923                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
 924                                 flash_read32(src));
 925                         src += 4, dst2 += 4;
 926                         break;
 927                 case FLASH_CFI_64BIT:
 928                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
 929                                 flash_read64(src));
 930                         src += 8, dst2 += 8;
 931                         break;
 932                 }
 933         }
 934         if (!flag) {
 935                 retcode = ERR_NOT_ERASED;
 936                 goto out_unmap;
 937         }
 938
 939         src = cp;
 940         sector = find_sector(info, dest);
 941
 942         switch (info->vendor) {
 943         case CFI_CMDSET_INTEL_PROG_REGIONS:
 944         case CFI_CMDSET_INTEL_STANDARD:
 945         case CFI_CMDSET_INTEL_EXTENDED:
 946                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 947                             FLASH_CMD_WRITE_BUFFER_PROG :
 948                             FLASH_CMD_WRITE_TO_BUFFER;
 949                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 950                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 951                 flash_write_cmd(info, sector, 0, write_cmd);
 952                 retcode = flash_status_check(info, sector,
 953                                              info->buffer_write_tout,
 954                                              "write to buffer");
 955                 if (retcode == ERR_OK) {
 956                         /* reduce the number of loops by the width of
 957                          * the port
 958                          */
 959                         cnt = len >> shift;
 960                         flash_write_cmd(info, sector, 0, cnt - 1);
 961                         while (cnt-- > 0) {
 962                                 switch (info->portwidth) {
 963                                 case FLASH_CFI_8BIT:
 964                                         flash_write8(flash_read8(src), dst);
 965                                         src += 1, dst += 1;
 966                                         break;
 967                                 case FLASH_CFI_16BIT:
 968                                         flash_write16(flash_read16(src), dst);
 969                                         src += 2, dst += 2;
 970                                         break;
 971                                 case FLASH_CFI_32BIT:
 972                                         flash_write32(flash_read32(src), dst);
 973                                         src += 4, dst += 4;
 974                                         break;
 975                                 case FLASH_CFI_64BIT:
 976                                         flash_write64(flash_read64(src), dst);
 977                                         src += 8, dst += 8;
 978                                         break;
 979                                 default:
 980                                         retcode = ERR_INVAL;
 981                                         goto out_unmap;
 982                                 }
 983                         }
 984                         flash_write_cmd(info, sector, 0,
 985                                         FLASH_CMD_WRITE_BUFFER_CONFIRM);
 986                         retcode = flash_full_status_check(
 987                                 info, sector, info->buffer_write_tout,
 988                                 "buffer write");
 989                 }
 990
 991                 break;
 992
 993         case CFI_CMDSET_AMD_STANDARD:
 994         case CFI_CMDSET_AMD_EXTENDED:
 995                 flash_unlock_seq(info, sector);
 996
 997 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
 998                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
 999 #endif
1000                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1001                 cnt = len >> shift;
1002                 flash_write_cmd(info, sector, offset, cnt - 1);
1003
1004                 switch (info->portwidth) {
1005                 case FLASH_CFI_8BIT:
1006                         while (cnt-- > 0) {
1007                                 flash_write8(flash_read8(src), dst);
1008                                 src += 1, dst += 1;
1009                         }
1010                         break;
1011                 case FLASH_CFI_16BIT:
1012                         while (cnt-- > 0) {
1013                                 flash_write16(flash_read16(src), dst);
1014                                 src += 2, dst += 2;
1015                         }
1016                         break;
1017                 case FLASH_CFI_32BIT:
1018                         while (cnt-- > 0) {
1019                                 flash_write32(flash_read32(src), dst);
1020                                 src += 4, dst += 4;
1021                         }
1022                         break;
1023                 case FLASH_CFI_64BIT:
1024                         while (cnt-- > 0) {
1025                                 flash_write64(flash_read64(src), dst);
1026                                 src += 8, dst += 8;
1027                         }
1028                         break;
1029                 default:
1030                         retcode = ERR_INVAL;
1031                         goto out_unmap;
1032                 }
1033
1034                 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1035                 if (use_flash_status_poll(info))
1036                         retcode = flash_status_poll(info, src - (1 << shift),
1037                                                     dst - (1 << shift),
1038                                                     info->buffer_write_tout,
1039                                                     "buffer write");
1040                 else
1041                         retcode = flash_full_status_check(info, sector,
1042                                                           info->buffer_write_tout,
1043                                                           "buffer write");
1044                 break;
1045
1046         default:
1047                 debug("Unknown Command Set\n");
1048                 retcode = ERR_INVAL;
1049                 break;
1050         }
1051
1052 out_unmap:
1053         return retcode;
1054 }
1055 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1056
1057 /*-----------------------------------------------------------------------
1058  */
1059 int flash_erase(flash_info_t *info, int s_first, int s_last)
1060 {
1061         int rcode = 0;
1062         int prot;
1063         flash_sect_t sect;
1064         int st;
1065
1066         if (info->flash_id != FLASH_MAN_CFI) {
1067                 puts("Can't erase unknown flash type - aborted\n");
1068                 return 1;
1069         }
1070         if (s_first < 0 || s_first > s_last) {
1071                 puts("- no sectors to erase\n");
1072                 return 1;
1073         }
1074
1075         prot = 0;
1076         for (sect = s_first; sect <= s_last; ++sect)
1077                 if (info->protect[sect])
1078                         prot++;
1079         if (prot) {
1080                 printf("- Warning: %d protected sectors will not be erased!\n",
1081                        prot);
1082         } else if (flash_verbose) {
1083                 putc('\n');
1084         }
1085
1086         for (sect = s_first; sect <= s_last; sect++) {
1087                 if (ctrlc()) {
1088                         printf("\n");
1089                         return 1;
1090                 }
1091
1092                 if (info->protect[sect] == 0) { /* not protected */
1093 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1094                         int k;
1095                         int size;
1096                         int erased;
1097                         u32 *flash;
1098
1099                         /*
1100                          * Check if whole sector is erased
1101                          */
1102                         size = flash_sector_size(info, sect);
1103                         erased = 1;
1104                         flash = (u32 *)info->start[sect];
1105                         /* divide by 4 for longword access */
1106                         size = size >> 2;
1107                         for (k = 0; k < size; k++) {
1108                                 if (flash_read32(flash++) != 0xffffffff) {
1109                                         erased = 0;
1110                                         break;
1111                                 }
1112                         }
1113                         if (erased) {
1114                                 if (flash_verbose)
1115                                         putc(',');
1116                                 continue;
1117                         }
1118 #endif
1119                         switch (info->vendor) {
1120                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1121                         case CFI_CMDSET_INTEL_STANDARD:
1122                         case CFI_CMDSET_INTEL_EXTENDED:
1123                                 flash_write_cmd(info, sect, 0,
1124                                                 FLASH_CMD_CLEAR_STATUS);
1125                                 flash_write_cmd(info, sect, 0,
1126                                                 FLASH_CMD_BLOCK_ERASE);
1127                                 flash_write_cmd(info, sect, 0,
1128                                                 FLASH_CMD_ERASE_CONFIRM);
1129                                 break;
1130                         case CFI_CMDSET_AMD_STANDARD:
1131                         case CFI_CMDSET_AMD_EXTENDED:
1132                                 flash_unlock_seq(info, sect);
1133                                 flash_write_cmd(info, sect,
1134                                                 info->addr_unlock1,
1135                                                 AMD_CMD_ERASE_START);
1136                                 flash_unlock_seq(info, sect);
1137                                 flash_write_cmd(info, sect, 0,
1138                                                 info->cmd_erase_sector);
1139                                 break;
1140 #ifdef CONFIG_FLASH_CFI_LEGACY
1141                         case CFI_CMDSET_AMD_LEGACY:
1142                                 flash_unlock_seq(info, 0);
1143                                 flash_write_cmd(info, 0, info->addr_unlock1,
1144                                                 AMD_CMD_ERASE_START);
1145                                 flash_unlock_seq(info, 0);
1146                                 flash_write_cmd(info, sect, 0,
1147                                                 AMD_CMD_ERASE_SECTOR);
1148                                 break;
1149 #endif
1150                         default:
1151                                 debug("Unknown flash vendor %d\n",
1152                                       info->vendor);
1153                                 break;
1154                         }
1155
1156                         if (use_flash_status_poll(info)) {
1157                                 cfiword_t cword;
1158                                 void *dest;
1159
1160                                 cword.w64 = 0xffffffffffffffffULL;
1161                                 dest = flash_map(info, sect, 0);
1162                                 st = flash_status_poll(info, &cword, dest,
1163                                                        info->erase_blk_tout,
1164                                                        "erase");
1165                                 flash_unmap(info, sect, 0, dest);
1166                         } else {
1167                                 st = flash_full_status_check(info, sect,
1168                                                              info->erase_blk_tout,
1169                                                              "erase");
1170                         }
1171
1172                         if (st)
1173                                 rcode = 1;
1174                         else if (flash_verbose)
1175                                 putc('.');
1176                 }
1177         }
1178
1179         if (flash_verbose)
1180                 puts(" done\n");
1181
1182         return rcode;
1183 }
1184
1185 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1186 static int sector_erased(flash_info_t *info, int i)
1187 {
1188         int k;
1189         int size;
1190         u32 *flash;
1191
1192         /*
1193          * Check if whole sector is erased
1194          */
1195         size = flash_sector_size(info, i);
1196         flash = (u32 *)info->start[i];
1197         /* divide by 4 for longword access */
1198         size = size >> 2;
1199
1200         for (k = 0; k < size; k++) {
1201                 if (flash_read32(flash++) != 0xffffffff)
1202                         return 0;       /* not erased */
1203         }
1204
1205         return 1;                       /* erased */
1206 }
1207 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1208
1209 void flash_print_info(flash_info_t *info)
1210 {
1211         int i;
1212
1213         if (info->flash_id != FLASH_MAN_CFI) {
1214                 puts("missing or unknown FLASH type\n");
1215                 return;
1216         }
1217
1218         printf("%s flash (%d x %d)",
1219                info->name,
1220                (info->portwidth << 3), (info->chipwidth << 3));
1221         if (info->size < 1024 * 1024)
1222                 printf("  Size: %ld kB in %d Sectors\n",
1223                        info->size >> 10, info->sector_count);
1224         else
1225                 printf("  Size: %ld MB in %d Sectors\n",
1226                        info->size >> 20, info->sector_count);
1227         printf("  ");
1228         switch (info->vendor) {
1229         case CFI_CMDSET_INTEL_PROG_REGIONS:
1230                 printf("Intel Prog Regions");
1231                 break;
1232         case CFI_CMDSET_INTEL_STANDARD:
1233                 printf("Intel Standard");
1234                 break;
1235         case CFI_CMDSET_INTEL_EXTENDED:
1236                 printf("Intel Extended");
1237                 break;
1238         case CFI_CMDSET_AMD_STANDARD:
1239                 printf("AMD Standard");
1240                 break;
1241         case CFI_CMDSET_AMD_EXTENDED:
1242                 printf("AMD Extended");
1243                 break;
1244 #ifdef CONFIG_FLASH_CFI_LEGACY
1245         case CFI_CMDSET_AMD_LEGACY:
1246                 printf("AMD Legacy");
1247                 break;
1248 #endif
1249         default:
1250                 printf("Unknown (%d)", info->vendor);
1251                 break;
1252         }
1253         printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1254                info->manufacturer_id);
1255         printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1256                info->device_id);
1257         if ((info->device_id & 0xff) == 0x7E) {
1258                 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1259                        info->device_id2);
1260         }
1261         if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
1262                 printf("\n  Advanced Sector Protection (PPB) enabled");
1263         printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1264                info->erase_blk_tout, info->write_tout);
1265         if (info->buffer_size > 1) {
1266                 printf("  Buffer write timeout: %ld ms, ",
1267                        info->buffer_write_tout);
1268                 printf("buffer size: %d bytes\n", info->buffer_size);
1269         }
1270
1271         puts("\n  Sector Start Addresses:");
1272         for (i = 0; i < info->sector_count; ++i) {
1273                 if (ctrlc())
1274                         break;
1275                 if ((i % 5) == 0)
1276                         putc('\n');
1277 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1278                 /* print empty and read-only info */
1279                 printf("  %08lX %c %s ",
1280                        info->start[i],
1281                        sector_erased(info, i) ? 'E' : ' ',
1282                        info->protect[i] ? "RO" : "  ");
1283 #else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1284                 printf("  %08lX   %s ",
1285                        info->start[i],
1286                        info->protect[i] ? "RO" : "  ");
1287 #endif
1288         }
1289         putc('\n');
1290 }
1291
1292 /*-----------------------------------------------------------------------
1293  * This is used in a few places in write_buf() to show programming
1294  * progress.  Making it a function is nasty because it needs to do side
1295  * effect updates to digit and dots.  Repeated code is nasty too, so
1296  * we define it once here.
1297  */
1298 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1299 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1300         if (flash_verbose) { \
1301                 dots -= dots_sub; \
1302                 if (scale > 0 && dots <= 0) { \
1303                         if ((digit % 5) == 0) \
1304                                 printf("%d", digit / 5); \
1305                         else \
1306                                 putc('.'); \
1307                         digit--; \
1308                         dots += scale; \
1309                 } \
1310         }
1311 #else
1312 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1313 #endif
1314
1315 /*-----------------------------------------------------------------------
1316  * Copy memory to flash, returns:
1317  * 0 - OK
1318  * 1 - write timeout
1319  * 2 - Flash not erased
1320  */
1321 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1322 {
1323         ulong wp;
1324         uchar *p;
1325         int aln;
1326         cfiword_t cword;
1327         int i, rc;
1328 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1329         int buffered_size;
1330 #endif
1331 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1332         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1333         int scale = 0;
1334         int dots  = 0;
1335
1336         /*
1337          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1338          */
1339         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1340                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1341                         CONFIG_FLASH_SHOW_PROGRESS);
1342         }
1343 #endif
1344
1345         /* get lower aligned address */
1346         wp = (addr & ~(info->portwidth - 1));
1347
1348         /* handle unaligned start */
1349         aln = addr - wp;
1350         if (aln != 0) {
1351                 cword.w32 = 0;
1352                 p = (uchar *)wp;
1353                 for (i = 0; i < aln; ++i)
1354                         flash_add_byte(info, &cword, flash_read8(p + i));
1355
1356                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1357                         flash_add_byte(info, &cword, *src++);
1358                         cnt--;
1359                 }
1360                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1361                         flash_add_byte(info, &cword, flash_read8(p + i));
1362
1363                 rc = flash_write_cfiword(info, wp, cword);
1364                 if (rc != 0)
1365                         return rc;
1366
1367                 wp += i;
1368                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1369         }
1370
1371         /* handle the aligned part */
1372 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1373         buffered_size = (info->portwidth / info->chipwidth);
1374         buffered_size *= info->buffer_size;
1375         while (cnt >= info->portwidth) {
1376                 /* prohibit buffer write when buffer_size is 1 */
1377                 if (info->buffer_size == 1) {
1378                         cword.w32 = 0;
1379                         for (i = 0; i < info->portwidth; i++)
1380                                 flash_add_byte(info, &cword, *src++);
1381                         rc = flash_write_cfiword(info, wp, cword);
1382                         if (rc != 0)
1383                                 return rc;
1384                         wp += info->portwidth;
1385                         cnt -= info->portwidth;
1386                         continue;
1387                 }
1388
1389                 /* write buffer until next buffered_size aligned boundary */
1390                 i = buffered_size - (wp % buffered_size);
1391                 if (i > cnt)
1392                         i = cnt;
1393                 rc = flash_write_cfibuffer(info, wp, src, i);
1394                 if (rc != ERR_OK)
1395                         return rc;
1396                 i -= i & (info->portwidth - 1);
1397                 wp += i;
1398                 src += i;
1399                 cnt -= i;
1400                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1401                 /* Only check every once in a while */
1402                 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1403                         return ERR_ABORTED;
1404         }
1405 #else
1406         while (cnt >= info->portwidth) {
1407                 cword.w32 = 0;
1408                 for (i = 0; i < info->portwidth; i++)
1409                         flash_add_byte(info, &cword, *src++);
1410                 rc = flash_write_cfiword(info, wp, cword);
1411                 if (rc != 0)
1412                         return rc;
1413                 wp += info->portwidth;
1414                 cnt -= info->portwidth;
1415                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1416                 /* Only check every once in a while */
1417                 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1418                         return ERR_ABORTED;
1419         }
1420 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1421
1422         if (cnt == 0)
1423                 return (0);
1424
1425         /*
1426          * handle unaligned tail bytes
1427          */
1428         cword.w32 = 0;
1429         p = (uchar *)wp;
1430         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1431                 flash_add_byte(info, &cword, *src++);
1432                 --cnt;
1433         }
1434         for (; i < info->portwidth; ++i)
1435                 flash_add_byte(info, &cword, flash_read8(p + i));
1436
1437         return flash_write_cfiword(info, wp, cword);
1438 }
1439
1440 static inline int manufact_match(flash_info_t *info, u32 manu)
1441 {
1442         return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1443 }
1444
1445 /*-----------------------------------------------------------------------
1446  */
1447 #ifdef CONFIG_SYS_FLASH_PROTECTION
1448
1449 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1450 {
1451         if (manufact_match(info, INTEL_MANUFACT) &&
1452             info->device_id == NUMONYX_256MBIT) {
1453                 /*
1454                  * see errata called
1455                  * "Numonyx Axcell P33/P30 Specification Update" :)
1456                  */
1457                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1458                 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1459                                    prot)) {
1460                         /*
1461                          * cmd must come before FLASH_CMD_PROTECT + 20us
1462                          * Disable interrupts which might cause a timeout here.
1463                          */
1464                         int flag = disable_interrupts();
1465                         unsigned short cmd;
1466
1467                         if (prot)
1468                                 cmd = FLASH_CMD_PROTECT_SET;
1469                         else
1470                                 cmd = FLASH_CMD_PROTECT_CLEAR;
1471
1472                         flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1473                         flash_write_cmd(info, sector, 0, cmd);
1474                         /* re-enable interrupts if necessary */
1475                         if (flag)
1476                                 enable_interrupts();
1477                 }
1478                 return 1;
1479         }
1480         return 0;
1481 }
1482
1483 int flash_real_protect(flash_info_t *info, long sector, int prot)
1484 {
1485         int retcode = 0;
1486
1487         switch (info->vendor) {
1488         case CFI_CMDSET_INTEL_PROG_REGIONS:
1489         case CFI_CMDSET_INTEL_STANDARD:
1490         case CFI_CMDSET_INTEL_EXTENDED:
1491                 if (!cfi_protect_bugfix(info, sector, prot)) {
1492                         flash_write_cmd(info, sector, 0,
1493                                         FLASH_CMD_CLEAR_STATUS);
1494                         flash_write_cmd(info, sector, 0,
1495                                         FLASH_CMD_PROTECT);
1496                         if (prot)
1497                                 flash_write_cmd(info, sector, 0,
1498                                                 FLASH_CMD_PROTECT_SET);
1499                         else
1500                                 flash_write_cmd(info, sector, 0,
1501                                                 FLASH_CMD_PROTECT_CLEAR);
1502                 }
1503                 break;
1504         case CFI_CMDSET_AMD_EXTENDED:
1505         case CFI_CMDSET_AMD_STANDARD:
1506                 /* U-Boot only checks the first byte */
1507                 if (manufact_match(info, ATM_MANUFACT)) {
1508                         if (prot) {
1509                                 flash_unlock_seq(info, 0);
1510                                 flash_write_cmd(info, 0,
1511                                                 info->addr_unlock1,
1512                                                 ATM_CMD_SOFTLOCK_START);
1513                                 flash_unlock_seq(info, 0);
1514                                 flash_write_cmd(info, sector, 0,
1515                                                 ATM_CMD_LOCK_SECT);
1516                         } else {
1517                                 flash_write_cmd(info, 0,
1518                                                 info->addr_unlock1,
1519                                                 AMD_CMD_UNLOCK_START);
1520                                 if (info->device_id == ATM_ID_BV6416)
1521                                         flash_write_cmd(info, sector,
1522                                                         0, ATM_CMD_UNLOCK_SECT);
1523                         }
1524                 }
1525                 if (info->legacy_unlock) {
1526                         int flag = disable_interrupts();
1527                         int lock_flag;
1528
1529                         flash_unlock_seq(info, 0);
1530                         flash_write_cmd(info, 0, info->addr_unlock1,
1531                                         AMD_CMD_SET_PPB_ENTRY);
1532                         lock_flag = flash_isset(info, sector, 0, 0x01);
1533                         if (prot) {
1534                                 if (lock_flag) {
1535                                         flash_write_cmd(info, sector, 0,
1536                                                         AMD_CMD_PPB_LOCK_BC1);
1537                                         flash_write_cmd(info, sector, 0,
1538                                                         AMD_CMD_PPB_LOCK_BC2);
1539                                 }
1540                                 debug("sector %ld %slocked\n", sector,
1541                                       lock_flag ? "" : "already ");
1542                         } else {
1543                                 if (!lock_flag) {
1544                                         debug("unlock %ld\n", sector);
1545                                         flash_write_cmd(info, 0, 0,
1546                                                         AMD_CMD_PPB_UNLOCK_BC1);
1547                                         flash_write_cmd(info, 0, 0,
1548                                                         AMD_CMD_PPB_UNLOCK_BC2);
1549                                 }
1550                                 debug("sector %ld %sunlocked\n", sector,
1551                                       !lock_flag ? "" : "already ");
1552                         }
1553                         if (flag)
1554                                 enable_interrupts();
1555
1556                         if (flash_status_check(info, sector,
1557                                                info->erase_blk_tout,
1558                                                prot ? "protect" : "unprotect"))
1559                                 printf("status check error\n");
1560
1561                         flash_write_cmd(info, 0, 0,
1562                                         AMD_CMD_SET_PPB_EXIT_BC1);
1563                         flash_write_cmd(info, 0, 0,
1564                                         AMD_CMD_SET_PPB_EXIT_BC2);
1565                 }
1566                 break;
1567 #ifdef CONFIG_FLASH_CFI_LEGACY
1568         case CFI_CMDSET_AMD_LEGACY:
1569                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1570                 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1571                 if (prot)
1572                         flash_write_cmd(info, sector, 0,
1573                                         FLASH_CMD_PROTECT_SET);
1574                 else
1575                         flash_write_cmd(info, sector, 0,
1576                                         FLASH_CMD_PROTECT_CLEAR);
1577 #endif
1578         };
1579
1580         /*
1581          * Flash needs to be in status register read mode for
1582          * flash_full_status_check() to work correctly
1583          */
1584         flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1585         retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
1586                                           prot ? "protect" : "unprotect");
1587         if (retcode == 0) {
1588                 info->protect[sector] = prot;
1589
1590                 /*
1591                  * On some of Intel's flash chips (marked via legacy_unlock)
1592                  * unprotect unprotects all locking.
1593                  */
1594                 if (prot == 0 && info->legacy_unlock) {
1595                         flash_sect_t i;
1596
1597                         for (i = 0; i < info->sector_count; i++) {
1598                                 if (info->protect[i])
1599                                         flash_real_protect(info, i, 1);
1600                         }
1601                 }
1602         }
1603         return retcode;
1604 }
1605
1606 /*-----------------------------------------------------------------------
1607  * flash_read_user_serial - read the OneTimeProgramming cells
1608  */
1609 void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1610                             int len)
1611 {
1612         uchar *src;
1613         uchar *dst;
1614
1615         dst = buffer;
1616         src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1617         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1618         memcpy(dst, src + offset, len);
1619         flash_write_cmd(info, 0, 0, info->cmd_reset);
1620         udelay(1);
1621         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1622 }
1623
1624 /*
1625  * flash_read_factory_serial - read the device Id from the protection area
1626  */
1627 void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1628                                int len)
1629 {
1630         uchar *src;
1631
1632         src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1633         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1634         memcpy(buffer, src + offset, len);
1635         flash_write_cmd(info, 0, 0, info->cmd_reset);
1636         udelay(1);
1637         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1638 }
1639
1640 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1641
1642 /*-----------------------------------------------------------------------
1643  * Reverse the order of the erase regions in the CFI QRY structure.
1644  * This is needed for chips that are either a) correctly detected as
1645  * top-boot, or b) buggy.
1646  */
1647 static void cfi_reverse_geometry(struct cfi_qry *qry)
1648 {
1649         unsigned int i, j;
1650         u32 tmp;
1651
1652         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1653                 tmp = get_unaligned(&qry->erase_region_info[i]);
1654                 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1655                               &qry->erase_region_info[i]);
1656                 put_unaligned(tmp, &qry->erase_region_info[j]);
1657         }
1658 }
1659
1660 /*-----------------------------------------------------------------------
1661  * read jedec ids from device and set corresponding fields in info struct
1662  *
1663  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1664  *
1665  */
1666 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1667 {
1668         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1669         udelay(1);
1670         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1671         udelay(1000); /* some flash are slow to respond */
1672         info->manufacturer_id = flash_read_uchar(info,
1673                                                  FLASH_OFFSET_MANUFACTURER_ID);
1674         info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1675                         flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1676                         flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1677         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1678 }
1679
1680 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1681 {
1682         info->cmd_reset = FLASH_CMD_RESET;
1683
1684         cmdset_intel_read_jedec_ids(info);
1685         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1686
1687 #ifdef CONFIG_SYS_FLASH_PROTECTION
1688         /* read legacy lock/unlock bit from intel flash */
1689         if (info->ext_addr) {
1690                 info->legacy_unlock =
1691                         flash_read_uchar(info, info->ext_addr + 5) & 0x08;
1692         }
1693 #endif
1694
1695         return 0;
1696 }
1697
1698 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1699 {
1700         ushort bank_id = 0;
1701         uchar  manu_id;
1702         uchar  feature;
1703
1704         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1705         flash_unlock_seq(info, 0);
1706         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1707         udelay(1000); /* some flash are slow to respond */
1708
1709         manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1710         /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1711         while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1712                 bank_id += 0x100;
1713                 manu_id = flash_read_uchar(info,
1714                                            bank_id | FLASH_OFFSET_MANUFACTURER_ID);
1715         }
1716         info->manufacturer_id = manu_id;
1717
1718         debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1719               info->ext_addr, info->cfi_version);
1720         if (info->ext_addr && info->cfi_version >= 0x3134) {
1721                 /* read software feature (at 0x53) */
1722                 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1723                 debug("feature = 0x%x\n", feature);
1724                 info->sr_supported = feature & 0x1;
1725         }
1726
1727         switch (info->chipwidth) {
1728         case FLASH_CFI_8BIT:
1729                 info->device_id = flash_read_uchar(info,
1730                                                    FLASH_OFFSET_DEVICE_ID);
1731                 if (info->device_id == 0x7E) {
1732                         /* AMD 3-byte (expanded) device ids */
1733                         info->device_id2 = flash_read_uchar(info,
1734                                                             FLASH_OFFSET_DEVICE_ID2);
1735                         info->device_id2 <<= 8;
1736                         info->device_id2 |= flash_read_uchar(info,
1737                                                 FLASH_OFFSET_DEVICE_ID3);
1738                 }
1739                 break;
1740         case FLASH_CFI_16BIT:
1741                 info->device_id = flash_read_word(info,
1742                                                   FLASH_OFFSET_DEVICE_ID);
1743                 if ((info->device_id & 0xff) == 0x7E) {
1744                         /* AMD 3-byte (expanded) device ids */
1745                         info->device_id2 = flash_read_uchar(info,
1746                                                             FLASH_OFFSET_DEVICE_ID2);
1747                         info->device_id2 <<= 8;
1748                         info->device_id2 |= flash_read_uchar(info,
1749                                                 FLASH_OFFSET_DEVICE_ID3);
1750                 }
1751                 break;
1752         default:
1753                 break;
1754         }
1755         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1756         udelay(1);
1757 }
1758
1759 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1760 {
1761         info->cmd_reset = AMD_CMD_RESET;
1762         info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1763
1764         cmdset_amd_read_jedec_ids(info);
1765         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1766
1767 #ifdef CONFIG_SYS_FLASH_PROTECTION
1768         if (info->ext_addr) {
1769                 /* read sector protect/unprotect scheme (at 0x49) */
1770                 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1771                         info->legacy_unlock = 1;
1772         }
1773 #endif
1774
1775         return 0;
1776 }
1777
1778 #ifdef CONFIG_FLASH_CFI_LEGACY
1779 static void flash_read_jedec_ids(flash_info_t *info)
1780 {
1781         info->manufacturer_id = 0;
1782         info->device_id       = 0;
1783         info->device_id2      = 0;
1784
1785         switch (info->vendor) {
1786         case CFI_CMDSET_INTEL_PROG_REGIONS:
1787         case CFI_CMDSET_INTEL_STANDARD:
1788         case CFI_CMDSET_INTEL_EXTENDED:
1789                 cmdset_intel_read_jedec_ids(info);
1790                 break;
1791         case CFI_CMDSET_AMD_STANDARD:
1792         case CFI_CMDSET_AMD_EXTENDED:
1793                 cmdset_amd_read_jedec_ids(info);
1794                 break;
1795         default:
1796                 break;
1797         }
1798 }
1799
1800 /*-----------------------------------------------------------------------
1801  * Call board code to request info about non-CFI flash.
1802  * board_flash_get_legacy needs to fill in at least:
1803  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1804  */
1805 static int flash_detect_legacy(phys_addr_t base, int banknum)
1806 {
1807         flash_info_t *info = &flash_info[banknum];
1808
1809         if (board_flash_get_legacy(base, banknum, info)) {
1810                 /* board code may have filled info completely. If not, we
1811                  * use JEDEC ID probing.
1812                  */
1813                 if (!info->vendor) {
1814                         int modes[] = {
1815                                 CFI_CMDSET_AMD_STANDARD,
1816                                 CFI_CMDSET_INTEL_STANDARD
1817                         };
1818                         int i;
1819
1820                         for (i = 0; i < ARRAY_SIZE(modes); i++) {
1821                                 info->vendor = modes[i];
1822                                 info->start[0] =
1823                                         (ulong)map_physmem(base,
1824                                                            info->portwidth,
1825                                                            MAP_NOCACHE);
1826                                 if (info->portwidth == FLASH_CFI_8BIT &&
1827                                     info->interface == FLASH_CFI_X8X16) {
1828                                         info->addr_unlock1 = 0x2AAA;
1829                                         info->addr_unlock2 = 0x5555;
1830                                 } else {
1831                                         info->addr_unlock1 = 0x5555;
1832                                         info->addr_unlock2 = 0x2AAA;
1833                                 }
1834                                 flash_read_jedec_ids(info);
1835                                 debug("JEDEC PROBE: ID %x %x %x\n",
1836                                       info->manufacturer_id,
1837                                       info->device_id,
1838                                       info->device_id2);
1839                                 if (jedec_flash_match(info, info->start[0]))
1840                                         break;
1841
1842                                 unmap_physmem((void *)info->start[0],
1843                                               info->portwidth);
1844                         }
1845                 }
1846
1847                 switch (info->vendor) {
1848                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1849                 case CFI_CMDSET_INTEL_STANDARD:
1850                 case CFI_CMDSET_INTEL_EXTENDED:
1851                         info->cmd_reset = FLASH_CMD_RESET;
1852                         break;
1853                 case CFI_CMDSET_AMD_STANDARD:
1854                 case CFI_CMDSET_AMD_EXTENDED:
1855                 case CFI_CMDSET_AMD_LEGACY:
1856                         info->cmd_reset = AMD_CMD_RESET;
1857                         break;
1858                 }
1859                 info->flash_id = FLASH_MAN_CFI;
1860                 return 1;
1861         }
1862         return 0; /* use CFI */
1863 }
1864 #else
1865 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1866 {
1867         return 0; /* use CFI */
1868 }
1869 #endif
1870
1871 /*-----------------------------------------------------------------------
1872  * detect if flash is compatible with the Common Flash Interface (CFI)
1873  * http://www.jedec.org/download/search/jesd68.pdf
1874  */
1875 static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1876                            size_t len)
1877 {
1878         u8 *p = buf;
1879         unsigned int i;
1880
1881         for (i = 0; i < len; i++)
1882                 p[i] = flash_read_uchar(info, start + i);
1883 }
1884
1885 static void __flash_cmd_reset(flash_info_t *info)
1886 {
1887         /*
1888          * We do not yet know what kind of commandset to use, so we issue
1889          * the reset command in both Intel and AMD variants, in the hope
1890          * that AMD flash roms ignore the Intel command.
1891          */
1892         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1893         udelay(1);
1894         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1895 }
1896
1897 void flash_cmd_reset(flash_info_t *info)
1898         __attribute__((weak, alias("__flash_cmd_reset")));
1899
1900 static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1901 {
1902         int cfi_offset;
1903
1904         /* Issue FLASH reset command */
1905         flash_cmd_reset(info);
1906
1907         for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1908              cfi_offset++) {
1909                 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1910                                 FLASH_CMD_CFI);
1911                 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
1912                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1913                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1914                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1915                                        sizeof(struct cfi_qry));
1916                         info->interface = le16_to_cpu(qry->interface_desc);
1917
1918                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1919                         debug("device interface is %d\n",
1920                               info->interface);
1921                         debug("found port %d chip %d ",
1922                               info->portwidth, info->chipwidth);
1923                         debug("port %d bits chip %d bits\n",
1924                               info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1925                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1926
1927                         /* calculate command offsets as in the Linux driver */
1928                         info->addr_unlock1 = 0x555;
1929                         info->addr_unlock2 = 0x2aa;
1930
1931                         /*
1932                          * modify the unlock address if we are
1933                          * in compatibility mode
1934                          */
1935                         if (/* x8/x16 in x8 mode */
1936                             (info->chipwidth == FLASH_CFI_BY8 &&
1937                                 info->interface == FLASH_CFI_X8X16) ||
1938                             /* x16/x32 in x16 mode */
1939                             (info->chipwidth == FLASH_CFI_BY16 &&
1940                                 info->interface == FLASH_CFI_X16X32)) {
1941                                 info->addr_unlock1 = 0xaaa;
1942                                 info->addr_unlock2 = 0x555;
1943                         }
1944
1945                         info->name = "CFI conformant";
1946                         return 1;
1947                 }
1948         }
1949
1950         return 0;
1951 }
1952
1953 static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1954 {
1955         debug("flash detect cfi\n");
1956
1957         for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1958              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1959                 for (info->chipwidth = FLASH_CFI_BY8;
1960                      info->chipwidth <= info->portwidth;
1961                      info->chipwidth <<= 1)
1962                         if (__flash_detect_cfi(info, qry))
1963                                 return 1;
1964         }
1965         debug("not found\n");
1966         return 0;
1967 }
1968
1969 /*
1970  * Manufacturer-specific quirks. Add workarounds for geometry
1971  * reversal, etc. here.
1972  */
1973 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1974 {
1975         /* check if flash geometry needs reversal */
1976         if (qry->num_erase_regions > 1) {
1977                 /* reverse geometry if top boot part */
1978                 if (info->cfi_version < 0x3131) {
1979                         /* CFI < 1.1, try to guess from device id */
1980                         if ((info->device_id & 0x80) != 0)
1981                                 cfi_reverse_geometry(qry);
1982                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1983                         /* CFI >= 1.1, deduct from top/bottom flag */
1984                         /* note: ext_addr is valid since cfi_version > 0 */
1985                         cfi_reverse_geometry(qry);
1986                 }
1987         }
1988 }
1989
1990 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1991 {
1992         int reverse_geometry = 0;
1993
1994         /* Check the "top boot" bit in the PRI */
1995         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1996                 reverse_geometry = 1;
1997
1998         /* AT49BV6416(T) list the erase regions in the wrong order.
1999          * However, the device ID is identical with the non-broken
2000          * AT49BV642D they differ in the high byte.
2001          */
2002         if (info->device_id == 0xd6 || info->device_id == 0xd2)
2003                 reverse_geometry = !reverse_geometry;
2004
2005         if (reverse_geometry)
2006                 cfi_reverse_geometry(qry);
2007 }
2008
2009 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2010 {
2011         /* check if flash geometry needs reversal */
2012         if (qry->num_erase_regions > 1) {
2013                 /* reverse geometry if top boot part */
2014                 if (info->cfi_version < 0x3131) {
2015                         /* CFI < 1.1, guess by device id */
2016                         if (info->device_id == 0x22CA || /* M29W320DT */
2017                             info->device_id == 0x2256 || /* M29W320ET */
2018                             info->device_id == 0x22D7) { /* M29W800DT */
2019                                 cfi_reverse_geometry(qry);
2020                         }
2021                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2022                         /* CFI >= 1.1, deduct from top/bottom flag */
2023                         /* note: ext_addr is valid since cfi_version > 0 */
2024                         cfi_reverse_geometry(qry);
2025                 }
2026         }
2027 }
2028
2029 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2030 {
2031         /*
2032          * SST, for many recent nor parallel flashes, says they are
2033          * CFI-conformant. This is not true, since qry struct.
2034          * reports a std. AMD command set (0x0002), while SST allows to
2035          * erase two different sector sizes for the same memory.
2036          * 64KB sector (SST call it block)  needs 0x30 to be erased.
2037          * 4KB  sector (SST call it sector) needs 0x50 to be erased.
2038          * Since CFI query detect the 4KB number of sectors, users expects
2039          * a sector granularity of 4KB, and it is here set.
2040          */
2041         if (info->device_id == 0x5D23 || /* SST39VF3201B */
2042             info->device_id == 0x5C23) { /* SST39VF3202B */
2043                 /* set sector granularity to 4KB */
2044                 info->cmd_erase_sector = 0x50;
2045         }
2046 }
2047
2048 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2049 {
2050         /*
2051          * The M29EW devices seem to report the CFI information wrong
2052          * when it's in 8 bit mode.
2053          * There's an app note from Numonyx on this issue.
2054          * So adjust the buffer size for M29EW while operating in 8-bit mode
2055          */
2056         if (qry->max_buf_write_size > 0x8 &&
2057             info->device_id == 0x7E &&
2058             (info->device_id2 == 0x2201 ||
2059              info->device_id2 == 0x2301 ||
2060              info->device_id2 == 0x2801 ||
2061              info->device_id2 == 0x4801)) {
2062                 debug("Adjusted buffer size on Numonyx flash");
2063                 debug(" M29EW family in 8 bit mode\n");
2064                 qry->max_buf_write_size = 0x8;
2065         }
2066 }
2067
2068 /*
2069  * The following code cannot be run from FLASH!
2070  *
2071  */
2072 ulong flash_get_size(phys_addr_t base, int banknum)
2073 {
2074         flash_info_t *info = &flash_info[banknum];
2075         int i, j;
2076         flash_sect_t sect_cnt;
2077         phys_addr_t sector;
2078         unsigned long tmp;
2079         int size_ratio;
2080         uchar num_erase_regions;
2081         int erase_region_size;
2082         int erase_region_count;
2083         struct cfi_qry qry;
2084         unsigned long max_size;
2085
2086         memset(&qry, 0, sizeof(qry));
2087
2088         info->ext_addr = 0;
2089         info->cfi_version = 0;
2090 #ifdef CONFIG_SYS_FLASH_PROTECTION
2091         info->legacy_unlock = 0;
2092 #endif
2093
2094         info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2095
2096         if (flash_detect_cfi(info, &qry)) {
2097                 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2098                 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
2099                 num_erase_regions = qry.num_erase_regions;
2100
2101                 if (info->ext_addr) {
2102                         info->cfi_version = (ushort)flash_read_uchar(info,
2103                                                 info->ext_addr + 3) << 8;
2104                         info->cfi_version |= (ushort)flash_read_uchar(info,
2105                                                 info->ext_addr + 4);
2106                 }
2107
2108 #ifdef DEBUG
2109                 flash_printqry(&qry);
2110 #endif
2111
2112                 switch (info->vendor) {
2113                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2114                 case CFI_CMDSET_INTEL_STANDARD:
2115                 case CFI_CMDSET_INTEL_EXTENDED:
2116                         cmdset_intel_init(info, &qry);
2117                         break;
2118                 case CFI_CMDSET_AMD_STANDARD:
2119                 case CFI_CMDSET_AMD_EXTENDED:
2120                         cmdset_amd_init(info, &qry);
2121                         break;
2122                 default:
2123                         printf("CFI: Unknown command set 0x%x\n",
2124                                info->vendor);
2125                         /*
2126                          * Unfortunately, this means we don't know how
2127                          * to get the chip back to Read mode. Might
2128                          * as well try an Intel-style reset...
2129                          */
2130                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2131                         return 0;
2132                 }
2133
2134                 /* Do manufacturer-specific fixups */
2135                 switch (info->manufacturer_id) {
2136                 case 0x0001: /* AMD */
2137                 case 0x0037: /* AMIC */
2138                         flash_fixup_amd(info, &qry);
2139                         break;
2140                 case 0x001f:
2141                         flash_fixup_atmel(info, &qry);
2142                         break;
2143                 case 0x0020:
2144                         flash_fixup_stm(info, &qry);
2145                         break;
2146                 case 0x00bf: /* SST */
2147                         flash_fixup_sst(info, &qry);
2148                         break;
2149                 case 0x0089: /* Numonyx */
2150                         flash_fixup_num(info, &qry);
2151                         break;
2152                 }
2153
2154                 debug("manufacturer is %d\n", info->vendor);
2155                 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2156                 debug("device id is 0x%x\n", info->device_id);
2157                 debug("device id2 is 0x%x\n", info->device_id2);
2158                 debug("cfi version is 0x%04x\n", info->cfi_version);
2159
2160                 size_ratio = info->portwidth / info->chipwidth;
2161                 /* if the chip is x8/x16 reduce the ratio by half */
2162                 if (info->interface == FLASH_CFI_X8X16 &&
2163                     info->chipwidth == FLASH_CFI_BY8) {
2164                         size_ratio >>= 1;
2165                 }
2166                 debug("size_ratio %d port %d bits chip %d bits\n",
2167                       size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2168                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2169                 info->size = 1 << qry.dev_size;
2170                 /* multiply the size by the number of chips */
2171                 info->size *= size_ratio;
2172                 max_size = cfi_flash_bank_size(banknum);
2173                 if (max_size && info->size > max_size) {
2174                         debug("[truncated from %ldMiB]", info->size >> 20);
2175                         info->size = max_size;
2176                 }
2177                 debug("found %d erase regions\n", num_erase_regions);
2178                 sect_cnt = 0;
2179                 sector = base;
2180                 for (i = 0; i < num_erase_regions; i++) {
2181                         if (i > NUM_ERASE_REGIONS) {
2182                                 printf("%d erase regions found, only %d used\n",
2183                                        num_erase_regions, NUM_ERASE_REGIONS);
2184                                 break;
2185                         }
2186
2187                         tmp = le32_to_cpu(get_unaligned(
2188                                                 &qry.erase_region_info[i]));
2189                         debug("erase region %u: 0x%08lx\n", i, tmp);
2190
2191                         erase_region_count = (tmp & 0xffff) + 1;
2192                         tmp >>= 16;
2193                         erase_region_size =
2194                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2195                         debug("erase_region_count = %d ", erase_region_count);
2196                         debug("erase_region_size = %d\n", erase_region_size);
2197                         for (j = 0; j < erase_region_count; j++) {
2198                                 if (sector - base >= info->size)
2199                                         break;
2200                                 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2201                                         printf("ERROR: too many flash sectors\n");
2202                                         break;
2203                                 }
2204                                 info->start[sect_cnt] =
2205                                         (ulong)map_physmem(sector,
2206                                                            info->portwidth,
2207                                                            MAP_NOCACHE);
2208                                 sector += (erase_region_size * size_ratio);
2209
2210                                 /*
2211                                  * Only read protection status from
2212                                  * supported devices (intel...)
2213                                  */
2214                                 switch (info->vendor) {
2215                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2216                                 case CFI_CMDSET_INTEL_EXTENDED:
2217                                 case CFI_CMDSET_INTEL_STANDARD:
2218                                         /*
2219                                          * Set flash to read-id mode. Otherwise
2220                                          * reading protected status is not
2221                                          * guaranteed.
2222                                          */
2223                                         flash_write_cmd(info, sect_cnt, 0,
2224                                                         FLASH_CMD_READ_ID);
2225                                         info->protect[sect_cnt] =
2226                                                 flash_isset(info, sect_cnt,
2227                                                             FLASH_OFFSET_PROTECT,
2228                                                             FLASH_STATUS_PROTECT);
2229                                         flash_write_cmd(info, sect_cnt, 0,
2230                                                         FLASH_CMD_RESET);
2231                                         break;
2232                                 case CFI_CMDSET_AMD_EXTENDED:
2233                                 case CFI_CMDSET_AMD_STANDARD:
2234                                         if (!info->legacy_unlock) {
2235                                                 /* default: not protected */
2236                                                 info->protect[sect_cnt] = 0;
2237                                                 break;
2238                                         }
2239
2240                                         /* Read protection (PPB) from sector */
2241                                         flash_write_cmd(info, 0, 0,
2242                                                         info->cmd_reset);
2243                                         flash_unlock_seq(info, 0);
2244                                         flash_write_cmd(info, 0,
2245                                                         info->addr_unlock1,
2246                                                         FLASH_CMD_READ_ID);
2247                                         info->protect[sect_cnt] =
2248                                                 flash_isset(
2249                                                         info, sect_cnt,
2250                                                         FLASH_OFFSET_PROTECT,
2251                                                         FLASH_STATUS_PROTECT);
2252                                         break;
2253                                 default:
2254                                         /* default: not protected */
2255                                         info->protect[sect_cnt] = 0;
2256                                 }
2257
2258                                 sect_cnt++;
2259                         }
2260                 }
2261
2262                 info->sector_count = sect_cnt;
2263                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2264                 tmp = 1 << qry.block_erase_timeout_typ;
2265                 info->erase_blk_tout = tmp *
2266                         (1 << qry.block_erase_timeout_max);
2267                 tmp = (1 << qry.buf_write_timeout_typ) *
2268                         (1 << qry.buf_write_timeout_max);
2269
2270                 /* round up when converting to ms */
2271                 info->buffer_write_tout = (tmp + 999) / 1000;
2272                 tmp = (1 << qry.word_write_timeout_typ) *
2273                         (1 << qry.word_write_timeout_max);
2274                 /* round up when converting to ms */
2275                 info->write_tout = (tmp + 999) / 1000;
2276                 info->flash_id = FLASH_MAN_CFI;
2277                 if (info->interface == FLASH_CFI_X8X16 &&
2278                     info->chipwidth == FLASH_CFI_BY8) {
2279                         /* XXX - Need to test on x8/x16 in parallel. */
2280                         info->portwidth >>= 1;
2281                 }
2282
2283                 flash_write_cmd(info, 0, 0, info->cmd_reset);
2284         }
2285
2286         return (info->size);
2287 }
2288
2289 #ifdef CONFIG_FLASH_CFI_MTD
2290 void flash_set_verbose(uint v)
2291 {
2292         flash_verbose = v;
2293 }
2294 #endif
2295
2296 static void cfi_flash_set_config_reg(u32 base, u16 val)
2297 {
2298 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2299         /*
2300          * Only set this config register if really defined
2301          * to a valid value (0xffff is invalid)
2302          */
2303         if (val == 0xffff)
2304                 return;
2305
2306         /*
2307          * Set configuration register. Data is "encrypted" in the 16 lower
2308          * address bits.
2309          */
2310         flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2311         flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2312
2313         /*
2314          * Finally issue reset-command to bring device back to
2315          * read-array mode
2316          */
2317         flash_write16(FLASH_CMD_RESET, (void *)base);
2318 #endif
2319 }
2320
2321 /*-----------------------------------------------------------------------
2322  */
2323
2324 static void flash_protect_default(void)
2325 {
2326 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2327         int i;
2328         struct apl_s {
2329                 ulong start;
2330                 ulong size;
2331         } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2332 #endif
2333
2334         /* Monitor protection ON by default */
2335 #if defined(CONFIG_SYS_MONITOR_BASE) && \
2336         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2337         (!defined(CONFIG_MONITOR_IS_IN_RAM))
2338         flash_protect(FLAG_PROTECT_SET,
2339                       CONFIG_SYS_MONITOR_BASE,
2340                       CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2341                       flash_get_info(CONFIG_SYS_MONITOR_BASE));
2342 #endif
2343
2344         /* Environment protection ON by default */
2345 #ifdef CONFIG_ENV_IS_IN_FLASH
2346         flash_protect(FLAG_PROTECT_SET,
2347                       CONFIG_ENV_ADDR,
2348                       CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2349                       flash_get_info(CONFIG_ENV_ADDR));
2350 #endif
2351
2352         /* Redundant environment protection ON by default */
2353 #ifdef CONFIG_ENV_ADDR_REDUND
2354         flash_protect(FLAG_PROTECT_SET,
2355                       CONFIG_ENV_ADDR_REDUND,
2356                       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2357                       flash_get_info(CONFIG_ENV_ADDR_REDUND));
2358 #endif
2359
2360 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2361         for (i = 0; i < ARRAY_SIZE(apl); i++) {
2362                 debug("autoprotecting from %08lx to %08lx\n",
2363                       apl[i].start, apl[i].start + apl[i].size - 1);
2364                 flash_protect(FLAG_PROTECT_SET,
2365                               apl[i].start,
2366                               apl[i].start + apl[i].size - 1,
2367                               flash_get_info(apl[i].start));
2368         }
2369 #endif
2370 }
2371
2372 unsigned long flash_init(void)
2373 {
2374         unsigned long size = 0;
2375         int i;
2376
2377 #ifdef CONFIG_SYS_FLASH_PROTECTION
2378         /* read environment from EEPROM */
2379         char s[64];
2380
2381         env_get_f("unlock", s, sizeof(s));
2382 #endif
2383
2384 #ifdef CONFIG_CFI_FLASH /* for driver model */
2385         cfi_flash_init_dm();
2386 #endif
2387
2388         /* Init: no FLASHes known */
2389         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2390                 flash_info[i].flash_id = FLASH_UNKNOWN;
2391
2392                 /* Optionally write flash configuration register */
2393                 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2394                                          cfi_flash_config_reg(i));
2395
2396                 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2397                         flash_get_size(cfi_flash_bank_addr(i), i);
2398                 size += flash_info[i].size;
2399                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2400 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2401                         printf("## Unknown flash on Bank %d ", i + 1);
2402                         printf("- Size = 0x%08lx = %ld MB\n",
2403                                flash_info[i].size,
2404                                flash_info[i].size >> 20);
2405 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2406                 }
2407 #ifdef CONFIG_SYS_FLASH_PROTECTION
2408                 else if (strcmp(s, "yes") == 0) {
2409                         /*
2410                          * Only the U-Boot image and it's environment
2411                          * is protected, all other sectors are
2412                          * unprotected (unlocked) if flash hardware
2413                          * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2414                          * and the environment variable "unlock" is
2415                          * set to "yes".
2416                          */
2417                         if (flash_info[i].legacy_unlock) {
2418                                 int k;
2419
2420                                 /*
2421                                  * Disable legacy_unlock temporarily,
2422                                  * since flash_real_protect would
2423                                  * relock all other sectors again
2424                                  * otherwise.
2425                                  */
2426                                 flash_info[i].legacy_unlock = 0;
2427
2428                                 /*
2429                                  * Legacy unlocking (e.g. Intel J3) ->
2430                                  * unlock only one sector. This will
2431                                  * unlock all sectors.
2432                                  */
2433                                 flash_real_protect(&flash_info[i], 0, 0);
2434
2435                                 flash_info[i].legacy_unlock = 1;
2436
2437                                 /*
2438                                  * Manually mark other sectors as
2439                                  * unlocked (unprotected)
2440                                  */
2441                                 for (k = 1; k < flash_info[i].sector_count; k++)
2442                                         flash_info[i].protect[k] = 0;
2443                         } else {
2444                                 /*
2445                                  * No legancy unlocking -> unlock all sectors
2446                                  */
2447                                 flash_protect(FLAG_PROTECT_CLEAR,
2448                                               flash_info[i].start[0],
2449                                               flash_info[i].start[0]
2450                                               + flash_info[i].size - 1,
2451                                               &flash_info[i]);
2452                         }
2453                 }
2454 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2455         }
2456
2457         flash_protect_default();
2458 #ifdef CONFIG_FLASH_CFI_MTD
2459         cfi_mtd_init();
2460 #endif
2461
2462         return (size);
2463 }
2464
2465 #ifdef CONFIG_CFI_FLASH /* for driver model */
2466 static int cfi_flash_probe(struct udevice *dev)
2467 {
2468         const fdt32_t *cell;
2469         int addrc, sizec;
2470         int len, idx;
2471
2472         addrc = dev_read_addr_cells(dev);
2473         sizec = dev_read_size_cells(dev);
2474
2475         /* decode regs; there may be multiple reg tuples. */
2476         cell = dev_read_prop(dev, "reg", &len);
2477         if (!cell)
2478                 return -ENOENT;
2479         idx = 0;
2480         len /= sizeof(fdt32_t);
2481         while (idx < len) {
2482                 phys_addr_t addr;
2483
2484                 addr = dev_translate_address(dev, cell + idx);
2485
2486                 flash_info[cfi_flash_num_flash_banks].dev = dev;
2487                 flash_info[cfi_flash_num_flash_banks].base = addr;
2488                 cfi_flash_num_flash_banks++;
2489
2490                 idx += addrc + sizec;
2491         }
2492         gd->bd->bi_flashstart = flash_info[0].base;
2493
2494         return 0;
2495 }
2496
2497 static const struct udevice_id cfi_flash_ids[] = {
2498         { .compatible = "cfi-flash" },
2499         { .compatible = "jedec-flash" },
2500         {}
2501 };
2502
2503 U_BOOT_DRIVER(cfi_flash) = {
2504         .name   = "cfi_flash",
2505         .id     = UCLASS_MTD,
2506         .of_match = cfi_flash_ids,
2507         .probe = cfi_flash_probe,
2508 };
2509 #endif /* CONFIG_CFI_FLASH */