drivers/mtd/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  *
   8  * Copyright (C) 2004
   9  * Ed Okerson
  10  *
  11  * Copyright (C) 2006
  12  * Tolunay Orkun <listmember@orkun.us>
  13  *
  14  * See file CREDITS for list of people who contributed to this
  15  * project.
  16  *
  17  * This program is free software; you can redistribute it and/or
  18  * modify it under the terms of the GNU General Public License as
  19  * published by the Free Software Foundation; either version 2 of
  20  * the License, or (at your option) any later version.
  21  *
  22  * This program is distributed in the hope that it will be useful,
  23  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  25  * GNU General Public License for more details.
  26  *
  27  * You should have received a copy of the GNU General Public License
  28  * along with this program; if not, write to the Free Software
  29  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  30  * MA 02111-1307 USA
  31  *
  32  */
  33
  34 /* The DEBUG define must be before common to enable debugging */
  35 /* #define DEBUG        */
  36
  37 #include <common.h>
  38 #include <asm/processor.h>
  39 #include <asm/io.h>
  40 #include <asm/byteorder.h>
  41 #include <environment.h>
  42 #ifdef  CFG_FLASH_CFI_DRIVER
  43
  44 /*
  45  * This file implements a Common Flash Interface (CFI) driver for
  46  * U-Boot.
  47  *
  48  * The width of the port and the width of the chips are determined at
  49  * initialization.  These widths are used to calculate the address for
  50  * access CFI data structures.
  51  *
  52  * References
  53  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  54  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  55  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  56  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  57  * AMD CFI Specification, Release 2.0 December 1, 2001
  58  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  59  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  60  *
  61  * Define CFG_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  62  * reading and writing ... (yes there is such a Hardware).
  63  */
  64
  65 #ifndef CFG_FLASH_BANKS_LIST
  66 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  67 #endif
  68
  69 #define FLASH_CMD_CFI                   0x98
  70 #define FLASH_CMD_READ_ID               0x90
  71 #define FLASH_CMD_RESET                 0xff
  72 #define FLASH_CMD_BLOCK_ERASE           0x20
  73 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  74 #define FLASH_CMD_WRITE                 0x40
  75 #define FLASH_CMD_PROTECT               0x60
  76 #define FLASH_CMD_PROTECT_SET           0x01
  77 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  78 #define FLASH_CMD_CLEAR_STATUS          0x50
  79 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  80 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  81
  82 #define FLASH_STATUS_DONE               0x80
  83 #define FLASH_STATUS_ESS                0x40
  84 #define FLASH_STATUS_ECLBS              0x20
  85 #define FLASH_STATUS_PSLBS              0x10
  86 #define FLASH_STATUS_VPENS              0x08
  87 #define FLASH_STATUS_PSS                0x04
  88 #define FLASH_STATUS_DPS                0x02
  89 #define FLASH_STATUS_R                  0x01
  90 #define FLASH_STATUS_PROTECT            0x01
  91
  92 #define AMD_CMD_RESET                   0xF0
  93 #define AMD_CMD_WRITE                   0xA0
  94 #define AMD_CMD_ERASE_START             0x80
  95 #define AMD_CMD_ERASE_SECTOR            0x30
  96 #define AMD_CMD_UNLOCK_START            0xAA
  97 #define AMD_CMD_UNLOCK_ACK              0x55
  98 #define AMD_CMD_WRITE_TO_BUFFER         0x25
  99 #define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
 100
 101 #define AMD_STATUS_TOGGLE               0x40
 102 #define AMD_STATUS_ERROR                0x20
 103
 104 #define FLASH_OFFSET_MANUFACTURER_ID    0x00
 105 #define FLASH_OFFSET_DEVICE_ID          0x01
 106 #define FLASH_OFFSET_DEVICE_ID2         0x0E
 107 #define FLASH_OFFSET_DEVICE_ID3         0x0F
 108 #define FLASH_OFFSET_CFI                0x55
 109 #define FLASH_OFFSET_CFI_ALT            0x555
 110 #define FLASH_OFFSET_CFI_RESP           0x10
 111 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 112 /* extended query table primary address */
 113 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
 114 #define FLASH_OFFSET_WTOUT              0x1F
 115 #define FLASH_OFFSET_WBTOUT             0x20
 116 #define FLASH_OFFSET_ETOUT              0x21
 117 #define FLASH_OFFSET_CETOUT             0x22
 118 #define FLASH_OFFSET_WMAX_TOUT          0x23
 119 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 120 #define FLASH_OFFSET_EMAX_TOUT          0x25
 121 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 122 #define FLASH_OFFSET_SIZE               0x27
 123 #define FLASH_OFFSET_INTERFACE          0x28
 124 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 125 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 126 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 127 #define FLASH_OFFSET_PROTECT            0x02
 128 #define FLASH_OFFSET_USER_PROTECTION    0x85
 129 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 130
 131 #define CFI_CMDSET_NONE                 0
 132 #define CFI_CMDSET_INTEL_EXTENDED       1
 133 #define CFI_CMDSET_AMD_STANDARD         2
 134 #define CFI_CMDSET_INTEL_STANDARD       3
 135 #define CFI_CMDSET_AMD_EXTENDED         4
 136 #define CFI_CMDSET_MITSU_STANDARD       256
 137 #define CFI_CMDSET_MITSU_EXTENDED       257
 138 #define CFI_CMDSET_SST                  258
 139
 140 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 141 # undef  FLASH_CMD_RESET
 142 # define FLASH_CMD_RESET        AMD_CMD_RESET /* use AMD-Reset instead */
 143 #endif
 144
 145 typedef union {
 146         unsigned char c;
 147         unsigned short w;
 148         unsigned long l;
 149         unsigned long long ll;
 150 } cfiword_t;
 151
 152 typedef union {
 153         volatile unsigned char *cp;
 154         volatile unsigned short *wp;
 155         volatile unsigned long *lp;
 156         volatile unsigned long long *llp;
 157 } cfiptr_t;
 158
 159 #define NUM_ERASE_REGIONS       4 /* max. number of erase regions */
 160
 161 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
 162
 163 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 164 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 165 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 166 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 167 #else
 168 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 169 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 170 #endif
 171
 172 /*
 173  * Check if chip width is defined. If not, start detecting with 8bit.
 174  */
 175 #ifndef CFG_FLASH_CFI_WIDTH
 176 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 177 #endif
 178
 179
 180 /*-----------------------------------------------------------------------
 181  * Functions
 182  */
 183
 184 typedef unsigned long flash_sect_t;
 185
 186 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 187 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 188 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
 189                              uint offset, uchar cmd);
 190 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 191 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
 192                           uint offset, uchar cmd);
 193 static int flash_isset (flash_info_t * info, flash_sect_t sect,
 194                         uint offset, uchar cmd);
 195 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
 196                          uint offset, uchar cmd);
 197 static void flash_read_jedec_ids (flash_info_t * info);
 198 static int flash_detect_cfi (flash_info_t * info);
 199 static int flash_write_cfiword (flash_info_t * info, ulong dest,
 200                                 cfiword_t cword);
 201 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 202                                     ulong tout, char *prompt);
 203 ulong flash_get_size (ulong base, int banknum);
 204 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 205 static flash_info_t *flash_get_info(ulong base);
 206 #endif
 207 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 208 static int flash_write_cfibuffer (flash_info_t * info, ulong dest,
 209                                   uchar * cp, int len);
 210 #endif
 211
 212 /*-----------------------------------------------------------------------
 213  * create an address based on the offset and the port width
 214  */
 215 inline uchar *
 216 flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 217 {
 218         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 219 }
 220
 221 #ifdef DEBUG
 222 /*-----------------------------------------------------------------------
 223  * Debug support
 224  */
 225 void print_longlong (char *str, unsigned long long data)
 226 {
 227         int i;
 228         char *cp;
 229
 230         cp = (unsigned char *) &data;
 231         for (i = 0; i < 8; i++)
 232                 sprintf (&str[i * 2], "%2.2x", *cp++);
 233 }
 234 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 235 {
 236         cfiptr_t cptr;
 237         int x, y;
 238
 239         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 240                 cptr.cp =
 241                         flash_make_addr (info, sect,
 242                                          x + FLASH_OFFSET_CFI_RESP);
 243                 debug ("%p : ", cptr.cp);
 244                 for (y = 0; y < 16; y++) {
 245                         debug ("%2.2x ", cptr.cp[y]);
 246                 }
 247                 debug (" ");
 248                 for (y = 0; y < 16; y++) {
 249                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 250                                 debug ("%c", cptr.cp[y]);
 251                         } else {
 252                                 debug (".");
 253                         }
 254                 }
 255                 debug ("\n");
 256         }
 257 }
 258 #endif
 259
 260
 261 /*-----------------------------------------------------------------------
 262  * read a character at a port width address
 263  */
 264 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 265 {
 266         uchar *cp;
 267
 268         cp = flash_make_addr (info, 0, offset);
 269 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 270         return (cp[0]);
 271 #else
 272         return (cp[info->portwidth - 1]);
 273 #endif
 274 }
 275
 276 /*-----------------------------------------------------------------------
 277  * read a short word by swapping for ppc format.
 278  */
 279 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 280 {
 281         uchar *addr;
 282         ushort retval;
 283
 284 #ifdef DEBUG
 285         int x;
 286 #endif
 287         addr = flash_make_addr (info, sect, offset);
 288
 289 #ifdef DEBUG
 290         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 291                info->portwidth);
 292         for (x = 0; x < 2 * info->portwidth; x++) {
 293                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 294         }
 295 #endif
 296 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 297         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 298 #else
 299         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 300                   addr[info->portwidth - 1]);
 301 #endif
 302
 303         debug ("retval = 0x%x\n", retval);
 304         return retval;
 305 }
 306
 307 /*-----------------------------------------------------------------------
 308  * read a long word by picking the least significant byte of each maximum
 309  * port size word. Swap for ppc format.
 310  */
 311 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 312 {
 313         uchar *addr;
 314         ulong retval;
 315
 316 #ifdef DEBUG
 317         int x;
 318 #endif
 319         addr = flash_make_addr (info, sect, offset);
 320
 321 #ifdef DEBUG
 322         debug ("long addr is at %p info->portwidth = %d\n", addr,
 323                info->portwidth);
 324         for (x = 0; x < 4 * info->portwidth; x++) {
 325                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 326         }
 327 #endif
 328 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
 329         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 330                 (addr[(2 * info->portwidth)]) |
 331                 (addr[(3 * info->portwidth)] << 8);
 332 #else
 333         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 334                 (addr[(info->portwidth) - 1] << 16) |
 335                 (addr[(4 * info->portwidth) - 1] << 8) |
 336                 addr[(3 * info->portwidth) - 1];
 337 #endif
 338         return retval;
 339 }
 340
 341
 342 #ifdef CONFIG_FLASH_CFI_LEGACY
 343 /*-----------------------------------------------------------------------
 344  * Call board code to request info about non-CFI flash.
 345  * board_flash_get_legacy needs to fill in at least:
 346  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
 347  */
 348 int flash_detect_legacy(ulong base, int banknum)
 349 {
 350         flash_info_t *info = &flash_info[banknum];
 351
 352         if (board_flash_get_legacy(base, banknum, info)) {
 353                 /* board code may have filled info completely. If not, we
 354                    use JEDEC ID probing. */
 355                 if (!info->vendor) {
 356                         int modes[] = {
 357                                 CFI_CMDSET_AMD_STANDARD,
 358                                 CFI_CMDSET_INTEL_STANDARD
 359                         };
 360                         int i;
 361
 362                         for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
 363                                 info->vendor = modes[i];
 364                                 info->start[0] = base;
 365                                 if (info->portwidth == FLASH_CFI_8BIT
 366                                         && info->interface == FLASH_CFI_X8X16) {
 367                                         info->addr_unlock1 = 0x2AAA;
 368                                         info->addr_unlock2 = 0x5555;
 369                                 } else {
 370                                         info->addr_unlock1 = 0x5555;
 371                                         info->addr_unlock2 = 0x2AAA;
 372                                 }
 373                                 flash_read_jedec_ids(info);
 374                                 debug("JEDEC PROBE: ID %x %x %x\n",
 375                                                 info->manufacturer_id,
 376                                                 info->device_id,
 377                                                 info->device_id2);
 378                                 if (jedec_flash_match(info, base))
 379                                         break;
 380                         }
 381                 }
 382
 383                 switch(info->vendor) {
 384                 case CFI_CMDSET_INTEL_STANDARD:
 385                 case CFI_CMDSET_INTEL_EXTENDED:
 386                         info->cmd_reset = FLASH_CMD_RESET;
 387                         break;
 388                 case CFI_CMDSET_AMD_STANDARD:
 389                 case CFI_CMDSET_AMD_EXTENDED:
 390                 case CFI_CMDSET_AMD_LEGACY:
 391                         info->cmd_reset = AMD_CMD_RESET;
 392                         break;
 393                 }
 394                 info->flash_id = FLASH_MAN_CFI;
 395                 return 1;
 396         }
 397         return 0; /* use CFI */
 398 }
 399 #else
 400 int inline flash_detect_legacy(ulong base, int banknum)
 401 {
 402         return 0; /* use CFI */
 403 }
 404 #endif
 405
 406
 407 /*-----------------------------------------------------------------------
 408  */
 409 unsigned long flash_init (void)
 410 {
 411         unsigned long size = 0;
 412         int i;
 413
 414 #ifdef CFG_FLASH_PROTECTION
 415         char *s = getenv("unlock");
 416 #endif
 417
 418         /* Init: no FLASHes known */
 419         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 420                 flash_info[i].flash_id = FLASH_UNKNOWN;
 421
 422                 if (!flash_detect_legacy (bank_base[i], i))
 423                         flash_get_size (bank_base[i], i);
 424                 size += flash_info[i].size;
 425                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 426 #ifndef CFG_FLASH_QUIET_TEST
 427                         printf ("## Unknown FLASH on Bank %d "
 428                                 "- Size = 0x%08lx = %ld MB\n",
 429                                 i+1, flash_info[i].size,
 430                                 flash_info[i].size << 20);
 431 #endif /* CFG_FLASH_QUIET_TEST */
 432                 }
 433 #ifdef CFG_FLASH_PROTECTION
 434                 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
 435                         /*
 436                          * Only the U-Boot image and it's environment
 437                          * is protected, all other sectors are
 438                          * unprotected (unlocked) if flash hardware
 439                          * protection is used (CFG_FLASH_PROTECTION)
 440                          * and the environment variable "unlock" is
 441                          * set to "yes".
 442                          */
 443                         if (flash_info[i].legacy_unlock) {
 444                                 int k;
 445
 446                                 /*
 447                                  * Disable legacy_unlock temporarily,
 448                                  * since flash_real_protect would
 449                                  * relock all other sectors again
 450                                  * otherwise.
 451                                  */
 452                                 flash_info[i].legacy_unlock = 0;
 453
 454                                 /*
 455                                  * Legacy unlocking (e.g. Intel J3) ->
 456                                  * unlock only one sector. This will
 457                                  * unlock all sectors.
 458                                  */
 459                                 flash_real_protect (&flash_info[i], 0, 0);
 460
 461                                 flash_info[i].legacy_unlock = 1;
 462
 463                                 /*
 464                                  * Manually mark other sectors as
 465                                  * unlocked (unprotected)
 466                                  */
 467                                 for (k = 1; k < flash_info[i].sector_count; k++)
 468                                         flash_info[i].protect[k] = 0;
 469                         } else {
 470                                 /*
 471                                  * No legancy unlocking -> unlock all sectors
 472                                  */
 473                                 flash_protect (FLAG_PROTECT_CLEAR,
 474                                                flash_info[i].start[0],
 475                                                flash_info[i].start[0]
 476                                                + flash_info[i].size - 1,
 477                                                &flash_info[i]);
 478                         }
 479                 }
 480 #endif /* CFG_FLASH_PROTECTION */
 481         }
 482
 483         /* Monitor protection ON by default */
 484 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 485         flash_protect (FLAG_PROTECT_SET,
 486                        CFG_MONITOR_BASE,
 487                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 488                        flash_get_info(CFG_MONITOR_BASE));
 489 #endif
 490
 491         /* Environment protection ON by default */
 492 #ifdef CFG_ENV_IS_IN_FLASH
 493         flash_protect (FLAG_PROTECT_SET,
 494                        CFG_ENV_ADDR,
 495                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 496                        flash_get_info(CFG_ENV_ADDR));
 497 #endif
 498
 499         /* Redundant environment protection ON by default */
 500 #ifdef CFG_ENV_ADDR_REDUND
 501         flash_protect (FLAG_PROTECT_SET,
 502                        CFG_ENV_ADDR_REDUND,
 503                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 504                        flash_get_info(CFG_ENV_ADDR_REDUND));
 505 #endif
 506         return (size);
 507 }
 508
 509 /*-----------------------------------------------------------------------
 510  */
 511 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 512 static flash_info_t *flash_get_info(ulong base)
 513 {
 514         int i;
 515         flash_info_t * info = 0;
 516
 517         for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) {
 518                 info = & flash_info[i];
 519                 if (info->size && info->start[0] <= base &&
 520                     base <= info->start[0] + info->size - 1)
 521                         break;
 522         }
 523
 524         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 525 }
 526 #endif
 527
 528 /*-----------------------------------------------------------------------
 529  */
 530 int flash_erase (flash_info_t * info, int s_first, int s_last)
 531 {
 532         int rcode = 0;
 533         int prot;
 534         flash_sect_t sect;
 535
 536         if (info->flash_id != FLASH_MAN_CFI) {
 537                 puts ("Can't erase unknown flash type - aborted\n");
 538                 return 1;
 539         }
 540         if ((s_first < 0) || (s_first > s_last)) {
 541                 puts ("- no sectors to erase\n");
 542                 return 1;
 543         }
 544
 545         prot = 0;
 546         for (sect = s_first; sect <= s_last; ++sect) {
 547                 if (info->protect[sect]) {
 548                         prot++;
 549                 }
 550         }
 551         if (prot) {
 552                 printf ("- Warning: %d protected sectors will not be erased!\n",
 553                         prot);
 554         } else {
 555                 putc ('\n');
 556         }
 557
 558
 559         for (sect = s_first; sect <= s_last; sect++) {
 560                 if (info->protect[sect] == 0) { /* not protected */
 561                         switch (info->vendor) {
 562                         case CFI_CMDSET_INTEL_STANDARD:
 563                         case CFI_CMDSET_INTEL_EXTENDED:
 564                                 flash_write_cmd (info, sect, 0,
 565                                                  FLASH_CMD_CLEAR_STATUS);
 566                                 flash_write_cmd (info, sect, 0,
 567                                                  FLASH_CMD_BLOCK_ERASE);
 568                                 flash_write_cmd (info, sect, 0,
 569                                                  FLASH_CMD_ERASE_CONFIRM);
 570                                 break;
 571                         case CFI_CMDSET_AMD_STANDARD:
 572                         case CFI_CMDSET_AMD_EXTENDED:
 573                                 flash_unlock_seq (info, sect);
 574                                 flash_write_cmd (info, sect,
 575                                                 info->addr_unlock1,
 576                                                 AMD_CMD_ERASE_START);
 577                                 flash_unlock_seq (info, sect);
 578                                 flash_write_cmd (info, sect, 0,
 579                                                  AMD_CMD_ERASE_SECTOR);
 580                                 break;
 581 #ifdef CONFIG_FLASH_CFI_LEGACY
 582                         case CFI_CMDSET_AMD_LEGACY:
 583                                 flash_unlock_seq (info, 0);
 584                                 flash_write_cmd (info, 0, info->addr_unlock1,
 585                                                 AMD_CMD_ERASE_START);
 586                                 flash_unlock_seq (info, 0);
 587                                 flash_write_cmd (info, sect, 0,
 588                                                 AMD_CMD_ERASE_SECTOR);
 589                                 break;
 590 #endif
 591                         default:
 592                                 debug ("Unkown flash vendor %d\n",
 593                                        info->vendor);
 594                                 break;
 595                         }
 596
 597                         if (flash_full_status_check
 598                             (info, sect, info->erase_blk_tout, "erase")) {
 599                                 rcode = 1;
 600                         } else
 601                                 putc ('.');
 602                 }
 603         }
 604         puts (" done\n");
 605         return rcode;
 606 }
 607
 608 /*-----------------------------------------------------------------------
 609  */
 610 void flash_print_info (flash_info_t * info)
 611 {
 612         int i;
 613
 614         if (info->flash_id != FLASH_MAN_CFI) {
 615                 puts ("missing or unknown FLASH type\n");
 616                 return;
 617         }
 618
 619         printf ("%s FLASH (%d x %d)",
 620                 info->name,
 621                 (info->portwidth << 3), (info->chipwidth << 3));
 622         if (info->size < 1024*1024)
 623                 printf ("  Size: %ld kB in %d Sectors\n",
 624                         info->size >> 10, info->sector_count);
 625         else
 626                 printf ("  Size: %ld MB in %d Sectors\n",
 627                         info->size >> 20, info->sector_count);
 628         printf ("  ");
 629         switch (info->vendor) {
 630                 case CFI_CMDSET_INTEL_STANDARD:
 631                         printf ("Intel Standard");
 632                         break;
 633                 case CFI_CMDSET_INTEL_EXTENDED:
 634                         printf ("Intel Extended");
 635                         break;
 636                 case CFI_CMDSET_AMD_STANDARD:
 637                         printf ("AMD Standard");
 638                         break;
 639                 case CFI_CMDSET_AMD_EXTENDED:
 640                         printf ("AMD Extended");
 641                         break;
 642 #ifdef CONFIG_FLASH_CFI_LEGACY
 643                 case CFI_CMDSET_AMD_LEGACY:
 644                         printf ("AMD Legacy");
 645                         break;
 646 #endif
 647                 default:
 648                         printf ("Unknown (%d)", info->vendor);
 649                         break;
 650         }
 651         printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
 652                 info->manufacturer_id, info->device_id);
 653         if (info->device_id == 0x7E) {
 654                 printf("%04X", info->device_id2);
 655         }
 656         printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
 657                 info->erase_blk_tout,
 658                 info->write_tout);
 659         if (info->buffer_size > 1) {
 660                 printf ("  Buffer write timeout: %ld ms, "
 661                         "buffer size: %d bytes\n",
 662                 info->buffer_write_tout,
 663                 info->buffer_size);
 664         }
 665
 666         puts ("\n  Sector Start Addresses:");
 667         for (i = 0; i < info->sector_count; ++i) {
 668                 if ((i % 5) == 0)
 669                         printf ("\n");
 670 #ifdef CFG_FLASH_EMPTY_INFO
 671                 int k;
 672                 int size;
 673                 int erased;
 674                 volatile unsigned long *flash;
 675
 676                 /*
 677                  * Check if whole sector is erased
 678                  */
 679                 if (i != (info->sector_count - 1))
 680                         size = info->start[i + 1] - info->start[i];
 681                 else
 682                         size = info->start[0] + info->size - info->start[i];
 683                 erased = 1;
 684                 flash = (volatile unsigned long *) info->start[i];
 685                 size = size >> 2;       /* divide by 4 for longword access */
 686                 for (k = 0; k < size; k++) {
 687                         if (*flash++ != 0xffffffff) {
 688                                 erased = 0;
 689                                 break;
 690                         }
 691                 }
 692
 693                 /* print empty and read-only info */
 694                 printf ("  %08lX %c %s ",
 695                         info->start[i],
 696                         erased ? 'E' : ' ',
 697                         info->protect[i] ? "RO" : "  ");
 698 #else   /* ! CFG_FLASH_EMPTY_INFO */
 699                 printf ("  %08lX   %s ",
 700                         info->start[i],
 701                         info->protect[i] ? "RO" : "  ");
 702 #endif
 703         }
 704         putc ('\n');
 705         return;
 706 }
 707
 708 /*-----------------------------------------------------------------------
 709  * Copy memory to flash, returns:
 710  * 0 - OK
 711  * 1 - write timeout
 712  * 2 - Flash not erased
 713  */
 714 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 715 {
 716         ulong wp;
 717         ulong cp;
 718         int aln;
 719         cfiword_t cword;
 720         int i, rc;
 721
 722 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 723         int buffered_size;
 724 #endif
 725         /* get lower aligned address */
 726         /* get lower aligned address */
 727         wp = (addr & ~(info->portwidth - 1));
 728
 729         /* handle unaligned start */
 730         if ((aln = addr - wp) != 0) {
 731                 cword.l = 0;
 732                 cp = wp;
 733                 for (i = 0; i < aln; ++i, ++cp)
 734                         flash_add_byte (info, &cword, (*(uchar *) cp));
 735
 736                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 737                         flash_add_byte (info, &cword, *src++);
 738                         cnt--;
 739                         cp++;
 740                 }
 741                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 742                         flash_add_byte (info, &cword, (*(uchar *) cp));
 743                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 744                         return rc;
 745                 wp = cp;
 746         }
 747
 748         /* handle the aligned part */
 749 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 750         buffered_size = (info->portwidth / info->chipwidth);
 751         buffered_size *= info->buffer_size;
 752         while (cnt >= info->portwidth) {
 753                 /* prohibit buffer write when buffer_size is 1 */
 754                 if (info->buffer_size == 1) {
 755                         cword.l = 0;
 756                         for (i = 0; i < info->portwidth; i++)
 757                                 flash_add_byte (info, &cword, *src++);
 758                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 759                                 return rc;
 760                         wp += info->portwidth;
 761                         cnt -= info->portwidth;
 762                         continue;
 763                 }
 764
 765                 /* write buffer until next buffered_size aligned boundary */
 766                 i = buffered_size - (wp % buffered_size);
 767                 if (i > cnt)
 768                         i = cnt;
 769                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 770                         return rc;
 771                 i -= i & (info->portwidth - 1);
 772                 wp += i;
 773                 src += i;
 774                 cnt -= i;
 775         }
 776 #else
 777         while (cnt >= info->portwidth) {
 778                 cword.l = 0;
 779                 for (i = 0; i < info->portwidth; i++) {
 780                         flash_add_byte (info, &cword, *src++);
 781                 }
 782                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 783                         return rc;
 784                 wp += info->portwidth;
 785                 cnt -= info->portwidth;
 786         }
 787 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 788         if (cnt == 0) {
 789                 return (0);
 790         }
 791
 792         /*
 793          * handle unaligned tail bytes
 794          */
 795         cword.l = 0;
 796         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 797                 flash_add_byte (info, &cword, *src++);
 798                 --cnt;
 799         }
 800         for (; i < info->portwidth; ++i, ++cp) {
 801                 flash_add_byte (info, &cword, (*(uchar *) cp));
 802         }
 803
 804         return flash_write_cfiword (info, wp, cword);
 805 }
 806
 807 /*-----------------------------------------------------------------------
 808  */
 809 #ifdef CFG_FLASH_PROTECTION
 810
 811 int flash_real_protect (flash_info_t * info, long sector, int prot)
 812 {
 813         int retcode = 0;
 814
 815         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 816         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 817         if (prot)
 818                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 819         else
 820                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 821
 822         if ((retcode =
 823              flash_full_status_check (info, sector, info->erase_blk_tout,
 824                                       prot ? "protect" : "unprotect")) == 0) {
 825
 826                 info->protect[sector] = prot;
 827
 828                 /*
 829                  * On some of Intel's flash chips (marked via legacy_unlock)
 830                  * unprotect unprotects all locking.
 831                  */
 832                 if ((prot == 0) && (info->legacy_unlock)) {
 833                         flash_sect_t i;
 834
 835                         for (i = 0; i < info->sector_count; i++) {
 836                                 if (info->protect[i])
 837                                         flash_real_protect (info, i, 1);
 838                         }
 839                 }
 840         }
 841         return retcode;
 842 }
 843
 844 /*-----------------------------------------------------------------------
 845  * flash_read_user_serial - read the OneTimeProgramming cells
 846  */
 847 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 848                              int len)
 849 {
 850         uchar *src;
 851         uchar *dst;
 852
 853         dst = buffer;
 854         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 855         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 856         memcpy (dst, src + offset, len);
 857         flash_write_cmd (info, 0, 0, info->cmd_reset);
 858 }
 859
 860 /*
 861  * flash_read_factory_serial - read the device Id from the protection area
 862  */
 863 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 864                                 int len)
 865 {
 866         uchar *src;
 867
 868         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 869         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 870         memcpy (buffer, src + offset, len);
 871         flash_write_cmd (info, 0, 0, info->cmd_reset);
 872 }
 873
 874 #endif /* CFG_FLASH_PROTECTION */
 875
 876 /*
 877  * flash_is_busy - check to see if the flash is busy
 878  *
 879  * This routine checks the status of the chip and returns true if the
 880  * chip is busy.
 881  */
 882 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 883 {
 884         int retval;
 885
 886         switch (info->vendor) {
 887         case CFI_CMDSET_INTEL_STANDARD:
 888         case CFI_CMDSET_INTEL_EXTENDED:
 889                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 890                 break;
 891         case CFI_CMDSET_AMD_STANDARD:
 892         case CFI_CMDSET_AMD_EXTENDED:
 893 #ifdef CONFIG_FLASH_CFI_LEGACY
 894         case CFI_CMDSET_AMD_LEGACY:
 895 #endif
 896                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 897                 break;
 898         default:
 899                 retval = 0;
 900         }
 901         debug ("flash_is_busy: %d\n", retval);
 902         return retval;
 903 }
 904
 905 /*-----------------------------------------------------------------------
 906  *  wait for XSR.7 to be set. Time out with an error if it does not.
 907  *  This routine does not set the flash to read-array mode.
 908  */
 909 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 910                                ulong tout, char *prompt)
 911 {
 912         ulong start;
 913
 914 #if CFG_HZ != 1000
 915         tout *= CFG_HZ/1000;
 916 #endif
 917
 918         /* Wait for command completion */
 919         start = get_timer (0);
 920         while (flash_is_busy (info, sector)) {
 921                 if (get_timer (start) > tout) {
 922                         printf ("Flash %s timeout at address %lx data %lx\n",
 923                                 prompt, info->start[sector],
 924                                 flash_read_long (info, sector, 0));
 925                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 926                         return ERR_TIMOUT;
 927                 }
 928                 udelay (1);             /* also triggers watchdog */
 929         }
 930         return ERR_OK;
 931 }
 932
 933 /*-----------------------------------------------------------------------
 934  * Wait for XSR.7 to be set, if it times out print an error, otherwise
 935  * do a full status check.
 936  *
 937  * This routine sets the flash to read-array mode.
 938  */
 939 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 940                                     ulong tout, char *prompt)
 941 {
 942         int retcode;
 943
 944         retcode = flash_status_check (info, sector, tout, prompt);
 945         switch (info->vendor) {
 946         case CFI_CMDSET_INTEL_EXTENDED:
 947         case CFI_CMDSET_INTEL_STANDARD:
 948                 if ((retcode == ERR_OK)
 949                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 950                         retcode = ERR_INVAL;
 951                         printf ("Flash %s error at address %lx\n", prompt,
 952                                 info->start[sector]);
 953                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
 954                                          FLASH_STATUS_PSLBS)) {
 955                                 puts ("Command Sequence Error.\n");
 956                         } else if (flash_isset (info, sector, 0,
 957                                                 FLASH_STATUS_ECLBS)) {
 958                                 puts ("Block Erase Error.\n");
 959                                 retcode = ERR_NOT_ERASED;
 960                         } else if (flash_isset (info, sector, 0,
 961                                                 FLASH_STATUS_PSLBS)) {
 962                                 puts ("Locking Error\n");
 963                         }
 964                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 965                                 puts ("Block locked.\n");
 966                                 retcode = ERR_PROTECTED;
 967                         }
 968                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 969                                 puts ("Vpp Low Error.\n");
 970                 }
 971                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 972                 break;
 973         default:
 974                 break;
 975         }
 976         return retcode;
 977 }
 978
 979 /*-----------------------------------------------------------------------
 980  */
 981 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 982 {
 983 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 984         unsigned short  w;
 985         unsigned int    l;
 986         unsigned long long ll;
 987 #endif
 988
 989         switch (info->portwidth) {
 990         case FLASH_CFI_8BIT:
 991                 cword->c = c;
 992                 break;
 993         case FLASH_CFI_16BIT:
 994 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
 995                 w = c;
 996                 w <<= 8;
 997                 cword->w = (cword->w >> 8) | w;
 998 #else
 999                 cword->w = (cword->w << 8) | c;
1000 #endif
1001                 break;
1002         case FLASH_CFI_32BIT:
1003 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
1004                 l = c;
1005                 l <<= 24;
1006                 cword->l = (cword->l >> 8) | l;
1007 #else
1008                 cword->l = (cword->l << 8) | c;
1009 #endif
1010                 break;
1011         case FLASH_CFI_64BIT:
1012 #if defined(__LITTLE_ENDIAN) && !defined(CFG_WRITE_SWAPPED_DATA)
1013                 ll = c;
1014                 ll <<= 56;
1015                 cword->ll = (cword->ll >> 8) | ll;
1016 #else
1017                 cword->ll = (cword->ll << 8) | c;
1018 #endif
1019                 break;
1020         }
1021 }
1022
1023
1024 /*-----------------------------------------------------------------------
1025  * make a proper sized command based on the port and chip widths
1026  */
1027 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
1028 {
1029         int i;
1030         uchar *cp = (uchar *) cmdbuf;
1031
1032 #if defined(__LITTLE_ENDIAN) || defined(CFG_WRITE_SWAPPED_DATA)
1033         for (i = info->portwidth; i > 0; i--)
1034 #else
1035         for (i = 1; i <= info->portwidth; i++)
1036 #endif
1037                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
1038 }
1039
1040 /*
1041  * Write a proper sized command to the correct address
1042  */
1043 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
1044                              uint offset, uchar cmd)
1045 {
1046
1047         volatile cfiptr_t addr;
1048         cfiword_t cword;
1049
1050         addr.cp = flash_make_addr (info, sect, offset);
1051         flash_make_cmd (info, cmd, &cword);
1052         switch (info->portwidth) {
1053         case FLASH_CFI_8BIT:
1054                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
1055                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1056                 *addr.cp = cword.c;
1057                 break;
1058         case FLASH_CFI_16BIT:
1059                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
1060                        cmd, cword.w,
1061                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1062                 *addr.wp = cword.w;
1063                 break;
1064         case FLASH_CFI_32BIT:
1065                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
1066                        cmd, cword.l,
1067                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1068                 *addr.lp = cword.l;
1069                 break;
1070         case FLASH_CFI_64BIT:
1071 #ifdef DEBUG
1072                 {
1073                         char str[20];
1074
1075                         print_longlong (str, cword.ll);
1076
1077                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
1078                                addr.llp, cmd, str,
1079                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1080                 }
1081 #endif
1082                 *addr.llp = cword.ll;
1083                 break;
1084         }
1085
1086         /* Ensure all the instructions are fully finished */
1087         sync();
1088 }
1089
1090 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
1091 {
1092         flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
1093         flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
1094 }
1095
1096 /*-----------------------------------------------------------------------
1097  */
1098 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
1099                           uint offset, uchar cmd)
1100 {
1101         cfiptr_t cptr;
1102         cfiword_t cword;
1103         int retval;
1104
1105         cptr.cp = flash_make_addr (info, sect, offset);
1106         flash_make_cmd (info, cmd, &cword);
1107
1108         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
1109         switch (info->portwidth) {
1110         case FLASH_CFI_8BIT:
1111                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
1112                 retval = (cptr.cp[0] == cword.c);
1113                 break;
1114         case FLASH_CFI_16BIT:
1115                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
1116                 retval = (cptr.wp[0] == cword.w);
1117                 break;
1118         case FLASH_CFI_32BIT:
1119                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1120                 retval = (cptr.lp[0] == cword.l);
1121                 break;
1122         case FLASH_CFI_64BIT:
1123 #ifdef DEBUG
1124                 {
1125                         char str1[20];
1126                         char str2[20];
1127
1128                         print_longlong (str1, cptr.llp[0]);
1129                         print_longlong (str2, cword.ll);
1130                         debug ("is= %s %s\n", str1, str2);
1131                 }
1132 #endif
1133                 retval = (cptr.llp[0] == cword.ll);
1134                 break;
1135         default:
1136                 retval = 0;
1137                 break;
1138         }
1139         return retval;
1140 }
1141
1142 /*-----------------------------------------------------------------------
1143  */
1144 static int flash_isset (flash_info_t * info, flash_sect_t sect,
1145                         uint offset, uchar cmd)
1146 {
1147         cfiptr_t cptr;
1148         cfiword_t cword;
1149         int retval;
1150
1151         cptr.cp = flash_make_addr (info, sect, offset);
1152         flash_make_cmd (info, cmd, &cword);
1153         switch (info->portwidth) {
1154         case FLASH_CFI_8BIT:
1155                 retval = ((cptr.cp[0] & cword.c) == cword.c);
1156                 break;
1157         case FLASH_CFI_16BIT:
1158                 retval = ((cptr.wp[0] & cword.w) == cword.w);
1159                 break;
1160         case FLASH_CFI_32BIT:
1161                 retval = ((cptr.lp[0] & cword.l) == cword.l);
1162                 break;
1163         case FLASH_CFI_64BIT:
1164                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1165                 break;
1166         default:
1167                 retval = 0;
1168                 break;
1169         }
1170         return retval;
1171 }
1172
1173 /*-----------------------------------------------------------------------
1174  */
1175 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
1176                          uint offset, uchar cmd)
1177 {
1178         cfiptr_t cptr;
1179         cfiword_t cword;
1180         int retval;
1181
1182         cptr.cp = flash_make_addr (info, sect, offset);
1183         flash_make_cmd (info, cmd, &cword);
1184         switch (info->portwidth) {
1185         case FLASH_CFI_8BIT:
1186                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1187                 break;
1188         case FLASH_CFI_16BIT:
1189                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1190                 break;
1191         case FLASH_CFI_32BIT:
1192                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1193                 break;
1194         case FLASH_CFI_64BIT:
1195                 retval = ((cptr.llp[0] & cword.ll) !=
1196                           (cptr.llp[0] & cword.ll));
1197                 break;
1198         default:
1199                 retval = 0;
1200                 break;
1201         }
1202         return retval;
1203 }
1204
1205 /*-----------------------------------------------------------------------
1206  * read jedec ids from device and set corresponding fields in info struct
1207  *
1208  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1209  *
1210 */
1211 static void flash_read_jedec_ids (flash_info_t * info)
1212 {
1213         info->manufacturer_id = 0;
1214         info->device_id       = 0;
1215         info->device_id2      = 0;
1216
1217         switch (info->vendor) {
1218         case CFI_CMDSET_INTEL_STANDARD:
1219         case CFI_CMDSET_INTEL_EXTENDED:
1220                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1221                 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1222                 udelay(1000); /* some flash are slow to respond */
1223                 info->manufacturer_id = flash_read_uchar (info,
1224                                                 FLASH_OFFSET_MANUFACTURER_ID);
1225                 info->device_id = flash_read_uchar (info,
1226                                                 FLASH_OFFSET_DEVICE_ID);
1227                 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1228                 break;
1229         case CFI_CMDSET_AMD_STANDARD:
1230         case CFI_CMDSET_AMD_EXTENDED:
1231                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1232                 flash_unlock_seq(info, 0);
1233                 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1234                 udelay(1000); /* some flash are slow to respond */
1235                 info->manufacturer_id = flash_read_uchar (info,
1236                                                 FLASH_OFFSET_MANUFACTURER_ID);
1237                 info->device_id = flash_read_uchar (info,
1238                                                 FLASH_OFFSET_DEVICE_ID);
1239                 if (info->device_id == 0x7E) {
1240                         /* AMD 3-byte (expanded) device ids */
1241                         info->device_id2 = flash_read_uchar (info,
1242                                                 FLASH_OFFSET_DEVICE_ID2);
1243                         info->device_id2 <<= 8;
1244                         info->device_id2 |= flash_read_uchar (info,
1245                                                 FLASH_OFFSET_DEVICE_ID3);
1246                 }
1247                 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1248                 break;
1249         default:
1250                 break;
1251         }
1252 }
1253
1254 /*-----------------------------------------------------------------------
1255  * detect if flash is compatible with the Common Flash Interface (CFI)
1256  * http://www.jedec.org/download/search/jesd68.pdf
1257  */
1258 static int __flash_detect_cfi (flash_info_t * info)
1259 {
1260         int cfi_offset;
1261
1262         flash_write_cmd (info, 0, 0, info->cmd_reset);
1263         for (cfi_offset=0;
1264              cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1265              cfi_offset++) {
1266                 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1267                                  FLASH_CMD_CFI);
1268                 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1269                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1270                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1271                         info->interface = flash_read_ushort (info, 0,
1272                                                 FLASH_OFFSET_INTERFACE);
1273                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1274                         debug ("device interface is %d\n",
1275                                info->interface);
1276                         debug ("found port %d chip %d ",
1277                                info->portwidth, info->chipwidth);
1278                         debug ("port %d bits chip %d bits\n",
1279                                info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1280                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1281
1282                         /* calculate command offsets as in the Linux driver */
1283                         info->addr_unlock1 = 0x555;
1284                         info->addr_unlock2 = 0x2aa;
1285
1286                         /*
1287                          * modify the unlock address if we are
1288                          * in compatibility mode
1289                          */
1290                         if (    /* x8/x16 in x8 mode */
1291                                 ((info->chipwidth == FLASH_CFI_BY8) &&
1292                                         (info->interface == FLASH_CFI_X8X16)) ||
1293                                 /* x16/x32 in x16 mode */
1294                                 ((info->chipwidth == FLASH_CFI_BY16) &&
1295                                         (info->interface == FLASH_CFI_X16X32)))
1296                         {
1297                                 info->addr_unlock1 = 0xaaa;
1298                                 info->addr_unlock2 = 0x555;
1299                         }
1300
1301                         info->name = "CFI conformant";
1302                         return 1;
1303                 }
1304         }
1305
1306         return 0;
1307 }
1308
1309 static int flash_detect_cfi (flash_info_t * info)
1310 {
1311         debug ("flash detect cfi\n");
1312
1313         for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1314              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1315                 for (info->chipwidth = FLASH_CFI_BY8;
1316                      info->chipwidth <= info->portwidth;
1317                      info->chipwidth <<= 1)
1318                         if (__flash_detect_cfi(info))
1319                                 return 1;
1320         }
1321         debug ("not found\n");
1322         return 0;
1323 }
1324
1325 /*
1326  * The following code cannot be run from FLASH!
1327  *
1328  */
1329 ulong flash_get_size (ulong base, int banknum)
1330 {
1331         flash_info_t *info = &flash_info[banknum];
1332         int i, j;
1333         flash_sect_t sect_cnt;
1334         unsigned long sector;
1335         unsigned long tmp;
1336         int size_ratio;
1337         uchar num_erase_regions;
1338         int erase_region_size;
1339         int erase_region_count;
1340         int geometry_reversed = 0;
1341
1342         info->ext_addr = 0;
1343         info->cfi_version = 0;
1344 #ifdef CFG_FLASH_PROTECTION
1345         info->legacy_unlock = 0;
1346 #endif
1347
1348         info->start[0] = base;
1349
1350         if (flash_detect_cfi (info)) {
1351                 info->vendor = flash_read_ushort (info, 0,
1352                                         FLASH_OFFSET_PRIMARY_VENDOR);
1353                 flash_read_jedec_ids (info);
1354                 flash_write_cmd (info, 0, info->cfi_offset, FLASH_CMD_CFI);
1355                 num_erase_regions = flash_read_uchar (info,
1356                                         FLASH_OFFSET_NUM_ERASE_REGIONS);
1357                 info->ext_addr = flash_read_ushort (info, 0,
1358                                         FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1359                 if (info->ext_addr) {
1360                         info->cfi_version = (ushort) flash_read_uchar (info,
1361                                                 info->ext_addr + 3) << 8;
1362                         info->cfi_version |= (ushort) flash_read_uchar (info,
1363                                                 info->ext_addr + 4);
1364                 }
1365 #ifdef DEBUG
1366                 flash_printqry (info, 0);
1367 #endif
1368                 switch (info->vendor) {
1369                 case CFI_CMDSET_INTEL_STANDARD:
1370                 case CFI_CMDSET_INTEL_EXTENDED:
1371                 default:
1372                         info->cmd_reset = FLASH_CMD_RESET;
1373 #ifdef CFG_FLASH_PROTECTION
1374                         /* read legacy lock/unlock bit from intel flash */
1375                         if (info->ext_addr) {
1376                                 info->legacy_unlock = flash_read_uchar (info,
1377                                                 info->ext_addr + 5) & 0x08;
1378                         }
1379 #endif
1380                         break;
1381                 case CFI_CMDSET_AMD_STANDARD:
1382                 case CFI_CMDSET_AMD_EXTENDED:
1383                         info->cmd_reset = AMD_CMD_RESET;
1384                         /* check if flash geometry needs reversal */
1385                         if (num_erase_regions <= 1)
1386                                 break;
1387                         /* reverse geometry if top boot part */
1388                         if (info->cfi_version < 0x3131) {
1389                                 /* CFI < 1.1, try to guess from device id */
1390                                 if ((info->device_id & 0x80) != 0) {
1391                                         geometry_reversed = 1;
1392                                 }
1393                                 break;
1394                         }
1395                         /* CFI >= 1.1, deduct from top/bottom flag */
1396                         /* note: ext_addr is valid since cfi_version > 0 */
1397                         if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1398                                 geometry_reversed = 1;
1399                         }
1400                         break;
1401                 }
1402
1403                 debug ("manufacturer is %d\n", info->vendor);
1404                 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1405                 debug ("device id is 0x%x\n", info->device_id);
1406                 debug ("device id2 is 0x%x\n", info->device_id2);
1407                 debug ("cfi version is 0x%04x\n", info->cfi_version);
1408
1409                 size_ratio = info->portwidth / info->chipwidth;
1410                 /* if the chip is x8/x16 reduce the ratio by half */
1411                 if ((info->interface == FLASH_CFI_X8X16)
1412                     && (info->chipwidth == FLASH_CFI_BY8)) {
1413                         size_ratio >>= 1;
1414                 }
1415                 debug ("size_ratio %d port %d bits chip %d bits\n",
1416                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1417                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1418                 debug ("found %d erase regions\n", num_erase_regions);
1419                 sect_cnt = 0;
1420                 sector = base;
1421                 for (i = 0; i < num_erase_regions; i++) {
1422                         if (i > NUM_ERASE_REGIONS) {
1423                                 printf ("%d erase regions found, only %d used\n",
1424                                         num_erase_regions, NUM_ERASE_REGIONS);
1425                                 break;
1426                         }
1427                         if (geometry_reversed)
1428                                 tmp = flash_read_long (info, 0,
1429                                                FLASH_OFFSET_ERASE_REGIONS +
1430                                                (num_erase_regions - 1 - i) * 4);
1431                         else
1432                                 tmp = flash_read_long (info, 0,
1433                                                FLASH_OFFSET_ERASE_REGIONS +
1434                                                i * 4);
1435                         erase_region_size =
1436                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1437                         tmp >>= 16;
1438                         erase_region_count = (tmp & 0xffff) + 1;
1439                         debug ("erase_region_count = %d erase_region_size = %d\n",
1440                                 erase_region_count, erase_region_size);
1441                         for (j = 0; j < erase_region_count; j++) {
1442                                 if (sect_cnt >= CFG_MAX_FLASH_SECT) {
1443                                         printf("ERROR: too many flash sectors\n");
1444                                         break;
1445                                 }
1446                                 info->start[sect_cnt] = sector;
1447                                 sector += (erase_region_size * size_ratio);
1448
1449                                 /*
1450                                  * Only read protection status from
1451                                  * supported devices (intel...)
1452                                  */
1453                                 switch (info->vendor) {
1454                                 case CFI_CMDSET_INTEL_EXTENDED:
1455                                 case CFI_CMDSET_INTEL_STANDARD:
1456                                         info->protect[sect_cnt] =
1457                                                 flash_isset (info, sect_cnt,
1458                                                              FLASH_OFFSET_PROTECT,
1459                                                              FLASH_STATUS_PROTECT);
1460                                         break;
1461                                 default:
1462                                         /* default: not protected */
1463                                         info->protect[sect_cnt] = 0;
1464                                 }
1465
1466                                 sect_cnt++;
1467                         }
1468                 }
1469
1470                 info->sector_count = sect_cnt;
1471                 info->size = 1 << flash_read_uchar (info, FLASH_OFFSET_SIZE);
1472                 /* multiply the size by the number of chips */
1473                 info->size *= size_ratio;
1474                 info->buffer_size = 1 << flash_read_ushort (info, 0,
1475                                                 FLASH_OFFSET_BUFFER_SIZE);
1476                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1477                 info->erase_blk_tout = tmp *
1478                         (1 << flash_read_uchar (
1479                                  info, FLASH_OFFSET_EMAX_TOUT));
1480                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1481                         (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1482                 /* round up when converting to ms */
1483                 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0);
1484                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1485                       (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1486                 /* round up when converting to ms */
1487                 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0);
1488                 info->flash_id = FLASH_MAN_CFI;
1489                 if ((info->interface == FLASH_CFI_X8X16) &&
1490                     (info->chipwidth == FLASH_CFI_BY8)) {
1491                         /* XXX - Need to test on x8/x16 in parallel. */
1492                         info->portwidth >>= 1;
1493                 }
1494         }
1495
1496         flash_write_cmd (info, 0, 0, info->cmd_reset);
1497         return (info->size);
1498 }
1499
1500 /* loop through the sectors from the highest address when the passed
1501  * address is greater or equal to the sector address we have a match
1502  */
1503 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1504 {
1505         flash_sect_t sector;
1506
1507         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1508                 if (addr >= info->start[sector])
1509                         break;
1510         }
1511         return sector;
1512 }
1513
1514 /*-----------------------------------------------------------------------
1515  */
1516 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1517                                 cfiword_t cword)
1518 {
1519         cfiptr_t ctladdr;
1520         cfiptr_t cptr;
1521         int flag;
1522
1523         ctladdr.cp = flash_make_addr (info, 0, 0);
1524         cptr.cp = (uchar *) dest;
1525
1526         /* Check if Flash is (sufficiently) erased */
1527         switch (info->portwidth) {
1528         case FLASH_CFI_8BIT:
1529                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1530                 break;
1531         case FLASH_CFI_16BIT:
1532                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1533                 break;
1534         case FLASH_CFI_32BIT:
1535                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1536                 break;
1537         case FLASH_CFI_64BIT:
1538                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1539                 break;
1540         default:
1541                 return 2;
1542         }
1543         if (!flag)
1544                 return 2;
1545
1546         /* Disable interrupts which might cause a timeout here */
1547         flag = disable_interrupts ();
1548
1549         switch (info->vendor) {
1550         case CFI_CMDSET_INTEL_EXTENDED:
1551         case CFI_CMDSET_INTEL_STANDARD:
1552                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1553                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1554                 break;
1555         case CFI_CMDSET_AMD_EXTENDED:
1556         case CFI_CMDSET_AMD_STANDARD:
1557 #ifdef CONFIG_FLASH_CFI_LEGACY
1558         case CFI_CMDSET_AMD_LEGACY:
1559 #endif
1560                 flash_unlock_seq (info, 0);
1561                 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
1562                 break;
1563         }
1564
1565         switch (info->portwidth) {
1566         case FLASH_CFI_8BIT:
1567                 cptr.cp[0] = cword.c;
1568                 break;
1569         case FLASH_CFI_16BIT:
1570                 cptr.wp[0] = cword.w;
1571                 break;
1572         case FLASH_CFI_32BIT:
1573                 cptr.lp[0] = cword.l;
1574                 break;
1575         case FLASH_CFI_64BIT:
1576                 cptr.llp[0] = cword.ll;
1577                 break;
1578         }
1579
1580         /* re-enable interrupts if necessary */
1581         if (flag)
1582                 enable_interrupts ();
1583
1584         return flash_full_status_check (info, find_sector (info, dest),
1585                                         info->write_tout, "write");
1586 }
1587
1588 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1589
1590 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1591                                   int len)
1592 {
1593         flash_sect_t sector;
1594         int cnt;
1595         int retcode;
1596         volatile cfiptr_t src;
1597         volatile cfiptr_t dst;
1598
1599         switch (info->vendor) {
1600         case CFI_CMDSET_INTEL_STANDARD:
1601         case CFI_CMDSET_INTEL_EXTENDED:
1602                 src.cp = cp;
1603                 dst.cp = (uchar *) dest;
1604                 sector = find_sector (info, dest);
1605                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1606                 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1607                 retcode = flash_status_check (info, sector,
1608                                               info->buffer_write_tout,
1609                                               "write to buffer");
1610                 if (retcode == ERR_OK) {
1611                         /* reduce the number of loops by the width of
1612                          * the port */
1613                         switch (info->portwidth) {
1614                         case FLASH_CFI_8BIT:
1615                                 cnt = len;
1616                                 break;
1617                         case FLASH_CFI_16BIT:
1618                                 cnt = len >> 1;
1619                                 break;
1620                         case FLASH_CFI_32BIT:
1621                                 cnt = len >> 2;
1622                                 break;
1623                         case FLASH_CFI_64BIT:
1624                                 cnt = len >> 3;
1625                                 break;
1626                         default:
1627                                 return ERR_INVAL;
1628                                 break;
1629                         }
1630                         flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1631                         while (cnt-- > 0) {
1632                                 switch (info->portwidth) {
1633                                 case FLASH_CFI_8BIT:
1634                                         *dst.cp++ = *src.cp++;
1635                                         break;
1636                                 case FLASH_CFI_16BIT:
1637                                         *dst.wp++ = *src.wp++;
1638                                         break;
1639                                 case FLASH_CFI_32BIT:
1640                                         *dst.lp++ = *src.lp++;
1641                                         break;
1642                                 case FLASH_CFI_64BIT:
1643                                         *dst.llp++ = *src.llp++;
1644                                         break;
1645                                 default:
1646                                         return ERR_INVAL;
1647                                         break;
1648                                 }
1649                         }
1650                         flash_write_cmd (info, sector, 0,
1651                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
1652                         retcode = flash_full_status_check (
1653                                 info, sector, info->buffer_write_tout,
1654                                 "buffer write");
1655                 }
1656                 return retcode;
1657
1658         case CFI_CMDSET_AMD_STANDARD:
1659         case CFI_CMDSET_AMD_EXTENDED:
1660                 src.cp = cp;
1661                 dst.cp = (uchar *) dest;
1662                 sector = find_sector (info, dest);
1663
1664                 flash_unlock_seq(info,0);
1665                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1666
1667                 switch (info->portwidth) {
1668                 case FLASH_CFI_8BIT:
1669                         cnt = len;
1670                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1671                         while (cnt-- > 0) *dst.cp++ = *src.cp++;
1672                         break;
1673                 case FLASH_CFI_16BIT:
1674                         cnt = len >> 1;
1675                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1676                         while (cnt-- > 0) *dst.wp++ = *src.wp++;
1677                         break;
1678                 case FLASH_CFI_32BIT:
1679                         cnt = len >> 2;
1680                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1681                         while (cnt-- > 0) *dst.lp++ = *src.lp++;
1682                         break;
1683                 case FLASH_CFI_64BIT:
1684                         cnt = len >> 3;
1685                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1686                         while (cnt-- > 0) *dst.llp++ = *src.llp++;
1687                         break;
1688                 default:
1689                         return ERR_INVAL;
1690                 }
1691
1692                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1693                 retcode = flash_full_status_check (info, sector,
1694                                                    info->buffer_write_tout,
1695                                                    "buffer write");
1696                 return retcode;
1697
1698         default:
1699                 debug ("Unknown Command Set\n");
1700                 return ERR_INVAL;
1701         }
1702 }
1703 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1704
1705 #endif /* CFG_FLASH_CFI */