drivers/mtd/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  *
   8  * Copyright (C) 2004
   9  * Ed Okerson
  10  *
  11  * Copyright (C) 2006
  12  * Tolunay Orkun <listmember@orkun.us>
  13  *
  14  * SPDX-License-Identifier:     GPL-2.0+
  15  */
  16
  17 /* The DEBUG define must be before common to enable debugging */
  18 /* #define DEBUG        */
  19
  20 #include <common.h>
  21 #include <console.h>
  22 #include <dm.h>
  23 #include <errno.h>
  24 #include <fdt_support.h>
  25 #include <asm/processor.h>
  26 #include <asm/io.h>
  27 #include <asm/byteorder.h>
  28 #include <asm/unaligned.h>
  29 #include <environment.h>
  30 #include <mtd/cfi_flash.h>
  31 #include <watchdog.h>
  32
  33 /*
  34  * This file implements a Common Flash Interface (CFI) driver for
  35  * U-Boot.
  36  *
  37  * The width of the port and the width of the chips are determined at
  38  * initialization.  These widths are used to calculate the address for
  39  * access CFI data structures.
  40  *
  41  * References
  42  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  43  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  44  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  45  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  46  * AMD CFI Specification, Release 2.0 December 1, 2001
  47  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  48  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  49  *
  50  * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  51  * reading and writing ... (yes there is such a Hardware).
  52  */
  53
  54 DECLARE_GLOBAL_DATA_PTR;
  55
  56 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  57 #ifdef CONFIG_FLASH_CFI_MTD
  58 static uint flash_verbose = 1;
  59 #else
  60 #define flash_verbose 1
  61 #endif
  62
  63 flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
  64
  65 /*
  66  * Check if chip width is defined. If not, start detecting with 8bit.
  67  */
  68 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  69 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
  70 #endif
  71
  72 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  73 #define __maybe_weak __weak
  74 #else
  75 #define __maybe_weak static
  76 #endif
  77
  78 /*
  79  * 0xffff is an undefined value for the configuration register. When
  80  * this value is returned, the configuration register shall not be
  81  * written at all (default mode).
  82  */
  83 static u16 cfi_flash_config_reg(int i)
  84 {
  85 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  86         return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  87 #else
  88         return 0xffff;
  89 #endif
  90 }
  91
  92 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  93 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  94 #endif
  95
  96 #ifdef CONFIG_CFI_FLASH /* for driver model */
  97 static void cfi_flash_init_dm(void)
  98 {
  99         struct udevice *dev;
 100
 101         cfi_flash_num_flash_banks = 0;
 102         /*
 103          * The uclass_first_device() will probe the first device and
 104          * uclass_next_device() will probe the rest if they exist. So
 105          * that cfi_flash_probe() will get called assigning the base
 106          * addresses that are available.
 107          */
 108         for (uclass_first_device(UCLASS_MTD, &dev);
 109              dev;
 110              uclass_next_device(&dev)) {
 111         }
 112 }
 113
 114 phys_addr_t cfi_flash_bank_addr(int i)
 115 {
 116         return flash_info[i].base;
 117 }
 118 #else
 119 __weak phys_addr_t cfi_flash_bank_addr(int i)
 120 {
 121         return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
 122 }
 123 #endif
 124
 125 __weak unsigned long cfi_flash_bank_size(int i)
 126 {
 127 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
 128         return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
 129 #else
 130         return 0;
 131 #endif
 132 }
 133
 134 __maybe_weak void flash_write8(u8 value, void *addr)
 135 {
 136         __raw_writeb(value, addr);
 137 }
 138
 139 __maybe_weak void flash_write16(u16 value, void *addr)
 140 {
 141         __raw_writew(value, addr);
 142 }
 143
 144 __maybe_weak void flash_write32(u32 value, void *addr)
 145 {
 146         __raw_writel(value, addr);
 147 }
 148
 149 __maybe_weak void flash_write64(u64 value, void *addr)
 150 {
 151         /* No architectures currently implement __raw_writeq() */
 152         *(volatile u64 *)addr = value;
 153 }
 154
 155 __maybe_weak u8 flash_read8(void *addr)
 156 {
 157         return __raw_readb(addr);
 158 }
 159
 160 __maybe_weak u16 flash_read16(void *addr)
 161 {
 162         return __raw_readw(addr);
 163 }
 164
 165 __maybe_weak u32 flash_read32(void *addr)
 166 {
 167         return __raw_readl(addr);
 168 }
 169
 170 __maybe_weak u64 flash_read64(void *addr)
 171 {
 172         /* No architectures currently implement __raw_readq() */
 173         return *(volatile u64 *)addr;
 174 }
 175
 176 /*-----------------------------------------------------------------------
 177  */
 178 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
 179 static flash_info_t *flash_get_info(ulong base)
 180 {
 181         int i;
 182         flash_info_t *info;
 183
 184         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 185                 info = &flash_info[i];
 186                 if (info->size && info->start[0] <= base &&
 187                     base <= info->start[0] + info->size - 1)
 188                         return info;
 189         }
 190
 191         return NULL;
 192 }
 193 #endif
 194
 195 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 196 {
 197         if (sect != (info->sector_count - 1))
 198                 return info->start[sect + 1] - info->start[sect];
 199         else
 200                 return info->start[0] + info->size - info->start[sect];
 201 }
 202
 203 /*-----------------------------------------------------------------------
 204  * create an address based on the offset and the port width
 205  */
 206 static inline void *
 207 flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
 208 {
 209         unsigned int byte_offset = offset * info->portwidth;
 210
 211         return (void *)(info->start[sect] + byte_offset);
 212 }
 213
 214 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 215                 unsigned int offset, void *addr)
 216 {
 217 }
 218
 219 /*-----------------------------------------------------------------------
 220  * make a proper sized command based on the port and chip widths
 221  */
 222 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 223 {
 224         int i;
 225         int cword_offset;
 226         int cp_offset;
 227 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 228         u32 cmd_le = cpu_to_le32(cmd);
 229 #endif
 230         uchar val;
 231         uchar *cp = (uchar *) cmdbuf;
 232
 233         for (i = info->portwidth; i > 0; i--) {
 234                 cword_offset = (info->portwidth - i) % info->chipwidth;
 235 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 236                 cp_offset = info->portwidth - i;
 237                 val = *((uchar *)&cmd_le + cword_offset);
 238 #else
 239                 cp_offset = i - 1;
 240                 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
 241 #endif
 242                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 243         }
 244 }
 245
 246 #ifdef DEBUG
 247 /*-----------------------------------------------------------------------
 248  * Debug support
 249  */
 250 static void print_longlong(char *str, unsigned long long data)
 251 {
 252         int i;
 253         char *cp;
 254
 255         cp = (char *)&data;
 256         for (i = 0; i < 8; i++)
 257                 sprintf(&str[i * 2], "%2.2x", *cp++);
 258 }
 259
 260 static void flash_printqry(struct cfi_qry *qry)
 261 {
 262         u8 *p = (u8 *)qry;
 263         int x, y;
 264
 265         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 266                 debug("%02x : ", x);
 267                 for (y = 0; y < 16; y++)
 268                         debug("%2.2x ", p[x + y]);
 269                 debug(" ");
 270                 for (y = 0; y < 16; y++) {
 271                         unsigned char c = p[x + y];
 272
 273                         if (c >= 0x20 && c <= 0x7e)
 274                                 debug("%c", c);
 275                         else
 276                                 debug(".");
 277                 }
 278                 debug("\n");
 279         }
 280 }
 281 #endif
 282
 283 /*-----------------------------------------------------------------------
 284  * read a character at a port width address
 285  */
 286 static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
 287 {
 288         uchar *cp;
 289         uchar retval;
 290
 291         cp = flash_map(info, 0, offset);
 292 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 293         retval = flash_read8(cp);
 294 #else
 295         retval = flash_read8(cp + info->portwidth - 1);
 296 #endif
 297         flash_unmap(info, 0, offset, cp);
 298         return retval;
 299 }
 300
 301 /*-----------------------------------------------------------------------
 302  * read a word at a port width address, assume 16bit bus
 303  */
 304 static inline ushort flash_read_word(flash_info_t *info, uint offset)
 305 {
 306         ushort *addr, retval;
 307
 308         addr = flash_map(info, 0, offset);
 309         retval = flash_read16(addr);
 310         flash_unmap(info, 0, offset, addr);
 311         return retval;
 312 }
 313
 314 /*-----------------------------------------------------------------------
 315  * read a long word by picking the least significant byte of each maximum
 316  * port size word. Swap for ppc format.
 317  */
 318 static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 319                               uint offset)
 320 {
 321         uchar *addr;
 322         ulong retval;
 323
 324 #ifdef DEBUG
 325         int x;
 326 #endif
 327         addr = flash_map(info, sect, offset);
 328
 329 #ifdef DEBUG
 330         debug("long addr is at %p info->portwidth = %d\n", addr,
 331                info->portwidth);
 332         for (x = 0; x < 4 * info->portwidth; x++) {
 333                 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 334         }
 335 #endif
 336 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 337         retval = ((flash_read8(addr) << 16) |
 338                   (flash_read8(addr + info->portwidth) << 24) |
 339                   (flash_read8(addr + 2 * info->portwidth)) |
 340                   (flash_read8(addr + 3 * info->portwidth) << 8));
 341 #else
 342         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 343                   (flash_read8(addr + info->portwidth - 1) << 16) |
 344                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 345                   (flash_read8(addr + 3 * info->portwidth - 1)));
 346 #endif
 347         flash_unmap(info, sect, offset, addr);
 348
 349         return retval;
 350 }
 351
 352 /*
 353  * Write a proper sized command to the correct address
 354  */
 355 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 356                             uint offset, u32 cmd)
 357 {
 358         void *addr;
 359         cfiword_t cword;
 360
 361         addr = flash_map(info, sect, offset);
 362         flash_make_cmd(info, cmd, &cword);
 363         switch (info->portwidth) {
 364         case FLASH_CFI_8BIT:
 365                 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 366                        cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 367                 flash_write8(cword.w8, addr);
 368                 break;
 369         case FLASH_CFI_16BIT:
 370                 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 371                        cmd, cword.w16,
 372                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 373                 flash_write16(cword.w16, addr);
 374                 break;
 375         case FLASH_CFI_32BIT:
 376                 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
 377                        cmd, cword.w32,
 378                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 379                 flash_write32(cword.w32, addr);
 380                 break;
 381         case FLASH_CFI_64BIT:
 382 #ifdef DEBUG
 383                 {
 384                         char str[20];
 385
 386                         print_longlong(str, cword.w64);
 387
 388                         debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 389                                addr, cmd, str,
 390                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 391                 }
 392 #endif
 393                 flash_write64(cword.w64, addr);
 394                 break;
 395         }
 396
 397         /* Ensure all the instructions are fully finished */
 398         sync();
 399
 400         flash_unmap(info, sect, offset, addr);
 401 }
 402
 403 static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
 404 {
 405         flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 406         flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 407 }
 408
 409 /*-----------------------------------------------------------------------
 410  */
 411 static int flash_isequal(flash_info_t *info, flash_sect_t sect,
 412                           uint offset, uchar cmd)
 413 {
 414         void *addr;
 415         cfiword_t cword;
 416         int retval;
 417
 418         addr = flash_map(info, sect, offset);
 419         flash_make_cmd(info, cmd, &cword);
 420
 421         debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 422         switch (info->portwidth) {
 423         case FLASH_CFI_8BIT:
 424                 debug("is= %x %x\n", flash_read8(addr), cword.w8);
 425                 retval = (flash_read8(addr) == cword.w8);
 426                 break;
 427         case FLASH_CFI_16BIT:
 428                 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
 429                 retval = (flash_read16(addr) == cword.w16);
 430                 break;
 431         case FLASH_CFI_32BIT:
 432                 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
 433                 retval = (flash_read32(addr) == cword.w32);
 434                 break;
 435         case FLASH_CFI_64BIT:
 436 #ifdef DEBUG
 437                 {
 438                         char str1[20];
 439                         char str2[20];
 440
 441                         print_longlong(str1, flash_read64(addr));
 442                         print_longlong(str2, cword.w64);
 443                         debug("is= %s %s\n", str1, str2);
 444                 }
 445 #endif
 446                 retval = (flash_read64(addr) == cword.w64);
 447                 break;
 448         default:
 449                 retval = 0;
 450                 break;
 451         }
 452         flash_unmap(info, sect, offset, addr);
 453
 454         return retval;
 455 }
 456
 457 /*-----------------------------------------------------------------------
 458  */
 459 static int flash_isset(flash_info_t *info, flash_sect_t sect,
 460                         uint offset, uchar cmd)
 461 {
 462         void *addr;
 463         cfiword_t cword;
 464         int retval;
 465
 466         addr = flash_map(info, sect, offset);
 467         flash_make_cmd(info, cmd, &cword);
 468         switch (info->portwidth) {
 469         case FLASH_CFI_8BIT:
 470                 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
 471                 break;
 472         case FLASH_CFI_16BIT:
 473                 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
 474                 break;
 475         case FLASH_CFI_32BIT:
 476                 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
 477                 break;
 478         case FLASH_CFI_64BIT:
 479                 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
 480                 break;
 481         default:
 482                 retval = 0;
 483                 break;
 484         }
 485         flash_unmap(info, sect, offset, addr);
 486
 487         return retval;
 488 }
 489
 490 /*-----------------------------------------------------------------------
 491  */
 492 static int flash_toggle(flash_info_t *info, flash_sect_t sect,
 493                          uint offset, uchar cmd)
 494 {
 495         void *addr;
 496         cfiword_t cword;
 497         int retval;
 498
 499         addr = flash_map(info, sect, offset);
 500         flash_make_cmd(info, cmd, &cword);
 501         switch (info->portwidth) {
 502         case FLASH_CFI_8BIT:
 503                 retval = flash_read8(addr) != flash_read8(addr);
 504                 break;
 505         case FLASH_CFI_16BIT:
 506                 retval = flash_read16(addr) != flash_read16(addr);
 507                 break;
 508         case FLASH_CFI_32BIT:
 509                 retval = flash_read32(addr) != flash_read32(addr);
 510                 break;
 511         case FLASH_CFI_64BIT:
 512                 retval = ((flash_read32(addr) != flash_read32(addr)) ||
 513                            (flash_read32(addr + 4) != flash_read32(addr + 4)));
 514                 break;
 515         default:
 516                 retval = 0;
 517                 break;
 518         }
 519         flash_unmap(info, sect, offset, addr);
 520
 521         return retval;
 522 }
 523
 524 /*
 525  * flash_is_busy - check to see if the flash is busy
 526  *
 527  * This routine checks the status of the chip and returns true if the
 528  * chip is busy.
 529  */
 530 static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 531 {
 532         int retval;
 533
 534         switch (info->vendor) {
 535         case CFI_CMDSET_INTEL_PROG_REGIONS:
 536         case CFI_CMDSET_INTEL_STANDARD:
 537         case CFI_CMDSET_INTEL_EXTENDED:
 538                 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
 539                 break;
 540         case CFI_CMDSET_AMD_STANDARD:
 541         case CFI_CMDSET_AMD_EXTENDED:
 542 #ifdef CONFIG_FLASH_CFI_LEGACY
 543         case CFI_CMDSET_AMD_LEGACY:
 544 #endif
 545                 if (info->sr_supported) {
 546                         flash_write_cmd(info, sect, info->addr_unlock1,
 547                                          FLASH_CMD_READ_STATUS);
 548                         retval = !flash_isset(info, sect, 0,
 549                                                FLASH_STATUS_DONE);
 550                 } else {
 551                         retval = flash_toggle(info, sect, 0,
 552                                                AMD_STATUS_TOGGLE);
 553                 }
 554
 555                 break;
 556         default:
 557                 retval = 0;
 558         }
 559         debug("flash_is_busy: %d\n", retval);
 560         return retval;
 561 }
 562
 563 /*-----------------------------------------------------------------------
 564  *  wait for XSR.7 to be set. Time out with an error if it does not.
 565  *  This routine does not set the flash to read-array mode.
 566  */
 567 static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 568                                ulong tout, char *prompt)
 569 {
 570         ulong start;
 571
 572 #if CONFIG_SYS_HZ != 1000
 573         if ((ulong)CONFIG_SYS_HZ > 100000)
 574                 tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
 575         else
 576                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 577 #endif
 578
 579         /* Wait for command completion */
 580 #ifdef CONFIG_SYS_LOW_RES_TIMER
 581         reset_timer();
 582 #endif
 583         start = get_timer(0);
 584         WATCHDOG_RESET();
 585         while (flash_is_busy(info, sector)) {
 586                 if (get_timer(start) > tout) {
 587                         printf("Flash %s timeout at address %lx data %lx\n",
 588                                 prompt, info->start[sector],
 589                                 flash_read_long(info, sector, 0));
 590                         flash_write_cmd(info, sector, 0, info->cmd_reset);
 591                         udelay(1);
 592                         return ERR_TIMOUT;
 593                 }
 594                 udelay(1);              /* also triggers watchdog */
 595         }
 596         return ERR_OK;
 597 }
 598
 599 /*-----------------------------------------------------------------------
 600  * Wait for XSR.7 to be set, if it times out print an error, otherwise
 601  * do a full status check.
 602  *
 603  * This routine sets the flash to read-array mode.
 604  */
 605 static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 606                                     ulong tout, char *prompt)
 607 {
 608         int retcode;
 609
 610         retcode = flash_status_check(info, sector, tout, prompt);
 611         switch (info->vendor) {
 612         case CFI_CMDSET_INTEL_PROG_REGIONS:
 613         case CFI_CMDSET_INTEL_EXTENDED:
 614         case CFI_CMDSET_INTEL_STANDARD:
 615                 if ((retcode == ERR_OK)
 616                     && !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 617                         retcode = ERR_INVAL;
 618                         printf("Flash %s error at address %lx\n", prompt,
 619                                 info->start[sector]);
 620                         if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
 621                                          FLASH_STATUS_PSLBS)) {
 622                                 puts("Command Sequence Error.\n");
 623                         } else if (flash_isset(info, sector, 0,
 624                                                 FLASH_STATUS_ECLBS)) {
 625                                 puts("Block Erase Error.\n");
 626                                 retcode = ERR_NOT_ERASED;
 627                         } else if (flash_isset(info, sector, 0,
 628                                                 FLASH_STATUS_PSLBS)) {
 629                                 puts("Locking Error\n");
 630                         }
 631                         if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
 632                                 puts("Block locked.\n");
 633                                 retcode = ERR_PROTECTED;
 634                         }
 635                         if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
 636                                 puts("Vpp Low Error.\n");
 637                 }
 638                 flash_write_cmd(info, sector, 0, info->cmd_reset);
 639                 udelay(1);
 640                 break;
 641         default:
 642                 break;
 643         }
 644         return retcode;
 645 }
 646
 647 static int use_flash_status_poll(flash_info_t *info)
 648 {
 649 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 650         if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
 651             info->vendor == CFI_CMDSET_AMD_STANDARD)
 652                 return 1;
 653 #endif
 654         return 0;
 655 }
 656
 657 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 658                              ulong tout, char *prompt)
 659 {
 660 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 661         ulong start;
 662         int ready;
 663
 664 #if CONFIG_SYS_HZ != 1000
 665         if ((ulong)CONFIG_SYS_HZ > 100000)
 666                 tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
 667         else
 668                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 669 #endif
 670
 671         /* Wait for command completion */
 672 #ifdef CONFIG_SYS_LOW_RES_TIMER
 673         reset_timer();
 674 #endif
 675         start = get_timer(0);
 676         WATCHDOG_RESET();
 677         while (1) {
 678                 switch (info->portwidth) {
 679                 case FLASH_CFI_8BIT:
 680                         ready = flash_read8(dst) == flash_read8(src);
 681                         break;
 682                 case FLASH_CFI_16BIT:
 683                         ready = flash_read16(dst) == flash_read16(src);
 684                         break;
 685                 case FLASH_CFI_32BIT:
 686                         ready = flash_read32(dst) == flash_read32(src);
 687                         break;
 688                 case FLASH_CFI_64BIT:
 689                         ready = flash_read64(dst) == flash_read64(src);
 690                         break;
 691                 default:
 692                         ready = 0;
 693                         break;
 694                 }
 695                 if (ready)
 696                         break;
 697                 if (get_timer(start) > tout) {
 698                         printf("Flash %s timeout at address %lx data %lx\n",
 699                                prompt, (ulong)dst, (ulong)flash_read8(dst));
 700                         return ERR_TIMOUT;
 701                 }
 702                 udelay(1);              /* also triggers watchdog */
 703         }
 704 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
 705         return ERR_OK;
 706 }
 707
 708 /*-----------------------------------------------------------------------
 709  */
 710 static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
 711 {
 712 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 713         unsigned short  w;
 714         unsigned int    l;
 715         unsigned long long ll;
 716 #endif
 717
 718         switch (info->portwidth) {
 719         case FLASH_CFI_8BIT:
 720                 cword->w8 = c;
 721                 break;
 722         case FLASH_CFI_16BIT:
 723 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 724                 w = c;
 725                 w <<= 8;
 726                 cword->w16 = (cword->w16 >> 8) | w;
 727 #else
 728                 cword->w16 = (cword->w16 << 8) | c;
 729 #endif
 730                 break;
 731         case FLASH_CFI_32BIT:
 732 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 733                 l = c;
 734                 l <<= 24;
 735                 cword->w32 = (cword->w32 >> 8) | l;
 736 #else
 737                 cword->w32 = (cword->w32 << 8) | c;
 738 #endif
 739                 break;
 740         case FLASH_CFI_64BIT:
 741 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 742                 ll = c;
 743                 ll <<= 56;
 744                 cword->w64 = (cword->w64 >> 8) | ll;
 745 #else
 746                 cword->w64 = (cword->w64 << 8) | c;
 747 #endif
 748                 break;
 749         }
 750 }
 751
 752 /*
 753  * Loop through the sector table starting from the previously found sector.
 754  * Searches forwards or backwards, dependent on the passed address.
 755  */
 756 static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 757 {
 758         static flash_sect_t saved_sector; /* previously found sector */
 759         static flash_info_t *saved_info; /* previously used flash bank */
 760         flash_sect_t sector = saved_sector;
 761
 762         if ((info != saved_info) || (sector >= info->sector_count))
 763                 sector = 0;
 764
 765         while ((info->start[sector] < addr)
 766                         && (sector < info->sector_count - 1))
 767                 sector++;
 768         while ((info->start[sector] > addr) && (sector > 0))
 769                 /*
 770                  * also decrements the sector in case of an overshot
 771                  * in the first loop
 772                  */
 773                 sector--;
 774
 775         saved_sector = sector;
 776         saved_info = info;
 777         return sector;
 778 }
 779
 780 /*-----------------------------------------------------------------------
 781  */
 782 static int flash_write_cfiword(flash_info_t *info, ulong dest,
 783                                 cfiword_t cword)
 784 {
 785         void *dstaddr = (void *)dest;
 786         int flag;
 787         flash_sect_t sect = 0;
 788         char sect_found = 0;
 789
 790         /* Check if Flash is (sufficiently) erased */
 791         switch (info->portwidth) {
 792         case FLASH_CFI_8BIT:
 793                 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
 794                 break;
 795         case FLASH_CFI_16BIT:
 796                 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
 797                 break;
 798         case FLASH_CFI_32BIT:
 799                 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
 800                 break;
 801         case FLASH_CFI_64BIT:
 802                 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
 803                 break;
 804         default:
 805                 flag = 0;
 806                 break;
 807         }
 808         if (!flag)
 809                 return ERR_NOT_ERASED;
 810
 811         /* Disable interrupts which might cause a timeout here */
 812         flag = disable_interrupts();
 813
 814         switch (info->vendor) {
 815         case CFI_CMDSET_INTEL_PROG_REGIONS:
 816         case CFI_CMDSET_INTEL_EXTENDED:
 817         case CFI_CMDSET_INTEL_STANDARD:
 818                 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 819                 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
 820                 break;
 821         case CFI_CMDSET_AMD_EXTENDED:
 822         case CFI_CMDSET_AMD_STANDARD:
 823                 sect = find_sector(info, dest);
 824                 flash_unlock_seq(info, sect);
 825                 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 826                 sect_found = 1;
 827                 break;
 828 #ifdef CONFIG_FLASH_CFI_LEGACY
 829         case CFI_CMDSET_AMD_LEGACY:
 830                 sect = find_sector(info, dest);
 831                 flash_unlock_seq(info, 0);
 832                 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 833                 sect_found = 1;
 834                 break;
 835 #endif
 836         }
 837
 838         switch (info->portwidth) {
 839         case FLASH_CFI_8BIT:
 840                 flash_write8(cword.w8, dstaddr);
 841                 break;
 842         case FLASH_CFI_16BIT:
 843                 flash_write16(cword.w16, dstaddr);
 844                 break;
 845         case FLASH_CFI_32BIT:
 846                 flash_write32(cword.w32, dstaddr);
 847                 break;
 848         case FLASH_CFI_64BIT:
 849                 flash_write64(cword.w64, dstaddr);
 850                 break;
 851         }
 852
 853         /* re-enable interrupts if necessary */
 854         if (flag)
 855                 enable_interrupts();
 856
 857         if (!sect_found)
 858                 sect = find_sector(info, dest);
 859
 860         if (use_flash_status_poll(info))
 861                 return flash_status_poll(info, &cword, dstaddr,
 862                                          info->write_tout, "write");
 863         else
 864                 return flash_full_status_check(info, sect,
 865                                                info->write_tout, "write");
 866 }
 867
 868 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 869
 870 static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 871                                   int len)
 872 {
 873         flash_sect_t sector;
 874         int cnt;
 875         int retcode;
 876         void *src = cp;
 877         void *dst = (void *)dest;
 878         void *dst2 = dst;
 879         int flag = 1;
 880         uint offset = 0;
 881         unsigned int shift;
 882         uchar write_cmd;
 883
 884         switch (info->portwidth) {
 885         case FLASH_CFI_8BIT:
 886                 shift = 0;
 887                 break;
 888         case FLASH_CFI_16BIT:
 889                 shift = 1;
 890                 break;
 891         case FLASH_CFI_32BIT:
 892                 shift = 2;
 893                 break;
 894         case FLASH_CFI_64BIT:
 895                 shift = 3;
 896                 break;
 897         default:
 898                 retcode = ERR_INVAL;
 899                 goto out_unmap;
 900         }
 901
 902         cnt = len >> shift;
 903
 904         while ((cnt-- > 0) && (flag == 1)) {
 905                 switch (info->portwidth) {
 906                 case FLASH_CFI_8BIT:
 907                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
 908                                 flash_read8(src));
 909                         src += 1, dst2 += 1;
 910                         break;
 911                 case FLASH_CFI_16BIT:
 912                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
 913                                 flash_read16(src));
 914                         src += 2, dst2 += 2;
 915                         break;
 916                 case FLASH_CFI_32BIT:
 917                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
 918                                 flash_read32(src));
 919                         src += 4, dst2 += 4;
 920                         break;
 921                 case FLASH_CFI_64BIT:
 922                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
 923                                 flash_read64(src));
 924                         src += 8, dst2 += 8;
 925                         break;
 926                 }
 927         }
 928         if (!flag) {
 929                 retcode = ERR_NOT_ERASED;
 930                 goto out_unmap;
 931         }
 932
 933         src = cp;
 934         sector = find_sector(info, dest);
 935
 936         switch (info->vendor) {
 937         case CFI_CMDSET_INTEL_PROG_REGIONS:
 938         case CFI_CMDSET_INTEL_STANDARD:
 939         case CFI_CMDSET_INTEL_EXTENDED:
 940                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 941                                         FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
 942                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 943                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 944                 flash_write_cmd(info, sector, 0, write_cmd);
 945                 retcode = flash_status_check(info, sector,
 946                                               info->buffer_write_tout,
 947                                               "write to buffer");
 948                 if (retcode == ERR_OK) {
 949                         /* reduce the number of loops by the width of
 950                          * the port */
 951                         cnt = len >> shift;
 952                         flash_write_cmd(info, sector, 0, cnt - 1);
 953                         while (cnt-- > 0) {
 954                                 switch (info->portwidth) {
 955                                 case FLASH_CFI_8BIT:
 956                                         flash_write8(flash_read8(src), dst);
 957                                         src += 1, dst += 1;
 958                                         break;
 959                                 case FLASH_CFI_16BIT:
 960                                         flash_write16(flash_read16(src), dst);
 961                                         src += 2, dst += 2;
 962                                         break;
 963                                 case FLASH_CFI_32BIT:
 964                                         flash_write32(flash_read32(src), dst);
 965                                         src += 4, dst += 4;
 966                                         break;
 967                                 case FLASH_CFI_64BIT:
 968                                         flash_write64(flash_read64(src), dst);
 969                                         src += 8, dst += 8;
 970                                         break;
 971                                 default:
 972                                         retcode = ERR_INVAL;
 973                                         goto out_unmap;
 974                                 }
 975                         }
 976                         flash_write_cmd(info, sector, 0,
 977                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
 978                         retcode = flash_full_status_check(
 979                                 info, sector, info->buffer_write_tout,
 980                                 "buffer write");
 981                 }
 982
 983                 break;
 984
 985         case CFI_CMDSET_AMD_STANDARD:
 986         case CFI_CMDSET_AMD_EXTENDED:
 987                 flash_unlock_seq(info, sector);
 988
 989 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
 990                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
 991 #endif
 992                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
 993                 cnt = len >> shift;
 994                 flash_write_cmd(info, sector, offset, cnt - 1);
 995
 996                 switch (info->portwidth) {
 997                 case FLASH_CFI_8BIT:
 998                         while (cnt-- > 0) {
 999                                 flash_write8(flash_read8(src), dst);
1000                                 src += 1, dst += 1;
1001                         }
1002                         break;
1003                 case FLASH_CFI_16BIT:
1004                         while (cnt-- > 0) {
1005                                 flash_write16(flash_read16(src), dst);
1006                                 src += 2, dst += 2;
1007                         }
1008                         break;
1009                 case FLASH_CFI_32BIT:
1010                         while (cnt-- > 0) {
1011                                 flash_write32(flash_read32(src), dst);
1012                                 src += 4, dst += 4;
1013                         }
1014                         break;
1015                 case FLASH_CFI_64BIT:
1016                         while (cnt-- > 0) {
1017                                 flash_write64(flash_read64(src), dst);
1018                                 src += 8, dst += 8;
1019                         }
1020                         break;
1021                 default:
1022                         retcode = ERR_INVAL;
1023                         goto out_unmap;
1024                 }
1025
1026                 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1027                 if (use_flash_status_poll(info))
1028                         retcode = flash_status_poll(info, src - (1 << shift),
1029                                                     dst - (1 << shift),
1030                                                     info->buffer_write_tout,
1031                                                     "buffer write");
1032                 else
1033                         retcode = flash_full_status_check(info, sector,
1034                                                           info->buffer_write_tout,
1035                                                           "buffer write");
1036                 break;
1037
1038         default:
1039                 debug("Unknown Command Set\n");
1040                 retcode = ERR_INVAL;
1041                 break;
1042         }
1043
1044 out_unmap:
1045         return retcode;
1046 }
1047 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1048
1049 /*-----------------------------------------------------------------------
1050  */
1051 int flash_erase(flash_info_t *info, int s_first, int s_last)
1052 {
1053         int rcode = 0;
1054         int prot;
1055         flash_sect_t sect;
1056         int st;
1057
1058         if (info->flash_id != FLASH_MAN_CFI) {
1059                 puts("Can't erase unknown flash type - aborted\n");
1060                 return 1;
1061         }
1062         if ((s_first < 0) || (s_first > s_last)) {
1063                 puts("- no sectors to erase\n");
1064                 return 1;
1065         }
1066
1067         prot = 0;
1068         for (sect = s_first; sect <= s_last; ++sect) {
1069                 if (info->protect[sect]) {
1070                         prot++;
1071                 }
1072         }
1073         if (prot) {
1074                 printf("- Warning: %d protected sectors will not be erased!\n",
1075                         prot);
1076         } else if (flash_verbose) {
1077                 putc('\n');
1078         }
1079
1080         for (sect = s_first; sect <= s_last; sect++) {
1081                 if (ctrlc()) {
1082                         printf("\n");
1083                         return 1;
1084                 }
1085
1086                 if (info->protect[sect] == 0) { /* not protected */
1087 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1088                         int k;
1089                         int size;
1090                         int erased;
1091                         u32 *flash;
1092
1093                         /*
1094                          * Check if whole sector is erased
1095                          */
1096                         size = flash_sector_size(info, sect);
1097                         erased = 1;
1098                         flash = (u32 *)info->start[sect];
1099                         /* divide by 4 for longword access */
1100                         size = size >> 2;
1101                         for (k = 0; k < size; k++) {
1102                                 if (flash_read32(flash++) != 0xffffffff) {
1103                                         erased = 0;
1104                                         break;
1105                                 }
1106                         }
1107                         if (erased) {
1108                                 if (flash_verbose)
1109                                         putc(',');
1110                                 continue;
1111                         }
1112 #endif
1113                         switch (info->vendor) {
1114                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1115                         case CFI_CMDSET_INTEL_STANDARD:
1116                         case CFI_CMDSET_INTEL_EXTENDED:
1117                                 flash_write_cmd(info, sect, 0,
1118                                                  FLASH_CMD_CLEAR_STATUS);
1119                                 flash_write_cmd(info, sect, 0,
1120                                                  FLASH_CMD_BLOCK_ERASE);
1121                                 flash_write_cmd(info, sect, 0,
1122                                                  FLASH_CMD_ERASE_CONFIRM);
1123                                 break;
1124                         case CFI_CMDSET_AMD_STANDARD:
1125                         case CFI_CMDSET_AMD_EXTENDED:
1126                                 flash_unlock_seq(info, sect);
1127                                 flash_write_cmd(info, sect,
1128                                                 info->addr_unlock1,
1129                                                 AMD_CMD_ERASE_START);
1130                                 flash_unlock_seq(info, sect);
1131                                 flash_write_cmd(info, sect, 0,
1132                                                  info->cmd_erase_sector);
1133                                 break;
1134 #ifdef CONFIG_FLASH_CFI_LEGACY
1135                         case CFI_CMDSET_AMD_LEGACY:
1136                                 flash_unlock_seq(info, 0);
1137                                 flash_write_cmd(info, 0, info->addr_unlock1,
1138                                                 AMD_CMD_ERASE_START);
1139                                 flash_unlock_seq(info, 0);
1140                                 flash_write_cmd(info, sect, 0,
1141                                                 AMD_CMD_ERASE_SECTOR);
1142                                 break;
1143 #endif
1144                         default:
1145                                 debug("Unkown flash vendor %d\n",
1146                                        info->vendor);
1147                                 break;
1148                         }
1149
1150                         if (use_flash_status_poll(info)) {
1151                                 cfiword_t cword;
1152                                 void *dest;
1153
1154                                 cword.w64 = 0xffffffffffffffffULL;
1155                                 dest = flash_map(info, sect, 0);
1156                                 st = flash_status_poll(info, &cword, dest,
1157                                                        info->erase_blk_tout, "erase");
1158                                 flash_unmap(info, sect, 0, dest);
1159                         } else
1160                                 st = flash_full_status_check(info, sect,
1161                                                              info->erase_blk_tout,
1162                                                              "erase");
1163                         if (st)
1164                                 rcode = 1;
1165                         else if (flash_verbose)
1166                                 putc('.');
1167                 }
1168         }
1169
1170         if (flash_verbose)
1171                 puts(" done\n");
1172
1173         return rcode;
1174 }
1175
1176 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1177 static int sector_erased(flash_info_t *info, int i)
1178 {
1179         int k;
1180         int size;
1181         u32 *flash;
1182
1183         /*
1184          * Check if whole sector is erased
1185          */
1186         size = flash_sector_size(info, i);
1187         flash = (u32 *)info->start[i];
1188         /* divide by 4 for longword access */
1189         size = size >> 2;
1190
1191         for (k = 0; k < size; k++) {
1192                 if (flash_read32(flash++) != 0xffffffff)
1193                         return 0;       /* not erased */
1194         }
1195
1196         return 1;                       /* erased */
1197 }
1198 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1199
1200 void flash_print_info(flash_info_t *info)
1201 {
1202         int i;
1203
1204         if (info->flash_id != FLASH_MAN_CFI) {
1205                 puts("missing or unknown FLASH type\n");
1206                 return;
1207         }
1208
1209         printf("%s flash (%d x %d)",
1210                 info->name,
1211                 (info->portwidth << 3), (info->chipwidth << 3));
1212         if (info->size < 1024 * 1024)
1213                 printf("  Size: %ld kB in %d Sectors\n",
1214                         info->size >> 10, info->sector_count);
1215         else
1216                 printf("  Size: %ld MB in %d Sectors\n",
1217                         info->size >> 20, info->sector_count);
1218         printf("  ");
1219         switch (info->vendor) {
1220         case CFI_CMDSET_INTEL_PROG_REGIONS:
1221                 printf("Intel Prog Regions");
1222                 break;
1223         case CFI_CMDSET_INTEL_STANDARD:
1224                 printf("Intel Standard");
1225                 break;
1226         case CFI_CMDSET_INTEL_EXTENDED:
1227                 printf("Intel Extended");
1228                 break;
1229         case CFI_CMDSET_AMD_STANDARD:
1230                 printf("AMD Standard");
1231                 break;
1232         case CFI_CMDSET_AMD_EXTENDED:
1233                 printf("AMD Extended");
1234                 break;
1235 #ifdef CONFIG_FLASH_CFI_LEGACY
1236         case CFI_CMDSET_AMD_LEGACY:
1237                 printf("AMD Legacy");
1238                 break;
1239 #endif
1240         default:
1241                 printf("Unknown (%d)", info->vendor);
1242                 break;
1243         }
1244         printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1245                 info->manufacturer_id);
1246         printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1247                 info->device_id);
1248         if ((info->device_id & 0xff) == 0x7E) {
1249                 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1250                 info->device_id2);
1251         }
1252         if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
1253                 printf("\n  Advanced Sector Protection (PPB) enabled");
1254         printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1255                 info->erase_blk_tout,
1256                 info->write_tout);
1257         if (info->buffer_size > 1) {
1258                 printf("  Buffer write timeout: %ld ms, "
1259                         "buffer size: %d bytes\n",
1260                 info->buffer_write_tout,
1261                 info->buffer_size);
1262         }
1263
1264         puts("\n  Sector Start Addresses:");
1265         for (i = 0; i < info->sector_count; ++i) {
1266                 if (ctrlc())
1267                         break;
1268                 if ((i % 5) == 0)
1269                         putc('\n');
1270 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1271                 /* print empty and read-only info */
1272                 printf("  %08lX %c %s ",
1273                         info->start[i],
1274                         sector_erased(info, i) ? 'E' : ' ',
1275                         info->protect[i] ? "RO" : "  ");
1276 #else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1277                 printf("  %08lX   %s ",
1278                         info->start[i],
1279                         info->protect[i] ? "RO" : "  ");
1280 #endif
1281         }
1282         putc('\n');
1283         return;
1284 }
1285
1286 /*-----------------------------------------------------------------------
1287  * This is used in a few places in write_buf() to show programming
1288  * progress.  Making it a function is nasty because it needs to do side
1289  * effect updates to digit and dots.  Repeated code is nasty too, so
1290  * we define it once here.
1291  */
1292 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1293 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1294         if (flash_verbose) { \
1295                 dots -= dots_sub; \
1296                 if ((scale > 0) && (dots <= 0)) { \
1297                         if ((digit % 5) == 0) \
1298                                 printf("%d", digit / 5); \
1299                         else \
1300                                 putc('.'); \
1301                         digit--; \
1302                         dots += scale; \
1303                 } \
1304         }
1305 #else
1306 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1307 #endif
1308
1309 /*-----------------------------------------------------------------------
1310  * Copy memory to flash, returns:
1311  * 0 - OK
1312  * 1 - write timeout
1313  * 2 - Flash not erased
1314  */
1315 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1316 {
1317         ulong wp;
1318         uchar *p;
1319         int aln;
1320         cfiword_t cword;
1321         int i, rc;
1322 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1323         int buffered_size;
1324 #endif
1325 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1326         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1327         int scale = 0;
1328         int dots  = 0;
1329
1330         /*
1331          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1332          */
1333         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1334                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1335                         CONFIG_FLASH_SHOW_PROGRESS);
1336         }
1337 #endif
1338
1339         /* get lower aligned address */
1340         wp = (addr & ~(info->portwidth - 1));
1341
1342         /* handle unaligned start */
1343         if ((aln = addr - wp) != 0) {
1344                 cword.w32 = 0;
1345                 p = (uchar *)wp;
1346                 for (i = 0; i < aln; ++i)
1347                         flash_add_byte(info, &cword, flash_read8(p + i));
1348
1349                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1350                         flash_add_byte(info, &cword, *src++);
1351                         cnt--;
1352                 }
1353                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1354                         flash_add_byte(info, &cword, flash_read8(p + i));
1355
1356                 rc = flash_write_cfiword(info, wp, cword);
1357                 if (rc != 0)
1358                         return rc;
1359
1360                 wp += i;
1361                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1362         }
1363
1364         /* handle the aligned part */
1365 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1366         buffered_size = (info->portwidth / info->chipwidth);
1367         buffered_size *= info->buffer_size;
1368         while (cnt >= info->portwidth) {
1369                 /* prohibit buffer write when buffer_size is 1 */
1370                 if (info->buffer_size == 1) {
1371                         cword.w32 = 0;
1372                         for (i = 0; i < info->portwidth; i++)
1373                                 flash_add_byte(info, &cword, *src++);
1374                         if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
1375                                 return rc;
1376                         wp += info->portwidth;
1377                         cnt -= info->portwidth;
1378                         continue;
1379                 }
1380
1381                 /* write buffer until next buffered_size aligned boundary */
1382                 i = buffered_size - (wp % buffered_size);
1383                 if (i > cnt)
1384                         i = cnt;
1385                 if ((rc = flash_write_cfibuffer(info, wp, src, i)) != ERR_OK)
1386                         return rc;
1387                 i -= i & (info->portwidth - 1);
1388                 wp += i;
1389                 src += i;
1390                 cnt -= i;
1391                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1392                 /* Only check every once in a while */
1393                 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1394                         return ERR_ABORTED;
1395         }
1396 #else
1397         while (cnt >= info->portwidth) {
1398                 cword.w32 = 0;
1399                 for (i = 0; i < info->portwidth; i++) {
1400                         flash_add_byte(info, &cword, *src++);
1401                 }
1402                 if ((rc = flash_write_cfiword(info, wp, cword)) != 0)
1403                         return rc;
1404                 wp += info->portwidth;
1405                 cnt -= info->portwidth;
1406                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1407                 /* Only check every once in a while */
1408                 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1409                         return ERR_ABORTED;
1410         }
1411 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1412
1413         if (cnt == 0) {
1414                 return (0);
1415         }
1416
1417         /*
1418          * handle unaligned tail bytes
1419          */
1420         cword.w32 = 0;
1421         p = (uchar *)wp;
1422         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1423                 flash_add_byte(info, &cword, *src++);
1424                 --cnt;
1425         }
1426         for (; i < info->portwidth; ++i)
1427                 flash_add_byte(info, &cword, flash_read8(p + i));
1428
1429         return flash_write_cfiword(info, wp, cword);
1430 }
1431
1432 static inline int manufact_match(flash_info_t *info, u32 manu)
1433 {
1434         return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1435 }
1436
1437 /*-----------------------------------------------------------------------
1438  */
1439 #ifdef CONFIG_SYS_FLASH_PROTECTION
1440
1441 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1442 {
1443         if (manufact_match(info, INTEL_MANUFACT)
1444             && info->device_id == NUMONYX_256MBIT) {
1445                 /*
1446                  * see errata called
1447                  * "Numonyx Axcell P33/P30 Specification Update" :)
1448                  */
1449                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1450                 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1451                                    prot)) {
1452                         /*
1453                          * cmd must come before FLASH_CMD_PROTECT + 20us
1454                          * Disable interrupts which might cause a timeout here.
1455                          */
1456                         int flag = disable_interrupts();
1457                         unsigned short cmd;
1458
1459                         if (prot)
1460                                 cmd = FLASH_CMD_PROTECT_SET;
1461                         else
1462                                 cmd = FLASH_CMD_PROTECT_CLEAR;
1463
1464                         flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1465                         flash_write_cmd(info, sector, 0, cmd);
1466                         /* re-enable interrupts if necessary */
1467                         if (flag)
1468                                 enable_interrupts();
1469                 }
1470                 return 1;
1471         }
1472         return 0;
1473 }
1474
1475 int flash_real_protect(flash_info_t *info, long sector, int prot)
1476 {
1477         int retcode = 0;
1478
1479         switch (info->vendor) {
1480         case CFI_CMDSET_INTEL_PROG_REGIONS:
1481         case CFI_CMDSET_INTEL_STANDARD:
1482         case CFI_CMDSET_INTEL_EXTENDED:
1483                 if (!cfi_protect_bugfix(info, sector, prot)) {
1484                         flash_write_cmd(info, sector, 0,
1485                                  FLASH_CMD_CLEAR_STATUS);
1486                         flash_write_cmd(info, sector, 0,
1487                                 FLASH_CMD_PROTECT);
1488                         if (prot)
1489                                 flash_write_cmd(info, sector, 0,
1490                                         FLASH_CMD_PROTECT_SET);
1491                         else
1492                                 flash_write_cmd(info, sector, 0,
1493                                         FLASH_CMD_PROTECT_CLEAR);
1494                 }
1495                 break;
1496         case CFI_CMDSET_AMD_EXTENDED:
1497         case CFI_CMDSET_AMD_STANDARD:
1498                 /* U-Boot only checks the first byte */
1499                 if (manufact_match(info, ATM_MANUFACT)) {
1500                         if (prot) {
1501                                 flash_unlock_seq(info, 0);
1502                                 flash_write_cmd(info, 0,
1503                                                 info->addr_unlock1,
1504                                                 ATM_CMD_SOFTLOCK_START);
1505                                 flash_unlock_seq(info, 0);
1506                                 flash_write_cmd(info, sector, 0,
1507                                                 ATM_CMD_LOCK_SECT);
1508                         } else {
1509                                 flash_write_cmd(info, 0,
1510                                                 info->addr_unlock1,
1511                                                 AMD_CMD_UNLOCK_START);
1512                                 if (info->device_id == ATM_ID_BV6416)
1513                                         flash_write_cmd(info, sector,
1514                                                 0, ATM_CMD_UNLOCK_SECT);
1515                         }
1516                 }
1517                 if (info->legacy_unlock) {
1518                         int flag = disable_interrupts();
1519                         int lock_flag;
1520
1521                         flash_unlock_seq(info, 0);
1522                         flash_write_cmd(info, 0, info->addr_unlock1,
1523                                         AMD_CMD_SET_PPB_ENTRY);
1524                         lock_flag = flash_isset(info, sector, 0, 0x01);
1525                         if (prot) {
1526                                 if (lock_flag) {
1527                                         flash_write_cmd(info, sector, 0,
1528                                                 AMD_CMD_PPB_LOCK_BC1);
1529                                         flash_write_cmd(info, sector, 0,
1530                                                 AMD_CMD_PPB_LOCK_BC2);
1531                                 }
1532                                 debug("sector %ld %slocked\n", sector,
1533                                         lock_flag ? "" : "already ");
1534                         } else {
1535                                 if (!lock_flag) {
1536                                         debug("unlock %ld\n", sector);
1537                                         flash_write_cmd(info, 0, 0,
1538                                                 AMD_CMD_PPB_UNLOCK_BC1);
1539                                         flash_write_cmd(info, 0, 0,
1540                                                 AMD_CMD_PPB_UNLOCK_BC2);
1541                                 }
1542                                 debug("sector %ld %sunlocked\n", sector,
1543                                         !lock_flag ? "" : "already ");
1544                         }
1545                         if (flag)
1546                                 enable_interrupts();
1547
1548                         if (flash_status_check(info, sector,
1549                                         info->erase_blk_tout,
1550                                         prot ? "protect" : "unprotect"))
1551                                 printf("status check error\n");
1552
1553                         flash_write_cmd(info, 0, 0,
1554                                         AMD_CMD_SET_PPB_EXIT_BC1);
1555                         flash_write_cmd(info, 0, 0,
1556                                         AMD_CMD_SET_PPB_EXIT_BC2);
1557                 }
1558                 break;
1559 #ifdef CONFIG_FLASH_CFI_LEGACY
1560         case CFI_CMDSET_AMD_LEGACY:
1561                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1562                 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1563                 if (prot)
1564                         flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_SET);
1565                 else
1566                         flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1567 #endif
1568         };
1569
1570         /*
1571          * Flash needs to be in status register read mode for
1572          * flash_full_status_check() to work correctly
1573          */
1574         flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1575         if ((retcode =
1576              flash_full_status_check(info, sector, info->erase_blk_tout,
1577                                       prot ? "protect" : "unprotect")) == 0) {
1578                 info->protect[sector] = prot;
1579
1580                 /*
1581                  * On some of Intel's flash chips (marked via legacy_unlock)
1582                  * unprotect unprotects all locking.
1583                  */
1584                 if ((prot == 0) && (info->legacy_unlock)) {
1585                         flash_sect_t i;
1586
1587                         for (i = 0; i < info->sector_count; i++) {
1588                                 if (info->protect[i])
1589                                         flash_real_protect(info, i, 1);
1590                         }
1591                 }
1592         }
1593         return retcode;
1594 }
1595
1596 /*-----------------------------------------------------------------------
1597  * flash_read_user_serial - read the OneTimeProgramming cells
1598  */
1599 void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1600                              int len)
1601 {
1602         uchar *src;
1603         uchar *dst;
1604
1605         dst = buffer;
1606         src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1607         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1608         memcpy(dst, src + offset, len);
1609         flash_write_cmd(info, 0, 0, info->cmd_reset);
1610         udelay(1);
1611         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1612 }
1613
1614 /*
1615  * flash_read_factory_serial - read the device Id from the protection area
1616  */
1617 void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1618                                 int len)
1619 {
1620         uchar *src;
1621
1622         src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1623         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1624         memcpy(buffer, src + offset, len);
1625         flash_write_cmd(info, 0, 0, info->cmd_reset);
1626         udelay(1);
1627         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1628 }
1629
1630 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1631
1632 /*-----------------------------------------------------------------------
1633  * Reverse the order of the erase regions in the CFI QRY structure.
1634  * This is needed for chips that are either a) correctly detected as
1635  * top-boot, or b) buggy.
1636  */
1637 static void cfi_reverse_geometry(struct cfi_qry *qry)
1638 {
1639         unsigned int i, j;
1640         u32 tmp;
1641
1642         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1643                 tmp = get_unaligned(&(qry->erase_region_info[i]));
1644                 put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
1645                               &(qry->erase_region_info[i]));
1646                 put_unaligned(tmp, &(qry->erase_region_info[j]));
1647         }
1648 }
1649
1650 /*-----------------------------------------------------------------------
1651  * read jedec ids from device and set corresponding fields in info struct
1652  *
1653  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1654  *
1655  */
1656 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1657 {
1658         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1659         udelay(1);
1660         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1661         udelay(1000); /* some flash are slow to respond */
1662         info->manufacturer_id = flash_read_uchar(info,
1663                                         FLASH_OFFSET_MANUFACTURER_ID);
1664         info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1665                         flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1666                         flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1667         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1668 }
1669
1670 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1671 {
1672         info->cmd_reset = FLASH_CMD_RESET;
1673
1674         cmdset_intel_read_jedec_ids(info);
1675         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1676
1677 #ifdef CONFIG_SYS_FLASH_PROTECTION
1678         /* read legacy lock/unlock bit from intel flash */
1679         if (info->ext_addr) {
1680                 info->legacy_unlock = flash_read_uchar(info,
1681                                 info->ext_addr + 5) & 0x08;
1682         }
1683 #endif
1684
1685         return 0;
1686 }
1687
1688 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1689 {
1690         ushort bankId = 0;
1691         uchar  manuId;
1692         uchar  feature;
1693
1694         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1695         flash_unlock_seq(info, 0);
1696         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1697         udelay(1000); /* some flash are slow to respond */
1698
1699         manuId = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1700         /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1701         while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1702                 bankId += 0x100;
1703                 manuId = flash_read_uchar(info,
1704                         bankId | FLASH_OFFSET_MANUFACTURER_ID);
1705         }
1706         info->manufacturer_id = manuId;
1707
1708         debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1709               info->ext_addr, info->cfi_version);
1710         if (info->ext_addr && info->cfi_version >= 0x3134) {
1711                 /* read software feature (at 0x53) */
1712                 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1713                 debug("feature = 0x%x\n", feature);
1714                 info->sr_supported = feature & 0x1;
1715         }
1716
1717         switch (info->chipwidth) {
1718         case FLASH_CFI_8BIT:
1719                 info->device_id = flash_read_uchar(info,
1720                                                 FLASH_OFFSET_DEVICE_ID);
1721                 if (info->device_id == 0x7E) {
1722                         /* AMD 3-byte (expanded) device ids */
1723                         info->device_id2 = flash_read_uchar(info,
1724                                                 FLASH_OFFSET_DEVICE_ID2);
1725                         info->device_id2 <<= 8;
1726                         info->device_id2 |= flash_read_uchar(info,
1727                                                 FLASH_OFFSET_DEVICE_ID3);
1728                 }
1729                 break;
1730         case FLASH_CFI_16BIT:
1731                 info->device_id = flash_read_word(info,
1732                                                 FLASH_OFFSET_DEVICE_ID);
1733                 if ((info->device_id & 0xff) == 0x7E) {
1734                         /* AMD 3-byte (expanded) device ids */
1735                         info->device_id2 = flash_read_uchar(info,
1736                                                 FLASH_OFFSET_DEVICE_ID2);
1737                         info->device_id2 <<= 8;
1738                         info->device_id2 |= flash_read_uchar(info,
1739                                                 FLASH_OFFSET_DEVICE_ID3);
1740                 }
1741                 break;
1742         default:
1743                 break;
1744         }
1745         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1746         udelay(1);
1747 }
1748
1749 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1750 {
1751         info->cmd_reset = AMD_CMD_RESET;
1752         info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1753
1754         cmdset_amd_read_jedec_ids(info);
1755         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1756
1757 #ifdef CONFIG_SYS_FLASH_PROTECTION
1758         if (info->ext_addr) {
1759                 /* read sector protect/unprotect scheme (at 0x49) */
1760                 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1761                         info->legacy_unlock = 1;
1762         }
1763 #endif
1764
1765         return 0;
1766 }
1767
1768 #ifdef CONFIG_FLASH_CFI_LEGACY
1769 static void flash_read_jedec_ids(flash_info_t *info)
1770 {
1771         info->manufacturer_id = 0;
1772         info->device_id       = 0;
1773         info->device_id2      = 0;
1774
1775         switch (info->vendor) {
1776         case CFI_CMDSET_INTEL_PROG_REGIONS:
1777         case CFI_CMDSET_INTEL_STANDARD:
1778         case CFI_CMDSET_INTEL_EXTENDED:
1779                 cmdset_intel_read_jedec_ids(info);
1780                 break;
1781         case CFI_CMDSET_AMD_STANDARD:
1782         case CFI_CMDSET_AMD_EXTENDED:
1783                 cmdset_amd_read_jedec_ids(info);
1784                 break;
1785         default:
1786                 break;
1787         }
1788 }
1789
1790 /*-----------------------------------------------------------------------
1791  * Call board code to request info about non-CFI flash.
1792  * board_flash_get_legacy needs to fill in at least:
1793  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1794  */
1795 static int flash_detect_legacy(phys_addr_t base, int banknum)
1796 {
1797         flash_info_t *info = &flash_info[banknum];
1798
1799         if (board_flash_get_legacy(base, banknum, info)) {
1800                 /* board code may have filled info completely. If not, we
1801                    use JEDEC ID probing. */
1802                 if (!info->vendor) {
1803                         int modes[] = {
1804                                 CFI_CMDSET_AMD_STANDARD,
1805                                 CFI_CMDSET_INTEL_STANDARD
1806                         };
1807                         int i;
1808
1809                         for (i = 0; i < ARRAY_SIZE(modes); i++) {
1810                                 info->vendor = modes[i];
1811                                 info->start[0] =
1812                                         (ulong)map_physmem(base,
1813                                                            info->portwidth,
1814                                                            MAP_NOCACHE);
1815                                 if (info->portwidth == FLASH_CFI_8BIT
1816                                         && info->interface == FLASH_CFI_X8X16) {
1817                                         info->addr_unlock1 = 0x2AAA;
1818                                         info->addr_unlock2 = 0x5555;
1819                                 } else {
1820                                         info->addr_unlock1 = 0x5555;
1821                                         info->addr_unlock2 = 0x2AAA;
1822                                 }
1823                                 flash_read_jedec_ids(info);
1824                                 debug("JEDEC PROBE: ID %x %x %x\n",
1825                                                 info->manufacturer_id,
1826                                                 info->device_id,
1827                                                 info->device_id2);
1828                                 if (jedec_flash_match(info, info->start[0]))
1829                                         break;
1830                                 else
1831                                         unmap_physmem((void *)info->start[0],
1832                                                       info->portwidth);
1833                         }
1834                 }
1835
1836                 switch (info->vendor) {
1837                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1838                 case CFI_CMDSET_INTEL_STANDARD:
1839                 case CFI_CMDSET_INTEL_EXTENDED:
1840                         info->cmd_reset = FLASH_CMD_RESET;
1841                         break;
1842                 case CFI_CMDSET_AMD_STANDARD:
1843                 case CFI_CMDSET_AMD_EXTENDED:
1844                 case CFI_CMDSET_AMD_LEGACY:
1845                         info->cmd_reset = AMD_CMD_RESET;
1846                         break;
1847                 }
1848                 info->flash_id = FLASH_MAN_CFI;
1849                 return 1;
1850         }
1851         return 0; /* use CFI */
1852 }
1853 #else
1854 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1855 {
1856         return 0; /* use CFI */
1857 }
1858 #endif
1859
1860 /*-----------------------------------------------------------------------
1861  * detect if flash is compatible with the Common Flash Interface (CFI)
1862  * http://www.jedec.org/download/search/jesd68.pdf
1863  */
1864 static void flash_read_cfi(flash_info_t *info, void *buf,
1865                 unsigned int start, size_t len)
1866 {
1867         u8 *p = buf;
1868         unsigned int i;
1869
1870         for (i = 0; i < len; i++)
1871                 p[i] = flash_read_uchar(info, start + i);
1872 }
1873
1874 static void __flash_cmd_reset(flash_info_t *info)
1875 {
1876         /*
1877          * We do not yet know what kind of commandset to use, so we issue
1878          * the reset command in both Intel and AMD variants, in the hope
1879          * that AMD flash roms ignore the Intel command.
1880          */
1881         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1882         udelay(1);
1883         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1884 }
1885
1886 void flash_cmd_reset(flash_info_t *info)
1887         __attribute__((weak, alias("__flash_cmd_reset")));
1888
1889 static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1890 {
1891         int cfi_offset;
1892
1893         /* Issue FLASH reset command */
1894         flash_cmd_reset(info);
1895
1896         for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1897              cfi_offset++) {
1898                 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1899                                  FLASH_CMD_CFI);
1900                 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1901                     && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1902                     && flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1903                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1904                                         sizeof(struct cfi_qry));
1905                         info->interface = le16_to_cpu(qry->interface_desc);
1906
1907                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1908                         debug("device interface is %d\n",
1909                                info->interface);
1910                         debug("found port %d chip %d ",
1911                                info->portwidth, info->chipwidth);
1912                         debug("port %d bits chip %d bits\n",
1913                                info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1914                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1915
1916                         /* calculate command offsets as in the Linux driver */
1917                         info->addr_unlock1 = 0x555;
1918                         info->addr_unlock2 = 0x2aa;
1919
1920                         /*
1921                          * modify the unlock address if we are
1922                          * in compatibility mode
1923                          */
1924                         if (/* x8/x16 in x8 mode */
1925                             ((info->chipwidth == FLASH_CFI_BY8) &&
1926                                 (info->interface == FLASH_CFI_X8X16)) ||
1927                             /* x16/x32 in x16 mode */
1928                             ((info->chipwidth == FLASH_CFI_BY16) &&
1929                                 (info->interface == FLASH_CFI_X16X32)))
1930                         {
1931                                 info->addr_unlock1 = 0xaaa;
1932                                 info->addr_unlock2 = 0x555;
1933                         }
1934
1935                         info->name = "CFI conformant";
1936                         return 1;
1937                 }
1938         }
1939
1940         return 0;
1941 }
1942
1943 static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1944 {
1945         debug("flash detect cfi\n");
1946
1947         for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1948              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1949                 for (info->chipwidth = FLASH_CFI_BY8;
1950                      info->chipwidth <= info->portwidth;
1951                      info->chipwidth <<= 1)
1952                         if (__flash_detect_cfi(info, qry))
1953                                 return 1;
1954         }
1955         debug("not found\n");
1956         return 0;
1957 }
1958
1959 /*
1960  * Manufacturer-specific quirks. Add workarounds for geometry
1961  * reversal, etc. here.
1962  */
1963 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1964 {
1965         /* check if flash geometry needs reversal */
1966         if (qry->num_erase_regions > 1) {
1967                 /* reverse geometry if top boot part */
1968                 if (info->cfi_version < 0x3131) {
1969                         /* CFI < 1.1, try to guess from device id */
1970                         if ((info->device_id & 0x80) != 0)
1971                                 cfi_reverse_geometry(qry);
1972                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1973                         /* CFI >= 1.1, deduct from top/bottom flag */
1974                         /* note: ext_addr is valid since cfi_version > 0 */
1975                         cfi_reverse_geometry(qry);
1976                 }
1977         }
1978 }
1979
1980 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1981 {
1982         int reverse_geometry = 0;
1983
1984         /* Check the "top boot" bit in the PRI */
1985         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1986                 reverse_geometry = 1;
1987
1988         /* AT49BV6416(T) list the erase regions in the wrong order.
1989          * However, the device ID is identical with the non-broken
1990          * AT49BV642D they differ in the high byte.
1991          */
1992         if (info->device_id == 0xd6 || info->device_id == 0xd2)
1993                 reverse_geometry = !reverse_geometry;
1994
1995         if (reverse_geometry)
1996                 cfi_reverse_geometry(qry);
1997 }
1998
1999 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2000 {
2001         /* check if flash geometry needs reversal */
2002         if (qry->num_erase_regions > 1) {
2003                 /* reverse geometry if top boot part */
2004                 if (info->cfi_version < 0x3131) {
2005                         /* CFI < 1.1, guess by device id */
2006                         if (info->device_id == 0x22CA || /* M29W320DT */
2007                             info->device_id == 0x2256 || /* M29W320ET */
2008                             info->device_id == 0x22D7) { /* M29W800DT */
2009                                 cfi_reverse_geometry(qry);
2010                         }
2011                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2012                         /* CFI >= 1.1, deduct from top/bottom flag */
2013                         /* note: ext_addr is valid since cfi_version > 0 */
2014                         cfi_reverse_geometry(qry);
2015                 }
2016         }
2017 }
2018
2019 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2020 {
2021         /*
2022          * SST, for many recent nor parallel flashes, says they are
2023          * CFI-conformant. This is not true, since qry struct.
2024          * reports a std. AMD command set (0x0002), while SST allows to
2025          * erase two different sector sizes for the same memory.
2026          * 64KB sector (SST call it block)  needs 0x30 to be erased.
2027          * 4KB  sector (SST call it sector) needs 0x50 to be erased.
2028          * Since CFI query detect the 4KB number of sectors, users expects
2029          * a sector granularity of 4KB, and it is here set.
2030          */
2031         if (info->device_id == 0x5D23 || /* SST39VF3201B */
2032             info->device_id == 0x5C23) { /* SST39VF3202B */
2033                 /* set sector granularity to 4KB */
2034                 info->cmd_erase_sector = 0x50;
2035         }
2036 }
2037
2038 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2039 {
2040         /*
2041          * The M29EW devices seem to report the CFI information wrong
2042          * when it's in 8 bit mode.
2043          * There's an app note from Numonyx on this issue.
2044          * So adjust the buffer size for M29EW while operating in 8-bit mode
2045          */
2046         if (((qry->max_buf_write_size) > 0x8) &&
2047                         (info->device_id == 0x7E) &&
2048                         (info->device_id2 == 0x2201 ||
2049                         info->device_id2 == 0x2301 ||
2050                         info->device_id2 == 0x2801 ||
2051                         info->device_id2 == 0x4801)) {
2052                 debug("Adjusted buffer size on Numonyx flash"
2053                         " M29EW family in 8 bit mode\n");
2054                 qry->max_buf_write_size = 0x8;
2055         }
2056 }
2057
2058 /*
2059  * The following code cannot be run from FLASH!
2060  *
2061  */
2062 ulong flash_get_size(phys_addr_t base, int banknum)
2063 {
2064         flash_info_t *info = &flash_info[banknum];
2065         int i, j;
2066         flash_sect_t sect_cnt;
2067         phys_addr_t sector;
2068         unsigned long tmp;
2069         int size_ratio;
2070         uchar num_erase_regions;
2071         int erase_region_size;
2072         int erase_region_count;
2073         struct cfi_qry qry;
2074         unsigned long max_size;
2075
2076         memset(&qry, 0, sizeof(qry));
2077
2078         info->ext_addr = 0;
2079         info->cfi_version = 0;
2080 #ifdef CONFIG_SYS_FLASH_PROTECTION
2081         info->legacy_unlock = 0;
2082 #endif
2083
2084         info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2085
2086         if (flash_detect_cfi(info, &qry)) {
2087                 info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
2088                 info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
2089                 num_erase_regions = qry.num_erase_regions;
2090
2091                 if (info->ext_addr) {
2092                         info->cfi_version = (ushort)flash_read_uchar(info,
2093                                                 info->ext_addr + 3) << 8;
2094                         info->cfi_version |= (ushort)flash_read_uchar(info,
2095                                                 info->ext_addr + 4);
2096                 }
2097
2098 #ifdef DEBUG
2099                 flash_printqry(&qry);
2100 #endif
2101
2102                 switch (info->vendor) {
2103                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2104                 case CFI_CMDSET_INTEL_STANDARD:
2105                 case CFI_CMDSET_INTEL_EXTENDED:
2106                         cmdset_intel_init(info, &qry);
2107                         break;
2108                 case CFI_CMDSET_AMD_STANDARD:
2109                 case CFI_CMDSET_AMD_EXTENDED:
2110                         cmdset_amd_init(info, &qry);
2111                         break;
2112                 default:
2113                         printf("CFI: Unknown command set 0x%x\n",
2114                                         info->vendor);
2115                         /*
2116                          * Unfortunately, this means we don't know how
2117                          * to get the chip back to Read mode. Might
2118                          * as well try an Intel-style reset...
2119                          */
2120                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2121                         return 0;
2122                 }
2123
2124                 /* Do manufacturer-specific fixups */
2125                 switch (info->manufacturer_id) {
2126                 case 0x0001: /* AMD */
2127                 case 0x0037: /* AMIC */
2128                         flash_fixup_amd(info, &qry);
2129                         break;
2130                 case 0x001f:
2131                         flash_fixup_atmel(info, &qry);
2132                         break;
2133                 case 0x0020:
2134                         flash_fixup_stm(info, &qry);
2135                         break;
2136                 case 0x00bf: /* SST */
2137                         flash_fixup_sst(info, &qry);
2138                         break;
2139                 case 0x0089: /* Numonyx */
2140                         flash_fixup_num(info, &qry);
2141                         break;
2142                 }
2143
2144                 debug("manufacturer is %d\n", info->vendor);
2145                 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2146                 debug("device id is 0x%x\n", info->device_id);
2147                 debug("device id2 is 0x%x\n", info->device_id2);
2148                 debug("cfi version is 0x%04x\n", info->cfi_version);
2149
2150                 size_ratio = info->portwidth / info->chipwidth;
2151                 /* if the chip is x8/x16 reduce the ratio by half */
2152                 if ((info->interface == FLASH_CFI_X8X16)
2153                     && (info->chipwidth == FLASH_CFI_BY8)) {
2154                         size_ratio >>= 1;
2155                 }
2156                 debug("size_ratio %d port %d bits chip %d bits\n",
2157                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2158                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2159                 info->size = 1 << qry.dev_size;
2160                 /* multiply the size by the number of chips */
2161                 info->size *= size_ratio;
2162                 max_size = cfi_flash_bank_size(banknum);
2163                 if (max_size && (info->size > max_size)) {
2164                         debug("[truncated from %ldMiB]", info->size >> 20);
2165                         info->size = max_size;
2166                 }
2167                 debug("found %d erase regions\n", num_erase_regions);
2168                 sect_cnt = 0;
2169                 sector = base;
2170                 for (i = 0; i < num_erase_regions; i++) {
2171                         if (i > NUM_ERASE_REGIONS) {
2172                                 printf("%d erase regions found, only %d used\n",
2173                                         num_erase_regions, NUM_ERASE_REGIONS);
2174                                 break;
2175                         }
2176
2177                         tmp = le32_to_cpu(get_unaligned(
2178                                                 &(qry.erase_region_info[i])));
2179                         debug("erase region %u: 0x%08lx\n", i, tmp);
2180
2181                         erase_region_count = (tmp & 0xffff) + 1;
2182                         tmp >>= 16;
2183                         erase_region_size =
2184                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2185                         debug("erase_region_count = %d erase_region_size = %d\n",
2186                                 erase_region_count, erase_region_size);
2187                         for (j = 0; j < erase_region_count; j++) {
2188                                 if (sector - base >= info->size)
2189                                         break;
2190                                 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2191                                         printf("ERROR: too many flash sectors\n");
2192                                         break;
2193                                 }
2194                                 info->start[sect_cnt] =
2195                                         (ulong)map_physmem(sector,
2196                                                            info->portwidth,
2197                                                            MAP_NOCACHE);
2198                                 sector += (erase_region_size * size_ratio);
2199
2200                                 /*
2201                                  * Only read protection status from
2202                                  * supported devices (intel...)
2203                                  */
2204                                 switch (info->vendor) {
2205                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2206                                 case CFI_CMDSET_INTEL_EXTENDED:
2207                                 case CFI_CMDSET_INTEL_STANDARD:
2208                                         /*
2209                                          * Set flash to read-id mode. Otherwise
2210                                          * reading protected status is not
2211                                          * guaranteed.
2212                                          */
2213                                         flash_write_cmd(info, sect_cnt, 0,
2214                                                         FLASH_CMD_READ_ID);
2215                                         info->protect[sect_cnt] =
2216                                                 flash_isset(info, sect_cnt,
2217                                                              FLASH_OFFSET_PROTECT,
2218                                                              FLASH_STATUS_PROTECT);
2219                                         flash_write_cmd(info, sect_cnt, 0,
2220                                                         FLASH_CMD_RESET);
2221                                         break;
2222                                 case CFI_CMDSET_AMD_EXTENDED:
2223                                 case CFI_CMDSET_AMD_STANDARD:
2224                                         if (!info->legacy_unlock) {
2225                                                 /* default: not protected */
2226                                                 info->protect[sect_cnt] = 0;
2227                                                 break;
2228                                         }
2229
2230                                         /* Read protection (PPB) from sector */
2231                                         flash_write_cmd(info, 0, 0,
2232                                                         info->cmd_reset);
2233                                         flash_unlock_seq(info, 0);
2234                                         flash_write_cmd(info, 0,
2235                                                         info->addr_unlock1,
2236                                                         FLASH_CMD_READ_ID);
2237                                         info->protect[sect_cnt] =
2238                                                 flash_isset(
2239                                                         info, sect_cnt,
2240                                                         FLASH_OFFSET_PROTECT,
2241                                                         FLASH_STATUS_PROTECT);
2242                                         break;
2243                                 default:
2244                                         /* default: not protected */
2245                                         info->protect[sect_cnt] = 0;
2246                                 }
2247
2248                                 sect_cnt++;
2249                         }
2250                 }
2251
2252                 info->sector_count = sect_cnt;
2253                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2254                 tmp = 1 << qry.block_erase_timeout_typ;
2255                 info->erase_blk_tout = tmp *
2256                         (1 << qry.block_erase_timeout_max);
2257                 tmp = (1 << qry.buf_write_timeout_typ) *
2258                         (1 << qry.buf_write_timeout_max);
2259
2260                 /* round up when converting to ms */
2261                 info->buffer_write_tout = (tmp + 999) / 1000;
2262                 tmp = (1 << qry.word_write_timeout_typ) *
2263                         (1 << qry.word_write_timeout_max);
2264                 /* round up when converting to ms */
2265                 info->write_tout = (tmp + 999) / 1000;
2266                 info->flash_id = FLASH_MAN_CFI;
2267                 if ((info->interface == FLASH_CFI_X8X16) &&
2268                     (info->chipwidth == FLASH_CFI_BY8)) {
2269                         /* XXX - Need to test on x8/x16 in parallel. */
2270                         info->portwidth >>= 1;
2271                 }
2272
2273                 flash_write_cmd(info, 0, 0, info->cmd_reset);
2274         }
2275
2276         return (info->size);
2277 }
2278
2279 #ifdef CONFIG_FLASH_CFI_MTD
2280 void flash_set_verbose(uint v)
2281 {
2282         flash_verbose = v;
2283 }
2284 #endif
2285
2286 static void cfi_flash_set_config_reg(u32 base, u16 val)
2287 {
2288 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2289         /*
2290          * Only set this config register if really defined
2291          * to a valid value (0xffff is invalid)
2292          */
2293         if (val == 0xffff)
2294                 return;
2295
2296         /*
2297          * Set configuration register. Data is "encrypted" in the 16 lower
2298          * address bits.
2299          */
2300         flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2301         flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2302
2303         /*
2304          * Finally issue reset-command to bring device back to
2305          * read-array mode
2306          */
2307         flash_write16(FLASH_CMD_RESET, (void *)base);
2308 #endif
2309 }
2310
2311 /*-----------------------------------------------------------------------
2312  */
2313
2314 static void flash_protect_default(void)
2315 {
2316 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2317         int i;
2318         struct apl_s {
2319                 ulong start;
2320                 ulong size;
2321         } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2322 #endif
2323
2324         /* Monitor protection ON by default */
2325 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2326         (!defined(CONFIG_MONITOR_IS_IN_RAM))
2327         flash_protect(FLAG_PROTECT_SET,
2328                        CONFIG_SYS_MONITOR_BASE,
2329                        CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2330                        flash_get_info(CONFIG_SYS_MONITOR_BASE));
2331 #endif
2332
2333         /* Environment protection ON by default */
2334 #ifdef CONFIG_ENV_IS_IN_FLASH
2335         flash_protect(FLAG_PROTECT_SET,
2336                        CONFIG_ENV_ADDR,
2337                        CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2338                        flash_get_info(CONFIG_ENV_ADDR));
2339 #endif
2340
2341         /* Redundant environment protection ON by default */
2342 #ifdef CONFIG_ENV_ADDR_REDUND
2343         flash_protect(FLAG_PROTECT_SET,
2344                        CONFIG_ENV_ADDR_REDUND,
2345                        CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2346                        flash_get_info(CONFIG_ENV_ADDR_REDUND));
2347 #endif
2348
2349 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2350         for (i = 0; i < ARRAY_SIZE(apl); i++) {
2351                 debug("autoprotecting from %08lx to %08lx\n",
2352                       apl[i].start, apl[i].start + apl[i].size - 1);
2353                 flash_protect(FLAG_PROTECT_SET,
2354                                apl[i].start,
2355                                apl[i].start + apl[i].size - 1,
2356                                flash_get_info(apl[i].start));
2357         }
2358 #endif
2359 }
2360
2361 unsigned long flash_init(void)
2362 {
2363         unsigned long size = 0;
2364         int i;
2365
2366 #ifdef CONFIG_SYS_FLASH_PROTECTION
2367         /* read environment from EEPROM */
2368         char s[64];
2369
2370         env_get_f("unlock", s, sizeof(s));
2371 #endif
2372
2373 #ifdef CONFIG_CFI_FLASH /* for driver model */
2374         cfi_flash_init_dm();
2375 #endif
2376
2377         /* Init: no FLASHes known */
2378         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2379                 flash_info[i].flash_id = FLASH_UNKNOWN;
2380
2381                 /* Optionally write flash configuration register */
2382                 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2383                                          cfi_flash_config_reg(i));
2384
2385                 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2386                         flash_get_size(cfi_flash_bank_addr(i), i);
2387                 size += flash_info[i].size;
2388                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2389 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2390                         printf("## Unknown flash on Bank %d "
2391                                 "- Size = 0x%08lx = %ld MB\n",
2392                                 i + 1, flash_info[i].size,
2393                                 flash_info[i].size >> 20);
2394 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2395                 }
2396 #ifdef CONFIG_SYS_FLASH_PROTECTION
2397                 else if (strcmp(s, "yes") == 0) {
2398                         /*
2399                          * Only the U-Boot image and it's environment
2400                          * is protected, all other sectors are
2401                          * unprotected (unlocked) if flash hardware
2402                          * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2403                          * and the environment variable "unlock" is
2404                          * set to "yes".
2405                          */
2406                         if (flash_info[i].legacy_unlock) {
2407                                 int k;
2408
2409                                 /*
2410                                  * Disable legacy_unlock temporarily,
2411                                  * since flash_real_protect would
2412                                  * relock all other sectors again
2413                                  * otherwise.
2414                                  */
2415                                 flash_info[i].legacy_unlock = 0;
2416
2417                                 /*
2418                                  * Legacy unlocking (e.g. Intel J3) ->
2419                                  * unlock only one sector. This will
2420                                  * unlock all sectors.
2421                                  */
2422                                 flash_real_protect(&flash_info[i], 0, 0);
2423
2424                                 flash_info[i].legacy_unlock = 1;
2425
2426                                 /*
2427                                  * Manually mark other sectors as
2428                                  * unlocked (unprotected)
2429                                  */
2430                                 for (k = 1; k < flash_info[i].sector_count; k++)
2431                                         flash_info[i].protect[k] = 0;
2432                         } else {
2433                                 /*
2434                                  * No legancy unlocking -> unlock all sectors
2435                                  */
2436                                 flash_protect(FLAG_PROTECT_CLEAR,
2437                                                flash_info[i].start[0],
2438                                                flash_info[i].start[0]
2439                                                + flash_info[i].size - 1,
2440                                                &flash_info[i]);
2441                         }
2442                 }
2443 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2444         }
2445
2446         flash_protect_default();
2447 #ifdef CONFIG_FLASH_CFI_MTD
2448         cfi_mtd_init();
2449 #endif
2450
2451         return (size);
2452 }
2453
2454 #ifdef CONFIG_CFI_FLASH /* for driver model */
2455 static int cfi_flash_probe(struct udevice *dev)
2456 {
2457         void *blob = (void *)gd->fdt_blob;
2458         int node = dev_of_offset(dev);
2459         const fdt32_t *cell;
2460         phys_addr_t addr;
2461         int parent, addrc, sizec;
2462         int len, idx;
2463
2464         parent = fdt_parent_offset(blob, node);
2465         fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
2466         /* decode regs, there may be multiple reg tuples. */
2467         cell = fdt_getprop(blob, node, "reg", &len);
2468         if (!cell)
2469                 return -ENOENT;
2470         idx = 0;
2471         len /= sizeof(fdt32_t);
2472         while (idx < len) {
2473                 addr = fdt_translate_address((void *)blob,
2474                                              node, cell + idx);
2475                 flash_info[cfi_flash_num_flash_banks].dev = dev;
2476                 flash_info[cfi_flash_num_flash_banks].base = addr;
2477                 cfi_flash_num_flash_banks++;
2478                 idx += addrc + sizec;
2479         }
2480         gd->bd->bi_flashstart = flash_info[0].base;
2481
2482         return 0;
2483 }
2484
2485 static const struct udevice_id cfi_flash_ids[] = {
2486         { .compatible = "cfi-flash" },
2487         { .compatible = "jedec-flash" },
2488         {}
2489 };
2490
2491 U_BOOT_DRIVER(cfi_flash) = {
2492         .name   = "cfi_flash",
2493         .id     = UCLASS_MTD,
2494         .of_match = cfi_flash_ids,
2495         .probe = cfi_flash_probe,
2496 };
2497 #endif /* CONFIG_CFI_FLASH */