drivers/mtd/cfi_flash.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * (C) Copyright 2002-2004
   4  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   5  *
   6  * Copyright (C) 2003 Arabella Software Ltd.
   7  * Yuli Barcohen <yuli@arabellasw.com>
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  *
  12  * Copyright (C) 2006
  13  * Tolunay Orkun <listmember@orkun.us>
  14  */
  15
  16 /* The DEBUG define must be before common to enable debugging */
  17 /* #define DEBUG        */
  18
  19 #include <common.h>
  20 #include <console.h>
  21 #include <dm.h>
  22 #include <env.h>
  23 #include <errno.h>
  24 #include <fdt_support.h>
  25 #include <flash.h>
  26 #include <init.h>
  27 #include <irq_func.h>
  28 #include <asm/processor.h>
  29 #include <asm/io.h>
  30 #include <asm/byteorder.h>
  31 #include <asm/unaligned.h>
  32 #include <env_internal.h>
  33 #include <mtd/cfi_flash.h>
  34 #include <watchdog.h>
  35
  36 /*
  37  * This file implements a Common Flash Interface (CFI) driver for
  38  * U-Boot.
  39  *
  40  * The width of the port and the width of the chips are determined at
  41  * initialization.  These widths are used to calculate the address for
  42  * access CFI data structures.
  43  *
  44  * References
  45  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  46  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  47  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  48  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  49  * AMD CFI Specification, Release 2.0 December 1, 2001
  50  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  51  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  52  *
  53  * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  54  * reading and writing ... (yes there is such a Hardware).
  55  */
  56
  57 DECLARE_GLOBAL_DATA_PTR;
  58
  59 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  60 #ifdef CONFIG_FLASH_CFI_MTD
  61 static uint flash_verbose = 1;
  62 #else
  63 #define flash_verbose 1
  64 #endif
  65
  66 flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
  67
  68 /*
  69  * Check if chip width is defined. If not, start detecting with 8bit.
  70  */
  71 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  72 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
  73 #endif
  74
  75 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  76 #define __maybe_weak __weak
  77 #else
  78 #define __maybe_weak static
  79 #endif
  80
  81 /*
  82  * 0xffff is an undefined value for the configuration register. When
  83  * this value is returned, the configuration register shall not be
  84  * written at all (default mode).
  85  */
  86 static u16 cfi_flash_config_reg(int i)
  87 {
  88 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  89         return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  90 #else
  91         return 0xffff;
  92 #endif
  93 }
  94
  95 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  96 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  97 #else
  98 int cfi_flash_num_flash_banks;
  99 #endif
 100
 101 #ifdef CONFIG_CFI_FLASH /* for driver model */
 102 static void cfi_flash_init_dm(void)
 103 {
 104         struct udevice *dev;
 105
 106         cfi_flash_num_flash_banks = 0;
 107         /*
 108          * The uclass_first_device() will probe the first device and
 109          * uclass_next_device() will probe the rest if they exist. So
 110          * that cfi_flash_probe() will get called assigning the base
 111          * addresses that are available.
 112          */
 113         for (uclass_first_device(UCLASS_MTD, &dev);
 114              dev;
 115              uclass_next_device(&dev)) {
 116         }
 117 }
 118
 119 phys_addr_t cfi_flash_bank_addr(int i)
 120 {
 121         return flash_info[i].base;
 122 }
 123 #else
 124 __weak phys_addr_t cfi_flash_bank_addr(int i)
 125 {
 126         return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
 127 }
 128 #endif
 129
 130 __weak unsigned long cfi_flash_bank_size(int i)
 131 {
 132 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
 133         return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
 134 #else
 135         return 0;
 136 #endif
 137 }
 138
 139 __maybe_weak void flash_write8(u8 value, void *addr)
 140 {
 141         __raw_writeb(value, addr);
 142 }
 143
 144 __maybe_weak void flash_write16(u16 value, void *addr)
 145 {
 146         __raw_writew(value, addr);
 147 }
 148
 149 __maybe_weak void flash_write32(u32 value, void *addr)
 150 {
 151         __raw_writel(value, addr);
 152 }
 153
 154 __maybe_weak void flash_write64(u64 value, void *addr)
 155 {
 156         /* No architectures currently implement __raw_writeq() */
 157         *(volatile u64 *)addr = value;
 158 }
 159
 160 __maybe_weak u8 flash_read8(void *addr)
 161 {
 162         return __raw_readb(addr);
 163 }
 164
 165 __maybe_weak u16 flash_read16(void *addr)
 166 {
 167         return __raw_readw(addr);
 168 }
 169
 170 __maybe_weak u32 flash_read32(void *addr)
 171 {
 172         return __raw_readl(addr);
 173 }
 174
 175 __maybe_weak u64 flash_read64(void *addr)
 176 {
 177         /* No architectures currently implement __raw_readq() */
 178         return *(volatile u64 *)addr;
 179 }
 180
 181 /*-----------------------------------------------------------------------
 182  */
 183 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || \
 184         (defined(CONFIG_SYS_MONITOR_BASE) && \
 185         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE))
 186 static flash_info_t *flash_get_info(ulong base)
 187 {
 188         int i;
 189         flash_info_t *info;
 190
 191         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 192                 info = &flash_info[i];
 193                 if (info->size && info->start[0] <= base &&
 194                     base <= info->start[0] + info->size - 1)
 195                         return info;
 196         }
 197
 198         return NULL;
 199 }
 200 #endif
 201
 202 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 203 {
 204         if (sect != (info->sector_count - 1))
 205                 return info->start[sect + 1] - info->start[sect];
 206         else
 207                 return info->start[0] + info->size - info->start[sect];
 208 }
 209
 210 /*-----------------------------------------------------------------------
 211  * create an address based on the offset and the port width
 212  */
 213 static inline void *
 214 flash_map(flash_info_t *info, flash_sect_t sect, uint offset)
 215 {
 216         unsigned int byte_offset = offset * info->portwidth;
 217
 218         return (void *)(info->start[sect] + byte_offset);
 219 }
 220
 221 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 222                                unsigned int offset, void *addr)
 223 {
 224 }
 225
 226 /*-----------------------------------------------------------------------
 227  * make a proper sized command based on the port and chip widths
 228  */
 229 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 230 {
 231         int i;
 232         int cword_offset;
 233         int cp_offset;
 234 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 235         u32 cmd_le = cpu_to_le32(cmd);
 236 #endif
 237         uchar val;
 238         uchar *cp = (uchar *) cmdbuf;
 239
 240         for (i = info->portwidth; i > 0; i--) {
 241                 cword_offset = (info->portwidth - i) % info->chipwidth;
 242 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 243                 cp_offset = info->portwidth - i;
 244                 val = *((uchar *)&cmd_le + cword_offset);
 245 #else
 246                 cp_offset = i - 1;
 247                 val = *((uchar *)&cmd + sizeof(u32) - cword_offset - 1);
 248 #endif
 249                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 250         }
 251 }
 252
 253 #ifdef DEBUG
 254 /*-----------------------------------------------------------------------
 255  * Debug support
 256  */
 257 static void print_longlong(char *str, unsigned long long data)
 258 {
 259         int i;
 260         char *cp;
 261
 262         cp = (char *)&data;
 263         for (i = 0; i < 8; i++)
 264                 sprintf(&str[i * 2], "%2.2x", *cp++);
 265 }
 266
 267 static void flash_printqry(struct cfi_qry *qry)
 268 {
 269         u8 *p = (u8 *)qry;
 270         int x, y;
 271
 272         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 273                 debug("%02x : ", x);
 274                 for (y = 0; y < 16; y++)
 275                         debug("%2.2x ", p[x + y]);
 276                 debug(" ");
 277                 for (y = 0; y < 16; y++) {
 278                         unsigned char c = p[x + y];
 279
 280                         if (c >= 0x20 && c <= 0x7e)
 281                                 debug("%c", c);
 282                         else
 283                                 debug(".");
 284                 }
 285                 debug("\n");
 286         }
 287 }
 288 #endif
 289
 290 /*-----------------------------------------------------------------------
 291  * read a character at a port width address
 292  */
 293 static inline uchar flash_read_uchar(flash_info_t *info, uint offset)
 294 {
 295         uchar *cp;
 296         uchar retval;
 297
 298         cp = flash_map(info, 0, offset);
 299 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 300         retval = flash_read8(cp);
 301 #else
 302         retval = flash_read8(cp + info->portwidth - 1);
 303 #endif
 304         flash_unmap(info, 0, offset, cp);
 305         return retval;
 306 }
 307
 308 /*-----------------------------------------------------------------------
 309  * read a word at a port width address, assume 16bit bus
 310  */
 311 static inline ushort flash_read_word(flash_info_t *info, uint offset)
 312 {
 313         ushort *addr, retval;
 314
 315         addr = flash_map(info, 0, offset);
 316         retval = flash_read16(addr);
 317         flash_unmap(info, 0, offset, addr);
 318         return retval;
 319 }
 320
 321 /*-----------------------------------------------------------------------
 322  * read a long word by picking the least significant byte of each maximum
 323  * port size word. Swap for ppc format.
 324  */
 325 static ulong flash_read_long (flash_info_t *info, flash_sect_t sect,
 326                               uint offset)
 327 {
 328         uchar *addr;
 329         ulong retval;
 330
 331 #ifdef DEBUG
 332         int x;
 333 #endif
 334         addr = flash_map(info, sect, offset);
 335
 336 #ifdef DEBUG
 337         debug("long addr is at %p info->portwidth = %d\n", addr,
 338               info->portwidth);
 339         for (x = 0; x < 4 * info->portwidth; x++)
 340                 debug("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 341 #endif
 342 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 343         retval = ((flash_read8(addr) << 16) |
 344                   (flash_read8(addr + info->portwidth) << 24) |
 345                   (flash_read8(addr + 2 * info->portwidth)) |
 346                   (flash_read8(addr + 3 * info->portwidth) << 8));
 347 #else
 348         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 349                   (flash_read8(addr + info->portwidth - 1) << 16) |
 350                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 351                   (flash_read8(addr + 3 * info->portwidth - 1)));
 352 #endif
 353         flash_unmap(info, sect, offset, addr);
 354
 355         return retval;
 356 }
 357
 358 /*
 359  * Write a proper sized command to the correct address
 360  */
 361 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 362                             uint offset, u32 cmd)
 363 {
 364         void *addr;
 365         cfiword_t cword;
 366
 367         addr = flash_map(info, sect, offset);
 368         flash_make_cmd(info, cmd, &cword);
 369         switch (info->portwidth) {
 370         case FLASH_CFI_8BIT:
 371                 debug("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 372                       cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 373                 flash_write8(cword.w8, addr);
 374                 break;
 375         case FLASH_CFI_16BIT:
 376                 debug("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 377                       cmd, cword.w16,
 378                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 379                 flash_write16(cword.w16, addr);
 380                 break;
 381         case FLASH_CFI_32BIT:
 382                 debug("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
 383                       cmd, cword.w32,
 384                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 385                 flash_write32(cword.w32, addr);
 386                 break;
 387         case FLASH_CFI_64BIT:
 388 #ifdef DEBUG
 389                 {
 390                         char str[20];
 391
 392                         print_longlong(str, cword.w64);
 393
 394                         debug("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 395                               addr, cmd, str,
 396                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 397                 }
 398 #endif
 399                 flash_write64(cword.w64, addr);
 400                 break;
 401         }
 402
 403         /* Ensure all the instructions are fully finished */
 404         sync();
 405
 406         flash_unmap(info, sect, offset, addr);
 407 }
 408
 409 static void flash_unlock_seq(flash_info_t *info, flash_sect_t sect)
 410 {
 411         flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 412         flash_write_cmd(info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 413 }
 414
 415 /*-----------------------------------------------------------------------
 416  */
 417 static int flash_isequal(flash_info_t *info, flash_sect_t sect, uint offset,
 418                          uchar cmd)
 419 {
 420         void *addr;
 421         cfiword_t cword;
 422         int retval;
 423
 424         addr = flash_map(info, sect, offset);
 425         flash_make_cmd(info, cmd, &cword);
 426
 427         debug("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 428         switch (info->portwidth) {
 429         case FLASH_CFI_8BIT:
 430                 debug("is= %x %x\n", flash_read8(addr), cword.w8);
 431                 retval = (flash_read8(addr) == cword.w8);
 432                 break;
 433         case FLASH_CFI_16BIT:
 434                 debug("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
 435                 retval = (flash_read16(addr) == cword.w16);
 436                 break;
 437         case FLASH_CFI_32BIT:
 438                 debug("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
 439                 retval = (flash_read32(addr) == cword.w32);
 440                 break;
 441         case FLASH_CFI_64BIT:
 442 #ifdef DEBUG
 443                 {
 444                         char str1[20];
 445                         char str2[20];
 446
 447                         print_longlong(str1, flash_read64(addr));
 448                         print_longlong(str2, cword.w64);
 449                         debug("is= %s %s\n", str1, str2);
 450                 }
 451 #endif
 452                 retval = (flash_read64(addr) == cword.w64);
 453                 break;
 454         default:
 455                 retval = 0;
 456                 break;
 457         }
 458         flash_unmap(info, sect, offset, addr);
 459
 460         return retval;
 461 }
 462
 463 /*-----------------------------------------------------------------------
 464  */
 465 static int flash_isset(flash_info_t *info, flash_sect_t sect, uint offset,
 466                        uchar cmd)
 467 {
 468         void *addr;
 469         cfiword_t cword;
 470         int retval;
 471
 472         addr = flash_map(info, sect, offset);
 473         flash_make_cmd(info, cmd, &cword);
 474         switch (info->portwidth) {
 475         case FLASH_CFI_8BIT:
 476                 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
 477                 break;
 478         case FLASH_CFI_16BIT:
 479                 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
 480                 break;
 481         case FLASH_CFI_32BIT:
 482                 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
 483                 break;
 484         case FLASH_CFI_64BIT:
 485                 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
 486                 break;
 487         default:
 488                 retval = 0;
 489                 break;
 490         }
 491         flash_unmap(info, sect, offset, addr);
 492
 493         return retval;
 494 }
 495
 496 /*-----------------------------------------------------------------------
 497  */
 498 static int flash_toggle(flash_info_t *info, flash_sect_t sect, uint offset,
 499                         uchar cmd)
 500 {
 501         u8 *addr;
 502         cfiword_t cword;
 503         int retval;
 504
 505         addr = flash_map(info, sect, offset);
 506         flash_make_cmd(info, cmd, &cword);
 507         switch (info->portwidth) {
 508         case FLASH_CFI_8BIT:
 509                 retval = flash_read8(addr) != flash_read8(addr);
 510                 break;
 511         case FLASH_CFI_16BIT:
 512                 retval = flash_read16(addr) != flash_read16(addr);
 513                 break;
 514         case FLASH_CFI_32BIT:
 515                 retval = flash_read32(addr) != flash_read32(addr);
 516                 break;
 517         case FLASH_CFI_64BIT:
 518                 retval = ((flash_read32(addr) != flash_read32(addr)) ||
 519                            (flash_read32(addr + 4) != flash_read32(addr + 4)));
 520                 break;
 521         default:
 522                 retval = 0;
 523                 break;
 524         }
 525         flash_unmap(info, sect, offset, addr);
 526
 527         return retval;
 528 }
 529
 530 /*
 531  * flash_is_busy - check to see if the flash is busy
 532  *
 533  * This routine checks the status of the chip and returns true if the
 534  * chip is busy.
 535  */
 536 static int flash_is_busy(flash_info_t *info, flash_sect_t sect)
 537 {
 538         int retval;
 539
 540         switch (info->vendor) {
 541         case CFI_CMDSET_INTEL_PROG_REGIONS:
 542         case CFI_CMDSET_INTEL_STANDARD:
 543         case CFI_CMDSET_INTEL_EXTENDED:
 544                 retval = !flash_isset(info, sect, 0, FLASH_STATUS_DONE);
 545                 break;
 546         case CFI_CMDSET_AMD_STANDARD:
 547         case CFI_CMDSET_AMD_EXTENDED:
 548 #ifdef CONFIG_FLASH_CFI_LEGACY
 549         case CFI_CMDSET_AMD_LEGACY:
 550 #endif
 551                 if (info->sr_supported) {
 552                         flash_write_cmd(info, sect, info->addr_unlock1,
 553                                         FLASH_CMD_READ_STATUS);
 554                         retval = !flash_isset(info, sect, 0,
 555                                               FLASH_STATUS_DONE);
 556                 } else {
 557                         retval = flash_toggle(info, sect, 0,
 558                                               AMD_STATUS_TOGGLE);
 559                 }
 560
 561                 break;
 562         default:
 563                 retval = 0;
 564         }
 565         debug("%s: %d\n", __func__, retval);
 566         return retval;
 567 }
 568
 569 /*-----------------------------------------------------------------------
 570  *  wait for XSR.7 to be set. Time out with an error if it does not.
 571  *  This routine does not set the flash to read-array mode.
 572  */
 573 static int flash_status_check(flash_info_t *info, flash_sect_t sector,
 574                               ulong tout, char *prompt)
 575 {
 576         ulong start;
 577
 578 #if CONFIG_SYS_HZ != 1000
 579         /* Avoid overflow for large HZ */
 580         if ((ulong)CONFIG_SYS_HZ > 100000)
 581                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 582         else
 583                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 584 #endif
 585
 586         /* Wait for command completion */
 587 #ifdef CONFIG_SYS_LOW_RES_TIMER
 588         reset_timer();
 589 #endif
 590         start = get_timer(0);
 591         WATCHDOG_RESET();
 592         while (flash_is_busy(info, sector)) {
 593                 if (get_timer(start) > tout) {
 594                         printf("Flash %s timeout at address %lx data %lx\n",
 595                                prompt, info->start[sector],
 596                                flash_read_long(info, sector, 0));
 597                         flash_write_cmd(info, sector, 0, info->cmd_reset);
 598                         udelay(1);
 599                         return ERR_TIMEOUT;
 600                 }
 601                 udelay(1);              /* also triggers watchdog */
 602         }
 603         return ERR_OK;
 604 }
 605
 606 /*-----------------------------------------------------------------------
 607  * Wait for XSR.7 to be set, if it times out print an error, otherwise
 608  * do a full status check.
 609  *
 610  * This routine sets the flash to read-array mode.
 611  */
 612 static int flash_full_status_check(flash_info_t *info, flash_sect_t sector,
 613                                    ulong tout, char *prompt)
 614 {
 615         int retcode;
 616
 617         retcode = flash_status_check(info, sector, tout, prompt);
 618         switch (info->vendor) {
 619         case CFI_CMDSET_INTEL_PROG_REGIONS:
 620         case CFI_CMDSET_INTEL_EXTENDED:
 621         case CFI_CMDSET_INTEL_STANDARD:
 622                 if (retcode == ERR_OK &&
 623                     !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 624                         retcode = ERR_INVAL;
 625                         printf("Flash %s error at address %lx\n", prompt,
 626                                info->start[sector]);
 627                         if (flash_isset(info, sector, 0, FLASH_STATUS_ECLBS |
 628                                          FLASH_STATUS_PSLBS)) {
 629                                 puts("Command Sequence Error.\n");
 630                         } else if (flash_isset(info, sector, 0,
 631                                                 FLASH_STATUS_ECLBS)) {
 632                                 puts("Block Erase Error.\n");
 633                                 retcode = ERR_NOT_ERASED;
 634                         } else if (flash_isset(info, sector, 0,
 635                                                 FLASH_STATUS_PSLBS)) {
 636                                 puts("Locking Error\n");
 637                         }
 638                         if (flash_isset(info, sector, 0, FLASH_STATUS_DPS)) {
 639                                 puts("Block locked.\n");
 640                                 retcode = ERR_PROTECTED;
 641                         }
 642                         if (flash_isset(info, sector, 0, FLASH_STATUS_VPENS))
 643                                 puts("Vpp Low Error.\n");
 644                 }
 645                 flash_write_cmd(info, sector, 0, info->cmd_reset);
 646                 udelay(1);
 647                 break;
 648         default:
 649                 break;
 650         }
 651         return retcode;
 652 }
 653
 654 static int use_flash_status_poll(flash_info_t *info)
 655 {
 656 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 657         if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
 658             info->vendor == CFI_CMDSET_AMD_STANDARD)
 659                 return 1;
 660 #endif
 661         return 0;
 662 }
 663
 664 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 665                              ulong tout, char *prompt)
 666 {
 667 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 668         ulong start;
 669         int ready;
 670
 671 #if CONFIG_SYS_HZ != 1000
 672         /* Avoid overflow for large HZ */
 673         if ((ulong)CONFIG_SYS_HZ > 100000)
 674                 tout *= (ulong)CONFIG_SYS_HZ / 1000;
 675         else
 676                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 677 #endif
 678
 679         /* Wait for command completion */
 680 #ifdef CONFIG_SYS_LOW_RES_TIMER
 681         reset_timer();
 682 #endif
 683         start = get_timer(0);
 684         WATCHDOG_RESET();
 685         while (1) {
 686                 switch (info->portwidth) {
 687                 case FLASH_CFI_8BIT:
 688                         ready = flash_read8(dst) == flash_read8(src);
 689                         break;
 690                 case FLASH_CFI_16BIT:
 691                         ready = flash_read16(dst) == flash_read16(src);
 692                         break;
 693                 case FLASH_CFI_32BIT:
 694                         ready = flash_read32(dst) == flash_read32(src);
 695                         break;
 696                 case FLASH_CFI_64BIT:
 697                         ready = flash_read64(dst) == flash_read64(src);
 698                         break;
 699                 default:
 700                         ready = 0;
 701                         break;
 702                 }
 703                 if (ready)
 704                         break;
 705                 if (get_timer(start) > tout) {
 706                         printf("Flash %s timeout at address %lx data %lx\n",
 707                                prompt, (ulong)dst, (ulong)flash_read8(dst));
 708                         return ERR_TIMEOUT;
 709                 }
 710                 udelay(1);              /* also triggers watchdog */
 711         }
 712 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
 713         return ERR_OK;
 714 }
 715
 716 /*-----------------------------------------------------------------------
 717  */
 718 static void flash_add_byte(flash_info_t *info, cfiword_t *cword, uchar c)
 719 {
 720 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 721         unsigned short  w;
 722         unsigned int    l;
 723         unsigned long long ll;
 724 #endif
 725
 726         switch (info->portwidth) {
 727         case FLASH_CFI_8BIT:
 728                 cword->w8 = c;
 729                 break;
 730         case FLASH_CFI_16BIT:
 731 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 732                 w = c;
 733                 w <<= 8;
 734                 cword->w16 = (cword->w16 >> 8) | w;
 735 #else
 736                 cword->w16 = (cword->w16 << 8) | c;
 737 #endif
 738                 break;
 739         case FLASH_CFI_32BIT:
 740 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 741                 l = c;
 742                 l <<= 24;
 743                 cword->w32 = (cword->w32 >> 8) | l;
 744 #else
 745                 cword->w32 = (cword->w32 << 8) | c;
 746 #endif
 747                 break;
 748         case FLASH_CFI_64BIT:
 749 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 750                 ll = c;
 751                 ll <<= 56;
 752                 cword->w64 = (cword->w64 >> 8) | ll;
 753 #else
 754                 cword->w64 = (cword->w64 << 8) | c;
 755 #endif
 756                 break;
 757         }
 758 }
 759
 760 /*
 761  * Loop through the sector table starting from the previously found sector.
 762  * Searches forwards or backwards, dependent on the passed address.
 763  */
 764 static flash_sect_t find_sector(flash_info_t *info, ulong addr)
 765 {
 766         static flash_sect_t saved_sector; /* previously found sector */
 767         static flash_info_t *saved_info; /* previously used flash bank */
 768         flash_sect_t sector = saved_sector;
 769
 770         if (info != saved_info || sector >= info->sector_count)
 771                 sector = 0;
 772
 773         while ((sector < info->sector_count - 1) &&
 774                (info->start[sector] < addr))
 775                 sector++;
 776         while ((info->start[sector] > addr) && (sector > 0))
 777                 /*
 778                  * also decrements the sector in case of an overshot
 779                  * in the first loop
 780                  */
 781                 sector--;
 782
 783         saved_sector = sector;
 784         saved_info = info;
 785         return sector;
 786 }
 787
 788 /*-----------------------------------------------------------------------
 789  */
 790 static int flash_write_cfiword(flash_info_t *info, ulong dest, cfiword_t cword)
 791 {
 792         void *dstaddr = (void *)dest;
 793         int flag;
 794         flash_sect_t sect = 0;
 795         char sect_found = 0;
 796
 797         /* Check if Flash is (sufficiently) erased */
 798         switch (info->portwidth) {
 799         case FLASH_CFI_8BIT:
 800                 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
 801                 break;
 802         case FLASH_CFI_16BIT:
 803                 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
 804                 break;
 805         case FLASH_CFI_32BIT:
 806                 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
 807                 break;
 808         case FLASH_CFI_64BIT:
 809                 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
 810                 break;
 811         default:
 812                 flag = 0;
 813                 break;
 814         }
 815         if (!flag)
 816                 return ERR_NOT_ERASED;
 817
 818         /* Disable interrupts which might cause a timeout here */
 819         flag = disable_interrupts();
 820
 821         switch (info->vendor) {
 822         case CFI_CMDSET_INTEL_PROG_REGIONS:
 823         case CFI_CMDSET_INTEL_EXTENDED:
 824         case CFI_CMDSET_INTEL_STANDARD:
 825                 flash_write_cmd(info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 826                 flash_write_cmd(info, 0, 0, FLASH_CMD_WRITE);
 827                 break;
 828         case CFI_CMDSET_AMD_EXTENDED:
 829         case CFI_CMDSET_AMD_STANDARD:
 830                 sect = find_sector(info, dest);
 831                 flash_unlock_seq(info, sect);
 832                 flash_write_cmd(info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 833                 sect_found = 1;
 834                 break;
 835 #ifdef CONFIG_FLASH_CFI_LEGACY
 836         case CFI_CMDSET_AMD_LEGACY:
 837                 sect = find_sector(info, dest);
 838                 flash_unlock_seq(info, 0);
 839                 flash_write_cmd(info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 840                 sect_found = 1;
 841                 break;
 842 #endif
 843         }
 844
 845         switch (info->portwidth) {
 846         case FLASH_CFI_8BIT:
 847                 flash_write8(cword.w8, dstaddr);
 848                 break;
 849         case FLASH_CFI_16BIT:
 850                 flash_write16(cword.w16, dstaddr);
 851                 break;
 852         case FLASH_CFI_32BIT:
 853                 flash_write32(cword.w32, dstaddr);
 854                 break;
 855         case FLASH_CFI_64BIT:
 856                 flash_write64(cword.w64, dstaddr);
 857                 break;
 858         }
 859
 860         /* re-enable interrupts if necessary */
 861         if (flag)
 862                 enable_interrupts();
 863
 864         if (!sect_found)
 865                 sect = find_sector(info, dest);
 866
 867         if (use_flash_status_poll(info))
 868                 return flash_status_poll(info, &cword, dstaddr,
 869                                          info->write_tout, "write");
 870         else
 871                 return flash_full_status_check(info, sect,
 872                                                info->write_tout, "write");
 873 }
 874
 875 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 876
 877 static int flash_write_cfibuffer(flash_info_t *info, ulong dest, uchar *cp,
 878                                  int len)
 879 {
 880         flash_sect_t sector;
 881         int cnt;
 882         int retcode;
 883         u8 *src = cp;
 884         u8 *dst = (u8 *)dest;
 885         u8 *dst2 = dst;
 886         int flag = 1;
 887         uint offset = 0;
 888         unsigned int shift;
 889         uchar write_cmd;
 890
 891         switch (info->portwidth) {
 892         case FLASH_CFI_8BIT:
 893                 shift = 0;
 894                 break;
 895         case FLASH_CFI_16BIT:
 896                 shift = 1;
 897                 break;
 898         case FLASH_CFI_32BIT:
 899                 shift = 2;
 900                 break;
 901         case FLASH_CFI_64BIT:
 902                 shift = 3;
 903                 break;
 904         default:
 905                 retcode = ERR_INVAL;
 906                 goto out_unmap;
 907         }
 908
 909         cnt = len >> shift;
 910
 911         while ((cnt-- > 0) && (flag == 1)) {
 912                 switch (info->portwidth) {
 913                 case FLASH_CFI_8BIT:
 914                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
 915                                 flash_read8(src));
 916                         src += 1, dst2 += 1;
 917                         break;
 918                 case FLASH_CFI_16BIT:
 919                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
 920                                 flash_read16(src));
 921                         src += 2, dst2 += 2;
 922                         break;
 923                 case FLASH_CFI_32BIT:
 924                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
 925                                 flash_read32(src));
 926                         src += 4, dst2 += 4;
 927                         break;
 928                 case FLASH_CFI_64BIT:
 929                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
 930                                 flash_read64(src));
 931                         src += 8, dst2 += 8;
 932                         break;
 933                 }
 934         }
 935         if (!flag) {
 936                 retcode = ERR_NOT_ERASED;
 937                 goto out_unmap;
 938         }
 939
 940         src = cp;
 941         sector = find_sector(info, dest);
 942
 943         switch (info->vendor) {
 944         case CFI_CMDSET_INTEL_PROG_REGIONS:
 945         case CFI_CMDSET_INTEL_STANDARD:
 946         case CFI_CMDSET_INTEL_EXTENDED:
 947                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 948                             FLASH_CMD_WRITE_BUFFER_PROG :
 949                             FLASH_CMD_WRITE_TO_BUFFER;
 950                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 951                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
 952                 flash_write_cmd(info, sector, 0, write_cmd);
 953                 retcode = flash_status_check(info, sector,
 954                                              info->buffer_write_tout,
 955                                              "write to buffer");
 956                 if (retcode == ERR_OK) {
 957                         /* reduce the number of loops by the width of
 958                          * the port
 959                          */
 960                         cnt = len >> shift;
 961                         flash_write_cmd(info, sector, 0, cnt - 1);
 962                         while (cnt-- > 0) {
 963                                 switch (info->portwidth) {
 964                                 case FLASH_CFI_8BIT:
 965                                         flash_write8(flash_read8(src), dst);
 966                                         src += 1, dst += 1;
 967                                         break;
 968                                 case FLASH_CFI_16BIT:
 969                                         flash_write16(flash_read16(src), dst);
 970                                         src += 2, dst += 2;
 971                                         break;
 972                                 case FLASH_CFI_32BIT:
 973                                         flash_write32(flash_read32(src), dst);
 974                                         src += 4, dst += 4;
 975                                         break;
 976                                 case FLASH_CFI_64BIT:
 977                                         flash_write64(flash_read64(src), dst);
 978                                         src += 8, dst += 8;
 979                                         break;
 980                                 default:
 981                                         retcode = ERR_INVAL;
 982                                         goto out_unmap;
 983                                 }
 984                         }
 985                         flash_write_cmd(info, sector, 0,
 986                                         FLASH_CMD_WRITE_BUFFER_CONFIRM);
 987                         retcode = flash_full_status_check(
 988                                 info, sector, info->buffer_write_tout,
 989                                 "buffer write");
 990                 }
 991
 992                 break;
 993
 994         case CFI_CMDSET_AMD_STANDARD:
 995         case CFI_CMDSET_AMD_EXTENDED:
 996                 flash_unlock_seq(info, sector);
 997
 998 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
 999                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
1000 #endif
1001                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
1002                 cnt = len >> shift;
1003                 flash_write_cmd(info, sector, offset, cnt - 1);
1004
1005                 switch (info->portwidth) {
1006                 case FLASH_CFI_8BIT:
1007                         while (cnt-- > 0) {
1008                                 flash_write8(flash_read8(src), dst);
1009                                 src += 1, dst += 1;
1010                         }
1011                         break;
1012                 case FLASH_CFI_16BIT:
1013                         while (cnt-- > 0) {
1014                                 flash_write16(flash_read16(src), dst);
1015                                 src += 2, dst += 2;
1016                         }
1017                         break;
1018                 case FLASH_CFI_32BIT:
1019                         while (cnt-- > 0) {
1020                                 flash_write32(flash_read32(src), dst);
1021                                 src += 4, dst += 4;
1022                         }
1023                         break;
1024                 case FLASH_CFI_64BIT:
1025                         while (cnt-- > 0) {
1026                                 flash_write64(flash_read64(src), dst);
1027                                 src += 8, dst += 8;
1028                         }
1029                         break;
1030                 default:
1031                         retcode = ERR_INVAL;
1032                         goto out_unmap;
1033                 }
1034
1035                 flash_write_cmd(info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1036                 if (use_flash_status_poll(info))
1037                         retcode = flash_status_poll(info, src - (1 << shift),
1038                                                     dst - (1 << shift),
1039                                                     info->buffer_write_tout,
1040                                                     "buffer write");
1041                 else
1042                         retcode = flash_full_status_check(info, sector,
1043                                                           info->buffer_write_tout,
1044                                                           "buffer write");
1045                 break;
1046
1047         default:
1048                 debug("Unknown Command Set\n");
1049                 retcode = ERR_INVAL;
1050                 break;
1051         }
1052
1053 out_unmap:
1054         return retcode;
1055 }
1056 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1057
1058 /*-----------------------------------------------------------------------
1059  */
1060 int flash_erase(flash_info_t *info, int s_first, int s_last)
1061 {
1062         int rcode = 0;
1063         int prot;
1064         flash_sect_t sect;
1065         int st;
1066
1067         if (info->flash_id != FLASH_MAN_CFI) {
1068                 puts("Can't erase unknown flash type - aborted\n");
1069                 return 1;
1070         }
1071         if (s_first < 0 || s_first > s_last) {
1072                 puts("- no sectors to erase\n");
1073                 return 1;
1074         }
1075
1076         prot = 0;
1077         for (sect = s_first; sect <= s_last; ++sect)
1078                 if (info->protect[sect])
1079                         prot++;
1080         if (prot) {
1081                 printf("- Warning: %d protected sectors will not be erased!\n",
1082                        prot);
1083         } else if (flash_verbose) {
1084                 putc('\n');
1085         }
1086
1087         for (sect = s_first; sect <= s_last; sect++) {
1088                 if (ctrlc()) {
1089                         printf("\n");
1090                         return 1;
1091                 }
1092
1093                 if (info->protect[sect] == 0) { /* not protected */
1094 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1095                         int k;
1096                         int size;
1097                         int erased;
1098                         u32 *flash;
1099
1100                         /*
1101                          * Check if whole sector is erased
1102                          */
1103                         size = flash_sector_size(info, sect);
1104                         erased = 1;
1105                         flash = (u32 *)info->start[sect];
1106                         /* divide by 4 for longword access */
1107                         size = size >> 2;
1108                         for (k = 0; k < size; k++) {
1109                                 if (flash_read32(flash++) != 0xffffffff) {
1110                                         erased = 0;
1111                                         break;
1112                                 }
1113                         }
1114                         if (erased) {
1115                                 if (flash_verbose)
1116                                         putc(',');
1117                                 continue;
1118                         }
1119 #endif
1120                         switch (info->vendor) {
1121                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1122                         case CFI_CMDSET_INTEL_STANDARD:
1123                         case CFI_CMDSET_INTEL_EXTENDED:
1124                                 flash_write_cmd(info, sect, 0,
1125                                                 FLASH_CMD_CLEAR_STATUS);
1126                                 flash_write_cmd(info, sect, 0,
1127                                                 FLASH_CMD_BLOCK_ERASE);
1128                                 flash_write_cmd(info, sect, 0,
1129                                                 FLASH_CMD_ERASE_CONFIRM);
1130                                 break;
1131                         case CFI_CMDSET_AMD_STANDARD:
1132                         case CFI_CMDSET_AMD_EXTENDED:
1133                                 flash_unlock_seq(info, sect);
1134                                 flash_write_cmd(info, sect,
1135                                                 info->addr_unlock1,
1136                                                 AMD_CMD_ERASE_START);
1137                                 flash_unlock_seq(info, sect);
1138                                 flash_write_cmd(info, sect, 0,
1139                                                 info->cmd_erase_sector);
1140                                 break;
1141 #ifdef CONFIG_FLASH_CFI_LEGACY
1142                         case CFI_CMDSET_AMD_LEGACY:
1143                                 flash_unlock_seq(info, 0);
1144                                 flash_write_cmd(info, 0, info->addr_unlock1,
1145                                                 AMD_CMD_ERASE_START);
1146                                 flash_unlock_seq(info, 0);
1147                                 flash_write_cmd(info, sect, 0,
1148                                                 AMD_CMD_ERASE_SECTOR);
1149                                 break;
1150 #endif
1151                         default:
1152                                 debug("Unknown flash vendor %d\n",
1153                                       info->vendor);
1154                                 break;
1155                         }
1156
1157                         if (use_flash_status_poll(info)) {
1158                                 cfiword_t cword;
1159                                 void *dest;
1160
1161                                 cword.w64 = 0xffffffffffffffffULL;
1162                                 dest = flash_map(info, sect, 0);
1163                                 st = flash_status_poll(info, &cword, dest,
1164                                                        info->erase_blk_tout,
1165                                                        "erase");
1166                                 flash_unmap(info, sect, 0, dest);
1167                         } else {
1168                                 st = flash_full_status_check(info, sect,
1169                                                              info->erase_blk_tout,
1170                                                              "erase");
1171                         }
1172
1173                         if (st)
1174                                 rcode = 1;
1175                         else if (flash_verbose)
1176                                 putc('.');
1177                 }
1178         }
1179
1180         if (flash_verbose)
1181                 puts(" done\n");
1182
1183         return rcode;
1184 }
1185
1186 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1187 static int sector_erased(flash_info_t *info, int i)
1188 {
1189         int k;
1190         int size;
1191         u32 *flash;
1192
1193         /*
1194          * Check if whole sector is erased
1195          */
1196         size = flash_sector_size(info, i);
1197         flash = (u32 *)info->start[i];
1198         /* divide by 4 for longword access */
1199         size = size >> 2;
1200
1201         for (k = 0; k < size; k++) {
1202                 if (flash_read32(flash++) != 0xffffffff)
1203                         return 0;       /* not erased */
1204         }
1205
1206         return 1;                       /* erased */
1207 }
1208 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1209
1210 void flash_print_info(flash_info_t *info)
1211 {
1212         int i;
1213
1214         if (info->flash_id != FLASH_MAN_CFI) {
1215                 puts("missing or unknown FLASH type\n");
1216                 return;
1217         }
1218
1219         printf("%s flash (%d x %d)",
1220                info->name,
1221                (info->portwidth << 3), (info->chipwidth << 3));
1222         if (info->size < 1024 * 1024)
1223                 printf("  Size: %ld kB in %d Sectors\n",
1224                        info->size >> 10, info->sector_count);
1225         else
1226                 printf("  Size: %ld MB in %d Sectors\n",
1227                        info->size >> 20, info->sector_count);
1228         printf("  ");
1229         switch (info->vendor) {
1230         case CFI_CMDSET_INTEL_PROG_REGIONS:
1231                 printf("Intel Prog Regions");
1232                 break;
1233         case CFI_CMDSET_INTEL_STANDARD:
1234                 printf("Intel Standard");
1235                 break;
1236         case CFI_CMDSET_INTEL_EXTENDED:
1237                 printf("Intel Extended");
1238                 break;
1239         case CFI_CMDSET_AMD_STANDARD:
1240                 printf("AMD Standard");
1241                 break;
1242         case CFI_CMDSET_AMD_EXTENDED:
1243                 printf("AMD Extended");
1244                 break;
1245 #ifdef CONFIG_FLASH_CFI_LEGACY
1246         case CFI_CMDSET_AMD_LEGACY:
1247                 printf("AMD Legacy");
1248                 break;
1249 #endif
1250         default:
1251                 printf("Unknown (%d)", info->vendor);
1252                 break;
1253         }
1254         printf(" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1255                info->manufacturer_id);
1256         printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1257                info->device_id);
1258         if ((info->device_id & 0xff) == 0x7E) {
1259                 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1260                        info->device_id2);
1261         }
1262         if (info->vendor == CFI_CMDSET_AMD_STANDARD && info->legacy_unlock)
1263                 printf("\n  Advanced Sector Protection (PPB) enabled");
1264         printf("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1265                info->erase_blk_tout, info->write_tout);
1266         if (info->buffer_size > 1) {
1267                 printf("  Buffer write timeout: %ld ms, ",
1268                        info->buffer_write_tout);
1269                 printf("buffer size: %d bytes\n", info->buffer_size);
1270         }
1271
1272         puts("\n  Sector Start Addresses:");
1273         for (i = 0; i < info->sector_count; ++i) {
1274                 if (ctrlc())
1275                         break;
1276                 if ((i % 5) == 0)
1277                         putc('\n');
1278 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1279                 /* print empty and read-only info */
1280                 printf("  %08lX %c %s ",
1281                        info->start[i],
1282                        sector_erased(info, i) ? 'E' : ' ',
1283                        info->protect[i] ? "RO" : "  ");
1284 #else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1285                 printf("  %08lX   %s ",
1286                        info->start[i],
1287                        info->protect[i] ? "RO" : "  ");
1288 #endif
1289         }
1290         putc('\n');
1291 }
1292
1293 /*-----------------------------------------------------------------------
1294  * This is used in a few places in write_buf() to show programming
1295  * progress.  Making it a function is nasty because it needs to do side
1296  * effect updates to digit and dots.  Repeated code is nasty too, so
1297  * we define it once here.
1298  */
1299 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1300 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1301         if (flash_verbose) { \
1302                 dots -= dots_sub; \
1303                 if (scale > 0 && dots <= 0) { \
1304                         if ((digit % 5) == 0) \
1305                                 printf("%d", digit / 5); \
1306                         else \
1307                                 putc('.'); \
1308                         digit--; \
1309                         dots += scale; \
1310                 } \
1311         }
1312 #else
1313 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1314 #endif
1315
1316 /*-----------------------------------------------------------------------
1317  * Copy memory to flash, returns:
1318  * 0 - OK
1319  * 1 - write timeout
1320  * 2 - Flash not erased
1321  */
1322 int write_buff(flash_info_t *info, uchar *src, ulong addr, ulong cnt)
1323 {
1324         ulong wp;
1325         uchar *p;
1326         int aln;
1327         cfiword_t cword;
1328         int i, rc;
1329 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1330         int buffered_size;
1331 #endif
1332 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1333         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1334         int scale = 0;
1335         int dots  = 0;
1336
1337         /*
1338          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1339          */
1340         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1341                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1342                         CONFIG_FLASH_SHOW_PROGRESS);
1343         }
1344 #endif
1345
1346         /* get lower aligned address */
1347         wp = (addr & ~(info->portwidth - 1));
1348
1349         /* handle unaligned start */
1350         aln = addr - wp;
1351         if (aln != 0) {
1352                 cword.w32 = 0;
1353                 p = (uchar *)wp;
1354                 for (i = 0; i < aln; ++i)
1355                         flash_add_byte(info, &cword, flash_read8(p + i));
1356
1357                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1358                         flash_add_byte(info, &cword, *src++);
1359                         cnt--;
1360                 }
1361                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1362                         flash_add_byte(info, &cword, flash_read8(p + i));
1363
1364                 rc = flash_write_cfiword(info, wp, cword);
1365                 if (rc != 0)
1366                         return rc;
1367
1368                 wp += i;
1369                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1370         }
1371
1372         /* handle the aligned part */
1373 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1374         buffered_size = (info->portwidth / info->chipwidth);
1375         buffered_size *= info->buffer_size;
1376         while (cnt >= info->portwidth) {
1377                 /* prohibit buffer write when buffer_size is 1 */
1378                 if (info->buffer_size == 1) {
1379                         cword.w32 = 0;
1380                         for (i = 0; i < info->portwidth; i++)
1381                                 flash_add_byte(info, &cword, *src++);
1382                         rc = flash_write_cfiword(info, wp, cword);
1383                         if (rc != 0)
1384                                 return rc;
1385                         wp += info->portwidth;
1386                         cnt -= info->portwidth;
1387                         continue;
1388                 }
1389
1390                 /* write buffer until next buffered_size aligned boundary */
1391                 i = buffered_size - (wp % buffered_size);
1392                 if (i > cnt)
1393                         i = cnt;
1394                 rc = flash_write_cfibuffer(info, wp, src, i);
1395                 if (rc != ERR_OK)
1396                         return rc;
1397                 i -= i & (info->portwidth - 1);
1398                 wp += i;
1399                 src += i;
1400                 cnt -= i;
1401                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1402                 /* Only check every once in a while */
1403                 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1404                         return ERR_ABORTED;
1405         }
1406 #else
1407         while (cnt >= info->portwidth) {
1408                 cword.w32 = 0;
1409                 for (i = 0; i < info->portwidth; i++)
1410                         flash_add_byte(info, &cword, *src++);
1411                 rc = flash_write_cfiword(info, wp, cword);
1412                 if (rc != 0)
1413                         return rc;
1414                 wp += info->portwidth;
1415                 cnt -= info->portwidth;
1416                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1417                 /* Only check every once in a while */
1418                 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1419                         return ERR_ABORTED;
1420         }
1421 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1422
1423         if (cnt == 0)
1424                 return (0);
1425
1426         /*
1427          * handle unaligned tail bytes
1428          */
1429         cword.w32 = 0;
1430         p = (uchar *)wp;
1431         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1432                 flash_add_byte(info, &cword, *src++);
1433                 --cnt;
1434         }
1435         for (; i < info->portwidth; ++i)
1436                 flash_add_byte(info, &cword, flash_read8(p + i));
1437
1438         return flash_write_cfiword(info, wp, cword);
1439 }
1440
1441 static inline int manufact_match(flash_info_t *info, u32 manu)
1442 {
1443         return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1444 }
1445
1446 /*-----------------------------------------------------------------------
1447  */
1448 #ifdef CONFIG_SYS_FLASH_PROTECTION
1449
1450 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1451 {
1452         if (manufact_match(info, INTEL_MANUFACT) &&
1453             info->device_id == NUMONYX_256MBIT) {
1454                 /*
1455                  * see errata called
1456                  * "Numonyx Axcell P33/P30 Specification Update" :)
1457                  */
1458                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1459                 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1460                                    prot)) {
1461                         /*
1462                          * cmd must come before FLASH_CMD_PROTECT + 20us
1463                          * Disable interrupts which might cause a timeout here.
1464                          */
1465                         int flag = disable_interrupts();
1466                         unsigned short cmd;
1467
1468                         if (prot)
1469                                 cmd = FLASH_CMD_PROTECT_SET;
1470                         else
1471                                 cmd = FLASH_CMD_PROTECT_CLEAR;
1472
1473                         flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1474                         flash_write_cmd(info, sector, 0, cmd);
1475                         /* re-enable interrupts if necessary */
1476                         if (flag)
1477                                 enable_interrupts();
1478                 }
1479                 return 1;
1480         }
1481         return 0;
1482 }
1483
1484 int flash_real_protect(flash_info_t *info, long sector, int prot)
1485 {
1486         int retcode = 0;
1487
1488         switch (info->vendor) {
1489         case CFI_CMDSET_INTEL_PROG_REGIONS:
1490         case CFI_CMDSET_INTEL_STANDARD:
1491         case CFI_CMDSET_INTEL_EXTENDED:
1492                 if (!cfi_protect_bugfix(info, sector, prot)) {
1493                         flash_write_cmd(info, sector, 0,
1494                                         FLASH_CMD_CLEAR_STATUS);
1495                         flash_write_cmd(info, sector, 0,
1496                                         FLASH_CMD_PROTECT);
1497                         if (prot)
1498                                 flash_write_cmd(info, sector, 0,
1499                                                 FLASH_CMD_PROTECT_SET);
1500                         else
1501                                 flash_write_cmd(info, sector, 0,
1502                                                 FLASH_CMD_PROTECT_CLEAR);
1503                 }
1504                 break;
1505         case CFI_CMDSET_AMD_EXTENDED:
1506         case CFI_CMDSET_AMD_STANDARD:
1507                 /* U-Boot only checks the first byte */
1508                 if (manufact_match(info, ATM_MANUFACT)) {
1509                         if (prot) {
1510                                 flash_unlock_seq(info, 0);
1511                                 flash_write_cmd(info, 0,
1512                                                 info->addr_unlock1,
1513                                                 ATM_CMD_SOFTLOCK_START);
1514                                 flash_unlock_seq(info, 0);
1515                                 flash_write_cmd(info, sector, 0,
1516                                                 ATM_CMD_LOCK_SECT);
1517                         } else {
1518                                 flash_write_cmd(info, 0,
1519                                                 info->addr_unlock1,
1520                                                 AMD_CMD_UNLOCK_START);
1521                                 if (info->device_id == ATM_ID_BV6416)
1522                                         flash_write_cmd(info, sector,
1523                                                         0, ATM_CMD_UNLOCK_SECT);
1524                         }
1525                 }
1526                 if (info->legacy_unlock) {
1527                         int flag = disable_interrupts();
1528                         int lock_flag;
1529
1530                         flash_unlock_seq(info, 0);
1531                         flash_write_cmd(info, 0, info->addr_unlock1,
1532                                         AMD_CMD_SET_PPB_ENTRY);
1533                         lock_flag = flash_isset(info, sector, 0, 0x01);
1534                         if (prot) {
1535                                 if (lock_flag) {
1536                                         flash_write_cmd(info, sector, 0,
1537                                                         AMD_CMD_PPB_LOCK_BC1);
1538                                         flash_write_cmd(info, sector, 0,
1539                                                         AMD_CMD_PPB_LOCK_BC2);
1540                                 }
1541                                 debug("sector %ld %slocked\n", sector,
1542                                       lock_flag ? "" : "already ");
1543                         } else {
1544                                 if (!lock_flag) {
1545                                         debug("unlock %ld\n", sector);
1546                                         flash_write_cmd(info, 0, 0,
1547                                                         AMD_CMD_PPB_UNLOCK_BC1);
1548                                         flash_write_cmd(info, 0, 0,
1549                                                         AMD_CMD_PPB_UNLOCK_BC2);
1550                                 }
1551                                 debug("sector %ld %sunlocked\n", sector,
1552                                       !lock_flag ? "" : "already ");
1553                         }
1554                         if (flag)
1555                                 enable_interrupts();
1556
1557                         if (flash_status_check(info, sector,
1558                                                info->erase_blk_tout,
1559                                                prot ? "protect" : "unprotect"))
1560                                 printf("status check error\n");
1561
1562                         flash_write_cmd(info, 0, 0,
1563                                         AMD_CMD_SET_PPB_EXIT_BC1);
1564                         flash_write_cmd(info, 0, 0,
1565                                         AMD_CMD_SET_PPB_EXIT_BC2);
1566                 }
1567                 break;
1568 #ifdef CONFIG_FLASH_CFI_LEGACY
1569         case CFI_CMDSET_AMD_LEGACY:
1570                 flash_write_cmd(info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1571                 flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1572                 if (prot)
1573                         flash_write_cmd(info, sector, 0,
1574                                         FLASH_CMD_PROTECT_SET);
1575                 else
1576                         flash_write_cmd(info, sector, 0,
1577                                         FLASH_CMD_PROTECT_CLEAR);
1578 #endif
1579         };
1580
1581         /*
1582          * Flash needs to be in status register read mode for
1583          * flash_full_status_check() to work correctly
1584          */
1585         flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1586         retcode = flash_full_status_check(info, sector, info->erase_blk_tout,
1587                                           prot ? "protect" : "unprotect");
1588         if (retcode == 0) {
1589                 info->protect[sector] = prot;
1590
1591                 /*
1592                  * On some of Intel's flash chips (marked via legacy_unlock)
1593                  * unprotect unprotects all locking.
1594                  */
1595                 if (prot == 0 && info->legacy_unlock) {
1596                         flash_sect_t i;
1597
1598                         for (i = 0; i < info->sector_count; i++) {
1599                                 if (info->protect[i])
1600                                         flash_real_protect(info, i, 1);
1601                         }
1602                 }
1603         }
1604         return retcode;
1605 }
1606
1607 /*-----------------------------------------------------------------------
1608  * flash_read_user_serial - read the OneTimeProgramming cells
1609  */
1610 void flash_read_user_serial(flash_info_t *info, void *buffer, int offset,
1611                             int len)
1612 {
1613         uchar *src;
1614         uchar *dst;
1615
1616         dst = buffer;
1617         src = flash_map(info, 0, FLASH_OFFSET_USER_PROTECTION);
1618         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1619         memcpy(dst, src + offset, len);
1620         flash_write_cmd(info, 0, 0, info->cmd_reset);
1621         udelay(1);
1622         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1623 }
1624
1625 /*
1626  * flash_read_factory_serial - read the device Id from the protection area
1627  */
1628 void flash_read_factory_serial(flash_info_t *info, void *buffer, int offset,
1629                                int len)
1630 {
1631         uchar *src;
1632
1633         src = flash_map(info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1634         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1635         memcpy(buffer, src + offset, len);
1636         flash_write_cmd(info, 0, 0, info->cmd_reset);
1637         udelay(1);
1638         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1639 }
1640
1641 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1642
1643 /*-----------------------------------------------------------------------
1644  * Reverse the order of the erase regions in the CFI QRY structure.
1645  * This is needed for chips that are either a) correctly detected as
1646  * top-boot, or b) buggy.
1647  */
1648 static void cfi_reverse_geometry(struct cfi_qry *qry)
1649 {
1650         unsigned int i, j;
1651         u32 tmp;
1652
1653         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1654                 tmp = get_unaligned(&qry->erase_region_info[i]);
1655                 put_unaligned(get_unaligned(&qry->erase_region_info[j]),
1656                               &qry->erase_region_info[i]);
1657                 put_unaligned(tmp, &qry->erase_region_info[j]);
1658         }
1659 }
1660
1661 /*-----------------------------------------------------------------------
1662  * read jedec ids from device and set corresponding fields in info struct
1663  *
1664  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1665  *
1666  */
1667 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1668 {
1669         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1670         udelay(1);
1671         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1672         udelay(1000); /* some flash are slow to respond */
1673         info->manufacturer_id = flash_read_uchar(info,
1674                                                  FLASH_OFFSET_MANUFACTURER_ID);
1675         info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1676                         flash_read_word(info, FLASH_OFFSET_DEVICE_ID) :
1677                         flash_read_uchar(info, FLASH_OFFSET_DEVICE_ID);
1678         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1679 }
1680
1681 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1682 {
1683         info->cmd_reset = FLASH_CMD_RESET;
1684
1685         cmdset_intel_read_jedec_ids(info);
1686         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1687
1688 #ifdef CONFIG_SYS_FLASH_PROTECTION
1689         /* read legacy lock/unlock bit from intel flash */
1690         if (info->ext_addr) {
1691                 info->legacy_unlock =
1692                         flash_read_uchar(info, info->ext_addr + 5) & 0x08;
1693         }
1694 #endif
1695
1696         return 0;
1697 }
1698
1699 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1700 {
1701         ushort bank_id = 0;
1702         uchar  manu_id;
1703         uchar  feature;
1704
1705         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1706         flash_unlock_seq(info, 0);
1707         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1708         udelay(1000); /* some flash are slow to respond */
1709
1710         manu_id = flash_read_uchar(info, FLASH_OFFSET_MANUFACTURER_ID);
1711         /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1712         while (manu_id == FLASH_CONTINUATION_CODE && bank_id < 0x800) {
1713                 bank_id += 0x100;
1714                 manu_id = flash_read_uchar(info,
1715                                            bank_id | FLASH_OFFSET_MANUFACTURER_ID);
1716         }
1717         info->manufacturer_id = manu_id;
1718
1719         debug("info->ext_addr = 0x%x, cfi_version = 0x%x\n",
1720               info->ext_addr, info->cfi_version);
1721         if (info->ext_addr && info->cfi_version >= 0x3134) {
1722                 /* read software feature (at 0x53) */
1723                 feature = flash_read_uchar(info, info->ext_addr + 0x13);
1724                 debug("feature = 0x%x\n", feature);
1725                 info->sr_supported = feature & 0x1;
1726         }
1727
1728         switch (info->chipwidth) {
1729         case FLASH_CFI_8BIT:
1730                 info->device_id = flash_read_uchar(info,
1731                                                    FLASH_OFFSET_DEVICE_ID);
1732                 if (info->device_id == 0x7E) {
1733                         /* AMD 3-byte (expanded) device ids */
1734                         info->device_id2 = flash_read_uchar(info,
1735                                                             FLASH_OFFSET_DEVICE_ID2);
1736                         info->device_id2 <<= 8;
1737                         info->device_id2 |= flash_read_uchar(info,
1738                                                 FLASH_OFFSET_DEVICE_ID3);
1739                 }
1740                 break;
1741         case FLASH_CFI_16BIT:
1742                 info->device_id = flash_read_word(info,
1743                                                   FLASH_OFFSET_DEVICE_ID);
1744                 if ((info->device_id & 0xff) == 0x7E) {
1745                         /* AMD 3-byte (expanded) device ids */
1746                         info->device_id2 = flash_read_uchar(info,
1747                                                             FLASH_OFFSET_DEVICE_ID2);
1748                         info->device_id2 <<= 8;
1749                         info->device_id2 |= flash_read_uchar(info,
1750                                                 FLASH_OFFSET_DEVICE_ID3);
1751                 }
1752                 break;
1753         default:
1754                 break;
1755         }
1756         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1757         udelay(1);
1758 }
1759
1760 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1761 {
1762         info->cmd_reset = AMD_CMD_RESET;
1763         info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1764
1765         cmdset_amd_read_jedec_ids(info);
1766         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1767
1768 #ifdef CONFIG_SYS_FLASH_PROTECTION
1769         if (info->ext_addr) {
1770                 /* read sector protect/unprotect scheme (at 0x49) */
1771                 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1772                         info->legacy_unlock = 1;
1773         }
1774 #endif
1775
1776         return 0;
1777 }
1778
1779 #ifdef CONFIG_FLASH_CFI_LEGACY
1780 static void flash_read_jedec_ids(flash_info_t *info)
1781 {
1782         info->manufacturer_id = 0;
1783         info->device_id       = 0;
1784         info->device_id2      = 0;
1785
1786         switch (info->vendor) {
1787         case CFI_CMDSET_INTEL_PROG_REGIONS:
1788         case CFI_CMDSET_INTEL_STANDARD:
1789         case CFI_CMDSET_INTEL_EXTENDED:
1790                 cmdset_intel_read_jedec_ids(info);
1791                 break;
1792         case CFI_CMDSET_AMD_STANDARD:
1793         case CFI_CMDSET_AMD_EXTENDED:
1794                 cmdset_amd_read_jedec_ids(info);
1795                 break;
1796         default:
1797                 break;
1798         }
1799 }
1800
1801 /*-----------------------------------------------------------------------
1802  * Call board code to request info about non-CFI flash.
1803  * board_flash_get_legacy needs to fill in at least:
1804  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1805  */
1806 static int flash_detect_legacy(phys_addr_t base, int banknum)
1807 {
1808         flash_info_t *info = &flash_info[banknum];
1809
1810         if (board_flash_get_legacy(base, banknum, info)) {
1811                 /* board code may have filled info completely. If not, we
1812                  * use JEDEC ID probing.
1813                  */
1814                 if (!info->vendor) {
1815                         int modes[] = {
1816                                 CFI_CMDSET_AMD_STANDARD,
1817                                 CFI_CMDSET_INTEL_STANDARD
1818                         };
1819                         int i;
1820
1821                         for (i = 0; i < ARRAY_SIZE(modes); i++) {
1822                                 info->vendor = modes[i];
1823                                 info->start[0] =
1824                                         (ulong)map_physmem(base,
1825                                                            info->portwidth,
1826                                                            MAP_NOCACHE);
1827                                 if (info->portwidth == FLASH_CFI_8BIT &&
1828                                     info->interface == FLASH_CFI_X8X16) {
1829                                         info->addr_unlock1 = 0x2AAA;
1830                                         info->addr_unlock2 = 0x5555;
1831                                 } else {
1832                                         info->addr_unlock1 = 0x5555;
1833                                         info->addr_unlock2 = 0x2AAA;
1834                                 }
1835                                 flash_read_jedec_ids(info);
1836                                 debug("JEDEC PROBE: ID %x %x %x\n",
1837                                       info->manufacturer_id,
1838                                       info->device_id,
1839                                       info->device_id2);
1840                                 if (jedec_flash_match(info, info->start[0]))
1841                                         break;
1842
1843                                 unmap_physmem((void *)info->start[0],
1844                                               info->portwidth);
1845                         }
1846                 }
1847
1848                 switch (info->vendor) {
1849                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1850                 case CFI_CMDSET_INTEL_STANDARD:
1851                 case CFI_CMDSET_INTEL_EXTENDED:
1852                         info->cmd_reset = FLASH_CMD_RESET;
1853                         break;
1854                 case CFI_CMDSET_AMD_STANDARD:
1855                 case CFI_CMDSET_AMD_EXTENDED:
1856                 case CFI_CMDSET_AMD_LEGACY:
1857                         info->cmd_reset = AMD_CMD_RESET;
1858                         break;
1859                 }
1860                 info->flash_id = FLASH_MAN_CFI;
1861                 return 1;
1862         }
1863         return 0; /* use CFI */
1864 }
1865 #else
1866 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1867 {
1868         return 0; /* use CFI */
1869 }
1870 #endif
1871
1872 /*-----------------------------------------------------------------------
1873  * detect if flash is compatible with the Common Flash Interface (CFI)
1874  * http://www.jedec.org/download/search/jesd68.pdf
1875  */
1876 static void flash_read_cfi(flash_info_t *info, void *buf, unsigned int start,
1877                            size_t len)
1878 {
1879         u8 *p = buf;
1880         unsigned int i;
1881
1882         for (i = 0; i < len; i++)
1883                 p[i] = flash_read_uchar(info, start + i);
1884 }
1885
1886 static void __flash_cmd_reset(flash_info_t *info)
1887 {
1888         /*
1889          * We do not yet know what kind of commandset to use, so we issue
1890          * the reset command in both Intel and AMD variants, in the hope
1891          * that AMD flash roms ignore the Intel command.
1892          */
1893         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1894         udelay(1);
1895         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1896 }
1897
1898 void flash_cmd_reset(flash_info_t *info)
1899         __attribute__((weak, alias("__flash_cmd_reset")));
1900
1901 static int __flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1902 {
1903         int cfi_offset;
1904
1905         /* Issue FLASH reset command */
1906         flash_cmd_reset(info);
1907
1908         for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1909              cfi_offset++) {
1910                 flash_write_cmd(info, 0, flash_offset_cfi[cfi_offset],
1911                                 FLASH_CMD_CFI);
1912                 if (flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP, 'Q') &&
1913                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R') &&
1914                     flash_isequal(info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1915                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1916                                        sizeof(struct cfi_qry));
1917                         info->interface = le16_to_cpu(qry->interface_desc);
1918
1919                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1920                         debug("device interface is %d\n",
1921                               info->interface);
1922                         debug("found port %d chip %d ",
1923                               info->portwidth, info->chipwidth);
1924                         debug("port %d bits chip %d bits\n",
1925                               info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1926                               info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1927
1928                         /* calculate command offsets as in the Linux driver */
1929                         info->addr_unlock1 = 0x555;
1930                         info->addr_unlock2 = 0x2aa;
1931
1932                         /*
1933                          * modify the unlock address if we are
1934                          * in compatibility mode
1935                          */
1936                         if (/* x8/x16 in x8 mode */
1937                             (info->chipwidth == FLASH_CFI_BY8 &&
1938                                 info->interface == FLASH_CFI_X8X16) ||
1939                             /* x16/x32 in x16 mode */
1940                             (info->chipwidth == FLASH_CFI_BY16 &&
1941                                 info->interface == FLASH_CFI_X16X32)) {
1942                                 info->addr_unlock1 = 0xaaa;
1943                                 info->addr_unlock2 = 0x555;
1944                         }
1945
1946                         info->name = "CFI conformant";
1947                         return 1;
1948                 }
1949         }
1950
1951         return 0;
1952 }
1953
1954 static int flash_detect_cfi(flash_info_t *info, struct cfi_qry *qry)
1955 {
1956         debug("flash detect cfi\n");
1957
1958         for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1959              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1960                 for (info->chipwidth = FLASH_CFI_BY8;
1961                      info->chipwidth <= info->portwidth;
1962                      info->chipwidth <<= 1)
1963                         if (__flash_detect_cfi(info, qry))
1964                                 return 1;
1965         }
1966         debug("not found\n");
1967         return 0;
1968 }
1969
1970 /*
1971  * Manufacturer-specific quirks. Add workarounds for geometry
1972  * reversal, etc. here.
1973  */
1974 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1975 {
1976         /* check if flash geometry needs reversal */
1977         if (qry->num_erase_regions > 1) {
1978                 /* reverse geometry if top boot part */
1979                 if (info->cfi_version < 0x3131) {
1980                         /* CFI < 1.1, try to guess from device id */
1981                         if ((info->device_id & 0x80) != 0)
1982                                 cfi_reverse_geometry(qry);
1983                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1984                         /* CFI >= 1.1, deduct from top/bottom flag */
1985                         /* note: ext_addr is valid since cfi_version > 0 */
1986                         cfi_reverse_geometry(qry);
1987                 }
1988         }
1989 }
1990
1991 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1992 {
1993         int reverse_geometry = 0;
1994
1995         /* Check the "top boot" bit in the PRI */
1996         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1997                 reverse_geometry = 1;
1998
1999         /* AT49BV6416(T) list the erase regions in the wrong order.
2000          * However, the device ID is identical with the non-broken
2001          * AT49BV642D they differ in the high byte.
2002          */
2003         if (info->device_id == 0xd6 || info->device_id == 0xd2)
2004                 reverse_geometry = !reverse_geometry;
2005
2006         if (reverse_geometry)
2007                 cfi_reverse_geometry(qry);
2008 }
2009
2010 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
2011 {
2012         /* check if flash geometry needs reversal */
2013         if (qry->num_erase_regions > 1) {
2014                 /* reverse geometry if top boot part */
2015                 if (info->cfi_version < 0x3131) {
2016                         /* CFI < 1.1, guess by device id */
2017                         if (info->device_id == 0x22CA || /* M29W320DT */
2018                             info->device_id == 0x2256 || /* M29W320ET */
2019                             info->device_id == 0x22D7) { /* M29W800DT */
2020                                 cfi_reverse_geometry(qry);
2021                         }
2022                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
2023                         /* CFI >= 1.1, deduct from top/bottom flag */
2024                         /* note: ext_addr is valid since cfi_version > 0 */
2025                         cfi_reverse_geometry(qry);
2026                 }
2027         }
2028 }
2029
2030 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2031 {
2032         /*
2033          * SST, for many recent nor parallel flashes, says they are
2034          * CFI-conformant. This is not true, since qry struct.
2035          * reports a std. AMD command set (0x0002), while SST allows to
2036          * erase two different sector sizes for the same memory.
2037          * 64KB sector (SST call it block)  needs 0x30 to be erased.
2038          * 4KB  sector (SST call it sector) needs 0x50 to be erased.
2039          * Since CFI query detect the 4KB number of sectors, users expects
2040          * a sector granularity of 4KB, and it is here set.
2041          */
2042         if (info->device_id == 0x5D23 || /* SST39VF3201B */
2043             info->device_id == 0x5C23) { /* SST39VF3202B */
2044                 /* set sector granularity to 4KB */
2045                 info->cmd_erase_sector = 0x50;
2046         }
2047 }
2048
2049 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2050 {
2051         /*
2052          * The M29EW devices seem to report the CFI information wrong
2053          * when it's in 8 bit mode.
2054          * There's an app note from Numonyx on this issue.
2055          * So adjust the buffer size for M29EW while operating in 8-bit mode
2056          */
2057         if (qry->max_buf_write_size > 0x8 &&
2058             info->device_id == 0x7E &&
2059             (info->device_id2 == 0x2201 ||
2060              info->device_id2 == 0x2301 ||
2061              info->device_id2 == 0x2801 ||
2062              info->device_id2 == 0x4801)) {
2063                 debug("Adjusted buffer size on Numonyx flash");
2064                 debug(" M29EW family in 8 bit mode\n");
2065                 qry->max_buf_write_size = 0x8;
2066         }
2067 }
2068
2069 /*
2070  * The following code cannot be run from FLASH!
2071  *
2072  */
2073 ulong flash_get_size(phys_addr_t base, int banknum)
2074 {
2075         flash_info_t *info = &flash_info[banknum];
2076         int i, j;
2077         flash_sect_t sect_cnt;
2078         phys_addr_t sector;
2079         unsigned long tmp;
2080         int size_ratio;
2081         uchar num_erase_regions;
2082         int erase_region_size;
2083         int erase_region_count;
2084         struct cfi_qry qry;
2085         unsigned long max_size;
2086
2087         memset(&qry, 0, sizeof(qry));
2088
2089         info->ext_addr = 0;
2090         info->cfi_version = 0;
2091 #ifdef CONFIG_SYS_FLASH_PROTECTION
2092         info->legacy_unlock = 0;
2093 #endif
2094
2095         info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2096
2097         if (flash_detect_cfi(info, &qry)) {
2098                 info->vendor = le16_to_cpu(get_unaligned(&qry.p_id));
2099                 info->ext_addr = le16_to_cpu(get_unaligned(&qry.p_adr));
2100                 num_erase_regions = qry.num_erase_regions;
2101
2102                 if (info->ext_addr) {
2103                         info->cfi_version = (ushort)flash_read_uchar(info,
2104                                                 info->ext_addr + 3) << 8;
2105                         info->cfi_version |= (ushort)flash_read_uchar(info,
2106                                                 info->ext_addr + 4);
2107                 }
2108
2109 #ifdef DEBUG
2110                 flash_printqry(&qry);
2111 #endif
2112
2113                 switch (info->vendor) {
2114                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2115                 case CFI_CMDSET_INTEL_STANDARD:
2116                 case CFI_CMDSET_INTEL_EXTENDED:
2117                         cmdset_intel_init(info, &qry);
2118                         break;
2119                 case CFI_CMDSET_AMD_STANDARD:
2120                 case CFI_CMDSET_AMD_EXTENDED:
2121                         cmdset_amd_init(info, &qry);
2122                         break;
2123                 default:
2124                         printf("CFI: Unknown command set 0x%x\n",
2125                                info->vendor);
2126                         /*
2127                          * Unfortunately, this means we don't know how
2128                          * to get the chip back to Read mode. Might
2129                          * as well try an Intel-style reset...
2130                          */
2131                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2132                         return 0;
2133                 }
2134
2135                 /* Do manufacturer-specific fixups */
2136                 switch (info->manufacturer_id) {
2137                 case 0x0001: /* AMD */
2138                 case 0x0037: /* AMIC */
2139                         flash_fixup_amd(info, &qry);
2140                         break;
2141                 case 0x001f:
2142                         flash_fixup_atmel(info, &qry);
2143                         break;
2144                 case 0x0020:
2145                         flash_fixup_stm(info, &qry);
2146                         break;
2147                 case 0x00bf: /* SST */
2148                         flash_fixup_sst(info, &qry);
2149                         break;
2150                 case 0x0089: /* Numonyx */
2151                         flash_fixup_num(info, &qry);
2152                         break;
2153                 }
2154
2155                 debug("manufacturer is %d\n", info->vendor);
2156                 debug("manufacturer id is 0x%x\n", info->manufacturer_id);
2157                 debug("device id is 0x%x\n", info->device_id);
2158                 debug("device id2 is 0x%x\n", info->device_id2);
2159                 debug("cfi version is 0x%04x\n", info->cfi_version);
2160
2161                 size_ratio = info->portwidth / info->chipwidth;
2162                 /* if the chip is x8/x16 reduce the ratio by half */
2163                 if (info->interface == FLASH_CFI_X8X16 &&
2164                     info->chipwidth == FLASH_CFI_BY8) {
2165                         size_ratio >>= 1;
2166                 }
2167                 debug("size_ratio %d port %d bits chip %d bits\n",
2168                       size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2169                       info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2170                 info->size = 1 << qry.dev_size;
2171                 /* multiply the size by the number of chips */
2172                 info->size *= size_ratio;
2173                 max_size = cfi_flash_bank_size(banknum);
2174                 if (max_size && info->size > max_size) {
2175                         debug("[truncated from %ldMiB]", info->size >> 20);
2176                         info->size = max_size;
2177                 }
2178                 debug("found %d erase regions\n", num_erase_regions);
2179                 sect_cnt = 0;
2180                 sector = base;
2181                 for (i = 0; i < num_erase_regions; i++) {
2182                         if (i > NUM_ERASE_REGIONS) {
2183                                 printf("%d erase regions found, only %d used\n",
2184                                        num_erase_regions, NUM_ERASE_REGIONS);
2185                                 break;
2186                         }
2187
2188                         tmp = le32_to_cpu(get_unaligned(
2189                                                 &qry.erase_region_info[i]));
2190                         debug("erase region %u: 0x%08lx\n", i, tmp);
2191
2192                         erase_region_count = (tmp & 0xffff) + 1;
2193                         tmp >>= 16;
2194                         erase_region_size =
2195                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2196                         debug("erase_region_count = %d ", erase_region_count);
2197                         debug("erase_region_size = %d\n", erase_region_size);
2198                         for (j = 0; j < erase_region_count; j++) {
2199                                 if (sector - base >= info->size)
2200                                         break;
2201                                 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2202                                         printf("ERROR: too many flash sectors\n");
2203                                         break;
2204                                 }
2205                                 info->start[sect_cnt] =
2206                                         (ulong)map_physmem(sector,
2207                                                            info->portwidth,
2208                                                            MAP_NOCACHE);
2209                                 sector += (erase_region_size * size_ratio);
2210
2211                                 /*
2212                                  * Only read protection status from
2213                                  * supported devices (intel...)
2214                                  */
2215                                 switch (info->vendor) {
2216                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2217                                 case CFI_CMDSET_INTEL_EXTENDED:
2218                                 case CFI_CMDSET_INTEL_STANDARD:
2219                                         /*
2220                                          * Set flash to read-id mode. Otherwise
2221                                          * reading protected status is not
2222                                          * guaranteed.
2223                                          */
2224                                         flash_write_cmd(info, sect_cnt, 0,
2225                                                         FLASH_CMD_READ_ID);
2226                                         info->protect[sect_cnt] =
2227                                                 flash_isset(info, sect_cnt,
2228                                                             FLASH_OFFSET_PROTECT,
2229                                                             FLASH_STATUS_PROTECT);
2230                                         flash_write_cmd(info, sect_cnt, 0,
2231                                                         FLASH_CMD_RESET);
2232                                         break;
2233                                 case CFI_CMDSET_AMD_EXTENDED:
2234                                 case CFI_CMDSET_AMD_STANDARD:
2235                                         if (!info->legacy_unlock) {
2236                                                 /* default: not protected */
2237                                                 info->protect[sect_cnt] = 0;
2238                                                 break;
2239                                         }
2240
2241                                         /* Read protection (PPB) from sector */
2242                                         flash_write_cmd(info, 0, 0,
2243                                                         info->cmd_reset);
2244                                         flash_unlock_seq(info, 0);
2245                                         flash_write_cmd(info, 0,
2246                                                         info->addr_unlock1,
2247                                                         FLASH_CMD_READ_ID);
2248                                         info->protect[sect_cnt] =
2249                                                 flash_isset(
2250                                                         info, sect_cnt,
2251                                                         FLASH_OFFSET_PROTECT,
2252                                                         FLASH_STATUS_PROTECT);
2253                                         break;
2254                                 default:
2255                                         /* default: not protected */
2256                                         info->protect[sect_cnt] = 0;
2257                                 }
2258
2259                                 sect_cnt++;
2260                         }
2261                 }
2262
2263                 info->sector_count = sect_cnt;
2264                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2265                 tmp = 1 << qry.block_erase_timeout_typ;
2266                 info->erase_blk_tout = tmp *
2267                         (1 << qry.block_erase_timeout_max);
2268                 tmp = (1 << qry.buf_write_timeout_typ) *
2269                         (1 << qry.buf_write_timeout_max);
2270
2271                 /* round up when converting to ms */
2272                 info->buffer_write_tout = (tmp + 999) / 1000;
2273                 tmp = (1 << qry.word_write_timeout_typ) *
2274                         (1 << qry.word_write_timeout_max);
2275                 /* round up when converting to ms */
2276                 info->write_tout = (tmp + 999) / 1000;
2277                 info->flash_id = FLASH_MAN_CFI;
2278                 if (info->interface == FLASH_CFI_X8X16 &&
2279                     info->chipwidth == FLASH_CFI_BY8) {
2280                         /* XXX - Need to test on x8/x16 in parallel. */
2281                         info->portwidth >>= 1;
2282                 }
2283
2284                 flash_write_cmd(info, 0, 0, info->cmd_reset);
2285         }
2286
2287         return (info->size);
2288 }
2289
2290 #ifdef CONFIG_FLASH_CFI_MTD
2291 void flash_set_verbose(uint v)
2292 {
2293         flash_verbose = v;
2294 }
2295 #endif
2296
2297 static void cfi_flash_set_config_reg(u32 base, u16 val)
2298 {
2299 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2300         /*
2301          * Only set this config register if really defined
2302          * to a valid value (0xffff is invalid)
2303          */
2304         if (val == 0xffff)
2305                 return;
2306
2307         /*
2308          * Set configuration register. Data is "encrypted" in the 16 lower
2309          * address bits.
2310          */
2311         flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2312         flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2313
2314         /*
2315          * Finally issue reset-command to bring device back to
2316          * read-array mode
2317          */
2318         flash_write16(FLASH_CMD_RESET, (void *)base);
2319 #endif
2320 }
2321
2322 /*-----------------------------------------------------------------------
2323  */
2324
2325 static void flash_protect_default(void)
2326 {
2327 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2328         int i;
2329         struct apl_s {
2330                 ulong start;
2331                 ulong size;
2332         } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2333 #endif
2334
2335         /* Monitor protection ON by default */
2336 #if defined(CONFIG_SYS_MONITOR_BASE) && \
2337         (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2338         (!defined(CONFIG_MONITOR_IS_IN_RAM))
2339         flash_protect(FLAG_PROTECT_SET,
2340                       CONFIG_SYS_MONITOR_BASE,
2341                       CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2342                       flash_get_info(CONFIG_SYS_MONITOR_BASE));
2343 #endif
2344
2345         /* Environment protection ON by default */
2346 #ifdef CONFIG_ENV_IS_IN_FLASH
2347         flash_protect(FLAG_PROTECT_SET,
2348                       CONFIG_ENV_ADDR,
2349                       CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2350                       flash_get_info(CONFIG_ENV_ADDR));
2351 #endif
2352
2353         /* Redundant environment protection ON by default */
2354 #ifdef CONFIG_ENV_ADDR_REDUND
2355         flash_protect(FLAG_PROTECT_SET,
2356                       CONFIG_ENV_ADDR_REDUND,
2357                       CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2358                       flash_get_info(CONFIG_ENV_ADDR_REDUND));
2359 #endif
2360
2361 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2362         for (i = 0; i < ARRAY_SIZE(apl); i++) {
2363                 debug("autoprotecting from %08lx to %08lx\n",
2364                       apl[i].start, apl[i].start + apl[i].size - 1);
2365                 flash_protect(FLAG_PROTECT_SET,
2366                               apl[i].start,
2367                               apl[i].start + apl[i].size - 1,
2368                               flash_get_info(apl[i].start));
2369         }
2370 #endif
2371 }
2372
2373 unsigned long flash_init(void)
2374 {
2375         unsigned long size = 0;
2376         int i;
2377
2378 #ifdef CONFIG_SYS_FLASH_PROTECTION
2379         /* read environment from EEPROM */
2380         char s[64];
2381
2382         env_get_f("unlock", s, sizeof(s));
2383 #endif
2384
2385 #ifdef CONFIG_CFI_FLASH /* for driver model */
2386         cfi_flash_init_dm();
2387 #endif
2388
2389         /* Init: no FLASHes known */
2390         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2391                 flash_info[i].flash_id = FLASH_UNKNOWN;
2392
2393                 /* Optionally write flash configuration register */
2394                 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2395                                          cfi_flash_config_reg(i));
2396
2397                 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2398                         flash_get_size(cfi_flash_bank_addr(i), i);
2399                 size += flash_info[i].size;
2400                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2401 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2402                         printf("## Unknown flash on Bank %d ", i + 1);
2403                         printf("- Size = 0x%08lx = %ld MB\n",
2404                                flash_info[i].size,
2405                                flash_info[i].size >> 20);
2406 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2407                 }
2408 #ifdef CONFIG_SYS_FLASH_PROTECTION
2409                 else if (strcmp(s, "yes") == 0) {
2410                         /*
2411                          * Only the U-Boot image and it's environment
2412                          * is protected, all other sectors are
2413                          * unprotected (unlocked) if flash hardware
2414                          * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2415                          * and the environment variable "unlock" is
2416                          * set to "yes".
2417                          */
2418                         if (flash_info[i].legacy_unlock) {
2419                                 int k;
2420
2421                                 /*
2422                                  * Disable legacy_unlock temporarily,
2423                                  * since flash_real_protect would
2424                                  * relock all other sectors again
2425                                  * otherwise.
2426                                  */
2427                                 flash_info[i].legacy_unlock = 0;
2428
2429                                 /*
2430                                  * Legacy unlocking (e.g. Intel J3) ->
2431                                  * unlock only one sector. This will
2432                                  * unlock all sectors.
2433                                  */
2434                                 flash_real_protect(&flash_info[i], 0, 0);
2435
2436                                 flash_info[i].legacy_unlock = 1;
2437
2438                                 /*
2439                                  * Manually mark other sectors as
2440                                  * unlocked (unprotected)
2441                                  */
2442                                 for (k = 1; k < flash_info[i].sector_count; k++)
2443                                         flash_info[i].protect[k] = 0;
2444                         } else {
2445                                 /*
2446                                  * No legancy unlocking -> unlock all sectors
2447                                  */
2448                                 flash_protect(FLAG_PROTECT_CLEAR,
2449                                               flash_info[i].start[0],
2450                                               flash_info[i].start[0]
2451                                               + flash_info[i].size - 1,
2452                                               &flash_info[i]);
2453                         }
2454                 }
2455 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2456         }
2457
2458         flash_protect_default();
2459 #ifdef CONFIG_FLASH_CFI_MTD
2460         cfi_mtd_init();
2461 #endif
2462
2463         return (size);
2464 }
2465
2466 #ifdef CONFIG_CFI_FLASH /* for driver model */
2467 static int cfi_flash_probe(struct udevice *dev)
2468 {
2469         const fdt32_t *cell;
2470         int addrc, sizec;
2471         int len, idx;
2472
2473         addrc = dev_read_addr_cells(dev);
2474         sizec = dev_read_size_cells(dev);
2475
2476         /* decode regs; there may be multiple reg tuples. */
2477         cell = dev_read_prop(dev, "reg", &len);
2478         if (!cell)
2479                 return -ENOENT;
2480         idx = 0;
2481         len /= sizeof(fdt32_t);
2482         while (idx < len) {
2483                 phys_addr_t addr;
2484
2485                 addr = dev_translate_address(dev, cell + idx);
2486
2487                 flash_info[cfi_flash_num_flash_banks].dev = dev;
2488                 flash_info[cfi_flash_num_flash_banks].base = addr;
2489                 cfi_flash_num_flash_banks++;
2490
2491                 idx += addrc + sizec;
2492         }
2493         gd->bd->bi_flashstart = flash_info[0].base;
2494
2495         return 0;
2496 }
2497
2498 static const struct udevice_id cfi_flash_ids[] = {
2499         { .compatible = "cfi-flash" },
2500         { .compatible = "jedec-flash" },
2501         {}
2502 };
2503
2504 U_BOOT_DRIVER(cfi_flash) = {
2505         .name   = "cfi_flash",
2506         .id     = UCLASS_MTD,
2507         .of_match = cfi_flash_ids,
2508         .probe = cfi_flash_probe,
2509 };
2510 #endif /* CONFIG_CFI_FLASH */