2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
12 * Tolunay Orkun <listmember@orkun.us>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
34 /* The DEBUG define must be before common to enable debugging */
38 #include <asm/processor.h>
40 #include <asm/byteorder.h>
41 #include <environment.h>
44 * This file implements a Common Flash Interface (CFI) driver for
47 * The width of the port and the width of the chips are determined at
48 * initialization. These widths are used to calculate the address for
49 * access CFI data structures.
52 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
53 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
54 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
55 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
56 * AMD CFI Specification, Release 2.0 December 1, 2001
57 * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
58 * Device IDs, Publication Number 25538 Revision A, November 8, 2001
60 * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
61 * reading and writing ... (yes there is such a Hardware).
64 #ifndef CONFIG_SYS_FLASH_BANKS_LIST
65 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
68 #define FLASH_CMD_CFI 0x98
69 #define FLASH_CMD_READ_ID 0x90
70 #define FLASH_CMD_RESET 0xff
71 #define FLASH_CMD_BLOCK_ERASE 0x20
72 #define FLASH_CMD_ERASE_CONFIRM 0xD0
73 #define FLASH_CMD_WRITE 0x40
74 #define FLASH_CMD_PROTECT 0x60
75 #define FLASH_CMD_PROTECT_SET 0x01
76 #define FLASH_CMD_PROTECT_CLEAR 0xD0
77 #define FLASH_CMD_CLEAR_STATUS 0x50
78 #define FLASH_CMD_READ_STATUS 0x70
79 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
80 #define FLASH_CMD_WRITE_BUFFER_PROG 0xE9
81 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
83 #define FLASH_STATUS_DONE 0x80
84 #define FLASH_STATUS_ESS 0x40
85 #define FLASH_STATUS_ECLBS 0x20
86 #define FLASH_STATUS_PSLBS 0x10
87 #define FLASH_STATUS_VPENS 0x08
88 #define FLASH_STATUS_PSS 0x04
89 #define FLASH_STATUS_DPS 0x02
90 #define FLASH_STATUS_R 0x01
91 #define FLASH_STATUS_PROTECT 0x01
93 #define AMD_CMD_RESET 0xF0
94 #define AMD_CMD_WRITE 0xA0
95 #define AMD_CMD_ERASE_START 0x80
96 #define AMD_CMD_ERASE_SECTOR 0x30
97 #define AMD_CMD_UNLOCK_START 0xAA
98 #define AMD_CMD_UNLOCK_ACK 0x55
99 #define AMD_CMD_WRITE_TO_BUFFER 0x25
100 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
102 #define AMD_STATUS_TOGGLE 0x40
103 #define AMD_STATUS_ERROR 0x20
105 #define ATM_CMD_UNLOCK_SECT 0x70
106 #define ATM_CMD_SOFTLOCK_START 0x80
107 #define ATM_CMD_LOCK_SECT 0x40
109 #define FLASH_OFFSET_MANUFACTURER_ID 0x00
110 #define FLASH_OFFSET_DEVICE_ID 0x01
111 #define FLASH_OFFSET_DEVICE_ID2 0x0E
112 #define FLASH_OFFSET_DEVICE_ID3 0x0F
113 #define FLASH_OFFSET_CFI 0x55
114 #define FLASH_OFFSET_CFI_ALT 0x555
115 #define FLASH_OFFSET_CFI_RESP 0x10
116 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
117 /* extended query table primary address */
118 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15
119 #define FLASH_OFFSET_WTOUT 0x1F
120 #define FLASH_OFFSET_WBTOUT 0x20
121 #define FLASH_OFFSET_ETOUT 0x21
122 #define FLASH_OFFSET_CETOUT 0x22
123 #define FLASH_OFFSET_WMAX_TOUT 0x23
124 #define FLASH_OFFSET_WBMAX_TOUT 0x24
125 #define FLASH_OFFSET_EMAX_TOUT 0x25
126 #define FLASH_OFFSET_CEMAX_TOUT 0x26
127 #define FLASH_OFFSET_SIZE 0x27
128 #define FLASH_OFFSET_INTERFACE 0x28
129 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
130 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
131 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
132 #define FLASH_OFFSET_PROTECT 0x02
133 #define FLASH_OFFSET_USER_PROTECTION 0x85
134 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
136 #define CFI_CMDSET_NONE 0
137 #define CFI_CMDSET_INTEL_EXTENDED 1
138 #define CFI_CMDSET_AMD_STANDARD 2
139 #define CFI_CMDSET_INTEL_STANDARD 3
140 #define CFI_CMDSET_AMD_EXTENDED 4
141 #define CFI_CMDSET_MITSU_STANDARD 256
142 #define CFI_CMDSET_MITSU_EXTENDED 257
143 #define CFI_CMDSET_SST 258
144 #define CFI_CMDSET_INTEL_PROG_REGIONS 512
146 #ifdef CONFIG_SYS_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
147 # undef FLASH_CMD_RESET
148 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
155 unsigned long long ll;
158 #define NUM_ERASE_REGIONS 4 /* max. number of erase regions */
160 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
162 /* use CONFIG_SYS_MAX_FLASH_BANKS_DETECT if defined */
163 #ifdef CONFIG_SYS_MAX_FLASH_BANKS_DETECT
164 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS_DETECT
166 # define CFI_MAX_FLASH_BANKS CONFIG_SYS_MAX_FLASH_BANKS
169 flash_info_t flash_info[CFI_MAX_FLASH_BANKS]; /* FLASH chips info */
172 * Check if chip width is defined. If not, start detecting with 8bit.
174 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
175 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT
178 typedef unsigned long flash_sect_t;
180 /* CFI standard query structure */
191 u8 word_write_timeout_typ;
192 u8 buf_write_timeout_typ;
193 u8 block_erase_timeout_typ;
194 u8 chip_erase_timeout_typ;
195 u8 word_write_timeout_max;
196 u8 buf_write_timeout_max;
197 u8 block_erase_timeout_max;
198 u8 chip_erase_timeout_max;
201 u16 max_buf_write_size;
202 u8 num_erase_regions;
203 u32 erase_region_info[NUM_ERASE_REGIONS];
204 } __attribute__((packed));
210 } __attribute__((packed));
212 static void __flash_write8(u8 value, void *addr)
214 __raw_writeb(value, addr);
217 static void __flash_write16(u16 value, void *addr)
219 __raw_writew(value, addr);
222 static void __flash_write32(u32 value, void *addr)
224 __raw_writel(value, addr);
227 static void __flash_write64(u64 value, void *addr)
229 /* No architectures currently implement __raw_writeq() */
230 *(volatile u64 *)addr = value;
233 static u8 __flash_read8(void *addr)
235 return __raw_readb(addr);
238 static u16 __flash_read16(void *addr)
240 return __raw_readw(addr);
243 static u32 __flash_read32(void *addr)
245 return __raw_readl(addr);
248 static u64 __flash_read64(void *addr)
250 /* No architectures currently implement __raw_readq() */
251 return *(volatile u64 *)addr;
254 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
255 void flash_write8(u8 value, void *addr)__attribute__((weak, alias("__flash_write8")));
256 void flash_write16(u16 value, void *addr)__attribute__((weak, alias("__flash_write16")));
257 void flash_write32(u32 value, void *addr)__attribute__((weak, alias("__flash_write32")));
258 void flash_write64(u64 value, void *addr)__attribute__((weak, alias("__flash_write64")));
259 u8 flash_read8(void *addr)__attribute__((weak, alias("__flash_read8")));
260 u16 flash_read16(void *addr)__attribute__((weak, alias("__flash_read16")));
261 u32 flash_read32(void *addr)__attribute__((weak, alias("__flash_read32")));
262 u64 flash_read64(void *addr)__attribute__((weak, alias("__flash_read64")));
264 #define flash_write8 __flash_write8
265 #define flash_write16 __flash_write16
266 #define flash_write32 __flash_write32
267 #define flash_write64 __flash_write64
268 #define flash_read8 __flash_read8
269 #define flash_read16 __flash_read16
270 #define flash_read32 __flash_read32
271 #define flash_read64 __flash_read64
274 /*-----------------------------------------------------------------------
276 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
277 static flash_info_t *flash_get_info(ulong base)
280 flash_info_t * info = 0;
282 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
283 info = & flash_info[i];
284 if (info->size && info->start[0] <= base &&
285 base <= info->start[0] + info->size - 1)
289 return i == CONFIG_SYS_MAX_FLASH_BANKS ? 0 : info;
293 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
295 if (sect != (info->sector_count - 1))
296 return info->start[sect + 1] - info->start[sect];
298 return info->start[0] + info->size - info->start[sect];
301 /*-----------------------------------------------------------------------
302 * create an address based on the offset and the port width
305 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
307 unsigned int byte_offset = offset * info->portwidth;
309 return map_physmem(info->start[sect] + byte_offset,
310 flash_sector_size(info, sect) - byte_offset,
314 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
315 unsigned int offset, void *addr)
317 unsigned int byte_offset = offset * info->portwidth;
319 unmap_physmem(addr, flash_sector_size(info, sect) - byte_offset);
322 /*-----------------------------------------------------------------------
323 * make a proper sized command based on the port and chip widths
325 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
330 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
331 u32 cmd_le = cpu_to_le32(cmd);
334 uchar *cp = (uchar *) cmdbuf;
336 for (i = info->portwidth; i > 0; i--){
337 cword_offset = (info->portwidth-i)%info->chipwidth;
338 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
339 cp_offset = info->portwidth - i;
340 val = *((uchar*)&cmd_le + cword_offset);
343 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
345 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
350 /*-----------------------------------------------------------------------
353 static void print_longlong (char *str, unsigned long long data)
358 cp = (unsigned char *) &data;
359 for (i = 0; i < 8; i++)
360 sprintf (&str[i * 2], "%2.2x", *cp++);
363 static void flash_printqry (struct cfi_qry *qry)
368 for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
370 for (y = 0; y < 16; y++)
371 debug("%2.2x ", p[x + y]);
373 for (y = 0; y < 16; y++) {
374 unsigned char c = p[x + y];
375 if (c >= 0x20 && c <= 0x7e)
386 /*-----------------------------------------------------------------------
387 * read a character at a port width address
389 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
394 cp = flash_map (info, 0, offset);
395 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
396 retval = flash_read8(cp);
398 retval = flash_read8(cp + info->portwidth - 1);
400 flash_unmap (info, 0, offset, cp);
404 /*-----------------------------------------------------------------------
405 * read a word at a port width address, assume 16bit bus
407 static inline ushort flash_read_word (flash_info_t * info, uint offset)
409 ushort *addr, retval;
411 addr = flash_map (info, 0, offset);
412 retval = flash_read16 (addr);
413 flash_unmap (info, 0, offset, addr);
418 /*-----------------------------------------------------------------------
419 * read a long word by picking the least significant byte of each maximum
420 * port size word. Swap for ppc format.
422 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
431 addr = flash_map (info, sect, offset);
434 debug ("long addr is at %p info->portwidth = %d\n", addr,
436 for (x = 0; x < 4 * info->portwidth; x++) {
437 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
440 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
441 retval = ((flash_read8(addr) << 16) |
442 (flash_read8(addr + info->portwidth) << 24) |
443 (flash_read8(addr + 2 * info->portwidth)) |
444 (flash_read8(addr + 3 * info->portwidth) << 8));
446 retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
447 (flash_read8(addr + info->portwidth - 1) << 16) |
448 (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
449 (flash_read8(addr + 3 * info->portwidth - 1)));
451 flash_unmap(info, sect, offset, addr);
457 * Write a proper sized command to the correct address
459 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
460 uint offset, u32 cmd)
466 addr = flash_map (info, sect, offset);
467 flash_make_cmd (info, cmd, &cword);
468 switch (info->portwidth) {
470 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
471 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
472 flash_write8(cword.c, addr);
474 case FLASH_CFI_16BIT:
475 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
477 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
478 flash_write16(cword.w, addr);
480 case FLASH_CFI_32BIT:
481 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr,
483 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
484 flash_write32(cword.l, addr);
486 case FLASH_CFI_64BIT:
491 print_longlong (str, cword.ll);
493 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
495 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
498 flash_write64(cword.ll, addr);
502 /* Ensure all the instructions are fully finished */
505 flash_unmap(info, sect, offset, addr);
508 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
510 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
511 flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
514 /*-----------------------------------------------------------------------
516 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
517 uint offset, uchar cmd)
523 addr = flash_map (info, sect, offset);
524 flash_make_cmd (info, cmd, &cword);
526 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
527 switch (info->portwidth) {
529 debug ("is= %x %x\n", flash_read8(addr), cword.c);
530 retval = (flash_read8(addr) == cword.c);
532 case FLASH_CFI_16BIT:
533 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w);
534 retval = (flash_read16(addr) == cword.w);
536 case FLASH_CFI_32BIT:
537 debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l);
538 retval = (flash_read32(addr) == cword.l);
540 case FLASH_CFI_64BIT:
546 print_longlong (str1, flash_read64(addr));
547 print_longlong (str2, cword.ll);
548 debug ("is= %s %s\n", str1, str2);
551 retval = (flash_read64(addr) == cword.ll);
557 flash_unmap(info, sect, offset, addr);
562 /*-----------------------------------------------------------------------
564 static int flash_isset (flash_info_t * info, flash_sect_t sect,
565 uint offset, uchar cmd)
571 addr = flash_map (info, sect, offset);
572 flash_make_cmd (info, cmd, &cword);
573 switch (info->portwidth) {
575 retval = ((flash_read8(addr) & cword.c) == cword.c);
577 case FLASH_CFI_16BIT:
578 retval = ((flash_read16(addr) & cword.w) == cword.w);
580 case FLASH_CFI_32BIT:
581 retval = ((flash_read32(addr) & cword.l) == cword.l);
583 case FLASH_CFI_64BIT:
584 retval = ((flash_read64(addr) & cword.ll) == cword.ll);
590 flash_unmap(info, sect, offset, addr);
595 /*-----------------------------------------------------------------------
597 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
598 uint offset, uchar cmd)
604 addr = flash_map (info, sect, offset);
605 flash_make_cmd (info, cmd, &cword);
606 switch (info->portwidth) {
608 retval = flash_read8(addr) != flash_read8(addr);
610 case FLASH_CFI_16BIT:
611 retval = flash_read16(addr) != flash_read16(addr);
613 case FLASH_CFI_32BIT:
614 retval = flash_read32(addr) != flash_read32(addr);
616 case FLASH_CFI_64BIT:
617 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
618 (flash_read32(addr+4) != flash_read32(addr+4)) );
624 flash_unmap(info, sect, offset, addr);
630 * flash_is_busy - check to see if the flash is busy
632 * This routine checks the status of the chip and returns true if the
635 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
639 switch (info->vendor) {
640 case CFI_CMDSET_INTEL_PROG_REGIONS:
641 case CFI_CMDSET_INTEL_STANDARD:
642 case CFI_CMDSET_INTEL_EXTENDED:
643 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
645 case CFI_CMDSET_AMD_STANDARD:
646 case CFI_CMDSET_AMD_EXTENDED:
647 #ifdef CONFIG_FLASH_CFI_LEGACY
648 case CFI_CMDSET_AMD_LEGACY:
650 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
655 debug ("flash_is_busy: %d\n", retval);
659 /*-----------------------------------------------------------------------
660 * wait for XSR.7 to be set. Time out with an error if it does not.
661 * This routine does not set the flash to read-array mode.
663 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
664 ulong tout, char *prompt)
668 #if CONFIG_SYS_HZ != 1000
669 tout *= CONFIG_SYS_HZ/1000;
672 /* Wait for command completion */
673 start = get_timer (0);
674 while (flash_is_busy (info, sector)) {
675 if (get_timer (start) > tout) {
676 printf ("Flash %s timeout at address %lx data %lx\n",
677 prompt, info->start[sector],
678 flash_read_long (info, sector, 0));
679 flash_write_cmd (info, sector, 0, info->cmd_reset);
682 udelay (1); /* also triggers watchdog */
687 /*-----------------------------------------------------------------------
688 * Wait for XSR.7 to be set, if it times out print an error, otherwise
689 * do a full status check.
691 * This routine sets the flash to read-array mode.
693 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
694 ulong tout, char *prompt)
698 retcode = flash_status_check (info, sector, tout, prompt);
699 switch (info->vendor) {
700 case CFI_CMDSET_INTEL_PROG_REGIONS:
701 case CFI_CMDSET_INTEL_EXTENDED:
702 case CFI_CMDSET_INTEL_STANDARD:
703 if ((retcode != ERR_OK)
704 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
706 printf ("Flash %s error at address %lx\n", prompt,
707 info->start[sector]);
708 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
709 FLASH_STATUS_PSLBS)) {
710 puts ("Command Sequence Error.\n");
711 } else if (flash_isset (info, sector, 0,
712 FLASH_STATUS_ECLBS)) {
713 puts ("Block Erase Error.\n");
714 retcode = ERR_NOT_ERASED;
715 } else if (flash_isset (info, sector, 0,
716 FLASH_STATUS_PSLBS)) {
717 puts ("Locking Error\n");
719 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
720 puts ("Block locked.\n");
721 retcode = ERR_PROTECTED;
723 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
724 puts ("Vpp Low Error.\n");
726 flash_write_cmd (info, sector, 0, info->cmd_reset);
734 /*-----------------------------------------------------------------------
736 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
738 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
741 unsigned long long ll;
744 switch (info->portwidth) {
748 case FLASH_CFI_16BIT:
749 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
752 cword->w = (cword->w >> 8) | w;
754 cword->w = (cword->w << 8) | c;
757 case FLASH_CFI_32BIT:
758 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
761 cword->l = (cword->l >> 8) | l;
763 cword->l = (cword->l << 8) | c;
766 case FLASH_CFI_64BIT:
767 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
770 cword->ll = (cword->ll >> 8) | ll;
772 cword->ll = (cword->ll << 8) | c;
778 /* loop through the sectors from the highest address when the passed
779 * address is greater or equal to the sector address we have a match
781 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
785 for (sector = info->sector_count - 1; sector >= 0; sector--) {
786 if (addr >= info->start[sector])
792 /*-----------------------------------------------------------------------
794 static int flash_write_cfiword (flash_info_t * info, ulong dest,
801 dstaddr = map_physmem(dest, info->portwidth, MAP_NOCACHE);
803 /* Check if Flash is (sufficiently) erased */
804 switch (info->portwidth) {
806 flag = ((flash_read8(dstaddr) & cword.c) == cword.c);
808 case FLASH_CFI_16BIT:
809 flag = ((flash_read16(dstaddr) & cword.w) == cword.w);
811 case FLASH_CFI_32BIT:
812 flag = ((flash_read32(dstaddr) & cword.l) == cword.l);
814 case FLASH_CFI_64BIT:
815 flag = ((flash_read64(dstaddr) & cword.ll) == cword.ll);
822 unmap_physmem(dstaddr, info->portwidth);
823 return ERR_NOT_ERASED;
826 /* Disable interrupts which might cause a timeout here */
827 flag = disable_interrupts ();
829 switch (info->vendor) {
830 case CFI_CMDSET_INTEL_PROG_REGIONS:
831 case CFI_CMDSET_INTEL_EXTENDED:
832 case CFI_CMDSET_INTEL_STANDARD:
833 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
834 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
836 case CFI_CMDSET_AMD_EXTENDED:
837 case CFI_CMDSET_AMD_STANDARD:
838 #ifdef CONFIG_FLASH_CFI_LEGACY
839 case CFI_CMDSET_AMD_LEGACY:
841 sect = find_sector(info, dest);
842 flash_unlock_seq (info, sect);
843 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
847 switch (info->portwidth) {
849 flash_write8(cword.c, dstaddr);
851 case FLASH_CFI_16BIT:
852 flash_write16(cword.w, dstaddr);
854 case FLASH_CFI_32BIT:
855 flash_write32(cword.l, dstaddr);
857 case FLASH_CFI_64BIT:
858 flash_write64(cword.ll, dstaddr);
862 /* re-enable interrupts if necessary */
864 enable_interrupts ();
866 unmap_physmem(dstaddr, info->portwidth);
868 return flash_full_status_check (info, find_sector (info, dest),
869 info->write_tout, "write");
872 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
874 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
881 void *dst = map_physmem(dest, len, MAP_NOCACHE);
888 switch (info->portwidth) {
892 case FLASH_CFI_16BIT:
895 case FLASH_CFI_32BIT:
898 case FLASH_CFI_64BIT:
908 while ((cnt-- > 0) && (flag == 0)) {
909 switch (info->portwidth) {
911 flag = ((flash_read8(dst2) & flash_read8(src)) ==
915 case FLASH_CFI_16BIT:
916 flag = ((flash_read16(dst2) & flash_read16(src)) ==
920 case FLASH_CFI_32BIT:
921 flag = ((flash_read32(dst2) & flash_read32(src)) ==
925 case FLASH_CFI_64BIT:
926 flag = ((flash_read64(dst2) & flash_read64(src)) ==
933 retcode = ERR_NOT_ERASED;
938 sector = find_sector (info, dest);
940 switch (info->vendor) {
941 case CFI_CMDSET_INTEL_PROG_REGIONS:
942 case CFI_CMDSET_INTEL_STANDARD:
943 case CFI_CMDSET_INTEL_EXTENDED:
944 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
945 FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
946 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
947 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
948 flash_write_cmd (info, sector, 0, write_cmd);
949 retcode = flash_status_check (info, sector,
950 info->buffer_write_tout,
952 if (retcode == ERR_OK) {
953 /* reduce the number of loops by the width of
956 flash_write_cmd (info, sector, 0, cnt - 1);
958 switch (info->portwidth) {
960 flash_write8(flash_read8(src), dst);
963 case FLASH_CFI_16BIT:
964 flash_write16(flash_read16(src), dst);
967 case FLASH_CFI_32BIT:
968 flash_write32(flash_read32(src), dst);
971 case FLASH_CFI_64BIT:
972 flash_write64(flash_read64(src), dst);
980 flash_write_cmd (info, sector, 0,
981 FLASH_CMD_WRITE_BUFFER_CONFIRM);
982 retcode = flash_full_status_check (
983 info, sector, info->buffer_write_tout,
989 case CFI_CMDSET_AMD_STANDARD:
990 case CFI_CMDSET_AMD_EXTENDED:
991 flash_unlock_seq(info,0);
993 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
994 offset = ((unsigned long)dst - info->start[sector]) >> shift;
996 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
998 flash_write_cmd(info, sector, offset, (uchar)cnt - 1);
1000 switch (info->portwidth) {
1001 case FLASH_CFI_8BIT:
1003 flash_write8(flash_read8(src), dst);
1007 case FLASH_CFI_16BIT:
1009 flash_write16(flash_read16(src), dst);
1013 case FLASH_CFI_32BIT:
1015 flash_write32(flash_read32(src), dst);
1019 case FLASH_CFI_64BIT:
1021 flash_write64(flash_read64(src), dst);
1026 retcode = ERR_INVAL;
1030 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1031 retcode = flash_full_status_check (info, sector,
1032 info->buffer_write_tout,
1037 debug ("Unknown Command Set\n");
1038 retcode = ERR_INVAL;
1043 unmap_physmem(dst, len);
1046 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1049 /*-----------------------------------------------------------------------
1051 int flash_erase (flash_info_t * info, int s_first, int s_last)
1057 if (info->flash_id != FLASH_MAN_CFI) {
1058 puts ("Can't erase unknown flash type - aborted\n");
1061 if ((s_first < 0) || (s_first > s_last)) {
1062 puts ("- no sectors to erase\n");
1067 for (sect = s_first; sect <= s_last; ++sect) {
1068 if (info->protect[sect]) {
1073 printf ("- Warning: %d protected sectors will not be erased!\n",
1080 for (sect = s_first; sect <= s_last; sect++) {
1081 if (info->protect[sect] == 0) { /* not protected */
1082 switch (info->vendor) {
1083 case CFI_CMDSET_INTEL_PROG_REGIONS:
1084 case CFI_CMDSET_INTEL_STANDARD:
1085 case CFI_CMDSET_INTEL_EXTENDED:
1086 flash_write_cmd (info, sect, 0,
1087 FLASH_CMD_CLEAR_STATUS);
1088 flash_write_cmd (info, sect, 0,
1089 FLASH_CMD_BLOCK_ERASE);
1090 flash_write_cmd (info, sect, 0,
1091 FLASH_CMD_ERASE_CONFIRM);
1093 case CFI_CMDSET_AMD_STANDARD:
1094 case CFI_CMDSET_AMD_EXTENDED:
1095 flash_unlock_seq (info, sect);
1096 flash_write_cmd (info, sect,
1098 AMD_CMD_ERASE_START);
1099 flash_unlock_seq (info, sect);
1100 flash_write_cmd (info, sect, 0,
1101 AMD_CMD_ERASE_SECTOR);
1103 #ifdef CONFIG_FLASH_CFI_LEGACY
1104 case CFI_CMDSET_AMD_LEGACY:
1105 flash_unlock_seq (info, 0);
1106 flash_write_cmd (info, 0, info->addr_unlock1,
1107 AMD_CMD_ERASE_START);
1108 flash_unlock_seq (info, 0);
1109 flash_write_cmd (info, sect, 0,
1110 AMD_CMD_ERASE_SECTOR);
1114 debug ("Unkown flash vendor %d\n",
1119 if (flash_full_status_check
1120 (info, sect, info->erase_blk_tout, "erase")) {
1130 /*-----------------------------------------------------------------------
1132 void flash_print_info (flash_info_t * info)
1136 if (info->flash_id != FLASH_MAN_CFI) {
1137 puts ("missing or unknown FLASH type\n");
1141 printf ("%s FLASH (%d x %d)",
1143 (info->portwidth << 3), (info->chipwidth << 3));
1144 if (info->size < 1024*1024)
1145 printf (" Size: %ld kB in %d Sectors\n",
1146 info->size >> 10, info->sector_count);
1148 printf (" Size: %ld MB in %d Sectors\n",
1149 info->size >> 20, info->sector_count);
1151 switch (info->vendor) {
1152 case CFI_CMDSET_INTEL_PROG_REGIONS:
1153 printf ("Intel Prog Regions");
1155 case CFI_CMDSET_INTEL_STANDARD:
1156 printf ("Intel Standard");
1158 case CFI_CMDSET_INTEL_EXTENDED:
1159 printf ("Intel Extended");
1161 case CFI_CMDSET_AMD_STANDARD:
1162 printf ("AMD Standard");
1164 case CFI_CMDSET_AMD_EXTENDED:
1165 printf ("AMD Extended");
1167 #ifdef CONFIG_FLASH_CFI_LEGACY
1168 case CFI_CMDSET_AMD_LEGACY:
1169 printf ("AMD Legacy");
1173 printf ("Unknown (%d)", info->vendor);
1176 printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x%02X",
1177 info->manufacturer_id, info->device_id);
1178 if (info->device_id == 0x7E) {
1179 printf("%04X", info->device_id2);
1181 printf ("\n Erase timeout: %ld ms, write timeout: %ld ms\n",
1182 info->erase_blk_tout,
1184 if (info->buffer_size > 1) {
1185 printf (" Buffer write timeout: %ld ms, "
1186 "buffer size: %d bytes\n",
1187 info->buffer_write_tout,
1191 puts ("\n Sector Start Addresses:");
1192 for (i = 0; i < info->sector_count; ++i) {
1195 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1199 volatile unsigned long *flash;
1202 * Check if whole sector is erased
1204 size = flash_sector_size(info, i);
1206 flash = (volatile unsigned long *) info->start[i];
1207 size = size >> 2; /* divide by 4 for longword access */
1208 for (k = 0; k < size; k++) {
1209 if (*flash++ != 0xffffffff) {
1215 /* print empty and read-only info */
1216 printf (" %08lX %c %s ",
1219 info->protect[i] ? "RO" : " ");
1220 #else /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1221 printf (" %08lX %s ",
1223 info->protect[i] ? "RO" : " ");
1230 /*-----------------------------------------------------------------------
1231 * This is used in a few places in write_buf() to show programming
1232 * progress. Making it a function is nasty because it needs to do side
1233 * effect updates to digit and dots. Repeated code is nasty too, so
1234 * we define it once here.
1236 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1237 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1239 if ((scale > 0) && (dots <= 0)) { \
1240 if ((digit % 5) == 0) \
1241 printf ("%d", digit / 5); \
1248 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1251 /*-----------------------------------------------------------------------
1252 * Copy memory to flash, returns:
1255 * 2 - Flash not erased
1257 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1264 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1267 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1268 int digit = CONFIG_FLASH_SHOW_PROGRESS;
1273 * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1275 if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1276 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1277 CONFIG_FLASH_SHOW_PROGRESS);
1281 /* get lower aligned address */
1282 wp = (addr & ~(info->portwidth - 1));
1284 /* handle unaligned start */
1285 if ((aln = addr - wp) != 0) {
1287 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1288 for (i = 0; i < aln; ++i)
1289 flash_add_byte (info, &cword, flash_read8(p + i));
1291 for (; (i < info->portwidth) && (cnt > 0); i++) {
1292 flash_add_byte (info, &cword, *src++);
1295 for (; (cnt == 0) && (i < info->portwidth); ++i)
1296 flash_add_byte (info, &cword, flash_read8(p + i));
1298 rc = flash_write_cfiword (info, wp, cword);
1299 unmap_physmem(p, info->portwidth);
1304 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1307 /* handle the aligned part */
1308 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1309 buffered_size = (info->portwidth / info->chipwidth);
1310 buffered_size *= info->buffer_size;
1311 while (cnt >= info->portwidth) {
1312 /* prohibit buffer write when buffer_size is 1 */
1313 if (info->buffer_size == 1) {
1315 for (i = 0; i < info->portwidth; i++)
1316 flash_add_byte (info, &cword, *src++);
1317 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1319 wp += info->portwidth;
1320 cnt -= info->portwidth;
1324 /* write buffer until next buffered_size aligned boundary */
1325 i = buffered_size - (wp % buffered_size);
1328 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1330 i -= i & (info->portwidth - 1);
1334 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1337 while (cnt >= info->portwidth) {
1339 for (i = 0; i < info->portwidth; i++) {
1340 flash_add_byte (info, &cword, *src++);
1342 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1344 wp += info->portwidth;
1345 cnt -= info->portwidth;
1346 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1348 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1355 * handle unaligned tail bytes
1358 p = map_physmem(wp, info->portwidth, MAP_NOCACHE);
1359 for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1360 flash_add_byte (info, &cword, *src++);
1363 for (; i < info->portwidth; ++i)
1364 flash_add_byte (info, &cword, flash_read8(p + i));
1365 unmap_physmem(p, info->portwidth);
1367 return flash_write_cfiword (info, wp, cword);
1370 /*-----------------------------------------------------------------------
1372 #ifdef CONFIG_SYS_FLASH_PROTECTION
1374 int flash_real_protect (flash_info_t * info, long sector, int prot)
1378 switch (info->vendor) {
1379 case CFI_CMDSET_INTEL_PROG_REGIONS:
1380 case CFI_CMDSET_INTEL_STANDARD:
1381 case CFI_CMDSET_INTEL_EXTENDED:
1382 flash_write_cmd (info, sector, 0,
1383 FLASH_CMD_CLEAR_STATUS);
1384 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1386 flash_write_cmd (info, sector, 0,
1387 FLASH_CMD_PROTECT_SET);
1389 flash_write_cmd (info, sector, 0,
1390 FLASH_CMD_PROTECT_CLEAR);
1392 case CFI_CMDSET_AMD_EXTENDED:
1393 case CFI_CMDSET_AMD_STANDARD:
1394 /* U-Boot only checks the first byte */
1395 if (info->manufacturer_id == (uchar)ATM_MANUFACT) {
1397 flash_unlock_seq (info, 0);
1398 flash_write_cmd (info, 0,
1400 ATM_CMD_SOFTLOCK_START);
1401 flash_unlock_seq (info, 0);
1402 flash_write_cmd (info, sector, 0,
1405 flash_write_cmd (info, 0,
1407 AMD_CMD_UNLOCK_START);
1408 if (info->device_id == ATM_ID_BV6416)
1409 flash_write_cmd (info, sector,
1410 0, ATM_CMD_UNLOCK_SECT);
1414 #ifdef CONFIG_FLASH_CFI_LEGACY
1415 case CFI_CMDSET_AMD_LEGACY:
1416 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1417 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1419 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1421 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1426 flash_full_status_check (info, sector, info->erase_blk_tout,
1427 prot ? "protect" : "unprotect")) == 0) {
1429 info->protect[sector] = prot;
1432 * On some of Intel's flash chips (marked via legacy_unlock)
1433 * unprotect unprotects all locking.
1435 if ((prot == 0) && (info->legacy_unlock)) {
1438 for (i = 0; i < info->sector_count; i++) {
1439 if (info->protect[i])
1440 flash_real_protect (info, i, 1);
1447 /*-----------------------------------------------------------------------
1448 * flash_read_user_serial - read the OneTimeProgramming cells
1450 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1457 src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1458 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1459 memcpy (dst, src + offset, len);
1460 flash_write_cmd (info, 0, 0, info->cmd_reset);
1461 flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1465 * flash_read_factory_serial - read the device Id from the protection area
1467 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1472 src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1473 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1474 memcpy (buffer, src + offset, len);
1475 flash_write_cmd (info, 0, 0, info->cmd_reset);
1476 flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1479 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1481 /*-----------------------------------------------------------------------
1482 * Reverse the order of the erase regions in the CFI QRY structure.
1483 * This is needed for chips that are either a) correctly detected as
1484 * top-boot, or b) buggy.
1486 static void cfi_reverse_geometry(struct cfi_qry *qry)
1491 for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1492 tmp = qry->erase_region_info[i];
1493 qry->erase_region_info[i] = qry->erase_region_info[j];
1494 qry->erase_region_info[j] = tmp;
1498 /*-----------------------------------------------------------------------
1499 * read jedec ids from device and set corresponding fields in info struct
1501 * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1504 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1506 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1507 flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1508 udelay(1000); /* some flash are slow to respond */
1509 info->manufacturer_id = flash_read_uchar (info,
1510 FLASH_OFFSET_MANUFACTURER_ID);
1511 info->device_id = flash_read_uchar (info,
1512 FLASH_OFFSET_DEVICE_ID);
1513 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1516 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1518 info->cmd_reset = FLASH_CMD_RESET;
1520 cmdset_intel_read_jedec_ids(info);
1521 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1523 #ifdef CONFIG_SYS_FLASH_PROTECTION
1524 /* read legacy lock/unlock bit from intel flash */
1525 if (info->ext_addr) {
1526 info->legacy_unlock = flash_read_uchar (info,
1527 info->ext_addr + 5) & 0x08;
1534 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1536 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1537 flash_unlock_seq(info, 0);
1538 flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1539 udelay(1000); /* some flash are slow to respond */
1541 info->manufacturer_id = flash_read_uchar (info,
1542 FLASH_OFFSET_MANUFACTURER_ID);
1544 switch (info->chipwidth){
1545 case FLASH_CFI_8BIT:
1546 info->device_id = flash_read_uchar (info,
1547 FLASH_OFFSET_DEVICE_ID);
1548 if (info->device_id == 0x7E) {
1549 /* AMD 3-byte (expanded) device ids */
1550 info->device_id2 = flash_read_uchar (info,
1551 FLASH_OFFSET_DEVICE_ID2);
1552 info->device_id2 <<= 8;
1553 info->device_id2 |= flash_read_uchar (info,
1554 FLASH_OFFSET_DEVICE_ID3);
1557 case FLASH_CFI_16BIT:
1558 info->device_id = flash_read_word (info,
1559 FLASH_OFFSET_DEVICE_ID);
1564 flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1567 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1569 info->cmd_reset = AMD_CMD_RESET;
1571 cmdset_amd_read_jedec_ids(info);
1572 flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1577 #ifdef CONFIG_FLASH_CFI_LEGACY
1578 static void flash_read_jedec_ids (flash_info_t * info)
1580 info->manufacturer_id = 0;
1581 info->device_id = 0;
1582 info->device_id2 = 0;
1584 switch (info->vendor) {
1585 case CFI_CMDSET_INTEL_PROG_REGIONS:
1586 case CFI_CMDSET_INTEL_STANDARD:
1587 case CFI_CMDSET_INTEL_EXTENDED:
1588 cmdset_intel_read_jedec_ids(info);
1590 case CFI_CMDSET_AMD_STANDARD:
1591 case CFI_CMDSET_AMD_EXTENDED:
1592 cmdset_amd_read_jedec_ids(info);
1599 /*-----------------------------------------------------------------------
1600 * Call board code to request info about non-CFI flash.
1601 * board_flash_get_legacy needs to fill in at least:
1602 * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1604 static int flash_detect_legacy(ulong base, int banknum)
1606 flash_info_t *info = &flash_info[banknum];
1608 if (board_flash_get_legacy(base, banknum, info)) {
1609 /* board code may have filled info completely. If not, we
1610 use JEDEC ID probing. */
1611 if (!info->vendor) {
1613 CFI_CMDSET_AMD_STANDARD,
1614 CFI_CMDSET_INTEL_STANDARD
1618 for (i = 0; i < sizeof(modes) / sizeof(modes[0]); i++) {
1619 info->vendor = modes[i];
1620 info->start[0] = base;
1621 if (info->portwidth == FLASH_CFI_8BIT
1622 && info->interface == FLASH_CFI_X8X16) {
1623 info->addr_unlock1 = 0x2AAA;
1624 info->addr_unlock2 = 0x5555;
1626 info->addr_unlock1 = 0x5555;
1627 info->addr_unlock2 = 0x2AAA;
1629 flash_read_jedec_ids(info);
1630 debug("JEDEC PROBE: ID %x %x %x\n",
1631 info->manufacturer_id,
1634 if (jedec_flash_match(info, base))
1639 switch(info->vendor) {
1640 case CFI_CMDSET_INTEL_PROG_REGIONS:
1641 case CFI_CMDSET_INTEL_STANDARD:
1642 case CFI_CMDSET_INTEL_EXTENDED:
1643 info->cmd_reset = FLASH_CMD_RESET;
1645 case CFI_CMDSET_AMD_STANDARD:
1646 case CFI_CMDSET_AMD_EXTENDED:
1647 case CFI_CMDSET_AMD_LEGACY:
1648 info->cmd_reset = AMD_CMD_RESET;
1651 info->flash_id = FLASH_MAN_CFI;
1654 return 0; /* use CFI */
1657 static inline int flash_detect_legacy(ulong base, int banknum)
1659 return 0; /* use CFI */
1663 /*-----------------------------------------------------------------------
1664 * detect if flash is compatible with the Common Flash Interface (CFI)
1665 * http://www.jedec.org/download/search/jesd68.pdf
1667 static void flash_read_cfi (flash_info_t *info, void *buf,
1668 unsigned int start, size_t len)
1673 for (i = 0; i < len; i++)
1674 p[i] = flash_read_uchar(info, start + i);
1677 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1681 /* We do not yet know what kind of commandset to use, so we issue
1682 the reset command in both Intel and AMD variants, in the hope
1683 that AMD flash roms ignore the Intel command. */
1684 flash_write_cmd (info, 0, 0, AMD_CMD_RESET);
1685 flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1688 cfi_offset < sizeof(flash_offset_cfi) / sizeof(uint);
1690 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1692 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1693 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1694 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1695 flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1696 sizeof(struct cfi_qry));
1697 info->interface = le16_to_cpu(qry->interface_desc);
1699 info->cfi_offset = flash_offset_cfi[cfi_offset];
1700 debug ("device interface is %d\n",
1702 debug ("found port %d chip %d ",
1703 info->portwidth, info->chipwidth);
1704 debug ("port %d bits chip %d bits\n",
1705 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1706 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1708 /* calculate command offsets as in the Linux driver */
1709 info->addr_unlock1 = 0x555;
1710 info->addr_unlock2 = 0x2aa;
1713 * modify the unlock address if we are
1714 * in compatibility mode
1716 if ( /* x8/x16 in x8 mode */
1717 ((info->chipwidth == FLASH_CFI_BY8) &&
1718 (info->interface == FLASH_CFI_X8X16)) ||
1719 /* x16/x32 in x16 mode */
1720 ((info->chipwidth == FLASH_CFI_BY16) &&
1721 (info->interface == FLASH_CFI_X16X32)))
1723 info->addr_unlock1 = 0xaaa;
1724 info->addr_unlock2 = 0x555;
1727 info->name = "CFI conformant";
1735 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1737 debug ("flash detect cfi\n");
1739 for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1740 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1741 for (info->chipwidth = FLASH_CFI_BY8;
1742 info->chipwidth <= info->portwidth;
1743 info->chipwidth <<= 1)
1744 if (__flash_detect_cfi(info, qry))
1747 debug ("not found\n");
1752 * Manufacturer-specific quirks. Add workarounds for geometry
1753 * reversal, etc. here.
1755 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1757 /* check if flash geometry needs reversal */
1758 if (qry->num_erase_regions > 1) {
1759 /* reverse geometry if top boot part */
1760 if (info->cfi_version < 0x3131) {
1761 /* CFI < 1.1, try to guess from device id */
1762 if ((info->device_id & 0x80) != 0)
1763 cfi_reverse_geometry(qry);
1764 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1765 /* CFI >= 1.1, deduct from top/bottom flag */
1766 /* note: ext_addr is valid since cfi_version > 0 */
1767 cfi_reverse_geometry(qry);
1772 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1774 int reverse_geometry = 0;
1776 /* Check the "top boot" bit in the PRI */
1777 if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1778 reverse_geometry = 1;
1780 /* AT49BV6416(T) list the erase regions in the wrong order.
1781 * However, the device ID is identical with the non-broken
1782 * AT49BV642D since u-boot only reads the low byte (they
1783 * differ in the high byte.) So leave out this fixup for now.
1786 if (info->device_id == 0xd6 || info->device_id == 0xd2)
1787 reverse_geometry = !reverse_geometry;
1790 if (reverse_geometry)
1791 cfi_reverse_geometry(qry);
1795 * The following code cannot be run from FLASH!
1798 ulong flash_get_size (ulong base, int banknum)
1800 flash_info_t *info = &flash_info[banknum];
1802 flash_sect_t sect_cnt;
1803 unsigned long sector;
1806 uchar num_erase_regions;
1807 int erase_region_size;
1808 int erase_region_count;
1811 memset(&qry, 0, sizeof(qry));
1814 info->cfi_version = 0;
1815 #ifdef CONFIG_SYS_FLASH_PROTECTION
1816 info->legacy_unlock = 0;
1819 info->start[0] = base;
1821 if (flash_detect_cfi (info, &qry)) {
1822 info->vendor = le16_to_cpu(qry.p_id);
1823 info->ext_addr = le16_to_cpu(qry.p_adr);
1824 num_erase_regions = qry.num_erase_regions;
1826 if (info->ext_addr) {
1827 info->cfi_version = (ushort) flash_read_uchar (info,
1828 info->ext_addr + 3) << 8;
1829 info->cfi_version |= (ushort) flash_read_uchar (info,
1830 info->ext_addr + 4);
1834 flash_printqry (&qry);
1837 switch (info->vendor) {
1838 case CFI_CMDSET_INTEL_PROG_REGIONS:
1839 case CFI_CMDSET_INTEL_STANDARD:
1840 case CFI_CMDSET_INTEL_EXTENDED:
1841 cmdset_intel_init(info, &qry);
1843 case CFI_CMDSET_AMD_STANDARD:
1844 case CFI_CMDSET_AMD_EXTENDED:
1845 cmdset_amd_init(info, &qry);
1848 printf("CFI: Unknown command set 0x%x\n",
1851 * Unfortunately, this means we don't know how
1852 * to get the chip back to Read mode. Might
1853 * as well try an Intel-style reset...
1855 flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1859 /* Do manufacturer-specific fixups */
1860 switch (info->manufacturer_id) {
1862 flash_fixup_amd(info, &qry);
1865 flash_fixup_atmel(info, &qry);
1869 debug ("manufacturer is %d\n", info->vendor);
1870 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
1871 debug ("device id is 0x%x\n", info->device_id);
1872 debug ("device id2 is 0x%x\n", info->device_id2);
1873 debug ("cfi version is 0x%04x\n", info->cfi_version);
1875 size_ratio = info->portwidth / info->chipwidth;
1876 /* if the chip is x8/x16 reduce the ratio by half */
1877 if ((info->interface == FLASH_CFI_X8X16)
1878 && (info->chipwidth == FLASH_CFI_BY8)) {
1881 debug ("size_ratio %d port %d bits chip %d bits\n",
1882 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1883 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1884 debug ("found %d erase regions\n", num_erase_regions);
1887 for (i = 0; i < num_erase_regions; i++) {
1888 if (i > NUM_ERASE_REGIONS) {
1889 printf ("%d erase regions found, only %d used\n",
1890 num_erase_regions, NUM_ERASE_REGIONS);
1894 tmp = le32_to_cpu(qry.erase_region_info[i]);
1895 debug("erase region %u: 0x%08lx\n", i, tmp);
1897 erase_region_count = (tmp & 0xffff) + 1;
1900 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1901 debug ("erase_region_count = %d erase_region_size = %d\n",
1902 erase_region_count, erase_region_size);
1903 for (j = 0; j < erase_region_count; j++) {
1904 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
1905 printf("ERROR: too many flash sectors\n");
1908 info->start[sect_cnt] = sector;
1909 sector += (erase_region_size * size_ratio);
1912 * Only read protection status from
1913 * supported devices (intel...)
1915 switch (info->vendor) {
1916 case CFI_CMDSET_INTEL_PROG_REGIONS:
1917 case CFI_CMDSET_INTEL_EXTENDED:
1918 case CFI_CMDSET_INTEL_STANDARD:
1919 info->protect[sect_cnt] =
1920 flash_isset (info, sect_cnt,
1921 FLASH_OFFSET_PROTECT,
1922 FLASH_STATUS_PROTECT);
1925 /* default: not protected */
1926 info->protect[sect_cnt] = 0;
1933 info->sector_count = sect_cnt;
1934 info->size = 1 << qry.dev_size;
1935 /* multiply the size by the number of chips */
1936 info->size *= size_ratio;
1937 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
1938 tmp = 1 << qry.block_erase_timeout_typ;
1939 info->erase_blk_tout = tmp *
1940 (1 << qry.block_erase_timeout_max);
1941 tmp = (1 << qry.buf_write_timeout_typ) *
1942 (1 << qry.buf_write_timeout_max);
1944 /* round up when converting to ms */
1945 info->buffer_write_tout = (tmp + 999) / 1000;
1946 tmp = (1 << qry.word_write_timeout_typ) *
1947 (1 << qry.word_write_timeout_max);
1948 /* round up when converting to ms */
1949 info->write_tout = (tmp + 999) / 1000;
1950 info->flash_id = FLASH_MAN_CFI;
1951 if ((info->interface == FLASH_CFI_X8X16) &&
1952 (info->chipwidth == FLASH_CFI_BY8)) {
1953 /* XXX - Need to test on x8/x16 in parallel. */
1954 info->portwidth >>= 1;
1957 flash_write_cmd (info, 0, 0, info->cmd_reset);
1960 return (info->size);
1963 /*-----------------------------------------------------------------------
1965 unsigned long flash_init (void)
1967 unsigned long size = 0;
1969 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
1973 } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
1976 #ifdef CONFIG_SYS_FLASH_PROTECTION
1977 char *s = getenv("unlock");
1980 #define BANK_BASE(i) (((unsigned long [CFI_MAX_FLASH_BANKS])CONFIG_SYS_FLASH_BANKS_LIST)[i])
1982 /* Init: no FLASHes known */
1983 for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
1984 flash_info[i].flash_id = FLASH_UNKNOWN;
1986 if (!flash_detect_legacy (BANK_BASE(i), i))
1987 flash_get_size (BANK_BASE(i), i);
1988 size += flash_info[i].size;
1989 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
1990 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
1991 printf ("## Unknown FLASH on Bank %d "
1992 "- Size = 0x%08lx = %ld MB\n",
1993 i+1, flash_info[i].size,
1994 flash_info[i].size << 20);
1995 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
1997 #ifdef CONFIG_SYS_FLASH_PROTECTION
1998 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
2000 * Only the U-Boot image and it's environment
2001 * is protected, all other sectors are
2002 * unprotected (unlocked) if flash hardware
2003 * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2004 * and the environment variable "unlock" is
2007 if (flash_info[i].legacy_unlock) {
2011 * Disable legacy_unlock temporarily,
2012 * since flash_real_protect would
2013 * relock all other sectors again
2016 flash_info[i].legacy_unlock = 0;
2019 * Legacy unlocking (e.g. Intel J3) ->
2020 * unlock only one sector. This will
2021 * unlock all sectors.
2023 flash_real_protect (&flash_info[i], 0, 0);
2025 flash_info[i].legacy_unlock = 1;
2028 * Manually mark other sectors as
2029 * unlocked (unprotected)
2031 for (k = 1; k < flash_info[i].sector_count; k++)
2032 flash_info[i].protect[k] = 0;
2035 * No legancy unlocking -> unlock all sectors
2037 flash_protect (FLAG_PROTECT_CLEAR,
2038 flash_info[i].start[0],
2039 flash_info[i].start[0]
2040 + flash_info[i].size - 1,
2044 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2047 /* Monitor protection ON by default */
2048 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
2049 flash_protect (FLAG_PROTECT_SET,
2050 CONFIG_SYS_MONITOR_BASE,
2051 CONFIG_SYS_MONITOR_BASE + monitor_flash_len - 1,
2052 flash_get_info(CONFIG_SYS_MONITOR_BASE));
2055 /* Environment protection ON by default */
2056 #ifdef CONFIG_ENV_IS_IN_FLASH
2057 flash_protect (FLAG_PROTECT_SET,
2059 CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2060 flash_get_info(CONFIG_ENV_ADDR));
2063 /* Redundant environment protection ON by default */
2064 #ifdef CONFIG_ENV_ADDR_REDUND
2065 flash_protect (FLAG_PROTECT_SET,
2066 CONFIG_ENV_ADDR_REDUND,
2067 CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SIZE_REDUND - 1,
2068 flash_get_info(CONFIG_ENV_ADDR_REDUND));
2071 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2072 for (i = 0; i < (sizeof(apl) / sizeof(struct apl_s)); i++) {
2073 debug("autoprotecting from %08x to %08x\n",
2074 apl[i].start, apl[i].start + apl[i].size - 1);
2075 flash_protect (FLAG_PROTECT_SET,
2077 apl[i].start + apl[i].size - 1,
2078 flash_get_info(apl[i].start));