drivers/mtd/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  *
   8  * Copyright (C) 2004
   9  * Ed Okerson
  10  *
  11  * Copyright (C) 2006
  12  * Tolunay Orkun <listmember@orkun.us>
  13  *
  14  * SPDX-License-Identifier:     GPL-2.0+
  15  */
  16
  17 /* The DEBUG define must be before common to enable debugging */
  18 /* #define DEBUG        */
  19
  20 #include <common.h>
  21 #include <console.h>
  22 #include <dm.h>
  23 #include <errno.h>
  24 #include <fdt_support.h>
  25 #include <asm/processor.h>
  26 #include <asm/io.h>
  27 #include <asm/byteorder.h>
  28 #include <asm/unaligned.h>
  29 #include <environment.h>
  30 #include <mtd/cfi_flash.h>
  31 #include <watchdog.h>
  32
  33 /*
  34  * This file implements a Common Flash Interface (CFI) driver for
  35  * U-Boot.
  36  *
  37  * The width of the port and the width of the chips are determined at
  38  * initialization.  These widths are used to calculate the address for
  39  * access CFI data structures.
  40  *
  41  * References
  42  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  43  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  44  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  45  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  46  * AMD CFI Specification, Release 2.0 December 1, 2001
  47  * AMD/Spansion Application Note: Migration from Single-byte to Three-byte
  48  *   Device IDs, Publication Number 25538 Revision A, November 8, 2001
  49  *
  50  * Define CONFIG_SYS_WRITE_SWAPPED_DATA, if you have to swap the Bytes between
  51  * reading and writing ... (yes there is such a Hardware).
  52  */
  53
  54 DECLARE_GLOBAL_DATA_PTR;
  55
  56 static uint flash_offset_cfi[2] = { FLASH_OFFSET_CFI, FLASH_OFFSET_CFI_ALT };
  57 #ifdef CONFIG_FLASH_CFI_MTD
  58 static uint flash_verbose = 1;
  59 #else
  60 #define flash_verbose 1
  61 #endif
  62
  63 flash_info_t flash_info[CFI_MAX_FLASH_BANKS];   /* FLASH chips info */
  64
  65 /*
  66  * Check if chip width is defined. If not, start detecting with 8bit.
  67  */
  68 #ifndef CONFIG_SYS_FLASH_CFI_WIDTH
  69 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_8BIT
  70 #endif
  71
  72 #ifdef CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
  73 #define __maybe_weak __weak
  74 #else
  75 #define __maybe_weak static
  76 #endif
  77
  78 /*
  79  * 0xffff is an undefined value for the configuration register. When
  80  * this value is returned, the configuration register shall not be
  81  * written at all (default mode).
  82  */
  83 static u16 cfi_flash_config_reg(int i)
  84 {
  85 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
  86         return ((u16 [])CONFIG_SYS_CFI_FLASH_CONFIG_REGS)[i];
  87 #else
  88         return 0xffff;
  89 #endif
  90 }
  91
  92 #if defined(CONFIG_SYS_MAX_FLASH_BANKS_DETECT)
  93 int cfi_flash_num_flash_banks = CONFIG_SYS_MAX_FLASH_BANKS_DETECT;
  94 #endif
  95
  96 #ifdef CONFIG_CFI_FLASH /* for driver model */
  97 static void cfi_flash_init_dm(void)
  98 {
  99         struct udevice *dev;
 100
 101         cfi_flash_num_flash_banks = 0;
 102         /*
 103          * The uclass_first_device() will probe the first device and
 104          * uclass_next_device() will probe the rest if they exist. So
 105          * that cfi_flash_probe() will get called assigning the base
 106          * addresses that are available.
 107          */
 108         for (uclass_first_device(UCLASS_MTD, &dev);
 109              dev;
 110              uclass_next_device(&dev)) {
 111         }
 112 }
 113
 114 phys_addr_t cfi_flash_bank_addr(int i)
 115 {
 116         return flash_info[i].base;
 117 }
 118 #else
 119 __weak phys_addr_t cfi_flash_bank_addr(int i)
 120 {
 121         return ((phys_addr_t [])CONFIG_SYS_FLASH_BANKS_LIST)[i];
 122 }
 123 #endif
 124
 125 __weak unsigned long cfi_flash_bank_size(int i)
 126 {
 127 #ifdef CONFIG_SYS_FLASH_BANKS_SIZES
 128         return ((unsigned long [])CONFIG_SYS_FLASH_BANKS_SIZES)[i];
 129 #else
 130         return 0;
 131 #endif
 132 }
 133
 134 __maybe_weak void flash_write8(u8 value, void *addr)
 135 {
 136         __raw_writeb(value, addr);
 137 }
 138
 139 __maybe_weak void flash_write16(u16 value, void *addr)
 140 {
 141         __raw_writew(value, addr);
 142 }
 143
 144 __maybe_weak void flash_write32(u32 value, void *addr)
 145 {
 146         __raw_writel(value, addr);
 147 }
 148
 149 __maybe_weak void flash_write64(u64 value, void *addr)
 150 {
 151         /* No architectures currently implement __raw_writeq() */
 152         *(volatile u64 *)addr = value;
 153 }
 154
 155 __maybe_weak u8 flash_read8(void *addr)
 156 {
 157         return __raw_readb(addr);
 158 }
 159
 160 __maybe_weak u16 flash_read16(void *addr)
 161 {
 162         return __raw_readw(addr);
 163 }
 164
 165 __maybe_weak u32 flash_read32(void *addr)
 166 {
 167         return __raw_readl(addr);
 168 }
 169
 170 __maybe_weak u64 flash_read64(void *addr)
 171 {
 172         /* No architectures currently implement __raw_readq() */
 173         return *(volatile u64 *)addr;
 174 }
 175
 176 /*-----------------------------------------------------------------------
 177  */
 178 #if defined(CONFIG_ENV_IS_IN_FLASH) || defined(CONFIG_ENV_ADDR_REDUND) || (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE)
 179 static flash_info_t *flash_get_info(ulong base)
 180 {
 181         int i;
 182         flash_info_t *info;
 183
 184         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; i++) {
 185                 info = &flash_info[i];
 186                 if (info->size && info->start[0] <= base &&
 187                     base <= info->start[0] + info->size - 1)
 188                         return info;
 189         }
 190
 191         return NULL;
 192 }
 193 #endif
 194
 195 unsigned long flash_sector_size(flash_info_t *info, flash_sect_t sect)
 196 {
 197         if (sect != (info->sector_count - 1))
 198                 return info->start[sect + 1] - info->start[sect];
 199         else
 200                 return info->start[0] + info->size - info->start[sect];
 201 }
 202
 203 /*-----------------------------------------------------------------------
 204  * create an address based on the offset and the port width
 205  */
 206 static inline void *
 207 flash_map (flash_info_t * info, flash_sect_t sect, uint offset)
 208 {
 209         unsigned int byte_offset = offset * info->portwidth;
 210
 211         return (void *)(info->start[sect] + byte_offset);
 212 }
 213
 214 static inline void flash_unmap(flash_info_t *info, flash_sect_t sect,
 215                 unsigned int offset, void *addr)
 216 {
 217 }
 218
 219 /*-----------------------------------------------------------------------
 220  * make a proper sized command based on the port and chip widths
 221  */
 222 static void flash_make_cmd(flash_info_t *info, u32 cmd, void *cmdbuf)
 223 {
 224         int i;
 225         int cword_offset;
 226         int cp_offset;
 227 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 228         u32 cmd_le = cpu_to_le32(cmd);
 229 #endif
 230         uchar val;
 231         uchar *cp = (uchar *) cmdbuf;
 232
 233         for (i = info->portwidth; i > 0; i--){
 234                 cword_offset = (info->portwidth-i)%info->chipwidth;
 235 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 236                 cp_offset = info->portwidth - i;
 237                 val = *((uchar*)&cmd_le + cword_offset);
 238 #else
 239                 cp_offset = i - 1;
 240                 val = *((uchar*)&cmd + sizeof(u32) - cword_offset - 1);
 241 #endif
 242                 cp[cp_offset] = (cword_offset >= sizeof(u32)) ? 0x00 : val;
 243         }
 244 }
 245
 246 #ifdef DEBUG
 247 /*-----------------------------------------------------------------------
 248  * Debug support
 249  */
 250 static void print_longlong (char *str, unsigned long long data)
 251 {
 252         int i;
 253         char *cp;
 254
 255         cp = (char *) &data;
 256         for (i = 0; i < 8; i++)
 257                 sprintf (&str[i * 2], "%2.2x", *cp++);
 258 }
 259
 260 static void flash_printqry (struct cfi_qry *qry)
 261 {
 262         u8 *p = (u8 *)qry;
 263         int x, y;
 264
 265         for (x = 0; x < sizeof(struct cfi_qry); x += 16) {
 266                 debug("%02x : ", x);
 267                 for (y = 0; y < 16; y++)
 268                         debug("%2.2x ", p[x + y]);
 269                 debug(" ");
 270                 for (y = 0; y < 16; y++) {
 271                         unsigned char c = p[x + y];
 272                         if (c >= 0x20 && c <= 0x7e)
 273                                 debug("%c", c);
 274                         else
 275                                 debug(".");
 276                 }
 277                 debug("\n");
 278         }
 279 }
 280 #endif
 281
 282
 283 /*-----------------------------------------------------------------------
 284  * read a character at a port width address
 285  */
 286 static inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 287 {
 288         uchar *cp;
 289         uchar retval;
 290
 291         cp = flash_map (info, 0, offset);
 292 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 293         retval = flash_read8(cp);
 294 #else
 295         retval = flash_read8(cp + info->portwidth - 1);
 296 #endif
 297         flash_unmap (info, 0, offset, cp);
 298         return retval;
 299 }
 300
 301 /*-----------------------------------------------------------------------
 302  * read a word at a port width address, assume 16bit bus
 303  */
 304 static inline ushort flash_read_word (flash_info_t * info, uint offset)
 305 {
 306         ushort *addr, retval;
 307
 308         addr = flash_map (info, 0, offset);
 309         retval = flash_read16 (addr);
 310         flash_unmap (info, 0, offset, addr);
 311         return retval;
 312 }
 313
 314
 315 /*-----------------------------------------------------------------------
 316  * read a long word by picking the least significant byte of each maximum
 317  * port size word. Swap for ppc format.
 318  */
 319 static ulong flash_read_long (flash_info_t * info, flash_sect_t sect,
 320                               uint offset)
 321 {
 322         uchar *addr;
 323         ulong retval;
 324
 325 #ifdef DEBUG
 326         int x;
 327 #endif
 328         addr = flash_map (info, sect, offset);
 329
 330 #ifdef DEBUG
 331         debug ("long addr is at %p info->portwidth = %d\n", addr,
 332                info->portwidth);
 333         for (x = 0; x < 4 * info->portwidth; x++) {
 334                 debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x));
 335         }
 336 #endif
 337 #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 338         retval = ((flash_read8(addr) << 16) |
 339                   (flash_read8(addr + info->portwidth) << 24) |
 340                   (flash_read8(addr + 2 * info->portwidth)) |
 341                   (flash_read8(addr + 3 * info->portwidth) << 8));
 342 #else
 343         retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) |
 344                   (flash_read8(addr + info->portwidth - 1) << 16) |
 345                   (flash_read8(addr + 4 * info->portwidth - 1) << 8) |
 346                   (flash_read8(addr + 3 * info->portwidth - 1)));
 347 #endif
 348         flash_unmap(info, sect, offset, addr);
 349
 350         return retval;
 351 }
 352
 353 /*
 354  * Write a proper sized command to the correct address
 355  */
 356 static void flash_write_cmd(flash_info_t *info, flash_sect_t sect,
 357                             uint offset, u32 cmd)
 358 {
 359
 360         void *addr;
 361         cfiword_t cword;
 362
 363         addr = flash_map (info, sect, offset);
 364         flash_make_cmd (info, cmd, &cword);
 365         switch (info->portwidth) {
 366         case FLASH_CFI_8BIT:
 367                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd,
 368                        cword.w8, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 369                 flash_write8(cword.w8, addr);
 370                 break;
 371         case FLASH_CFI_16BIT:
 372                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr,
 373                        cmd, cword.w16,
 374                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 375                 flash_write16(cword.w16, addr);
 376                 break;
 377         case FLASH_CFI_32BIT:
 378                 debug ("fwc addr %p cmd %x %8.8x 32bit x %d bit\n", addr,
 379                        cmd, cword.w32,
 380                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 381                 flash_write32(cword.w32, addr);
 382                 break;
 383         case FLASH_CFI_64BIT:
 384 #ifdef DEBUG
 385                 {
 386                         char str[20];
 387
 388                         print_longlong (str, cword.w64);
 389
 390                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 391                                addr, cmd, str,
 392                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 393                 }
 394 #endif
 395                 flash_write64(cword.w64, addr);
 396                 break;
 397         }
 398
 399         /* Ensure all the instructions are fully finished */
 400         sync();
 401
 402         flash_unmap(info, sect, offset, addr);
 403 }
 404
 405 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 406 {
 407         flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_UNLOCK_START);
 408         flash_write_cmd (info, sect, info->addr_unlock2, AMD_CMD_UNLOCK_ACK);
 409 }
 410
 411 /*-----------------------------------------------------------------------
 412  */
 413 static int flash_isequal (flash_info_t * info, flash_sect_t sect,
 414                           uint offset, uchar cmd)
 415 {
 416         void *addr;
 417         cfiword_t cword;
 418         int retval;
 419
 420         addr = flash_map (info, sect, offset);
 421         flash_make_cmd (info, cmd, &cword);
 422
 423         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr);
 424         switch (info->portwidth) {
 425         case FLASH_CFI_8BIT:
 426                 debug ("is= %x %x\n", flash_read8(addr), cword.w8);
 427                 retval = (flash_read8(addr) == cword.w8);
 428                 break;
 429         case FLASH_CFI_16BIT:
 430                 debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w16);
 431                 retval = (flash_read16(addr) == cword.w16);
 432                 break;
 433         case FLASH_CFI_32BIT:
 434                 debug ("is= %8.8x %8.8x\n", flash_read32(addr), cword.w32);
 435                 retval = (flash_read32(addr) == cword.w32);
 436                 break;
 437         case FLASH_CFI_64BIT:
 438 #ifdef DEBUG
 439                 {
 440                         char str1[20];
 441                         char str2[20];
 442
 443                         print_longlong (str1, flash_read64(addr));
 444                         print_longlong (str2, cword.w64);
 445                         debug ("is= %s %s\n", str1, str2);
 446                 }
 447 #endif
 448                 retval = (flash_read64(addr) == cword.w64);
 449                 break;
 450         default:
 451                 retval = 0;
 452                 break;
 453         }
 454         flash_unmap(info, sect, offset, addr);
 455
 456         return retval;
 457 }
 458
 459 /*-----------------------------------------------------------------------
 460  */
 461 static int flash_isset (flash_info_t * info, flash_sect_t sect,
 462                         uint offset, uchar cmd)
 463 {
 464         void *addr;
 465         cfiword_t cword;
 466         int retval;
 467
 468         addr = flash_map (info, sect, offset);
 469         flash_make_cmd (info, cmd, &cword);
 470         switch (info->portwidth) {
 471         case FLASH_CFI_8BIT:
 472                 retval = ((flash_read8(addr) & cword.w8) == cword.w8);
 473                 break;
 474         case FLASH_CFI_16BIT:
 475                 retval = ((flash_read16(addr) & cword.w16) == cword.w16);
 476                 break;
 477         case FLASH_CFI_32BIT:
 478                 retval = ((flash_read32(addr) & cword.w32) == cword.w32);
 479                 break;
 480         case FLASH_CFI_64BIT:
 481                 retval = ((flash_read64(addr) & cword.w64) == cword.w64);
 482                 break;
 483         default:
 484                 retval = 0;
 485                 break;
 486         }
 487         flash_unmap(info, sect, offset, addr);
 488
 489         return retval;
 490 }
 491
 492 /*-----------------------------------------------------------------------
 493  */
 494 static int flash_toggle (flash_info_t * info, flash_sect_t sect,
 495                          uint offset, uchar cmd)
 496 {
 497         void *addr;
 498         cfiword_t cword;
 499         int retval;
 500
 501         addr = flash_map (info, sect, offset);
 502         flash_make_cmd (info, cmd, &cword);
 503         switch (info->portwidth) {
 504         case FLASH_CFI_8BIT:
 505                 retval = flash_read8(addr) != flash_read8(addr);
 506                 break;
 507         case FLASH_CFI_16BIT:
 508                 retval = flash_read16(addr) != flash_read16(addr);
 509                 break;
 510         case FLASH_CFI_32BIT:
 511                 retval = flash_read32(addr) != flash_read32(addr);
 512                 break;
 513         case FLASH_CFI_64BIT:
 514                 retval = ( (flash_read32( addr ) != flash_read32( addr )) ||
 515                            (flash_read32(addr+4) != flash_read32(addr+4)) );
 516                 break;
 517         default:
 518                 retval = 0;
 519                 break;
 520         }
 521         flash_unmap(info, sect, offset, addr);
 522
 523         return retval;
 524 }
 525
 526 /*
 527  * flash_is_busy - check to see if the flash is busy
 528  *
 529  * This routine checks the status of the chip and returns true if the
 530  * chip is busy.
 531  */
 532 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 533 {
 534         int retval;
 535
 536         switch (info->vendor) {
 537         case CFI_CMDSET_INTEL_PROG_REGIONS:
 538         case CFI_CMDSET_INTEL_STANDARD:
 539         case CFI_CMDSET_INTEL_EXTENDED:
 540                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 541                 break;
 542         case CFI_CMDSET_AMD_STANDARD:
 543         case CFI_CMDSET_AMD_EXTENDED:
 544 #ifdef CONFIG_FLASH_CFI_LEGACY
 545         case CFI_CMDSET_AMD_LEGACY:
 546 #endif
 547                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 548                 break;
 549         default:
 550                 retval = 0;
 551         }
 552         debug ("flash_is_busy: %d\n", retval);
 553         return retval;
 554 }
 555
 556 /*-----------------------------------------------------------------------
 557  *  wait for XSR.7 to be set. Time out with an error if it does not.
 558  *  This routine does not set the flash to read-array mode.
 559  */
 560 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 561                                ulong tout, char *prompt)
 562 {
 563         ulong start;
 564
 565 #if CONFIG_SYS_HZ != 1000
 566         if ((ulong)CONFIG_SYS_HZ > 100000)
 567                 tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
 568         else
 569                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 570 #endif
 571
 572         /* Wait for command completion */
 573 #ifdef CONFIG_SYS_LOW_RES_TIMER
 574         reset_timer();
 575 #endif
 576         start = get_timer (0);
 577         WATCHDOG_RESET();
 578         while (flash_is_busy (info, sector)) {
 579                 if (get_timer (start) > tout) {
 580                         printf ("Flash %s timeout at address %lx data %lx\n",
 581                                 prompt, info->start[sector],
 582                                 flash_read_long (info, sector, 0));
 583                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 584                         udelay(1);
 585                         return ERR_TIMOUT;
 586                 }
 587                 udelay (1);             /* also triggers watchdog */
 588         }
 589         return ERR_OK;
 590 }
 591
 592 /*-----------------------------------------------------------------------
 593  * Wait for XSR.7 to be set, if it times out print an error, otherwise
 594  * do a full status check.
 595  *
 596  * This routine sets the flash to read-array mode.
 597  */
 598 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 599                                     ulong tout, char *prompt)
 600 {
 601         int retcode;
 602
 603         retcode = flash_status_check (info, sector, tout, prompt);
 604         switch (info->vendor) {
 605         case CFI_CMDSET_INTEL_PROG_REGIONS:
 606         case CFI_CMDSET_INTEL_EXTENDED:
 607         case CFI_CMDSET_INTEL_STANDARD:
 608                 if ((retcode == ERR_OK)
 609                     && !flash_isset(info, sector, 0, FLASH_STATUS_DONE)) {
 610                         retcode = ERR_INVAL;
 611                         printf ("Flash %s error at address %lx\n", prompt,
 612                                 info->start[sector]);
 613                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS |
 614                                          FLASH_STATUS_PSLBS)) {
 615                                 puts ("Command Sequence Error.\n");
 616                         } else if (flash_isset (info, sector, 0,
 617                                                 FLASH_STATUS_ECLBS)) {
 618                                 puts ("Block Erase Error.\n");
 619                                 retcode = ERR_NOT_ERASED;
 620                         } else if (flash_isset (info, sector, 0,
 621                                                 FLASH_STATUS_PSLBS)) {
 622                                 puts ("Locking Error\n");
 623                         }
 624                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 625                                 puts ("Block locked.\n");
 626                                 retcode = ERR_PROTECTED;
 627                         }
 628                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 629                                 puts ("Vpp Low Error.\n");
 630                 }
 631                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 632                 udelay(1);
 633                 break;
 634         default:
 635                 break;
 636         }
 637         return retcode;
 638 }
 639
 640 static int use_flash_status_poll(flash_info_t *info)
 641 {
 642 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 643         if (info->vendor == CFI_CMDSET_AMD_EXTENDED ||
 644             info->vendor == CFI_CMDSET_AMD_STANDARD)
 645                 return 1;
 646 #endif
 647         return 0;
 648 }
 649
 650 static int flash_status_poll(flash_info_t *info, void *src, void *dst,
 651                              ulong tout, char *prompt)
 652 {
 653 #ifdef CONFIG_SYS_CFI_FLASH_STATUS_POLL
 654         ulong start;
 655         int ready;
 656
 657 #if CONFIG_SYS_HZ != 1000
 658         if ((ulong)CONFIG_SYS_HZ > 100000)
 659                 tout *= (ulong)CONFIG_SYS_HZ / 1000;  /* for a big HZ, avoid overflow */
 660         else
 661                 tout = DIV_ROUND_UP(tout * (ulong)CONFIG_SYS_HZ, 1000);
 662 #endif
 663
 664         /* Wait for command completion */
 665 #ifdef CONFIG_SYS_LOW_RES_TIMER
 666         reset_timer();
 667 #endif
 668         start = get_timer(0);
 669         WATCHDOG_RESET();
 670         while (1) {
 671                 switch (info->portwidth) {
 672                 case FLASH_CFI_8BIT:
 673                         ready = flash_read8(dst) == flash_read8(src);
 674                         break;
 675                 case FLASH_CFI_16BIT:
 676                         ready = flash_read16(dst) == flash_read16(src);
 677                         break;
 678                 case FLASH_CFI_32BIT:
 679                         ready = flash_read32(dst) == flash_read32(src);
 680                         break;
 681                 case FLASH_CFI_64BIT:
 682                         ready = flash_read64(dst) == flash_read64(src);
 683                         break;
 684                 default:
 685                         ready = 0;
 686                         break;
 687                 }
 688                 if (ready)
 689                         break;
 690                 if (get_timer(start) > tout) {
 691                         printf("Flash %s timeout at address %lx data %lx\n",
 692                                prompt, (ulong)dst, (ulong)flash_read8(dst));
 693                         return ERR_TIMOUT;
 694                 }
 695                 udelay(1);              /* also triggers watchdog */
 696         }
 697 #endif /* CONFIG_SYS_CFI_FLASH_STATUS_POLL */
 698         return ERR_OK;
 699 }
 700
 701 /*-----------------------------------------------------------------------
 702  */
 703 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 704 {
 705 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 706         unsigned short  w;
 707         unsigned int    l;
 708         unsigned long long ll;
 709 #endif
 710
 711         switch (info->portwidth) {
 712         case FLASH_CFI_8BIT:
 713                 cword->w8 = c;
 714                 break;
 715         case FLASH_CFI_16BIT:
 716 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 717                 w = c;
 718                 w <<= 8;
 719                 cword->w16 = (cword->w16 >> 8) | w;
 720 #else
 721                 cword->w16 = (cword->w16 << 8) | c;
 722 #endif
 723                 break;
 724         case FLASH_CFI_32BIT:
 725 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 726                 l = c;
 727                 l <<= 24;
 728                 cword->w32 = (cword->w32 >> 8) | l;
 729 #else
 730                 cword->w32 = (cword->w32 << 8) | c;
 731 #endif
 732                 break;
 733         case FLASH_CFI_64BIT:
 734 #if defined(__LITTLE_ENDIAN) && !defined(CONFIG_SYS_WRITE_SWAPPED_DATA)
 735                 ll = c;
 736                 ll <<= 56;
 737                 cword->w64 = (cword->w64 >> 8) | ll;
 738 #else
 739                 cword->w64 = (cword->w64 << 8) | c;
 740 #endif
 741                 break;
 742         }
 743 }
 744
 745 /*
 746  * Loop through the sector table starting from the previously found sector.
 747  * Searches forwards or backwards, dependent on the passed address.
 748  */
 749 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
 750 {
 751         static flash_sect_t saved_sector; /* previously found sector */
 752         static flash_info_t *saved_info; /* previously used flash bank */
 753         flash_sect_t sector = saved_sector;
 754
 755         if ((info != saved_info) || (sector >= info->sector_count))
 756                 sector = 0;
 757
 758         while ((info->start[sector] < addr)
 759                         && (sector < info->sector_count - 1))
 760                 sector++;
 761         while ((info->start[sector] > addr) && (sector > 0))
 762                 /*
 763                  * also decrements the sector in case of an overshot
 764                  * in the first loop
 765                  */
 766                 sector--;
 767
 768         saved_sector = sector;
 769         saved_info = info;
 770         return sector;
 771 }
 772
 773 /*-----------------------------------------------------------------------
 774  */
 775 static int flash_write_cfiword (flash_info_t * info, ulong dest,
 776                                 cfiword_t cword)
 777 {
 778         void *dstaddr = (void *)dest;
 779         int flag;
 780         flash_sect_t sect = 0;
 781         char sect_found = 0;
 782
 783         /* Check if Flash is (sufficiently) erased */
 784         switch (info->portwidth) {
 785         case FLASH_CFI_8BIT:
 786                 flag = ((flash_read8(dstaddr) & cword.w8) == cword.w8);
 787                 break;
 788         case FLASH_CFI_16BIT:
 789                 flag = ((flash_read16(dstaddr) & cword.w16) == cword.w16);
 790                 break;
 791         case FLASH_CFI_32BIT:
 792                 flag = ((flash_read32(dstaddr) & cword.w32) == cword.w32);
 793                 break;
 794         case FLASH_CFI_64BIT:
 795                 flag = ((flash_read64(dstaddr) & cword.w64) == cword.w64);
 796                 break;
 797         default:
 798                 flag = 0;
 799                 break;
 800         }
 801         if (!flag)
 802                 return ERR_NOT_ERASED;
 803
 804         /* Disable interrupts which might cause a timeout here */
 805         flag = disable_interrupts ();
 806
 807         switch (info->vendor) {
 808         case CFI_CMDSET_INTEL_PROG_REGIONS:
 809         case CFI_CMDSET_INTEL_EXTENDED:
 810         case CFI_CMDSET_INTEL_STANDARD:
 811                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
 812                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
 813                 break;
 814         case CFI_CMDSET_AMD_EXTENDED:
 815         case CFI_CMDSET_AMD_STANDARD:
 816                 sect = find_sector(info, dest);
 817                 flash_unlock_seq (info, sect);
 818                 flash_write_cmd (info, sect, info->addr_unlock1, AMD_CMD_WRITE);
 819                 sect_found = 1;
 820                 break;
 821 #ifdef CONFIG_FLASH_CFI_LEGACY
 822         case CFI_CMDSET_AMD_LEGACY:
 823                 sect = find_sector(info, dest);
 824                 flash_unlock_seq (info, 0);
 825                 flash_write_cmd (info, 0, info->addr_unlock1, AMD_CMD_WRITE);
 826                 sect_found = 1;
 827                 break;
 828 #endif
 829         }
 830
 831         switch (info->portwidth) {
 832         case FLASH_CFI_8BIT:
 833                 flash_write8(cword.w8, dstaddr);
 834                 break;
 835         case FLASH_CFI_16BIT:
 836                 flash_write16(cword.w16, dstaddr);
 837                 break;
 838         case FLASH_CFI_32BIT:
 839                 flash_write32(cword.w32, dstaddr);
 840                 break;
 841         case FLASH_CFI_64BIT:
 842                 flash_write64(cword.w64, dstaddr);
 843                 break;
 844         }
 845
 846         /* re-enable interrupts if necessary */
 847         if (flag)
 848                 enable_interrupts ();
 849
 850         if (!sect_found)
 851                 sect = find_sector (info, dest);
 852
 853         if (use_flash_status_poll(info))
 854                 return flash_status_poll(info, &cword, dstaddr,
 855                                          info->write_tout, "write");
 856         else
 857                 return flash_full_status_check(info, sect,
 858                                                info->write_tout, "write");
 859 }
 860
 861 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
 862
 863 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 864                                   int len)
 865 {
 866         flash_sect_t sector;
 867         int cnt;
 868         int retcode;
 869         void *src = cp;
 870         void *dst = (void *)dest;
 871         void *dst2 = dst;
 872         int flag = 1;
 873         uint offset = 0;
 874         unsigned int shift;
 875         uchar write_cmd;
 876
 877         switch (info->portwidth) {
 878         case FLASH_CFI_8BIT:
 879                 shift = 0;
 880                 break;
 881         case FLASH_CFI_16BIT:
 882                 shift = 1;
 883                 break;
 884         case FLASH_CFI_32BIT:
 885                 shift = 2;
 886                 break;
 887         case FLASH_CFI_64BIT:
 888                 shift = 3;
 889                 break;
 890         default:
 891                 retcode = ERR_INVAL;
 892                 goto out_unmap;
 893         }
 894
 895         cnt = len >> shift;
 896
 897         while ((cnt-- > 0) && (flag == 1)) {
 898                 switch (info->portwidth) {
 899                 case FLASH_CFI_8BIT:
 900                         flag = ((flash_read8(dst2) & flash_read8(src)) ==
 901                                 flash_read8(src));
 902                         src += 1, dst2 += 1;
 903                         break;
 904                 case FLASH_CFI_16BIT:
 905                         flag = ((flash_read16(dst2) & flash_read16(src)) ==
 906                                 flash_read16(src));
 907                         src += 2, dst2 += 2;
 908                         break;
 909                 case FLASH_CFI_32BIT:
 910                         flag = ((flash_read32(dst2) & flash_read32(src)) ==
 911                                 flash_read32(src));
 912                         src += 4, dst2 += 4;
 913                         break;
 914                 case FLASH_CFI_64BIT:
 915                         flag = ((flash_read64(dst2) & flash_read64(src)) ==
 916                                 flash_read64(src));
 917                         src += 8, dst2 += 8;
 918                         break;
 919                 }
 920         }
 921         if (!flag) {
 922                 retcode = ERR_NOT_ERASED;
 923                 goto out_unmap;
 924         }
 925
 926         src = cp;
 927         sector = find_sector (info, dest);
 928
 929         switch (info->vendor) {
 930         case CFI_CMDSET_INTEL_PROG_REGIONS:
 931         case CFI_CMDSET_INTEL_STANDARD:
 932         case CFI_CMDSET_INTEL_EXTENDED:
 933                 write_cmd = (info->vendor == CFI_CMDSET_INTEL_PROG_REGIONS) ?
 934                                         FLASH_CMD_WRITE_BUFFER_PROG : FLASH_CMD_WRITE_TO_BUFFER;
 935                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 936                 flash_write_cmd (info, sector, 0, FLASH_CMD_READ_STATUS);
 937                 flash_write_cmd (info, sector, 0, write_cmd);
 938                 retcode = flash_status_check (info, sector,
 939                                               info->buffer_write_tout,
 940                                               "write to buffer");
 941                 if (retcode == ERR_OK) {
 942                         /* reduce the number of loops by the width of
 943                          * the port */
 944                         cnt = len >> shift;
 945                         flash_write_cmd (info, sector, 0, cnt - 1);
 946                         while (cnt-- > 0) {
 947                                 switch (info->portwidth) {
 948                                 case FLASH_CFI_8BIT:
 949                                         flash_write8(flash_read8(src), dst);
 950                                         src += 1, dst += 1;
 951                                         break;
 952                                 case FLASH_CFI_16BIT:
 953                                         flash_write16(flash_read16(src), dst);
 954                                         src += 2, dst += 2;
 955                                         break;
 956                                 case FLASH_CFI_32BIT:
 957                                         flash_write32(flash_read32(src), dst);
 958                                         src += 4, dst += 4;
 959                                         break;
 960                                 case FLASH_CFI_64BIT:
 961                                         flash_write64(flash_read64(src), dst);
 962                                         src += 8, dst += 8;
 963                                         break;
 964                                 default:
 965                                         retcode = ERR_INVAL;
 966                                         goto out_unmap;
 967                                 }
 968                         }
 969                         flash_write_cmd (info, sector, 0,
 970                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
 971                         retcode = flash_full_status_check (
 972                                 info, sector, info->buffer_write_tout,
 973                                 "buffer write");
 974                 }
 975
 976                 break;
 977
 978         case CFI_CMDSET_AMD_STANDARD:
 979         case CFI_CMDSET_AMD_EXTENDED:
 980                 flash_unlock_seq(info, sector);
 981
 982 #ifdef CONFIG_FLASH_SPANSION_S29WS_N
 983                 offset = ((unsigned long)dst - info->start[sector]) >> shift;
 984 #endif
 985                 flash_write_cmd(info, sector, offset, AMD_CMD_WRITE_TO_BUFFER);
 986                 cnt = len >> shift;
 987                 flash_write_cmd(info, sector, offset, cnt - 1);
 988
 989                 switch (info->portwidth) {
 990                 case FLASH_CFI_8BIT:
 991                         while (cnt-- > 0) {
 992                                 flash_write8(flash_read8(src), dst);
 993                                 src += 1, dst += 1;
 994                         }
 995                         break;
 996                 case FLASH_CFI_16BIT:
 997                         while (cnt-- > 0) {
 998                                 flash_write16(flash_read16(src), dst);
 999                                 src += 2, dst += 2;
1000                         }
1001                         break;
1002                 case FLASH_CFI_32BIT:
1003                         while (cnt-- > 0) {
1004                                 flash_write32(flash_read32(src), dst);
1005                                 src += 4, dst += 4;
1006                         }
1007                         break;
1008                 case FLASH_CFI_64BIT:
1009                         while (cnt-- > 0) {
1010                                 flash_write64(flash_read64(src), dst);
1011                                 src += 8, dst += 8;
1012                         }
1013                         break;
1014                 default:
1015                         retcode = ERR_INVAL;
1016                         goto out_unmap;
1017                 }
1018
1019                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1020                 if (use_flash_status_poll(info))
1021                         retcode = flash_status_poll(info, src - (1 << shift),
1022                                                     dst - (1 << shift),
1023                                                     info->buffer_write_tout,
1024                                                     "buffer write");
1025                 else
1026                         retcode = flash_full_status_check(info, sector,
1027                                                           info->buffer_write_tout,
1028                                                           "buffer write");
1029                 break;
1030
1031         default:
1032                 debug ("Unknown Command Set\n");
1033                 retcode = ERR_INVAL;
1034                 break;
1035         }
1036
1037 out_unmap:
1038         return retcode;
1039 }
1040 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1041
1042
1043 /*-----------------------------------------------------------------------
1044  */
1045 int flash_erase (flash_info_t * info, int s_first, int s_last)
1046 {
1047         int rcode = 0;
1048         int prot;
1049         flash_sect_t sect;
1050         int st;
1051
1052         if (info->flash_id != FLASH_MAN_CFI) {
1053                 puts ("Can't erase unknown flash type - aborted\n");
1054                 return 1;
1055         }
1056         if ((s_first < 0) || (s_first > s_last)) {
1057                 puts ("- no sectors to erase\n");
1058                 return 1;
1059         }
1060
1061         prot = 0;
1062         for (sect = s_first; sect <= s_last; ++sect) {
1063                 if (info->protect[sect]) {
1064                         prot++;
1065                 }
1066         }
1067         if (prot) {
1068                 printf ("- Warning: %d protected sectors will not be erased!\n",
1069                         prot);
1070         } else if (flash_verbose) {
1071                 putc ('\n');
1072         }
1073
1074
1075         for (sect = s_first; sect <= s_last; sect++) {
1076                 if (ctrlc()) {
1077                         printf("\n");
1078                         return 1;
1079                 }
1080
1081                 if (info->protect[sect] == 0) { /* not protected */
1082 #ifdef CONFIG_SYS_FLASH_CHECK_BLANK_BEFORE_ERASE
1083                         int k;
1084                         int size;
1085                         int erased;
1086                         u32 *flash;
1087
1088                         /*
1089                          * Check if whole sector is erased
1090                          */
1091                         size = flash_sector_size(info, sect);
1092                         erased = 1;
1093                         flash = (u32 *)info->start[sect];
1094                         /* divide by 4 for longword access */
1095                         size = size >> 2;
1096                         for (k = 0; k < size; k++) {
1097                                 if (flash_read32(flash++) != 0xffffffff) {
1098                                         erased = 0;
1099                                         break;
1100                                 }
1101                         }
1102                         if (erased) {
1103                                 if (flash_verbose)
1104                                         putc(',');
1105                                 continue;
1106                         }
1107 #endif
1108                         switch (info->vendor) {
1109                         case CFI_CMDSET_INTEL_PROG_REGIONS:
1110                         case CFI_CMDSET_INTEL_STANDARD:
1111                         case CFI_CMDSET_INTEL_EXTENDED:
1112                                 flash_write_cmd (info, sect, 0,
1113                                                  FLASH_CMD_CLEAR_STATUS);
1114                                 flash_write_cmd (info, sect, 0,
1115                                                  FLASH_CMD_BLOCK_ERASE);
1116                                 flash_write_cmd (info, sect, 0,
1117                                                  FLASH_CMD_ERASE_CONFIRM);
1118                                 break;
1119                         case CFI_CMDSET_AMD_STANDARD:
1120                         case CFI_CMDSET_AMD_EXTENDED:
1121                                 flash_unlock_seq (info, sect);
1122                                 flash_write_cmd (info, sect,
1123                                                 info->addr_unlock1,
1124                                                 AMD_CMD_ERASE_START);
1125                                 flash_unlock_seq (info, sect);
1126                                 flash_write_cmd (info, sect, 0,
1127                                                  info->cmd_erase_sector);
1128                                 break;
1129 #ifdef CONFIG_FLASH_CFI_LEGACY
1130                         case CFI_CMDSET_AMD_LEGACY:
1131                                 flash_unlock_seq (info, 0);
1132                                 flash_write_cmd (info, 0, info->addr_unlock1,
1133                                                 AMD_CMD_ERASE_START);
1134                                 flash_unlock_seq (info, 0);
1135                                 flash_write_cmd (info, sect, 0,
1136                                                 AMD_CMD_ERASE_SECTOR);
1137                                 break;
1138 #endif
1139                         default:
1140                                 debug ("Unkown flash vendor %d\n",
1141                                        info->vendor);
1142                                 break;
1143                         }
1144
1145                         if (use_flash_status_poll(info)) {
1146                                 cfiword_t cword;
1147                                 void *dest;
1148                                 cword.w64 = 0xffffffffffffffffULL;
1149                                 dest = flash_map(info, sect, 0);
1150                                 st = flash_status_poll(info, &cword, dest,
1151                                                        info->erase_blk_tout, "erase");
1152                                 flash_unmap(info, sect, 0, dest);
1153                         } else
1154                                 st = flash_full_status_check(info, sect,
1155                                                              info->erase_blk_tout,
1156                                                              "erase");
1157                         if (st)
1158                                 rcode = 1;
1159                         else if (flash_verbose)
1160                                 putc ('.');
1161                 }
1162         }
1163
1164         if (flash_verbose)
1165                 puts (" done\n");
1166
1167         return rcode;
1168 }
1169
1170 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1171 static int sector_erased(flash_info_t *info, int i)
1172 {
1173         int k;
1174         int size;
1175         u32 *flash;
1176
1177         /*
1178          * Check if whole sector is erased
1179          */
1180         size = flash_sector_size(info, i);
1181         flash = (u32 *)info->start[i];
1182         /* divide by 4 for longword access */
1183         size = size >> 2;
1184
1185         for (k = 0; k < size; k++) {
1186                 if (flash_read32(flash++) != 0xffffffff)
1187                         return 0;       /* not erased */
1188         }
1189
1190         return 1;                       /* erased */
1191 }
1192 #endif /* CONFIG_SYS_FLASH_EMPTY_INFO */
1193
1194 void flash_print_info (flash_info_t * info)
1195 {
1196         int i;
1197
1198         if (info->flash_id != FLASH_MAN_CFI) {
1199                 puts ("missing or unknown FLASH type\n");
1200                 return;
1201         }
1202
1203         printf ("%s flash (%d x %d)",
1204                 info->name,
1205                 (info->portwidth << 3), (info->chipwidth << 3));
1206         if (info->size < 1024*1024)
1207                 printf ("  Size: %ld kB in %d Sectors\n",
1208                         info->size >> 10, info->sector_count);
1209         else
1210                 printf ("  Size: %ld MB in %d Sectors\n",
1211                         info->size >> 20, info->sector_count);
1212         printf ("  ");
1213         switch (info->vendor) {
1214                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1215                         printf ("Intel Prog Regions");
1216                         break;
1217                 case CFI_CMDSET_INTEL_STANDARD:
1218                         printf ("Intel Standard");
1219                         break;
1220                 case CFI_CMDSET_INTEL_EXTENDED:
1221                         printf ("Intel Extended");
1222                         break;
1223                 case CFI_CMDSET_AMD_STANDARD:
1224                         printf ("AMD Standard");
1225                         break;
1226                 case CFI_CMDSET_AMD_EXTENDED:
1227                         printf ("AMD Extended");
1228                         break;
1229 #ifdef CONFIG_FLASH_CFI_LEGACY
1230                 case CFI_CMDSET_AMD_LEGACY:
1231                         printf ("AMD Legacy");
1232                         break;
1233 #endif
1234                 default:
1235                         printf ("Unknown (%d)", info->vendor);
1236                         break;
1237         }
1238         printf (" command set, Manufacturer ID: 0x%02X, Device ID: 0x",
1239                 info->manufacturer_id);
1240         printf (info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1241                 info->device_id);
1242         if ((info->device_id & 0xff) == 0x7E) {
1243                 printf(info->chipwidth == FLASH_CFI_16BIT ? "%04X" : "%02X",
1244                 info->device_id2);
1245         }
1246         if ((info->vendor == CFI_CMDSET_AMD_STANDARD) && (info->legacy_unlock))
1247                 printf("\n  Advanced Sector Protection (PPB) enabled");
1248         printf ("\n  Erase timeout: %ld ms, write timeout: %ld ms\n",
1249                 info->erase_blk_tout,
1250                 info->write_tout);
1251         if (info->buffer_size > 1) {
1252                 printf ("  Buffer write timeout: %ld ms, "
1253                         "buffer size: %d bytes\n",
1254                 info->buffer_write_tout,
1255                 info->buffer_size);
1256         }
1257
1258         puts ("\n  Sector Start Addresses:");
1259         for (i = 0; i < info->sector_count; ++i) {
1260                 if (ctrlc())
1261                         break;
1262                 if ((i % 5) == 0)
1263                         putc('\n');
1264 #ifdef CONFIG_SYS_FLASH_EMPTY_INFO
1265                 /* print empty and read-only info */
1266                 printf ("  %08lX %c %s ",
1267                         info->start[i],
1268                         sector_erased(info, i) ? 'E' : ' ',
1269                         info->protect[i] ? "RO" : "  ");
1270 #else   /* ! CONFIG_SYS_FLASH_EMPTY_INFO */
1271                 printf ("  %08lX   %s ",
1272                         info->start[i],
1273                         info->protect[i] ? "RO" : "  ");
1274 #endif
1275         }
1276         putc ('\n');
1277         return;
1278 }
1279
1280 /*-----------------------------------------------------------------------
1281  * This is used in a few places in write_buf() to show programming
1282  * progress.  Making it a function is nasty because it needs to do side
1283  * effect updates to digit and dots.  Repeated code is nasty too, so
1284  * we define it once here.
1285  */
1286 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1287 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub) \
1288         if (flash_verbose) { \
1289                 dots -= dots_sub; \
1290                 if ((scale > 0) && (dots <= 0)) { \
1291                         if ((digit % 5) == 0) \
1292                                 printf ("%d", digit / 5); \
1293                         else \
1294                                 putc ('.'); \
1295                         digit--; \
1296                         dots += scale; \
1297                 } \
1298         }
1299 #else
1300 #define FLASH_SHOW_PROGRESS(scale, dots, digit, dots_sub)
1301 #endif
1302
1303 /*-----------------------------------------------------------------------
1304  * Copy memory to flash, returns:
1305  * 0 - OK
1306  * 1 - write timeout
1307  * 2 - Flash not erased
1308  */
1309 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
1310 {
1311         ulong wp;
1312         uchar *p;
1313         int aln;
1314         cfiword_t cword;
1315         int i, rc;
1316 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1317         int buffered_size;
1318 #endif
1319 #ifdef CONFIG_FLASH_SHOW_PROGRESS
1320         int digit = CONFIG_FLASH_SHOW_PROGRESS;
1321         int scale = 0;
1322         int dots  = 0;
1323
1324         /*
1325          * Suppress if there are fewer than CONFIG_FLASH_SHOW_PROGRESS writes.
1326          */
1327         if (cnt >= CONFIG_FLASH_SHOW_PROGRESS) {
1328                 scale = (int)((cnt + CONFIG_FLASH_SHOW_PROGRESS - 1) /
1329                         CONFIG_FLASH_SHOW_PROGRESS);
1330         }
1331 #endif
1332
1333         /* get lower aligned address */
1334         wp = (addr & ~(info->portwidth - 1));
1335
1336         /* handle unaligned start */
1337         if ((aln = addr - wp) != 0) {
1338                 cword.w32 = 0;
1339                 p = (uchar *)wp;
1340                 for (i = 0; i < aln; ++i)
1341                         flash_add_byte (info, &cword, flash_read8(p + i));
1342
1343                 for (; (i < info->portwidth) && (cnt > 0); i++) {
1344                         flash_add_byte (info, &cword, *src++);
1345                         cnt--;
1346                 }
1347                 for (; (cnt == 0) && (i < info->portwidth); ++i)
1348                         flash_add_byte (info, &cword, flash_read8(p + i));
1349
1350                 rc = flash_write_cfiword (info, wp, cword);
1351                 if (rc != 0)
1352                         return rc;
1353
1354                 wp += i;
1355                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1356         }
1357
1358         /* handle the aligned part */
1359 #ifdef CONFIG_SYS_FLASH_USE_BUFFER_WRITE
1360         buffered_size = (info->portwidth / info->chipwidth);
1361         buffered_size *= info->buffer_size;
1362         while (cnt >= info->portwidth) {
1363                 /* prohibit buffer write when buffer_size is 1 */
1364                 if (info->buffer_size == 1) {
1365                         cword.w32 = 0;
1366                         for (i = 0; i < info->portwidth; i++)
1367                                 flash_add_byte (info, &cword, *src++);
1368                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1369                                 return rc;
1370                         wp += info->portwidth;
1371                         cnt -= info->portwidth;
1372                         continue;
1373                 }
1374
1375                 /* write buffer until next buffered_size aligned boundary */
1376                 i = buffered_size - (wp % buffered_size);
1377                 if (i > cnt)
1378                         i = cnt;
1379                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
1380                         return rc;
1381                 i -= i & (info->portwidth - 1);
1382                 wp += i;
1383                 src += i;
1384                 cnt -= i;
1385                 FLASH_SHOW_PROGRESS(scale, dots, digit, i);
1386                 /* Only check every once in a while */
1387                 if ((cnt & 0xFFFF) < buffered_size && ctrlc())
1388                         return ERR_ABORTED;
1389         }
1390 #else
1391         while (cnt >= info->portwidth) {
1392                 cword.w32 = 0;
1393                 for (i = 0; i < info->portwidth; i++) {
1394                         flash_add_byte (info, &cword, *src++);
1395                 }
1396                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
1397                         return rc;
1398                 wp += info->portwidth;
1399                 cnt -= info->portwidth;
1400                 FLASH_SHOW_PROGRESS(scale, dots, digit, info->portwidth);
1401                 /* Only check every once in a while */
1402                 if ((cnt & 0xFFFF) < info->portwidth && ctrlc())
1403                         return ERR_ABORTED;
1404         }
1405 #endif /* CONFIG_SYS_FLASH_USE_BUFFER_WRITE */
1406
1407         if (cnt == 0) {
1408                 return (0);
1409         }
1410
1411         /*
1412          * handle unaligned tail bytes
1413          */
1414         cword.w32 = 0;
1415         p = (uchar *)wp;
1416         for (i = 0; (i < info->portwidth) && (cnt > 0); ++i) {
1417                 flash_add_byte (info, &cword, *src++);
1418                 --cnt;
1419         }
1420         for (; i < info->portwidth; ++i)
1421                 flash_add_byte (info, &cword, flash_read8(p + i));
1422
1423         return flash_write_cfiword (info, wp, cword);
1424 }
1425
1426 static inline int manufact_match(flash_info_t *info, u32 manu)
1427 {
1428         return info->manufacturer_id == ((manu & FLASH_VENDMASK) >> 16);
1429 }
1430
1431 /*-----------------------------------------------------------------------
1432  */
1433 #ifdef CONFIG_SYS_FLASH_PROTECTION
1434
1435 static int cfi_protect_bugfix(flash_info_t *info, long sector, int prot)
1436 {
1437         if (manufact_match(info, INTEL_MANUFACT)
1438             && info->device_id == NUMONYX_256MBIT) {
1439                 /*
1440                  * see errata called
1441                  * "Numonyx Axcell P33/P30 Specification Update" :)
1442                  */
1443                 flash_write_cmd(info, sector, 0, FLASH_CMD_READ_ID);
1444                 if (!flash_isequal(info, sector, FLASH_OFFSET_PROTECT,
1445                                    prot)) {
1446                         /*
1447                          * cmd must come before FLASH_CMD_PROTECT + 20us
1448                          * Disable interrupts which might cause a timeout here.
1449                          */
1450                         int flag = disable_interrupts();
1451                         unsigned short cmd;
1452
1453                         if (prot)
1454                                 cmd = FLASH_CMD_PROTECT_SET;
1455                         else
1456                                 cmd = FLASH_CMD_PROTECT_CLEAR;
1457
1458                         flash_write_cmd(info, sector, 0, FLASH_CMD_PROTECT);
1459                         flash_write_cmd(info, sector, 0, cmd);
1460                         /* re-enable interrupts if necessary */
1461                         if (flag)
1462                                 enable_interrupts();
1463                 }
1464                 return 1;
1465         }
1466         return 0;
1467 }
1468
1469 int flash_real_protect (flash_info_t * info, long sector, int prot)
1470 {
1471         int retcode = 0;
1472
1473         switch (info->vendor) {
1474                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1475                 case CFI_CMDSET_INTEL_STANDARD:
1476                 case CFI_CMDSET_INTEL_EXTENDED:
1477                         if (!cfi_protect_bugfix(info, sector, prot)) {
1478                                 flash_write_cmd(info, sector, 0,
1479                                          FLASH_CMD_CLEAR_STATUS);
1480                                 flash_write_cmd(info, sector, 0,
1481                                         FLASH_CMD_PROTECT);
1482                                 if (prot)
1483                                         flash_write_cmd(info, sector, 0,
1484                                                 FLASH_CMD_PROTECT_SET);
1485                                 else
1486                                         flash_write_cmd(info, sector, 0,
1487                                                 FLASH_CMD_PROTECT_CLEAR);
1488
1489                         }
1490                         break;
1491                 case CFI_CMDSET_AMD_EXTENDED:
1492                 case CFI_CMDSET_AMD_STANDARD:
1493                         /* U-Boot only checks the first byte */
1494                         if (manufact_match(info, ATM_MANUFACT)) {
1495                                 if (prot) {
1496                                         flash_unlock_seq (info, 0);
1497                                         flash_write_cmd (info, 0,
1498                                                         info->addr_unlock1,
1499                                                         ATM_CMD_SOFTLOCK_START);
1500                                         flash_unlock_seq (info, 0);
1501                                         flash_write_cmd (info, sector, 0,
1502                                                         ATM_CMD_LOCK_SECT);
1503                                 } else {
1504                                         flash_write_cmd (info, 0,
1505                                                         info->addr_unlock1,
1506                                                         AMD_CMD_UNLOCK_START);
1507                                         if (info->device_id == ATM_ID_BV6416)
1508                                                 flash_write_cmd (info, sector,
1509                                                         0, ATM_CMD_UNLOCK_SECT);
1510                                 }
1511                         }
1512                         if (info->legacy_unlock) {
1513                                 int flag = disable_interrupts();
1514                                 int lock_flag;
1515
1516                                 flash_unlock_seq(info, 0);
1517                                 flash_write_cmd(info, 0, info->addr_unlock1,
1518                                                 AMD_CMD_SET_PPB_ENTRY);
1519                                 lock_flag = flash_isset(info, sector, 0, 0x01);
1520                                 if (prot) {
1521                                         if (lock_flag) {
1522                                                 flash_write_cmd(info, sector, 0,
1523                                                         AMD_CMD_PPB_LOCK_BC1);
1524                                                 flash_write_cmd(info, sector, 0,
1525                                                         AMD_CMD_PPB_LOCK_BC2);
1526                                         }
1527                                         debug("sector %ld %slocked\n", sector,
1528                                                 lock_flag ? "" : "already ");
1529                                 } else {
1530                                         if (!lock_flag) {
1531                                                 debug("unlock %ld\n", sector);
1532                                                 flash_write_cmd(info, 0, 0,
1533                                                         AMD_CMD_PPB_UNLOCK_BC1);
1534                                                 flash_write_cmd(info, 0, 0,
1535                                                         AMD_CMD_PPB_UNLOCK_BC2);
1536                                         }
1537                                         debug("sector %ld %sunlocked\n", sector,
1538                                                 !lock_flag ? "" : "already ");
1539                                 }
1540                                 if (flag)
1541                                         enable_interrupts();
1542
1543                                 if (flash_status_check(info, sector,
1544                                                 info->erase_blk_tout,
1545                                                 prot ? "protect" : "unprotect"))
1546                                         printf("status check error\n");
1547
1548                                 flash_write_cmd(info, 0, 0,
1549                                                 AMD_CMD_SET_PPB_EXIT_BC1);
1550                                 flash_write_cmd(info, 0, 0,
1551                                                 AMD_CMD_SET_PPB_EXIT_BC2);
1552                         }
1553                         break;
1554 #ifdef CONFIG_FLASH_CFI_LEGACY
1555                 case CFI_CMDSET_AMD_LEGACY:
1556                         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1557                         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
1558                         if (prot)
1559                                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
1560                         else
1561                                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
1562 #endif
1563         };
1564
1565         /*
1566          * Flash needs to be in status register read mode for
1567          * flash_full_status_check() to work correctly
1568          */
1569         flash_write_cmd(info, sector, 0, FLASH_CMD_READ_STATUS);
1570         if ((retcode =
1571              flash_full_status_check (info, sector, info->erase_blk_tout,
1572                                       prot ? "protect" : "unprotect")) == 0) {
1573
1574                 info->protect[sector] = prot;
1575
1576                 /*
1577                  * On some of Intel's flash chips (marked via legacy_unlock)
1578                  * unprotect unprotects all locking.
1579                  */
1580                 if ((prot == 0) && (info->legacy_unlock)) {
1581                         flash_sect_t i;
1582
1583                         for (i = 0; i < info->sector_count; i++) {
1584                                 if (info->protect[i])
1585                                         flash_real_protect (info, i, 1);
1586                         }
1587                 }
1588         }
1589         return retcode;
1590 }
1591
1592 /*-----------------------------------------------------------------------
1593  * flash_read_user_serial - read the OneTimeProgramming cells
1594  */
1595 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
1596                              int len)
1597 {
1598         uchar *src;
1599         uchar *dst;
1600
1601         dst = buffer;
1602         src = flash_map (info, 0, FLASH_OFFSET_USER_PROTECTION);
1603         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1604         memcpy (dst, src + offset, len);
1605         flash_write_cmd (info, 0, 0, info->cmd_reset);
1606         udelay(1);
1607         flash_unmap(info, 0, FLASH_OFFSET_USER_PROTECTION, src);
1608 }
1609
1610 /*
1611  * flash_read_factory_serial - read the device Id from the protection area
1612  */
1613 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
1614                                 int len)
1615 {
1616         uchar *src;
1617
1618         src = flash_map (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
1619         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
1620         memcpy (buffer, src + offset, len);
1621         flash_write_cmd (info, 0, 0, info->cmd_reset);
1622         udelay(1);
1623         flash_unmap(info, 0, FLASH_OFFSET_INTEL_PROTECTION, src);
1624 }
1625
1626 #endif /* CONFIG_SYS_FLASH_PROTECTION */
1627
1628 /*-----------------------------------------------------------------------
1629  * Reverse the order of the erase regions in the CFI QRY structure.
1630  * This is needed for chips that are either a) correctly detected as
1631  * top-boot, or b) buggy.
1632  */
1633 static void cfi_reverse_geometry(struct cfi_qry *qry)
1634 {
1635         unsigned int i, j;
1636         u32 tmp;
1637
1638         for (i = 0, j = qry->num_erase_regions - 1; i < j; i++, j--) {
1639                 tmp = get_unaligned(&(qry->erase_region_info[i]));
1640                 put_unaligned(get_unaligned(&(qry->erase_region_info[j])),
1641                               &(qry->erase_region_info[i]));
1642                 put_unaligned(tmp, &(qry->erase_region_info[j]));
1643         }
1644 }
1645
1646 /*-----------------------------------------------------------------------
1647  * read jedec ids from device and set corresponding fields in info struct
1648  *
1649  * Note: assume cfi->vendor, cfi->portwidth and cfi->chipwidth are correct
1650  *
1651  */
1652 static void cmdset_intel_read_jedec_ids(flash_info_t *info)
1653 {
1654         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1655         udelay(1);
1656         flash_write_cmd(info, 0, 0, FLASH_CMD_READ_ID);
1657         udelay(1000); /* some flash are slow to respond */
1658         info->manufacturer_id = flash_read_uchar (info,
1659                                         FLASH_OFFSET_MANUFACTURER_ID);
1660         info->device_id = (info->chipwidth == FLASH_CFI_16BIT) ?
1661                         flash_read_word (info, FLASH_OFFSET_DEVICE_ID) :
1662                         flash_read_uchar (info, FLASH_OFFSET_DEVICE_ID);
1663         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1664 }
1665
1666 static int cmdset_intel_init(flash_info_t *info, struct cfi_qry *qry)
1667 {
1668         info->cmd_reset = FLASH_CMD_RESET;
1669
1670         cmdset_intel_read_jedec_ids(info);
1671         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1672
1673 #ifdef CONFIG_SYS_FLASH_PROTECTION
1674         /* read legacy lock/unlock bit from intel flash */
1675         if (info->ext_addr) {
1676                 info->legacy_unlock = flash_read_uchar (info,
1677                                 info->ext_addr + 5) & 0x08;
1678         }
1679 #endif
1680
1681         return 0;
1682 }
1683
1684 static void cmdset_amd_read_jedec_ids(flash_info_t *info)
1685 {
1686         ushort bankId = 0;
1687         uchar  manuId;
1688
1689         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1690         flash_unlock_seq(info, 0);
1691         flash_write_cmd(info, 0, info->addr_unlock1, FLASH_CMD_READ_ID);
1692         udelay(1000); /* some flash are slow to respond */
1693
1694         manuId = flash_read_uchar (info, FLASH_OFFSET_MANUFACTURER_ID);
1695         /* JEDEC JEP106Z specifies ID codes up to bank 7 */
1696         while (manuId == FLASH_CONTINUATION_CODE && bankId < 0x800) {
1697                 bankId += 0x100;
1698                 manuId = flash_read_uchar (info,
1699                         bankId | FLASH_OFFSET_MANUFACTURER_ID);
1700         }
1701         info->manufacturer_id = manuId;
1702
1703         switch (info->chipwidth){
1704         case FLASH_CFI_8BIT:
1705                 info->device_id = flash_read_uchar (info,
1706                                                 FLASH_OFFSET_DEVICE_ID);
1707                 if (info->device_id == 0x7E) {
1708                         /* AMD 3-byte (expanded) device ids */
1709                         info->device_id2 = flash_read_uchar (info,
1710                                                 FLASH_OFFSET_DEVICE_ID2);
1711                         info->device_id2 <<= 8;
1712                         info->device_id2 |= flash_read_uchar (info,
1713                                                 FLASH_OFFSET_DEVICE_ID3);
1714                 }
1715                 break;
1716         case FLASH_CFI_16BIT:
1717                 info->device_id = flash_read_word (info,
1718                                                 FLASH_OFFSET_DEVICE_ID);
1719                 if ((info->device_id & 0xff) == 0x7E) {
1720                         /* AMD 3-byte (expanded) device ids */
1721                         info->device_id2 = flash_read_uchar (info,
1722                                                 FLASH_OFFSET_DEVICE_ID2);
1723                         info->device_id2 <<= 8;
1724                         info->device_id2 |= flash_read_uchar (info,
1725                                                 FLASH_OFFSET_DEVICE_ID3);
1726                 }
1727                 break;
1728         default:
1729                 break;
1730         }
1731         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1732         udelay(1);
1733 }
1734
1735 static int cmdset_amd_init(flash_info_t *info, struct cfi_qry *qry)
1736 {
1737         info->cmd_reset = AMD_CMD_RESET;
1738         info->cmd_erase_sector = AMD_CMD_ERASE_SECTOR;
1739
1740         cmdset_amd_read_jedec_ids(info);
1741         flash_write_cmd(info, 0, info->cfi_offset, FLASH_CMD_CFI);
1742
1743 #ifdef CONFIG_SYS_FLASH_PROTECTION
1744         if (info->ext_addr) {
1745                 /* read sector protect/unprotect scheme (at 0x49) */
1746                 if (flash_read_uchar(info, info->ext_addr + 9) == 0x8)
1747                         info->legacy_unlock = 1;
1748         }
1749 #endif
1750
1751         return 0;
1752 }
1753
1754 #ifdef CONFIG_FLASH_CFI_LEGACY
1755 static void flash_read_jedec_ids (flash_info_t * info)
1756 {
1757         info->manufacturer_id = 0;
1758         info->device_id       = 0;
1759         info->device_id2      = 0;
1760
1761         switch (info->vendor) {
1762         case CFI_CMDSET_INTEL_PROG_REGIONS:
1763         case CFI_CMDSET_INTEL_STANDARD:
1764         case CFI_CMDSET_INTEL_EXTENDED:
1765                 cmdset_intel_read_jedec_ids(info);
1766                 break;
1767         case CFI_CMDSET_AMD_STANDARD:
1768         case CFI_CMDSET_AMD_EXTENDED:
1769                 cmdset_amd_read_jedec_ids(info);
1770                 break;
1771         default:
1772                 break;
1773         }
1774 }
1775
1776 /*-----------------------------------------------------------------------
1777  * Call board code to request info about non-CFI flash.
1778  * board_flash_get_legacy needs to fill in at least:
1779  * info->portwidth, info->chipwidth and info->interface for Jedec probing.
1780  */
1781 static int flash_detect_legacy(phys_addr_t base, int banknum)
1782 {
1783         flash_info_t *info = &flash_info[banknum];
1784
1785         if (board_flash_get_legacy(base, banknum, info)) {
1786                 /* board code may have filled info completely. If not, we
1787                    use JEDEC ID probing. */
1788                 if (!info->vendor) {
1789                         int modes[] = {
1790                                 CFI_CMDSET_AMD_STANDARD,
1791                                 CFI_CMDSET_INTEL_STANDARD
1792                         };
1793                         int i;
1794
1795                         for (i = 0; i < ARRAY_SIZE(modes); i++) {
1796                                 info->vendor = modes[i];
1797                                 info->start[0] =
1798                                         (ulong)map_physmem(base,
1799                                                            info->portwidth,
1800                                                            MAP_NOCACHE);
1801                                 if (info->portwidth == FLASH_CFI_8BIT
1802                                         && info->interface == FLASH_CFI_X8X16) {
1803                                         info->addr_unlock1 = 0x2AAA;
1804                                         info->addr_unlock2 = 0x5555;
1805                                 } else {
1806                                         info->addr_unlock1 = 0x5555;
1807                                         info->addr_unlock2 = 0x2AAA;
1808                                 }
1809                                 flash_read_jedec_ids(info);
1810                                 debug("JEDEC PROBE: ID %x %x %x\n",
1811                                                 info->manufacturer_id,
1812                                                 info->device_id,
1813                                                 info->device_id2);
1814                                 if (jedec_flash_match(info, info->start[0]))
1815                                         break;
1816                                 else
1817                                         unmap_physmem((void *)info->start[0],
1818                                                       info->portwidth);
1819                         }
1820                 }
1821
1822                 switch(info->vendor) {
1823                 case CFI_CMDSET_INTEL_PROG_REGIONS:
1824                 case CFI_CMDSET_INTEL_STANDARD:
1825                 case CFI_CMDSET_INTEL_EXTENDED:
1826                         info->cmd_reset = FLASH_CMD_RESET;
1827                         break;
1828                 case CFI_CMDSET_AMD_STANDARD:
1829                 case CFI_CMDSET_AMD_EXTENDED:
1830                 case CFI_CMDSET_AMD_LEGACY:
1831                         info->cmd_reset = AMD_CMD_RESET;
1832                         break;
1833                 }
1834                 info->flash_id = FLASH_MAN_CFI;
1835                 return 1;
1836         }
1837         return 0; /* use CFI */
1838 }
1839 #else
1840 static inline int flash_detect_legacy(phys_addr_t base, int banknum)
1841 {
1842         return 0; /* use CFI */
1843 }
1844 #endif
1845
1846 /*-----------------------------------------------------------------------
1847  * detect if flash is compatible with the Common Flash Interface (CFI)
1848  * http://www.jedec.org/download/search/jesd68.pdf
1849  */
1850 static void flash_read_cfi (flash_info_t *info, void *buf,
1851                 unsigned int start, size_t len)
1852 {
1853         u8 *p = buf;
1854         unsigned int i;
1855
1856         for (i = 0; i < len; i++)
1857                 p[i] = flash_read_uchar(info, start + i);
1858 }
1859
1860 static void __flash_cmd_reset(flash_info_t *info)
1861 {
1862         /*
1863          * We do not yet know what kind of commandset to use, so we issue
1864          * the reset command in both Intel and AMD variants, in the hope
1865          * that AMD flash roms ignore the Intel command.
1866          */
1867         flash_write_cmd(info, 0, 0, AMD_CMD_RESET);
1868         udelay(1);
1869         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
1870 }
1871 void flash_cmd_reset(flash_info_t *info)
1872         __attribute__((weak,alias("__flash_cmd_reset")));
1873
1874 static int __flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1875 {
1876         int cfi_offset;
1877
1878         /* Issue FLASH reset command */
1879         flash_cmd_reset(info);
1880
1881         for (cfi_offset = 0; cfi_offset < ARRAY_SIZE(flash_offset_cfi);
1882              cfi_offset++) {
1883                 flash_write_cmd (info, 0, flash_offset_cfi[cfi_offset],
1884                                  FLASH_CMD_CFI);
1885                 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1886                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1887                     && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1888                         flash_read_cfi(info, qry, FLASH_OFFSET_CFI_RESP,
1889                                         sizeof(struct cfi_qry));
1890                         info->interface = le16_to_cpu(qry->interface_desc);
1891
1892                         info->cfi_offset = flash_offset_cfi[cfi_offset];
1893                         debug ("device interface is %d\n",
1894                                info->interface);
1895                         debug ("found port %d chip %d ",
1896                                info->portwidth, info->chipwidth);
1897                         debug ("port %d bits chip %d bits\n",
1898                                info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1899                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1900
1901                         /* calculate command offsets as in the Linux driver */
1902                         info->addr_unlock1 = 0x555;
1903                         info->addr_unlock2 = 0x2aa;
1904
1905                         /*
1906                          * modify the unlock address if we are
1907                          * in compatibility mode
1908                          */
1909                         if (    /* x8/x16 in x8 mode */
1910                                 ((info->chipwidth == FLASH_CFI_BY8) &&
1911                                         (info->interface == FLASH_CFI_X8X16)) ||
1912                                 /* x16/x32 in x16 mode */
1913                                 ((info->chipwidth == FLASH_CFI_BY16) &&
1914                                         (info->interface == FLASH_CFI_X16X32)))
1915                         {
1916                                 info->addr_unlock1 = 0xaaa;
1917                                 info->addr_unlock2 = 0x555;
1918                         }
1919
1920                         info->name = "CFI conformant";
1921                         return 1;
1922                 }
1923         }
1924
1925         return 0;
1926 }
1927
1928 static int flash_detect_cfi (flash_info_t * info, struct cfi_qry *qry)
1929 {
1930         debug ("flash detect cfi\n");
1931
1932         for (info->portwidth = CONFIG_SYS_FLASH_CFI_WIDTH;
1933              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1934                 for (info->chipwidth = FLASH_CFI_BY8;
1935                      info->chipwidth <= info->portwidth;
1936                      info->chipwidth <<= 1)
1937                         if (__flash_detect_cfi(info, qry))
1938                                 return 1;
1939         }
1940         debug ("not found\n");
1941         return 0;
1942 }
1943
1944 /*
1945  * Manufacturer-specific quirks. Add workarounds for geometry
1946  * reversal, etc. here.
1947  */
1948 static void flash_fixup_amd(flash_info_t *info, struct cfi_qry *qry)
1949 {
1950         /* check if flash geometry needs reversal */
1951         if (qry->num_erase_regions > 1) {
1952                 /* reverse geometry if top boot part */
1953                 if (info->cfi_version < 0x3131) {
1954                         /* CFI < 1.1, try to guess from device id */
1955                         if ((info->device_id & 0x80) != 0)
1956                                 cfi_reverse_geometry(qry);
1957                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1958                         /* CFI >= 1.1, deduct from top/bottom flag */
1959                         /* note: ext_addr is valid since cfi_version > 0 */
1960                         cfi_reverse_geometry(qry);
1961                 }
1962         }
1963 }
1964
1965 static void flash_fixup_atmel(flash_info_t *info, struct cfi_qry *qry)
1966 {
1967         int reverse_geometry = 0;
1968
1969         /* Check the "top boot" bit in the PRI */
1970         if (info->ext_addr && !(flash_read_uchar(info, info->ext_addr + 6) & 1))
1971                 reverse_geometry = 1;
1972
1973         /* AT49BV6416(T) list the erase regions in the wrong order.
1974          * However, the device ID is identical with the non-broken
1975          * AT49BV642D they differ in the high byte.
1976          */
1977         if (info->device_id == 0xd6 || info->device_id == 0xd2)
1978                 reverse_geometry = !reverse_geometry;
1979
1980         if (reverse_geometry)
1981                 cfi_reverse_geometry(qry);
1982 }
1983
1984 static void flash_fixup_stm(flash_info_t *info, struct cfi_qry *qry)
1985 {
1986         /* check if flash geometry needs reversal */
1987         if (qry->num_erase_regions > 1) {
1988                 /* reverse geometry if top boot part */
1989                 if (info->cfi_version < 0x3131) {
1990                         /* CFI < 1.1, guess by device id */
1991                         if (info->device_id == 0x22CA || /* M29W320DT */
1992                             info->device_id == 0x2256 || /* M29W320ET */
1993                             info->device_id == 0x22D7) { /* M29W800DT */
1994                                 cfi_reverse_geometry(qry);
1995                         }
1996                 } else if (flash_read_uchar(info, info->ext_addr + 0xf) == 3) {
1997                         /* CFI >= 1.1, deduct from top/bottom flag */
1998                         /* note: ext_addr is valid since cfi_version > 0 */
1999                         cfi_reverse_geometry(qry);
2000                 }
2001         }
2002 }
2003
2004 static void flash_fixup_sst(flash_info_t *info, struct cfi_qry *qry)
2005 {
2006         /*
2007          * SST, for many recent nor parallel flashes, says they are
2008          * CFI-conformant. This is not true, since qry struct.
2009          * reports a std. AMD command set (0x0002), while SST allows to
2010          * erase two different sector sizes for the same memory.
2011          * 64KB sector (SST call it block)  needs 0x30 to be erased.
2012          * 4KB  sector (SST call it sector) needs 0x50 to be erased.
2013          * Since CFI query detect the 4KB number of sectors, users expects
2014          * a sector granularity of 4KB, and it is here set.
2015          */
2016         if (info->device_id == 0x5D23 || /* SST39VF3201B */
2017             info->device_id == 0x5C23) { /* SST39VF3202B */
2018                 /* set sector granularity to 4KB */
2019                 info->cmd_erase_sector=0x50;
2020         }
2021 }
2022
2023 static void flash_fixup_num(flash_info_t *info, struct cfi_qry *qry)
2024 {
2025         /*
2026          * The M29EW devices seem to report the CFI information wrong
2027          * when it's in 8 bit mode.
2028          * There's an app note from Numonyx on this issue.
2029          * So adjust the buffer size for M29EW while operating in 8-bit mode
2030          */
2031         if (((qry->max_buf_write_size) > 0x8) &&
2032                         (info->device_id == 0x7E) &&
2033                         (info->device_id2 == 0x2201 ||
2034                         info->device_id2 == 0x2301 ||
2035                         info->device_id2 == 0x2801 ||
2036                         info->device_id2 == 0x4801)) {
2037                 debug("Adjusted buffer size on Numonyx flash"
2038                         " M29EW family in 8 bit mode\n");
2039                 qry->max_buf_write_size = 0x8;
2040         }
2041 }
2042
2043 /*
2044  * The following code cannot be run from FLASH!
2045  *
2046  */
2047 ulong flash_get_size (phys_addr_t base, int banknum)
2048 {
2049         flash_info_t *info = &flash_info[banknum];
2050         int i, j;
2051         flash_sect_t sect_cnt;
2052         phys_addr_t sector;
2053         unsigned long tmp;
2054         int size_ratio;
2055         uchar num_erase_regions;
2056         int erase_region_size;
2057         int erase_region_count;
2058         struct cfi_qry qry;
2059         unsigned long max_size;
2060
2061         memset(&qry, 0, sizeof(qry));
2062
2063         info->ext_addr = 0;
2064         info->cfi_version = 0;
2065 #ifdef CONFIG_SYS_FLASH_PROTECTION
2066         info->legacy_unlock = 0;
2067 #endif
2068
2069         info->start[0] = (ulong)map_physmem(base, info->portwidth, MAP_NOCACHE);
2070
2071         if (flash_detect_cfi (info, &qry)) {
2072                 info->vendor = le16_to_cpu(get_unaligned(&(qry.p_id)));
2073                 info->ext_addr = le16_to_cpu(get_unaligned(&(qry.p_adr)));
2074                 num_erase_regions = qry.num_erase_regions;
2075
2076                 if (info->ext_addr) {
2077                         info->cfi_version = (ushort) flash_read_uchar (info,
2078                                                 info->ext_addr + 3) << 8;
2079                         info->cfi_version |= (ushort) flash_read_uchar (info,
2080                                                 info->ext_addr + 4);
2081                 }
2082
2083 #ifdef DEBUG
2084                 flash_printqry (&qry);
2085 #endif
2086
2087                 switch (info->vendor) {
2088                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2089                 case CFI_CMDSET_INTEL_STANDARD:
2090                 case CFI_CMDSET_INTEL_EXTENDED:
2091                         cmdset_intel_init(info, &qry);
2092                         break;
2093                 case CFI_CMDSET_AMD_STANDARD:
2094                 case CFI_CMDSET_AMD_EXTENDED:
2095                         cmdset_amd_init(info, &qry);
2096                         break;
2097                 default:
2098                         printf("CFI: Unknown command set 0x%x\n",
2099                                         info->vendor);
2100                         /*
2101                          * Unfortunately, this means we don't know how
2102                          * to get the chip back to Read mode. Might
2103                          * as well try an Intel-style reset...
2104                          */
2105                         flash_write_cmd(info, 0, 0, FLASH_CMD_RESET);
2106                         return 0;
2107                 }
2108
2109                 /* Do manufacturer-specific fixups */
2110                 switch (info->manufacturer_id) {
2111                 case 0x0001: /* AMD */
2112                 case 0x0037: /* AMIC */
2113                         flash_fixup_amd(info, &qry);
2114                         break;
2115                 case 0x001f:
2116                         flash_fixup_atmel(info, &qry);
2117                         break;
2118                 case 0x0020:
2119                         flash_fixup_stm(info, &qry);
2120                         break;
2121                 case 0x00bf: /* SST */
2122                         flash_fixup_sst(info, &qry);
2123                         break;
2124                 case 0x0089: /* Numonyx */
2125                         flash_fixup_num(info, &qry);
2126                         break;
2127                 }
2128
2129                 debug ("manufacturer is %d\n", info->vendor);
2130                 debug ("manufacturer id is 0x%x\n", info->manufacturer_id);
2131                 debug ("device id is 0x%x\n", info->device_id);
2132                 debug ("device id2 is 0x%x\n", info->device_id2);
2133                 debug ("cfi version is 0x%04x\n", info->cfi_version);
2134
2135                 size_ratio = info->portwidth / info->chipwidth;
2136                 /* if the chip is x8/x16 reduce the ratio by half */
2137                 if ((info->interface == FLASH_CFI_X8X16)
2138                     && (info->chipwidth == FLASH_CFI_BY8)) {
2139                         size_ratio >>= 1;
2140                 }
2141                 debug ("size_ratio %d port %d bits chip %d bits\n",
2142                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
2143                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
2144                 info->size = 1 << qry.dev_size;
2145                 /* multiply the size by the number of chips */
2146                 info->size *= size_ratio;
2147                 max_size = cfi_flash_bank_size(banknum);
2148                 if (max_size && (info->size > max_size)) {
2149                         debug("[truncated from %ldMiB]", info->size >> 20);
2150                         info->size = max_size;
2151                 }
2152                 debug ("found %d erase regions\n", num_erase_regions);
2153                 sect_cnt = 0;
2154                 sector = base;
2155                 for (i = 0; i < num_erase_regions; i++) {
2156                         if (i > NUM_ERASE_REGIONS) {
2157                                 printf ("%d erase regions found, only %d used\n",
2158                                         num_erase_regions, NUM_ERASE_REGIONS);
2159                                 break;
2160                         }
2161
2162                         tmp = le32_to_cpu(get_unaligned(
2163                                                 &(qry.erase_region_info[i])));
2164                         debug("erase region %u: 0x%08lx\n", i, tmp);
2165
2166                         erase_region_count = (tmp & 0xffff) + 1;
2167                         tmp >>= 16;
2168                         erase_region_size =
2169                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
2170                         debug ("erase_region_count = %d erase_region_size = %d\n",
2171                                 erase_region_count, erase_region_size);
2172                         for (j = 0; j < erase_region_count; j++) {
2173                                 if (sector - base >= info->size)
2174                                         break;
2175                                 if (sect_cnt >= CONFIG_SYS_MAX_FLASH_SECT) {
2176                                         printf("ERROR: too many flash sectors\n");
2177                                         break;
2178                                 }
2179                                 info->start[sect_cnt] =
2180                                         (ulong)map_physmem(sector,
2181                                                            info->portwidth,
2182                                                            MAP_NOCACHE);
2183                                 sector += (erase_region_size * size_ratio);
2184
2185                                 /*
2186                                  * Only read protection status from
2187                                  * supported devices (intel...)
2188                                  */
2189                                 switch (info->vendor) {
2190                                 case CFI_CMDSET_INTEL_PROG_REGIONS:
2191                                 case CFI_CMDSET_INTEL_EXTENDED:
2192                                 case CFI_CMDSET_INTEL_STANDARD:
2193                                         /*
2194                                          * Set flash to read-id mode. Otherwise
2195                                          * reading protected status is not
2196                                          * guaranteed.
2197                                          */
2198                                         flash_write_cmd(info, sect_cnt, 0,
2199                                                         FLASH_CMD_READ_ID);
2200                                         info->protect[sect_cnt] =
2201                                                 flash_isset (info, sect_cnt,
2202                                                              FLASH_OFFSET_PROTECT,
2203                                                              FLASH_STATUS_PROTECT);
2204                                         flash_write_cmd(info, sect_cnt, 0,
2205                                                         FLASH_CMD_RESET);
2206                                         break;
2207                                 case CFI_CMDSET_AMD_EXTENDED:
2208                                 case CFI_CMDSET_AMD_STANDARD:
2209                                         if (!info->legacy_unlock) {
2210                                                 /* default: not protected */
2211                                                 info->protect[sect_cnt] = 0;
2212                                                 break;
2213                                         }
2214
2215                                         /* Read protection (PPB) from sector */
2216                                         flash_write_cmd(info, 0, 0,
2217                                                         info->cmd_reset);
2218                                         flash_unlock_seq(info, 0);
2219                                         flash_write_cmd(info, 0,
2220                                                         info->addr_unlock1,
2221                                                         FLASH_CMD_READ_ID);
2222                                         info->protect[sect_cnt] =
2223                                                 flash_isset(
2224                                                         info, sect_cnt,
2225                                                         FLASH_OFFSET_PROTECT,
2226                                                         FLASH_STATUS_PROTECT);
2227                                         break;
2228                                 default:
2229                                         /* default: not protected */
2230                                         info->protect[sect_cnt] = 0;
2231                                 }
2232
2233                                 sect_cnt++;
2234                         }
2235                 }
2236
2237                 info->sector_count = sect_cnt;
2238                 info->buffer_size = 1 << le16_to_cpu(qry.max_buf_write_size);
2239                 tmp = 1 << qry.block_erase_timeout_typ;
2240                 info->erase_blk_tout = tmp *
2241                         (1 << qry.block_erase_timeout_max);
2242                 tmp = (1 << qry.buf_write_timeout_typ) *
2243                         (1 << qry.buf_write_timeout_max);
2244
2245                 /* round up when converting to ms */
2246                 info->buffer_write_tout = (tmp + 999) / 1000;
2247                 tmp = (1 << qry.word_write_timeout_typ) *
2248                         (1 << qry.word_write_timeout_max);
2249                 /* round up when converting to ms */
2250                 info->write_tout = (tmp + 999) / 1000;
2251                 info->flash_id = FLASH_MAN_CFI;
2252                 if ((info->interface == FLASH_CFI_X8X16) &&
2253                     (info->chipwidth == FLASH_CFI_BY8)) {
2254                         /* XXX - Need to test on x8/x16 in parallel. */
2255                         info->portwidth >>= 1;
2256                 }
2257
2258                 flash_write_cmd (info, 0, 0, info->cmd_reset);
2259         }
2260
2261         return (info->size);
2262 }
2263
2264 #ifdef CONFIG_FLASH_CFI_MTD
2265 void flash_set_verbose(uint v)
2266 {
2267         flash_verbose = v;
2268 }
2269 #endif
2270
2271 static void cfi_flash_set_config_reg(u32 base, u16 val)
2272 {
2273 #ifdef CONFIG_SYS_CFI_FLASH_CONFIG_REGS
2274         /*
2275          * Only set this config register if really defined
2276          * to a valid value (0xffff is invalid)
2277          */
2278         if (val == 0xffff)
2279                 return;
2280
2281         /*
2282          * Set configuration register. Data is "encrypted" in the 16 lower
2283          * address bits.
2284          */
2285         flash_write16(FLASH_CMD_SETUP, (void *)(base + (val << 1)));
2286         flash_write16(FLASH_CMD_SET_CR_CONFIRM, (void *)(base + (val << 1)));
2287
2288         /*
2289          * Finally issue reset-command to bring device back to
2290          * read-array mode
2291          */
2292         flash_write16(FLASH_CMD_RESET, (void *)base);
2293 #endif
2294 }
2295
2296 /*-----------------------------------------------------------------------
2297  */
2298
2299 static void flash_protect_default(void)
2300 {
2301 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2302         int i;
2303         struct apl_s {
2304                 ulong start;
2305                 ulong size;
2306         } apl[] = CONFIG_SYS_FLASH_AUTOPROTECT_LIST;
2307 #endif
2308
2309         /* Monitor protection ON by default */
2310 #if (CONFIG_SYS_MONITOR_BASE >= CONFIG_SYS_FLASH_BASE) && \
2311         (!defined(CONFIG_MONITOR_IS_IN_RAM))
2312         flash_protect(FLAG_PROTECT_SET,
2313                        CONFIG_SYS_MONITOR_BASE,
2314                        CONFIG_SYS_MONITOR_BASE + monitor_flash_len  - 1,
2315                        flash_get_info(CONFIG_SYS_MONITOR_BASE));
2316 #endif
2317
2318         /* Environment protection ON by default */
2319 #ifdef CONFIG_ENV_IS_IN_FLASH
2320         flash_protect(FLAG_PROTECT_SET,
2321                        CONFIG_ENV_ADDR,
2322                        CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE - 1,
2323                        flash_get_info(CONFIG_ENV_ADDR));
2324 #endif
2325
2326         /* Redundant environment protection ON by default */
2327 #ifdef CONFIG_ENV_ADDR_REDUND
2328         flash_protect(FLAG_PROTECT_SET,
2329                        CONFIG_ENV_ADDR_REDUND,
2330                        CONFIG_ENV_ADDR_REDUND + CONFIG_ENV_SECT_SIZE - 1,
2331                        flash_get_info(CONFIG_ENV_ADDR_REDUND));
2332 #endif
2333
2334 #if defined(CONFIG_SYS_FLASH_AUTOPROTECT_LIST)
2335         for (i = 0; i < ARRAY_SIZE(apl); i++) {
2336                 debug("autoprotecting from %08lx to %08lx\n",
2337                       apl[i].start, apl[i].start + apl[i].size - 1);
2338                 flash_protect(FLAG_PROTECT_SET,
2339                                apl[i].start,
2340                                apl[i].start + apl[i].size - 1,
2341                                flash_get_info(apl[i].start));
2342         }
2343 #endif
2344 }
2345
2346 unsigned long flash_init (void)
2347 {
2348         unsigned long size = 0;
2349         int i;
2350
2351 #ifdef CONFIG_SYS_FLASH_PROTECTION
2352         /* read environment from EEPROM */
2353         char s[64];
2354         env_get_f("unlock", s, sizeof(s));
2355 #endif
2356
2357 #ifdef CONFIG_CFI_FLASH /* for driver model */
2358         cfi_flash_init_dm();
2359 #endif
2360
2361         /* Init: no FLASHes known */
2362         for (i = 0; i < CONFIG_SYS_MAX_FLASH_BANKS; ++i) {
2363                 flash_info[i].flash_id = FLASH_UNKNOWN;
2364
2365                 /* Optionally write flash configuration register */
2366                 cfi_flash_set_config_reg(cfi_flash_bank_addr(i),
2367                                          cfi_flash_config_reg(i));
2368
2369                 if (!flash_detect_legacy(cfi_flash_bank_addr(i), i))
2370                         flash_get_size(cfi_flash_bank_addr(i), i);
2371                 size += flash_info[i].size;
2372                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
2373 #ifndef CONFIG_SYS_FLASH_QUIET_TEST
2374                         printf ("## Unknown flash on Bank %d "
2375                                 "- Size = 0x%08lx = %ld MB\n",
2376                                 i+1, flash_info[i].size,
2377                                 flash_info[i].size >> 20);
2378 #endif /* CONFIG_SYS_FLASH_QUIET_TEST */
2379                 }
2380 #ifdef CONFIG_SYS_FLASH_PROTECTION
2381                 else if (strcmp(s, "yes") == 0) {
2382                         /*
2383                          * Only the U-Boot image and it's environment
2384                          * is protected, all other sectors are
2385                          * unprotected (unlocked) if flash hardware
2386                          * protection is used (CONFIG_SYS_FLASH_PROTECTION)
2387                          * and the environment variable "unlock" is
2388                          * set to "yes".
2389                          */
2390                         if (flash_info[i].legacy_unlock) {
2391                                 int k;
2392
2393                                 /*
2394                                  * Disable legacy_unlock temporarily,
2395                                  * since flash_real_protect would
2396                                  * relock all other sectors again
2397                                  * otherwise.
2398                                  */
2399                                 flash_info[i].legacy_unlock = 0;
2400
2401                                 /*
2402                                  * Legacy unlocking (e.g. Intel J3) ->
2403                                  * unlock only one sector. This will
2404                                  * unlock all sectors.
2405                                  */
2406                                 flash_real_protect (&flash_info[i], 0, 0);
2407
2408                                 flash_info[i].legacy_unlock = 1;
2409
2410                                 /*
2411                                  * Manually mark other sectors as
2412                                  * unlocked (unprotected)
2413                                  */
2414                                 for (k = 1; k < flash_info[i].sector_count; k++)
2415                                         flash_info[i].protect[k] = 0;
2416                         } else {
2417                                 /*
2418                                  * No legancy unlocking -> unlock all sectors
2419                                  */
2420                                 flash_protect (FLAG_PROTECT_CLEAR,
2421                                                flash_info[i].start[0],
2422                                                flash_info[i].start[0]
2423                                                + flash_info[i].size - 1,
2424                                                &flash_info[i]);
2425                         }
2426                 }
2427 #endif /* CONFIG_SYS_FLASH_PROTECTION */
2428         }
2429
2430         flash_protect_default();
2431 #ifdef CONFIG_FLASH_CFI_MTD
2432         cfi_mtd_init();
2433 #endif
2434
2435         return (size);
2436 }
2437
2438 #ifdef CONFIG_CFI_FLASH /* for driver model */
2439 static int cfi_flash_probe(struct udevice *dev)
2440 {
2441         void *blob = (void *)gd->fdt_blob;
2442         int node = dev_of_offset(dev);
2443         const fdt32_t *cell;
2444         phys_addr_t addr;
2445         int parent, addrc, sizec;
2446         int len, idx;
2447
2448         parent = fdt_parent_offset(blob, node);
2449         fdt_support_default_count_cells(blob, parent, &addrc, &sizec);
2450         /* decode regs, there may be multiple reg tuples. */
2451         cell = fdt_getprop(blob, node, "reg", &len);
2452         if (!cell)
2453                 return -ENOENT;
2454         idx = 0;
2455         len /= sizeof(fdt32_t);
2456         while (idx < len) {
2457                 addr = fdt_translate_address((void *)blob,
2458                                              node, cell + idx);
2459                 flash_info[cfi_flash_num_flash_banks].dev = dev;
2460                 flash_info[cfi_flash_num_flash_banks].base = addr;
2461                 cfi_flash_num_flash_banks++;
2462                 idx += addrc + sizec;
2463         }
2464         gd->bd->bi_flashstart = flash_info[0].base;
2465
2466         return 0;
2467 }
2468
2469 static const struct udevice_id cfi_flash_ids[] = {
2470         { .compatible = "cfi-flash" },
2471         { .compatible = "jedec-flash" },
2472         {}
2473 };
2474
2475 U_BOOT_DRIVER(cfi_flash) = {
2476         .name   = "cfi_flash",
2477         .id     = UCLASS_MTD,
2478         .of_match = cfi_flash_ids,
2479         .probe = cfi_flash_probe,
2480 };
2481 #endif /* CONFIG_CFI_FLASH */