2 * (C) Copyright 2013 - 2015 Xilinx, Inc.
4 * Xilinx Zynq SD Host Controller Interface
6 * SPDX-License-Identifier: GPL-2.0+
16 #ifndef CONFIG_ZYNQ_SDHCI_MIN_FREQ
17 # define CONFIG_ZYNQ_SDHCI_MIN_FREQ 0
20 struct arasan_sdhci_plat {
21 struct mmc_config cfg;
25 static int arasan_sdhci_probe(struct udevice *dev)
27 struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
28 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
29 struct sdhci_host *host = dev_get_priv(dev);
32 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD |
33 SDHCI_QUIRK_BROKEN_R1B;
35 #ifdef CONFIG_ZYNQ_HISPD_BROKEN
36 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
39 ret = sdhci_setup_cfg(&plat->cfg, host, CONFIG_ZYNQ_SDHCI_MAX_FREQ,
40 CONFIG_ZYNQ_SDHCI_MIN_FREQ);
41 host->mmc = &plat->mmc;
44 host->mmc->priv = host;
46 upriv->mmc = host->mmc;
48 return sdhci_probe(dev);
51 static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev)
53 struct sdhci_host *host = dev_get_priv(dev);
55 host->name = dev->name;
56 host->ioaddr = (void *)dev_get_addr(dev);
61 static int arasan_sdhci_bind(struct udevice *dev)
63 struct arasan_sdhci_plat *plat = dev_get_platdata(dev);
65 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
68 static const struct udevice_id arasan_sdhci_ids[] = {
69 { .compatible = "arasan,sdhci-8.9a" },
73 U_BOOT_DRIVER(arasan_sdhci_drv) = {
74 .name = "arasan_sdhci",
76 .of_match = arasan_sdhci_ids,
77 .ofdata_to_platdata = arasan_sdhci_ofdata_to_platdata,
79 .bind = arasan_sdhci_bind,
80 .probe = arasan_sdhci_probe,
81 .priv_auto_alloc_size = sizeof(struct sdhci_host),
82 .platdata_auto_alloc_size = sizeof(struct arasan_sdhci_plat),