drivers/mmc/rockchip_dw_mmc.c

   1 /*
   2  * Copyright (c) 2013 Google, Inc
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <common.h>
   8 #include <clk.h>
   9 #include <dm.h>
  10 #include <dwmmc.h>
  11 #include <errno.h>
  12 #include <pwrseq.h>
  13 #include <syscon.h>
  14 #include <asm/gpio.h>
  15 #include <asm/arch/clock.h>
  16 #include <asm/arch/periph.h>
  17 #include <linux/err.h>
  18
  19 DECLARE_GLOBAL_DATA_PTR;
  20
  21 struct rockchip_dwmmc_priv {
  22         struct udevice *clk;
  23         struct rk3288_grf *grf;
  24         struct dwmci_host host;
  25 };
  26
  27 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
  28 {
  29         struct udevice *dev = host->priv;
  30         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  31         int ret;
  32
  33         ret = clk_set_periph_rate(priv->clk, PERIPH_ID_SDMMC0 + host->dev_index,
  34                                   freq);
  35         if (ret < 0) {
  36                 debug("%s: err=%d\n", __func__, ret);
  37                 return ret;
  38         }
  39
  40         return freq;
  41 }
  42
  43 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
  44 {
  45         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  46         struct dwmci_host *host = &priv->host;
  47
  48         host->name = dev->name;
  49         host->ioaddr = (void *)dev_get_addr(dev);
  50         host->buswidth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
  51                                         "bus-width", 4);
  52         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
  53         host->priv = dev;
  54
  55         /* use non-removeable as sdcard and emmc as judgement */
  56         if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "non-removable"))
  57                 host->dev_index = 0;
  58         else
  59                 host->dev_index = 1;
  60
  61         return 0;
  62 }
  63
  64 static int rockchip_dwmmc_probe(struct udevice *dev)
  65 {
  66         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
  67         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
  68         struct dwmci_host *host = &priv->host;
  69         struct udevice *pwr_dev __maybe_unused;
  70         u32 minmax[2];
  71         int ret;
  72         int fifo_depth;
  73
  74         priv->grf = syscon_get_first_range(ROCKCHIP_SYSCON_GRF);
  75         if (IS_ERR(priv->grf))
  76                 return PTR_ERR(priv->grf);
  77         ret = uclass_get_device(UCLASS_CLK, CLK_GENERAL, &priv->clk);
  78         if (ret)
  79                 return ret;
  80
  81         if (fdtdec_get_int_array(gd->fdt_blob, dev->of_offset,
  82                                  "clock-freq-min-max", minmax, 2))
  83                 return -EINVAL;
  84
  85         fifo_depth = fdtdec_get_int(gd->fdt_blob, dev->of_offset,
  86                                     "fifo-depth", 0);
  87         if (fifo_depth < 0)
  88                 return -EINVAL;
  89
  90         host->fifoth_val = MSIZE(0x2) |
  91                 RX_WMARK(fifo_depth / 2 - 1) | TX_WMARK(fifo_depth / 2);
  92
  93         if (fdtdec_get_bool(gd->fdt_blob, dev->of_offset, "fifo-mode"))
  94                 host->fifo_mode = true;
  95
  96 #ifdef CONFIG_PWRSEQ
  97         /* Enable power if needed */
  98         ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
  99                                            &pwr_dev);
 100         if (!ret) {
 101                 ret = pwrseq_set_power(pwr_dev, true);
 102                 if (ret)
 103                         return ret;
 104         }
 105 #endif
 106         ret = add_dwmci(host, minmax[1], minmax[0]);
 107         if (ret)
 108                 return ret;
 109
 110         upriv->mmc = host->mmc;
 111
 112         return 0;
 113 }
 114
 115 static const struct udevice_id rockchip_dwmmc_ids[] = {
 116         { .compatible = "rockchip,rk3288-dw-mshc" },
 117         { }
 118 };
 119
 120 U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
 121         .name           = "rockchip_dwmmc",
 122         .id             = UCLASS_MMC,
 123         .of_match       = rockchip_dwmmc_ids,
 124         .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
 125         .probe          = rockchip_dwmmc_probe,
 126         .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
 127 };
 128
 129 #ifdef CONFIG_PWRSEQ
 130 static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
 131 {
 132         struct gpio_desc reset;
 133         int ret;
 134
 135         ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
 136         if (ret)
 137                 return ret;
 138         dm_gpio_set_value(&reset, 1);
 139         udelay(1);
 140         dm_gpio_set_value(&reset, 0);
 141         udelay(200);
 142
 143         return 0;
 144 }
 145
 146 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
 147         .set_power      = rockchip_dwmmc_pwrseq_set_power,
 148 };
 149
 150 static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
 151         { .compatible = "mmc-pwrseq-emmc" },
 152         { }
 153 };
 154
 155 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
 156         .name           = "mmc_pwrseq_emmc",
 157         .id             = UCLASS_PWRSEQ,
 158         .of_match       = rockchip_dwmmc_pwrseq_ids,
 159         .ops            = &rockchip_dwmmc_pwrseq_ops,
 160 };
 161 #endif