2 * Copyright (c) 2013 Google, Inc
4 * SPDX-License-Identifier: GPL-2.0+
10 #include <dt-structs.h>
17 #include <asm/arch/clock.h>
18 #include <asm/arch/periph.h>
19 #include <linux/err.h>
21 DECLARE_GLOBAL_DATA_PTR;
23 struct rockchip_mmc_plat {
24 #if CONFIG_IS_ENABLED(OF_PLATDATA)
25 struct dtd_rockchip_rk3288_dw_mshc dtplat;
27 struct mmc_config cfg;
31 struct rockchip_dwmmc_priv {
33 struct dwmci_host host;
39 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
41 struct udevice *dev = host->priv;
42 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
45 ret = clk_set_rate(&priv->clk, freq);
47 printf("%s: err=%d\n", __func__, ret);
54 static int rockchip_dwmmc_ofdata_to_platdata(struct udevice *dev)
56 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
57 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
58 struct dwmci_host *host = &priv->host;
60 host->name = dev->name;
61 host->ioaddr = (void *)dev_get_addr(dev);
62 host->buswidth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
64 host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
67 /* use non-removeable as sdcard and emmc as judgement */
68 if (fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev), "non-removable"))
73 priv->fifo_depth = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
75 if (priv->fifo_depth < 0)
77 priv->fifo_mode = fdtdec_get_bool(gd->fdt_blob, dev_of_offset(dev),
81 * 'clock-freq-min-max' is deprecated
82 * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b)
84 if (fdtdec_get_int_array(gd->fdt_blob, dev_of_offset(dev),
85 "clock-freq-min-max", priv->minmax, 2)) {
86 int val = fdtdec_get_int(gd->fdt_blob, dev_of_offset(dev),
87 "max-frequency", -EINVAL);
92 priv->minmax[0] = 400000; /* 400 kHz */
93 priv->minmax[1] = val;
95 debug("%s: 'clock-freq-min-max' property was deprecated.\n",
102 static int rockchip_dwmmc_probe(struct udevice *dev)
104 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
105 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
106 struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
107 struct dwmci_host *host = &priv->host;
108 struct udevice *pwr_dev __maybe_unused;
111 #if CONFIG_IS_ENABLED(OF_PLATDATA)
112 struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
114 host->name = dev->name;
115 host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
116 host->buswidth = dtplat->bus_width;
117 host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
120 priv->fifo_depth = dtplat->fifo_depth;
122 memcpy(priv->minmax, dtplat->clock_freq_min_max, sizeof(priv->minmax));
124 ret = clk_get_by_index_platdata(dev, 0, dtplat->clocks, &priv->clk);
128 ret = clk_get_by_name(dev, "ciu", &priv->clk);
132 host->fifoth_val = MSIZE(0x2) |
133 RX_WMARK(priv->fifo_depth / 2 - 1) |
134 TX_WMARK(priv->fifo_depth / 2);
136 host->fifo_mode = priv->fifo_mode;
139 /* Enable power if needed */
140 ret = uclass_get_device_by_phandle(UCLASS_PWRSEQ, dev, "mmc-pwrseq",
143 ret = pwrseq_set_power(pwr_dev, true);
148 dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
149 host->mmc = &plat->mmc;
150 host->mmc->priv = &priv->host;
151 host->mmc->dev = dev;
152 upriv->mmc = host->mmc;
154 return dwmci_probe(dev);
157 static int rockchip_dwmmc_bind(struct udevice *dev)
159 struct rockchip_mmc_plat *plat = dev_get_platdata(dev);
161 return dwmci_bind(dev, &plat->mmc, &plat->cfg);
164 static const struct udevice_id rockchip_dwmmc_ids[] = {
165 { .compatible = "rockchip,rk3288-dw-mshc" },
169 U_BOOT_DRIVER(rockchip_dwmmc_drv) = {
170 .name = "rockchip_rk3288_dw_mshc",
172 .of_match = rockchip_dwmmc_ids,
173 .ofdata_to_platdata = rockchip_dwmmc_ofdata_to_platdata,
174 .ops = &dm_dwmci_ops,
175 .bind = rockchip_dwmmc_bind,
176 .probe = rockchip_dwmmc_probe,
177 .priv_auto_alloc_size = sizeof(struct rockchip_dwmmc_priv),
178 .platdata_auto_alloc_size = sizeof(struct rockchip_mmc_plat),
182 static int rockchip_dwmmc_pwrseq_set_power(struct udevice *dev, bool enable)
184 struct gpio_desc reset;
187 ret = gpio_request_by_name(dev, "reset-gpios", 0, &reset, GPIOD_IS_OUT);
190 dm_gpio_set_value(&reset, 1);
192 dm_gpio_set_value(&reset, 0);
198 static const struct pwrseq_ops rockchip_dwmmc_pwrseq_ops = {
199 .set_power = rockchip_dwmmc_pwrseq_set_power,
202 static const struct udevice_id rockchip_dwmmc_pwrseq_ids[] = {
203 { .compatible = "mmc-pwrseq-emmc" },
207 U_BOOT_DRIVER(rockchip_dwmmc_pwrseq_drv) = {
208 .name = "mmc_pwrseq_emmc",
210 .of_match = rockchip_dwmmc_pwrseq_ids,
211 .ops = &rockchip_dwmmc_pwrseq_ops,