Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u...
[platform/kernel/u-boot.git] / drivers / mmc / rockchip_dw_mmc.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (c) 2013 Google, Inc
4  */
5
6 #include <common.h>
7 #include <clk.h>
8 #include <dm.h>
9 #include <dt-structs.h>
10 #include <dwmmc.h>
11 #include <errno.h>
12 #include <log.h>
13 #include <mapmem.h>
14 #include <pwrseq.h>
15 #include <syscon.h>
16 #include <asm/gpio.h>
17 #include <asm/arch-rockchip/clock.h>
18 #include <asm/arch-rockchip/periph.h>
19 #include <linux/delay.h>
20 #include <linux/err.h>
21
22 struct rockchip_mmc_plat {
23 #if CONFIG_IS_ENABLED(OF_PLATDATA)
24         struct dtd_rockchip_rk3288_dw_mshc dtplat;
25 #endif
26         struct mmc_config cfg;
27         struct mmc mmc;
28 };
29
30 struct rockchip_dwmmc_priv {
31         struct clk clk;
32         struct dwmci_host host;
33         int fifo_depth;
34         bool fifo_mode;
35         u32 minmax[2];
36 };
37
38 static uint rockchip_dwmmc_get_mmc_clk(struct dwmci_host *host, uint freq)
39 {
40         struct udevice *dev = host->priv;
41         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
42         int ret;
43
44         ret = clk_set_rate(&priv->clk, freq);
45         if (ret < 0) {
46                 debug("%s: err=%d\n", __func__, ret);
47                 return ret;
48         }
49
50         return freq;
51 }
52
53 static int rockchip_dwmmc_of_to_plat(struct udevice *dev)
54 {
55 #if !CONFIG_IS_ENABLED(OF_PLATDATA)
56         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
57         struct dwmci_host *host = &priv->host;
58
59         host->name = dev->name;
60         host->ioaddr = dev_read_addr_ptr(dev);
61         host->buswidth = dev_read_u32_default(dev, "bus-width", 4);
62         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
63         host->priv = dev;
64
65         /* use non-removeable as sdcard and emmc as judgement */
66         if (dev_read_bool(dev, "non-removable"))
67                 host->dev_index = 0;
68         else
69                 host->dev_index = 1;
70
71         priv->fifo_depth = dev_read_u32_default(dev, "fifo-depth", 0);
72
73         if (priv->fifo_depth < 0)
74                 return -EINVAL;
75         priv->fifo_mode = dev_read_bool(dev, "fifo-mode");
76
77 #ifdef CONFIG_SPL_BUILD
78         if (!priv->fifo_mode)
79                 priv->fifo_mode = dev_read_bool(dev, "u-boot,spl-fifo-mode");
80 #endif
81
82         /*
83          * 'clock-freq-min-max' is deprecated
84          * (see https://github.com/torvalds/linux/commit/b023030f10573de738bbe8df63d43acab64c9f7b)
85          */
86         if (dev_read_u32_array(dev, "clock-freq-min-max", priv->minmax, 2)) {
87                 int val = dev_read_u32_default(dev, "max-frequency", -EINVAL);
88
89                 if (val < 0)
90                         return val;
91
92                 priv->minmax[0] = 400000;  /* 400 kHz */
93                 priv->minmax[1] = val;
94         } else {
95                 debug("%s: 'clock-freq-min-max' property was deprecated.\n",
96                       __func__);
97         }
98 #endif
99         return 0;
100 }
101
102 static int rockchip_dwmmc_probe(struct udevice *dev)
103 {
104         struct rockchip_mmc_plat *plat = dev_get_plat(dev);
105         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
106         struct rockchip_dwmmc_priv *priv = dev_get_priv(dev);
107         struct dwmci_host *host = &priv->host;
108         int ret;
109
110 #if CONFIG_IS_ENABLED(OF_PLATDATA)
111         struct dtd_rockchip_rk3288_dw_mshc *dtplat = &plat->dtplat;
112
113         host->name = dev->name;
114         host->ioaddr = map_sysmem(dtplat->reg[0], dtplat->reg[1]);
115         host->buswidth = dtplat->bus_width;
116         host->get_mmc_clk = rockchip_dwmmc_get_mmc_clk;
117         host->priv = dev;
118         host->dev_index = 0;
119         priv->fifo_depth = dtplat->fifo_depth;
120         priv->fifo_mode = 0;
121         priv->minmax[0] = 400000;  /*  400 kHz */
122         priv->minmax[1] = dtplat->max_frequency;
123
124         ret = clk_get_by_driver_info(dev, dtplat->clocks, &priv->clk);
125         if (ret < 0)
126                 return ret;
127 #else
128         ret = clk_get_by_index(dev, 0, &priv->clk);
129         if (ret < 0)
130                 return ret;
131 #endif
132         host->fifoth_val = MSIZE(0x2) |
133                 RX_WMARK(priv->fifo_depth / 2 - 1) |
134                 TX_WMARK(priv->fifo_depth / 2);
135
136         host->fifo_mode = priv->fifo_mode;
137
138 #ifdef CONFIG_MMC_PWRSEQ
139         /* Enable power if needed */
140         ret = mmc_pwrseq_get_power(dev, &plat->cfg);
141         if (!ret) {
142                 ret = pwrseq_set_power(plat->cfg.pwr_dev, true);
143                 if (ret)
144                         return ret;
145         }
146 #endif
147         dwmci_setup_cfg(&plat->cfg, host, priv->minmax[1], priv->minmax[0]);
148         host->mmc = &plat->mmc;
149         host->mmc->priv = &priv->host;
150         host->mmc->dev = dev;
151         upriv->mmc = host->mmc;
152
153         return dwmci_probe(dev);
154 }
155
156 static int rockchip_dwmmc_bind(struct udevice *dev)
157 {
158         struct rockchip_mmc_plat *plat = dev_get_plat(dev);
159
160         return dwmci_bind(dev, &plat->mmc, &plat->cfg);
161 }
162
163 static const struct udevice_id rockchip_dwmmc_ids[] = {
164         { .compatible = "rockchip,rk2928-dw-mshc" },
165         { .compatible = "rockchip,rk3288-dw-mshc" },
166         { }
167 };
168
169 U_BOOT_DRIVER(rockchip_rk3288_dw_mshc) = {
170         .name           = "rockchip_rk3288_dw_mshc",
171         .id             = UCLASS_MMC,
172         .of_match       = rockchip_dwmmc_ids,
173         .of_to_plat = rockchip_dwmmc_of_to_plat,
174         .ops            = &dm_dwmci_ops,
175         .bind           = rockchip_dwmmc_bind,
176         .probe          = rockchip_dwmmc_probe,
177         .priv_auto      = sizeof(struct rockchip_dwmmc_priv),
178         .plat_auto      = sizeof(struct rockchip_mmc_plat),
179 };
180
181 DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3328_dw_mshc)
182 DM_DRIVER_ALIAS(rockchip_rk3288_dw_mshc, rockchip_rk3368_dw_mshc)