spi: zynqmp_gqspi: fix set_speed bug on multiple runs
[platform/kernel/u-boot.git] / drivers / mmc / pic32_sdhci.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Support of SDHCI for Microchip PIC32 SoC.
4  *
5  * Copyright (C) 2015 Microchip Technology Inc.
6  * Andrei Pistirica <andrei.pistirica@microchip.com>
7  */
8
9 #include <dm.h>
10 #include <sdhci.h>
11 #include <clk.h>
12
13 struct pic32_sdhci_plat {
14         struct mmc_config cfg;
15         struct mmc mmc;
16 };
17
18 static int pic32_sdhci_probe(struct udevice *dev)
19 {
20         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
21         struct pic32_sdhci_plat *plat = dev_get_plat(dev);
22         struct sdhci_host *host = dev_get_priv(dev);
23
24         struct clk clk;
25         ulong clk_rate;
26         int ret;
27
28         ret = clk_get_by_name(dev, "base_clk", &clk);
29         if (ret)
30                 return ret;
31
32         clk_rate = clk_get_rate(&clk);
33         clk_free(&clk);
34
35         if (IS_ERR_VALUE(clk_rate))
36                 return clk_rate;
37
38         host->ioaddr = dev_remap_addr(dev);
39
40         if (!host->ioaddr)
41                 return -EINVAL;
42
43         host->name      = dev->name;
44         host->quirks    = SDHCI_QUIRK_NO_HISPD_BIT;
45         host->bus_width = dev_read_u32_default(dev, "bus-width", 4);
46         host->max_clk   = clk_rate;
47
48         host->mmc = &plat->mmc;
49         host->mmc->dev = dev;
50
51         ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
52         if (ret)
53                 return ret;
54
55         host->mmc->priv = host;
56         upriv->mmc = host->mmc;
57
58         ret = sdhci_probe(dev);
59         if (ret)
60                 return ret;
61
62         if (!dev_read_bool(dev, "microchip,use-sdcd")) {
63                 // Use workaround 1 for erratum #15 by default
64                 u8 ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
65                 ctrl = (ctrl & ~SDHCI_CTRL_CD_TEST_INS) | SDHCI_CTRL_CD_TEST;
66                 sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
67         }
68
69         return 0;
70 }
71
72 static int pic32_sdhci_bind(struct udevice *dev)
73 {
74         struct pic32_sdhci_plat *plat = dev_get_plat(dev);
75
76         return sdhci_bind(dev, &plat->mmc, &plat->cfg);
77 }
78
79 static const struct udevice_id pic32_sdhci_ids[] = {
80         { .compatible = "microchip,pic32mzda-sdhci" },
81         { }
82 };
83
84 U_BOOT_DRIVER(pic32_sdhci_drv) = {
85         .name                   = "pic32_sdhci",
86         .id                     = UCLASS_MMC,
87         .of_match               = pic32_sdhci_ids,
88         .ops                    = &sdhci_ops,
89         .bind                   = pic32_sdhci_bind,
90         .probe                  = pic32_sdhci_probe,
91         .priv_auto      = sizeof(struct sdhci_host),
92         .plat_auto      = sizeof(struct pic32_sdhci_plat)
93 };