1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2015, Google, Inc
4 * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
15 #include <acpi/acpigen.h>
16 #include <acpi/acpi_device.h>
17 #include <acpi/acpi_dp.h>
18 #include <asm-generic/gpio.h>
21 /* Type of MMC device */
28 struct mmc_config cfg;
33 struct sdhci_host host;
35 struct gpio_desc cd_gpio;
38 static int pci_mmc_probe(struct udevice *dev)
40 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
41 struct pci_mmc_plat *plat = dev_get_plat(dev);
42 struct pci_mmc_priv *priv = dev_get_priv(dev);
43 struct sdhci_host *host = &priv->host;
44 struct blk_desc *desc;
47 ret = mmc_of_parse(dev, &plat->cfg);
50 desc = mmc_get_blk_desc(&plat->mmc);
51 desc->removable = !(plat->cfg.host_caps & MMC_CAP_NONREMOVABLE);
53 host->ioaddr = (void *)dm_pci_map_bar(dev, PCI_BASE_ADDRESS_0, 0, 0, PCI_REGION_TYPE,
55 host->name = dev->name;
56 host->cd_gpio = priv->cd_gpio;
57 host->mmc = &plat->mmc;
59 ret = sdhci_setup_cfg(&plat->cfg, host, 0, 0);
62 host->mmc->priv = &priv->host;
63 upriv->mmc = host->mmc;
65 return sdhci_probe(dev);
68 static int pci_mmc_of_to_plat(struct udevice *dev)
70 if (CONFIG_IS_ENABLED(DM_GPIO)) {
71 struct pci_mmc_priv *priv = dev_get_priv(dev);
74 ret = gpio_request_by_name(dev, "cd-gpios", 0, &priv->cd_gpio,
76 log_debug("cd-gpio %s done, ret=%d\n", dev->name, ret);
82 static int pci_mmc_bind(struct udevice *dev)
84 struct pci_mmc_plat *plat = dev_get_plat(dev);
86 return sdhci_bind(dev, &plat->mmc, &plat->cfg);
90 static int pci_mmc_acpi_fill_ssdt(const struct udevice *dev,
93 struct pci_mmc_priv *priv = dev_get_priv(dev);
94 char path[ACPI_PATH_MAX];
95 struct acpi_gpio gpio;
99 if (!dev_has_ofnode(dev))
101 if (dev_get_driver_data(dev) == TYPE_EMMC)
104 ret = gpio_get_acpi(&priv->cd_gpio, &gpio);
106 return log_msg_ret("gpio", ret);
107 gpio.type = ACPI_GPIO_TYPE_INTERRUPT;
108 gpio.pull = ACPI_GPIO_PULL_NONE;
109 gpio.irq.mode = ACPI_IRQ_EDGE_TRIGGERED;
110 gpio.irq.polarity = ACPI_IRQ_ACTIVE_BOTH;
111 gpio.irq.shared = ACPI_IRQ_SHARED;
112 gpio.irq.wake = ACPI_IRQ_WAKE;
113 gpio.interrupt_debounce_timeout = 10000; /* 100ms */
115 /* Use device path as the Scope for the SSDT */
116 ret = acpi_device_path(dev, path, sizeof(path));
118 return log_msg_ret("path", ret);
119 acpigen_write_scope(ctx, path);
120 acpigen_write_name(ctx, "_CRS");
122 /* Write GpioInt() as default (if set) or custom from devicetree */
123 acpigen_write_resourcetemplate_header(ctx);
124 acpi_device_write_gpio(ctx, &gpio);
125 acpigen_write_resourcetemplate_footer(ctx);
127 /* Bind the cd-gpio name to the GpioInt() resource */
128 dp = acpi_dp_new_table("_DSD");
131 acpi_dp_add_gpio(dp, "cd-gpio", path, 0, 0, 1);
132 ret = acpi_dp_write(ctx, dp);
134 return log_msg_ret("cd", ret);
136 acpigen_pop_len(ctx);
141 struct acpi_ops pci_mmc_acpi_ops = {
142 #ifdef CONFIG_ACPIGEN
143 .fill_ssdt = pci_mmc_acpi_fill_ssdt,
147 static const struct udevice_id pci_mmc_match[] = {
148 { .compatible = "intel,apl-sd", .data = TYPE_SD },
149 { .compatible = "intel,apl-emmc", .data = TYPE_EMMC },
153 U_BOOT_DRIVER(pci_mmc) = {
156 .of_match = pci_mmc_match,
157 .bind = pci_mmc_bind,
158 .of_to_plat = pci_mmc_of_to_plat,
159 .probe = pci_mmc_probe,
161 .priv_auto = sizeof(struct pci_mmc_priv),
162 .plat_auto = sizeof(struct pci_mmc_plat),
163 ACPI_OPS_PTR(&pci_mmc_acpi_ops)
166 static struct pci_device_id mmc_supported[] = {
167 { PCI_DEVICE_CLASS(PCI_CLASS_SYSTEM_SDHCI << 8, 0xffff00) },
171 U_BOOT_PCI_DEVICE(pci_mmc, mmc_supported);