drivers/mmc/mmc_spi.c

   1 /*
   2  * generic mmc spi driver
   3  *
   4  * Copyright (C) 2010 Thomas Chou <thomas@wytron.com.tw>
   5  * Copyright 2019 Bhargav Shah <bhargavshah1988@gmail.com>
   6  *
   7  * Licensed under the GPL-2 or later.
   8  */
   9 #include <common.h>
  10 #include <errno.h>
  11 #include <log.h>
  12 #include <malloc.h>
  13 #include <part.h>
  14 #include <mmc.h>
  15 #include <stdlib.h>
  16 #include <linux/bitops.h>
  17 #include <u-boot/crc.h>
  18 #include <linux/crc7.h>
  19 #include <asm/byteorder.h>
  20 #include <dm.h>
  21 #include <spi.h>
  22
  23 /* MMC/SD in SPI mode reports R1 status always */
  24 #define R1_SPI_IDLE                     BIT(0)
  25 #define R1_SPI_ERASE_RESET              BIT(1)
  26 #define R1_SPI_ILLEGAL_COMMAND          BIT(2)
  27 #define R1_SPI_COM_CRC                  BIT(3)
  28 #define R1_SPI_ERASE_SEQ                BIT(4)
  29 #define R1_SPI_ADDRESS                  BIT(5)
  30 #define R1_SPI_PARAMETER                BIT(6)
  31 /* R1 bit 7 is always zero, reuse this bit for error */
  32 #define R1_SPI_ERROR                    BIT(7)
  33
  34 /* Response tokens used to ack each block written: */
  35 #define SPI_MMC_RESPONSE_CODE(x)        ((x) & 0x1f)
  36 #define SPI_RESPONSE_ACCEPTED           ((2 << 1)|1)
  37 #define SPI_RESPONSE_CRC_ERR            ((5 << 1)|1)
  38 #define SPI_RESPONSE_WRITE_ERR          ((6 << 1)|1)
  39
  40 /* Read and write blocks start with these tokens and end with crc;
  41  * on error, read tokens act like a subset of R2_SPI_* values.
  42  */
  43 /* single block write multiblock read */
  44 #define SPI_TOKEN_SINGLE                0xfe
  45 /* multiblock write */
  46 #define SPI_TOKEN_MULTI_WRITE           0xfc
  47 /* terminate multiblock write */
  48 #define SPI_TOKEN_STOP_TRAN             0xfd
  49
  50 /* MMC SPI commands start with a start bit "0" and a transmit bit "1" */
  51 #define MMC_SPI_CMD(x) (0x40 | (x))
  52
  53 /* bus capability */
  54 #define MMC_SPI_VOLTAGE                 (MMC_VDD_32_33 | MMC_VDD_33_34)
  55 #define MMC_SPI_MIN_CLOCK               400000  /* 400KHz to meet MMC spec */
  56 #define MMC_SPI_MAX_CLOCK               25000000 /* SD/MMC legacy speed */
  57
  58 /* timeout value */
  59 #define CMD_TIMEOUT                     8
  60 #define READ_TIMEOUT                    3000000 /* 1 sec */
  61 #define WRITE_TIMEOUT                   3000000 /* 1 sec */
  62
  63 struct mmc_spi_plat {
  64         struct mmc_config cfg;
  65         struct mmc mmc;
  66 };
  67
  68 struct mmc_spi_priv {
  69         struct spi_slave *spi;
  70 };
  71
  72 static int mmc_spi_sendcmd(struct udevice *dev,
  73                            ushort cmdidx, u32 cmdarg, u32 resp_type,
  74                            u8 *resp, u32 resp_size,
  75                            bool resp_match, u8 resp_match_value)
  76 {
  77         int i, rpos = 0, ret = 0;
  78         u8 cmdo[7], r;
  79
  80         debug("%s: cmd%d cmdarg=0x%x resp_type=0x%x "
  81               "resp_size=%d resp_match=%d resp_match_value=0x%x\n",
  82               __func__, cmdidx, cmdarg, resp_type,
  83               resp_size, resp_match, resp_match_value);
  84
  85         cmdo[0] = 0xff;
  86         cmdo[1] = MMC_SPI_CMD(cmdidx);
  87         cmdo[2] = cmdarg >> 24;
  88         cmdo[3] = cmdarg >> 16;
  89         cmdo[4] = cmdarg >> 8;
  90         cmdo[5] = cmdarg;
  91         cmdo[6] = (crc7(0, &cmdo[1], 5) << 1) | 0x01;
  92         ret = dm_spi_xfer(dev, sizeof(cmdo) * 8, cmdo, NULL, SPI_XFER_BEGIN);
  93         if (ret)
  94                 return ret;
  95
  96         ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
  97         if (ret)
  98                 return ret;
  99
 100         if (!resp || !resp_size)
 101                 return 0;
 102
 103         debug("%s: cmd%d", __func__, cmdidx);
 104
 105         if (resp_match) {
 106                 r = ~resp_match_value;
 107                 i = CMD_TIMEOUT;
 108                 while (i--) {
 109                         ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
 110                         if (ret)
 111                                 return ret;
 112                         debug(" resp%d=0x%x", rpos, r);
 113                         rpos++;
 114                         if (r == resp_match_value)
 115                                 break;
 116                 }
 117                 if (!i && (r != resp_match_value))
 118                         return -ETIMEDOUT;
 119         }
 120
 121         for (i = 0; i < resp_size; i++) {
 122                 if (i == 0 && resp_match) {
 123                         resp[i] = resp_match_value;
 124                         continue;
 125                 }
 126                 ret = dm_spi_xfer(dev, 1 * 8, NULL, &r, 0);
 127                 if (ret)
 128                         return ret;
 129                 debug(" resp%d=0x%x", rpos, r);
 130                 rpos++;
 131                 resp[i] = r;
 132         }
 133
 134         debug("\n");
 135
 136         return 0;
 137 }
 138
 139 static int mmc_spi_readdata(struct udevice *dev,
 140                             void *xbuf, u32 bcnt, u32 bsize)
 141 {
 142         u16 crc;
 143         u8 *buf = xbuf, r1;
 144         int i, ret = 0;
 145
 146         while (bcnt--) {
 147                 for (i = 0; i < READ_TIMEOUT; i++) {
 148                         ret = dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
 149                         if (ret)
 150                                 return ret;
 151                         if (r1 == SPI_TOKEN_SINGLE)
 152                                 break;
 153                 }
 154                 debug("%s: data tok%d 0x%x\n", __func__, i, r1);
 155                 if (r1 == SPI_TOKEN_SINGLE) {
 156                         ret = dm_spi_xfer(dev, bsize * 8, NULL, buf, 0);
 157                         if (ret)
 158                                 return ret;
 159                         ret = dm_spi_xfer(dev, 2 * 8, NULL, &crc, 0);
 160                         if (ret)
 161                                 return ret;
 162 #ifdef CONFIG_MMC_SPI_CRC_ON
 163                         if (be16_to_cpu(crc16_ccitt(0, buf, bsize)) != crc) {
 164                                 debug("%s: data crc error\n", __func__);
 165                                 r1 = R1_SPI_COM_CRC;
 166                                 break;
 167                         }
 168 #endif
 169                         r1 = 0;
 170                 } else {
 171                         r1 = R1_SPI_ERROR;
 172                         break;
 173                 }
 174                 buf += bsize;
 175         }
 176
 177         if (r1 & R1_SPI_COM_CRC)
 178                 ret = -ECOMM;
 179         else if (r1) /* other errors */
 180                 ret = -ETIMEDOUT;
 181
 182         return ret;
 183 }
 184
 185 static int mmc_spi_writedata(struct udevice *dev, const void *xbuf,
 186                              u32 bcnt, u32 bsize, int multi)
 187 {
 188         const u8 *buf = xbuf;
 189         u8 r1, tok[2];
 190         u16 crc;
 191         int i, ret = 0;
 192
 193         tok[0] = 0xff;
 194         tok[1] = multi ? SPI_TOKEN_MULTI_WRITE : SPI_TOKEN_SINGLE;
 195
 196         while (bcnt--) {
 197 #ifdef CONFIG_MMC_SPI_CRC_ON
 198                 crc = cpu_to_be16(crc16_ccitt(0, (u8 *)buf, bsize));
 199 #endif
 200                 dm_spi_xfer(dev, 2 * 8, tok, NULL, 0);
 201                 dm_spi_xfer(dev, bsize * 8, buf, NULL, 0);
 202                 dm_spi_xfer(dev, 2 * 8, &crc, NULL, 0);
 203                 for (i = 0; i < CMD_TIMEOUT; i++) {
 204                         dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
 205                         if ((r1 & 0x10) == 0) /* response token */
 206                                 break;
 207                 }
 208                 debug("%s: data tok%d 0x%x\n", __func__, i, r1);
 209                 if (SPI_MMC_RESPONSE_CODE(r1) == SPI_RESPONSE_ACCEPTED) {
 210                         debug("%s: data accepted\n", __func__);
 211                         for (i = 0; i < WRITE_TIMEOUT; i++) { /* wait busy */
 212                                 dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
 213                                 if (i && r1 == 0xff) {
 214                                         r1 = 0;
 215                                         break;
 216                                 }
 217                         }
 218                         if (i == WRITE_TIMEOUT) {
 219                                 debug("%s: data write timeout 0x%x\n",
 220                                       __func__, r1);
 221                                 r1 = R1_SPI_ERROR;
 222                                 break;
 223                         }
 224                 } else {
 225                         debug("%s: data error 0x%x\n", __func__, r1);
 226                         r1 = R1_SPI_COM_CRC;
 227                         break;
 228                 }
 229                 buf += bsize;
 230         }
 231         if (multi && bcnt == -1) { /* stop multi write */
 232                 tok[1] = SPI_TOKEN_STOP_TRAN;
 233                 dm_spi_xfer(dev, 2 * 8, tok, NULL, 0);
 234                 for (i = 0; i < WRITE_TIMEOUT; i++) { /* wait busy */
 235                         dm_spi_xfer(dev, 1 * 8, NULL, &r1, 0);
 236                         if (i && r1 == 0xff) {
 237                                 r1 = 0;
 238                                 break;
 239                         }
 240                 }
 241                 if (i == WRITE_TIMEOUT) {
 242                         debug("%s: data write timeout 0x%x\n", __func__, r1);
 243                         r1 = R1_SPI_ERROR;
 244                 }
 245         }
 246
 247         if (r1 & R1_SPI_COM_CRC)
 248                 ret = -ECOMM;
 249         else if (r1) /* other errors */
 250                 ret = -ETIMEDOUT;
 251
 252         return ret;
 253 }
 254
 255 static int dm_mmc_spi_set_ios(struct udevice *dev)
 256 {
 257         return 0;
 258 }
 259
 260 static int dm_mmc_spi_request(struct udevice *dev, struct mmc_cmd *cmd,
 261                               struct mmc_data *data)
 262 {
 263         int i, multi, ret = 0;
 264         u8 *resp = NULL;
 265         u32 resp_size = 0;
 266         bool resp_match = false;
 267         u8 resp8 = 0, resp40[5] = { 0 }, resp_match_value = 0;
 268
 269         dm_spi_claim_bus(dev);
 270
 271         for (i = 0; i < 4; i++)
 272                 cmd->response[i] = 0;
 273
 274         switch (cmd->cmdidx) {
 275         case SD_CMD_APP_SEND_OP_COND:
 276         case MMC_CMD_SEND_OP_COND:
 277                 resp = &resp8;
 278                 resp_size = sizeof(resp8);
 279                 cmd->cmdarg = 0x40000000;
 280                 break;
 281         case SD_CMD_SEND_IF_COND:
 282                 resp = (u8 *)&resp40[0];
 283                 resp_size = sizeof(resp40);
 284                 resp_match = true;
 285                 resp_match_value = R1_SPI_IDLE;
 286                 break;
 287         case MMC_CMD_SPI_READ_OCR:
 288                 resp = (u8 *)&resp40[0];
 289                 resp_size = sizeof(resp40);
 290                 break;
 291         case MMC_CMD_SEND_STATUS:
 292         case MMC_CMD_SET_BLOCKLEN:
 293         case MMC_CMD_SPI_CRC_ON_OFF:
 294         case MMC_CMD_STOP_TRANSMISSION:
 295                 resp = &resp8;
 296                 resp_size = sizeof(resp8);
 297                 resp_match = true;
 298                 resp_match_value = 0x0;
 299                 break;
 300         case MMC_CMD_SEND_CSD:
 301         case MMC_CMD_SEND_CID:
 302         case MMC_CMD_READ_SINGLE_BLOCK:
 303         case MMC_CMD_READ_MULTIPLE_BLOCK:
 304         case MMC_CMD_WRITE_SINGLE_BLOCK:
 305         case MMC_CMD_WRITE_MULTIPLE_BLOCK:
 306                 break;
 307         default:
 308                 resp = &resp8;
 309                 resp_size = sizeof(resp8);
 310                 resp_match = true;
 311                 resp_match_value = R1_SPI_IDLE;
 312                 break;
 313         };
 314
 315         ret = mmc_spi_sendcmd(dev, cmd->cmdidx, cmd->cmdarg, cmd->resp_type,
 316                               resp, resp_size, resp_match, resp_match_value);
 317         if (ret)
 318                 goto done;
 319
 320         switch (cmd->cmdidx) {
 321         case SD_CMD_APP_SEND_OP_COND:
 322         case MMC_CMD_SEND_OP_COND:
 323                 cmd->response[0] = (resp8 & R1_SPI_IDLE) ? 0 : OCR_BUSY;
 324                 break;
 325         case SD_CMD_SEND_IF_COND:
 326         case MMC_CMD_SPI_READ_OCR:
 327                 cmd->response[0] = resp40[4];
 328                 cmd->response[0] |= (uint)resp40[3] << 8;
 329                 cmd->response[0] |= (uint)resp40[2] << 16;
 330                 cmd->response[0] |= (uint)resp40[1] << 24;
 331                 break;
 332         case MMC_CMD_SEND_STATUS:
 333                 cmd->response[0] = (resp8 & 0xff) ?
 334                         MMC_STATUS_ERROR : MMC_STATUS_RDY_FOR_DATA;
 335                 break;
 336         case MMC_CMD_SEND_CID:
 337         case MMC_CMD_SEND_CSD:
 338                 ret = mmc_spi_readdata(dev, cmd->response, 1, 16);
 339                 if (ret)
 340                         return ret;
 341                 for (i = 0; i < 4; i++)
 342                         cmd->response[i] =
 343                                 cpu_to_be32(cmd->response[i]);
 344                 break;
 345         default:
 346                 cmd->response[0] = resp8;
 347                 break;
 348         }
 349
 350         debug("%s: cmd%d resp0=0x%x resp1=0x%x resp2=0x%x resp3=0x%x\n",
 351               __func__, cmd->cmdidx, cmd->response[0], cmd->response[1],
 352               cmd->response[2], cmd->response[3]);
 353
 354         if (data) {
 355                 debug("%s: data flags=0x%x blocks=%d block_size=%d\n",
 356                       __func__, data->flags, data->blocks, data->blocksize);
 357                 multi = (cmd->cmdidx == MMC_CMD_WRITE_MULTIPLE_BLOCK);
 358                 if (data->flags == MMC_DATA_READ)
 359                         ret = mmc_spi_readdata(dev, data->dest,
 360                                                data->blocks, data->blocksize);
 361                 else if  (data->flags == MMC_DATA_WRITE)
 362                         ret = mmc_spi_writedata(dev, data->src,
 363                                                 data->blocks, data->blocksize,
 364                                                 multi);
 365         }
 366
 367 done:
 368         dm_spi_xfer(dev, 0, NULL, NULL, SPI_XFER_END);
 369
 370         dm_spi_release_bus(dev);
 371
 372         return ret;
 373 }
 374
 375 static int mmc_spi_probe(struct udevice *dev)
 376 {
 377         struct mmc_spi_priv *priv = dev_get_priv(dev);
 378         struct mmc_spi_plat *plat = dev_get_platdata(dev);
 379         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
 380         char *name;
 381
 382         priv->spi = dev_get_parent_priv(dev);
 383         if (!priv->spi->max_hz)
 384                 priv->spi->max_hz = MMC_SPI_MAX_CLOCK;
 385         priv->spi->speed = 0;
 386         priv->spi->mode = SPI_MODE_0;
 387         priv->spi->wordlen = 8;
 388
 389         name = malloc(strlen(dev->parent->name) + strlen(dev->name) + 4);
 390         if (!name)
 391                 return -ENOMEM;
 392         sprintf(name, "%s:%s", dev->parent->name, dev->name);
 393
 394         plat->cfg.name = name;
 395         plat->cfg.host_caps = MMC_MODE_SPI;
 396         plat->cfg.voltages = MMC_SPI_VOLTAGE;
 397         plat->cfg.f_min = MMC_SPI_MIN_CLOCK;
 398         plat->cfg.f_max = priv->spi->max_hz;
 399         plat->cfg.part_type = PART_TYPE_DOS;
 400         plat->cfg.b_max = CONFIG_SYS_MMC_MAX_BLK_COUNT;
 401
 402         plat->mmc.cfg = &plat->cfg;
 403         plat->mmc.priv = priv;
 404         plat->mmc.dev = dev;
 405
 406         upriv->mmc = &plat->mmc;
 407
 408         return 0;
 409 }
 410
 411 static int mmc_spi_bind(struct udevice *dev)
 412 {
 413         struct mmc_spi_plat *plat = dev_get_platdata(dev);
 414
 415         return mmc_bind(dev, &plat->mmc, &plat->cfg);
 416 }
 417
 418 static const struct dm_mmc_ops mmc_spi_ops = {
 419         .send_cmd       = dm_mmc_spi_request,
 420         .set_ios        = dm_mmc_spi_set_ios,
 421 };
 422
 423 static const struct udevice_id dm_mmc_spi_match[] = {
 424         { .compatible = "mmc-spi-slot" },
 425         { /* sentinel */ }
 426 };
 427
 428 U_BOOT_DRIVER(mmc_spi) = {
 429         .name = "mmc_spi",
 430         .id = UCLASS_MMC,
 431         .of_match = dm_mmc_spi_match,
 432         .ops = &mmc_spi_ops,
 433         .probe = mmc_spi_probe,
 434         .bind = mmc_spi_bind,
 435         .platdata_auto_alloc_size = sizeof(struct mmc_spi_plat),
 436         .priv_auto_alloc_size = sizeof(struct mmc_spi_priv),
 437 };