drivers/mmc/mmc.c

   1 /*
   2  * Copyright 2008, Freescale Semiconductor, Inc
   3  * Andy Fleming
   4  *
   5  * Based vaguely on the Linux code
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  */
   9
  10 #include <config.h>
  11 #include <common.h>
  12 #include <command.h>
  13 #include <dm.h>
  14 #include <dm/device-internal.h>
  15 #include <errno.h>
  16 #include <mmc.h>
  17 #include <part.h>
  18 #include <power/regulator.h>
  19 #include <malloc.h>
  20 #include <memalign.h>
  21 #include <linux/list.h>
  22 #include <div64.h>
  23 #include "mmc_private.h"
  24
  25 static const unsigned int sd_au_size[] = {
  26         0,              SZ_16K / 512,           SZ_32K / 512,
  27         SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
  28         SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
  29         SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
  30         SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,   SZ_64M / 512,
  31 };
  32
  33 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
  34 static int mmc_power_cycle(struct mmc *mmc);
  35
  36 #if CONFIG_IS_ENABLED(MMC_TINY)
  37 static struct mmc mmc_static;
  38 struct mmc *find_mmc_device(int dev_num)
  39 {
  40         return &mmc_static;
  41 }
  42
  43 void mmc_do_preinit(void)
  44 {
  45         struct mmc *m = &mmc_static;
  46 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
  47         mmc_set_preinit(m, 1);
  48 #endif
  49         if (m->preinit)
  50                 mmc_start_init(m);
  51 }
  52
  53 struct blk_desc *mmc_get_blk_desc(struct mmc *mmc)
  54 {
  55         return &mmc->block_dev;
  56 }
  57 #endif
  58
  59 #if !CONFIG_IS_ENABLED(DM_MMC)
  60 __weak int board_mmc_getwp(struct mmc *mmc)
  61 {
  62         return -1;
  63 }
  64
  65 int mmc_getwp(struct mmc *mmc)
  66 {
  67         int wp;
  68
  69         wp = board_mmc_getwp(mmc);
  70
  71         if (wp < 0) {
  72                 if (mmc->cfg->ops->getwp)
  73                         wp = mmc->cfg->ops->getwp(mmc);
  74                 else
  75                         wp = 0;
  76         }
  77
  78         return wp;
  79 }
  80
  81 __weak int board_mmc_getcd(struct mmc *mmc)
  82 {
  83         return -1;
  84 }
  85 #endif
  86
  87 #ifdef CONFIG_MMC_TRACE
  88 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
  89 {
  90         printf("CMD_SEND:%d\n", cmd->cmdidx);
  91         printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
  92 }
  93
  94 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
  95 {
  96         int i;
  97         u8 *ptr;
  98
  99         if (ret) {
 100                 printf("\t\tRET\t\t\t %d\n", ret);
 101         } else {
 102                 switch (cmd->resp_type) {
 103                 case MMC_RSP_NONE:
 104                         printf("\t\tMMC_RSP_NONE\n");
 105                         break;
 106                 case MMC_RSP_R1:
 107                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
 108                                 cmd->response[0]);
 109                         break;
 110                 case MMC_RSP_R1b:
 111                         printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
 112                                 cmd->response[0]);
 113                         break;
 114                 case MMC_RSP_R2:
 115                         printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
 116                                 cmd->response[0]);
 117                         printf("\t\t          \t\t 0x%08X \n",
 118                                 cmd->response[1]);
 119                         printf("\t\t          \t\t 0x%08X \n",
 120                                 cmd->response[2]);
 121                         printf("\t\t          \t\t 0x%08X \n",
 122                                 cmd->response[3]);
 123                         printf("\n");
 124                         printf("\t\t\t\t\tDUMPING DATA\n");
 125                         for (i = 0; i < 4; i++) {
 126                                 int j;
 127                                 printf("\t\t\t\t\t%03d - ", i*4);
 128                                 ptr = (u8 *)&cmd->response[i];
 129                                 ptr += 3;
 130                                 for (j = 0; j < 4; j++)
 131                                         printf("%02X ", *ptr--);
 132                                 printf("\n");
 133                         }
 134                         break;
 135                 case MMC_RSP_R3:
 136                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
 137                                 cmd->response[0]);
 138                         break;
 139                 default:
 140                         printf("\t\tERROR MMC rsp not supported\n");
 141                         break;
 142                 }
 143         }
 144 }
 145
 146 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
 147 {
 148         int status;
 149
 150         status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
 151         printf("CURR STATE:%d\n", status);
 152 }
 153 #endif
 154
 155 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
 156 const char *mmc_mode_name(enum bus_mode mode)
 157 {
 158         static const char *const names[] = {
 159               [MMC_LEGACY]      = "MMC legacy",
 160               [SD_LEGACY]       = "SD Legacy",
 161               [MMC_HS]          = "MMC High Speed (26MHz)",
 162               [SD_HS]           = "SD High Speed (50MHz)",
 163               [UHS_SDR12]       = "UHS SDR12 (25MHz)",
 164               [UHS_SDR25]       = "UHS SDR25 (50MHz)",
 165               [UHS_SDR50]       = "UHS SDR50 (100MHz)",
 166               [UHS_SDR104]      = "UHS SDR104 (208MHz)",
 167               [UHS_DDR50]       = "UHS DDR50 (50MHz)",
 168               [MMC_HS_52]       = "MMC High Speed (52MHz)",
 169               [MMC_DDR_52]      = "MMC DDR52 (52MHz)",
 170               [MMC_HS_200]      = "HS200 (200MHz)",
 171         };
 172
 173         if (mode >= MMC_MODES_END)
 174                 return "Unknown mode";
 175         else
 176                 return names[mode];
 177 }
 178 #endif
 179
 180 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
 181 {
 182         static const int freqs[] = {
 183               [SD_LEGACY]       = 25000000,
 184               [MMC_HS]          = 26000000,
 185               [SD_HS]           = 50000000,
 186               [UHS_SDR12]       = 25000000,
 187               [UHS_SDR25]       = 50000000,
 188               [UHS_SDR50]       = 100000000,
 189               [UHS_SDR104]      = 208000000,
 190               [UHS_DDR50]       = 50000000,
 191               [MMC_HS_52]       = 52000000,
 192               [MMC_DDR_52]      = 52000000,
 193               [MMC_HS_200]      = 200000000,
 194         };
 195
 196         if (mode == MMC_LEGACY)
 197                 return mmc->legacy_speed;
 198         else if (mode >= MMC_MODES_END)
 199                 return 0;
 200         else
 201                 return freqs[mode];
 202 }
 203
 204 static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
 205 {
 206         mmc->selected_mode = mode;
 207         mmc->tran_speed = mmc_mode2freq(mmc, mode);
 208         mmc->ddr_mode = mmc_is_mode_ddr(mode);
 209         debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
 210               mmc->tran_speed / 1000000);
 211         return 0;
 212 }
 213
 214 #if !CONFIG_IS_ENABLED(DM_MMC)
 215 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 216 {
 217         int ret;
 218
 219         mmmc_trace_before_send(mmc, cmd);
 220         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
 221         mmmc_trace_after_send(mmc, cmd, ret);
 222
 223         return ret;
 224 }
 225 #endif
 226
 227 int mmc_send_status(struct mmc *mmc, int timeout)
 228 {
 229         struct mmc_cmd cmd;
 230         int err, retries = 5;
 231
 232         cmd.cmdidx = MMC_CMD_SEND_STATUS;
 233         cmd.resp_type = MMC_RSP_R1;
 234         if (!mmc_host_is_spi(mmc))
 235                 cmd.cmdarg = mmc->rca << 16;
 236
 237         while (1) {
 238                 err = mmc_send_cmd(mmc, &cmd, NULL);
 239                 if (!err) {
 240                         if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
 241                             (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
 242                              MMC_STATE_PRG)
 243                                 break;
 244
 245                         if (cmd.response[0] & MMC_STATUS_MASK) {
 246 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 247                                 printf("Status Error: 0x%08X\n",
 248                                         cmd.response[0]);
 249 #endif
 250                                 return -ECOMM;
 251                         }
 252                 } else if (--retries < 0)
 253                         return err;
 254
 255                 if (timeout-- <= 0)
 256                         break;
 257
 258                 udelay(1000);
 259         }
 260
 261         mmc_trace_state(mmc, &cmd);
 262         if (timeout <= 0) {
 263 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 264                 printf("Timeout waiting card ready\n");
 265 #endif
 266                 return -ETIMEDOUT;
 267         }
 268
 269         return 0;
 270 }
 271
 272 int mmc_set_blocklen(struct mmc *mmc, int len)
 273 {
 274         struct mmc_cmd cmd;
 275
 276         if (mmc->ddr_mode)
 277                 return 0;
 278
 279         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
 280         cmd.resp_type = MMC_RSP_R1;
 281         cmd.cmdarg = len;
 282
 283         return mmc_send_cmd(mmc, &cmd, NULL);
 284 }
 285
 286 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 287                            lbaint_t blkcnt)
 288 {
 289         struct mmc_cmd cmd;
 290         struct mmc_data data;
 291
 292         if (blkcnt > 1)
 293                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
 294         else
 295                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
 296
 297         if (mmc->high_capacity)
 298                 cmd.cmdarg = start;
 299         else
 300                 cmd.cmdarg = start * mmc->read_bl_len;
 301
 302         cmd.resp_type = MMC_RSP_R1;
 303
 304         data.dest = dst;
 305         data.blocks = blkcnt;
 306         data.blocksize = mmc->read_bl_len;
 307         data.flags = MMC_DATA_READ;
 308
 309         if (mmc_send_cmd(mmc, &cmd, &data))
 310                 return 0;
 311
 312         if (blkcnt > 1) {
 313                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
 314                 cmd.cmdarg = 0;
 315                 cmd.resp_type = MMC_RSP_R1b;
 316                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
 317 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 318                         printf("mmc fail to send stop cmd\n");
 319 #endif
 320                         return 0;
 321                 }
 322         }
 323
 324         return blkcnt;
 325 }
 326
 327 #if CONFIG_IS_ENABLED(BLK)
 328 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 329 #else
 330 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 331                 void *dst)
 332 #endif
 333 {
 334 #if CONFIG_IS_ENABLED(BLK)
 335         struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 336 #endif
 337         int dev_num = block_dev->devnum;
 338         int err;
 339         lbaint_t cur, blocks_todo = blkcnt;
 340
 341         if (blkcnt == 0)
 342                 return 0;
 343
 344         struct mmc *mmc = find_mmc_device(dev_num);
 345         if (!mmc)
 346                 return 0;
 347
 348         if (CONFIG_IS_ENABLED(MMC_TINY))
 349                 err = mmc_switch_part(mmc, block_dev->hwpart);
 350         else
 351                 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
 352
 353         if (err < 0)
 354                 return 0;
 355
 356         if ((start + blkcnt) > block_dev->lba) {
 357 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 358                 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
 359                         start + blkcnt, block_dev->lba);
 360 #endif
 361                 return 0;
 362         }
 363
 364         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
 365                 debug("%s: Failed to set blocklen\n", __func__);
 366                 return 0;
 367         }
 368
 369         do {
 370                 cur = (blocks_todo > mmc->cfg->b_max) ?
 371                         mmc->cfg->b_max : blocks_todo;
 372                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 373                         debug("%s: Failed to read blocks\n", __func__);
 374                         return 0;
 375                 }
 376                 blocks_todo -= cur;
 377                 start += cur;
 378                 dst += cur * mmc->read_bl_len;
 379         } while (blocks_todo > 0);
 380
 381         return blkcnt;
 382 }
 383
 384 static int mmc_go_idle(struct mmc *mmc)
 385 {
 386         struct mmc_cmd cmd;
 387         int err;
 388
 389         udelay(1000);
 390
 391         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
 392         cmd.cmdarg = 0;
 393         cmd.resp_type = MMC_RSP_NONE;
 394
 395         err = mmc_send_cmd(mmc, &cmd, NULL);
 396
 397         if (err)
 398                 return err;
 399
 400         udelay(2000);
 401
 402         return 0;
 403 }
 404
 405 static int sd_send_op_cond(struct mmc *mmc)
 406 {
 407         int timeout = 1000;
 408         int err;
 409         struct mmc_cmd cmd;
 410
 411         while (1) {
 412                 cmd.cmdidx = MMC_CMD_APP_CMD;
 413                 cmd.resp_type = MMC_RSP_R1;
 414                 cmd.cmdarg = 0;
 415
 416                 err = mmc_send_cmd(mmc, &cmd, NULL);
 417
 418                 if (err)
 419                         return err;
 420
 421                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
 422                 cmd.resp_type = MMC_RSP_R3;
 423
 424                 /*
 425                  * Most cards do not answer if some reserved bits
 426                  * in the ocr are set. However, Some controller
 427                  * can set bit 7 (reserved for low voltages), but
 428                  * how to manage low voltages SD card is not yet
 429                  * specified.
 430                  */
 431                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
 432                         (mmc->cfg->voltages & 0xff8000);
 433
 434                 if (mmc->version == SD_VERSION_2)
 435                         cmd.cmdarg |= OCR_HCS;
 436
 437                 err = mmc_send_cmd(mmc, &cmd, NULL);
 438
 439                 if (err)
 440                         return err;
 441
 442                 if (cmd.response[0] & OCR_BUSY)
 443                         break;
 444
 445                 if (timeout-- <= 0)
 446                         return -EOPNOTSUPP;
 447
 448                 udelay(1000);
 449         }
 450
 451         if (mmc->version != SD_VERSION_2)
 452                 mmc->version = SD_VERSION_1_0;
 453
 454         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 455                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 456                 cmd.resp_type = MMC_RSP_R3;
 457                 cmd.cmdarg = 0;
 458
 459                 err = mmc_send_cmd(mmc, &cmd, NULL);
 460
 461                 if (err)
 462                         return err;
 463         }
 464
 465         mmc->ocr = cmd.response[0];
 466
 467         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 468         mmc->rca = 0;
 469
 470         return 0;
 471 }
 472
 473 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 474 {
 475         struct mmc_cmd cmd;
 476         int err;
 477
 478         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
 479         cmd.resp_type = MMC_RSP_R3;
 480         cmd.cmdarg = 0;
 481         if (use_arg && !mmc_host_is_spi(mmc))
 482                 cmd.cmdarg = OCR_HCS |
 483                         (mmc->cfg->voltages &
 484                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
 485                         (mmc->ocr & OCR_ACCESS_MODE);
 486
 487         err = mmc_send_cmd(mmc, &cmd, NULL);
 488         if (err)
 489                 return err;
 490         mmc->ocr = cmd.response[0];
 491         return 0;
 492 }
 493
 494 static int mmc_send_op_cond(struct mmc *mmc)
 495 {
 496         int err, i;
 497
 498         /* Some cards seem to need this */
 499         mmc_go_idle(mmc);
 500
 501         /* Asking to the card its capabilities */
 502         for (i = 0; i < 2; i++) {
 503                 err = mmc_send_op_cond_iter(mmc, i != 0);
 504                 if (err)
 505                         return err;
 506
 507                 /* exit if not busy (flag seems to be inverted) */
 508                 if (mmc->ocr & OCR_BUSY)
 509                         break;
 510         }
 511         mmc->op_cond_pending = 1;
 512         return 0;
 513 }
 514
 515 static int mmc_complete_op_cond(struct mmc *mmc)
 516 {
 517         struct mmc_cmd cmd;
 518         int timeout = 1000;
 519         uint start;
 520         int err;
 521
 522         mmc->op_cond_pending = 0;
 523         if (!(mmc->ocr & OCR_BUSY)) {
 524                 /* Some cards seem to need this */
 525                 mmc_go_idle(mmc);
 526
 527                 start = get_timer(0);
 528                 while (1) {
 529                         err = mmc_send_op_cond_iter(mmc, 1);
 530                         if (err)
 531                                 return err;
 532                         if (mmc->ocr & OCR_BUSY)
 533                                 break;
 534                         if (get_timer(start) > timeout)
 535                                 return -EOPNOTSUPP;
 536                         udelay(100);
 537                 }
 538         }
 539
 540         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 541                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 542                 cmd.resp_type = MMC_RSP_R3;
 543                 cmd.cmdarg = 0;
 544
 545                 err = mmc_send_cmd(mmc, &cmd, NULL);
 546
 547                 if (err)
 548                         return err;
 549
 550                 mmc->ocr = cmd.response[0];
 551         }
 552
 553         mmc->version = MMC_VERSION_UNKNOWN;
 554
 555         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 556         mmc->rca = 1;
 557
 558         return 0;
 559 }
 560
 561
 562 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 563 {
 564         struct mmc_cmd cmd;
 565         struct mmc_data data;
 566         int err;
 567
 568         /* Get the Card Status Register */
 569         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 570         cmd.resp_type = MMC_RSP_R1;
 571         cmd.cmdarg = 0;
 572
 573         data.dest = (char *)ext_csd;
 574         data.blocks = 1;
 575         data.blocksize = MMC_MAX_BLOCK_LEN;
 576         data.flags = MMC_DATA_READ;
 577
 578         err = mmc_send_cmd(mmc, &cmd, &data);
 579
 580         return err;
 581 }
 582
 583 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 584 {
 585         struct mmc_cmd cmd;
 586         int timeout = 1000;
 587         int retries = 3;
 588         int ret;
 589
 590         cmd.cmdidx = MMC_CMD_SWITCH;
 591         cmd.resp_type = MMC_RSP_R1b;
 592         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
 593                                  (index << 16) |
 594                                  (value << 8);
 595
 596         while (retries > 0) {
 597                 ret = mmc_send_cmd(mmc, &cmd, NULL);
 598
 599                 /* Waiting for the ready status */
 600                 if (!ret) {
 601                         ret = mmc_send_status(mmc, timeout);
 602                         return ret;
 603                 }
 604
 605                 retries--;
 606         }
 607
 608         return ret;
 609
 610 }
 611
 612 static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode)
 613 {
 614         int err;
 615         int speed_bits;
 616
 617         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
 618
 619         switch (mode) {
 620         case MMC_HS:
 621         case MMC_HS_52:
 622         case MMC_DDR_52:
 623                 speed_bits = EXT_CSD_TIMING_HS;
 624         case MMC_LEGACY:
 625                 speed_bits = EXT_CSD_TIMING_LEGACY;
 626                 break;
 627         default:
 628                 return -EINVAL;
 629         }
 630         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
 631                          speed_bits);
 632         if (err)
 633                 return err;
 634
 635         if ((mode == MMC_HS) || (mode == MMC_HS_52)) {
 636                 /* Now check to see that it worked */
 637                 err = mmc_send_ext_csd(mmc, test_csd);
 638                 if (err)
 639                         return err;
 640
 641                 /* No high-speed support */
 642                 if (!test_csd[EXT_CSD_HS_TIMING])
 643                         return -ENOTSUPP;
 644         }
 645
 646         return 0;
 647 }
 648
 649 static int mmc_get_capabilities(struct mmc *mmc)
 650 {
 651         u8 *ext_csd = mmc->ext_csd;
 652         char cardtype;
 653
 654         mmc->card_caps = MMC_MODE_1BIT;
 655
 656         if (mmc_host_is_spi(mmc))
 657                 return 0;
 658
 659         /* Only version 4 supports high-speed */
 660         if (mmc->version < MMC_VERSION_4)
 661                 return 0;
 662
 663         if (!ext_csd) {
 664                 printf("No ext_csd found!\n"); /* this should enver happen */
 665                 return -ENOTSUPP;
 666         }
 667
 668         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
 669
 670         cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
 671
 672         /* High Speed is set, there are two types: 52MHz and 26MHz */
 673         if (cardtype & EXT_CSD_CARD_TYPE_52) {
 674                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
 675                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
 676                 mmc->card_caps |= MMC_MODE_HS_52MHz;
 677         }
 678         if (cardtype & EXT_CSD_CARD_TYPE_26)
 679                 mmc->card_caps |= MMC_MODE_HS;
 680
 681         return 0;
 682 }
 683
 684 static int mmc_set_capacity(struct mmc *mmc, int part_num)
 685 {
 686         switch (part_num) {
 687         case 0:
 688                 mmc->capacity = mmc->capacity_user;
 689                 break;
 690         case 1:
 691         case 2:
 692                 mmc->capacity = mmc->capacity_boot;
 693                 break;
 694         case 3:
 695                 mmc->capacity = mmc->capacity_rpmb;
 696                 break;
 697         case 4:
 698         case 5:
 699         case 6:
 700         case 7:
 701                 mmc->capacity = mmc->capacity_gp[part_num - 4];
 702                 break;
 703         default:
 704                 return -1;
 705         }
 706
 707         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
 708
 709         return 0;
 710 }
 711
 712 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
 713 {
 714         int ret;
 715
 716         ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
 717                          (mmc->part_config & ~PART_ACCESS_MASK)
 718                          | (part_num & PART_ACCESS_MASK));
 719
 720         /*
 721          * Set the capacity if the switch succeeded or was intended
 722          * to return to representing the raw device.
 723          */
 724         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
 725                 ret = mmc_set_capacity(mmc, part_num);
 726                 mmc_get_blk_desc(mmc)->hwpart = part_num;
 727         }
 728
 729         return ret;
 730 }
 731
 732 int mmc_hwpart_config(struct mmc *mmc,
 733                       const struct mmc_hwpart_conf *conf,
 734                       enum mmc_hwpart_conf_mode mode)
 735 {
 736         u8 part_attrs = 0;
 737         u32 enh_size_mult;
 738         u32 enh_start_addr;
 739         u32 gp_size_mult[4];
 740         u32 max_enh_size_mult;
 741         u32 tot_enh_size_mult = 0;
 742         u8 wr_rel_set;
 743         int i, pidx, err;
 744         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 745
 746         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
 747                 return -EINVAL;
 748
 749         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
 750                 printf("eMMC >= 4.4 required for enhanced user data area\n");
 751                 return -EMEDIUMTYPE;
 752         }
 753
 754         if (!(mmc->part_support & PART_SUPPORT)) {
 755                 printf("Card does not support partitioning\n");
 756                 return -EMEDIUMTYPE;
 757         }
 758
 759         if (!mmc->hc_wp_grp_size) {
 760                 printf("Card does not define HC WP group size\n");
 761                 return -EMEDIUMTYPE;
 762         }
 763
 764         /* check partition alignment and total enhanced size */
 765         if (conf->user.enh_size) {
 766                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
 767                     conf->user.enh_start % mmc->hc_wp_grp_size) {
 768                         printf("User data enhanced area not HC WP group "
 769                                "size aligned\n");
 770                         return -EINVAL;
 771                 }
 772                 part_attrs |= EXT_CSD_ENH_USR;
 773                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
 774                 if (mmc->high_capacity) {
 775                         enh_start_addr = conf->user.enh_start;
 776                 } else {
 777                         enh_start_addr = (conf->user.enh_start << 9);
 778                 }
 779         } else {
 780                 enh_size_mult = 0;
 781                 enh_start_addr = 0;
 782         }
 783         tot_enh_size_mult += enh_size_mult;
 784
 785         for (pidx = 0; pidx < 4; pidx++) {
 786                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
 787                         printf("GP%i partition not HC WP group size "
 788                                "aligned\n", pidx+1);
 789                         return -EINVAL;
 790                 }
 791                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
 792                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
 793                         part_attrs |= EXT_CSD_ENH_GP(pidx);
 794                         tot_enh_size_mult += gp_size_mult[pidx];
 795                 }
 796         }
 797
 798         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
 799                 printf("Card does not support enhanced attribute\n");
 800                 return -EMEDIUMTYPE;
 801         }
 802
 803         err = mmc_send_ext_csd(mmc, ext_csd);
 804         if (err)
 805                 return err;
 806
 807         max_enh_size_mult =
 808                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
 809                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
 810                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
 811         if (tot_enh_size_mult > max_enh_size_mult) {
 812                 printf("Total enhanced size exceeds maximum (%u > %u)\n",
 813                        tot_enh_size_mult, max_enh_size_mult);
 814                 return -EMEDIUMTYPE;
 815         }
 816
 817         /* The default value of EXT_CSD_WR_REL_SET is device
 818          * dependent, the values can only be changed if the
 819          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
 820          * changed only once and before partitioning is completed. */
 821         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
 822         if (conf->user.wr_rel_change) {
 823                 if (conf->user.wr_rel_set)
 824                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
 825                 else
 826                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
 827         }
 828         for (pidx = 0; pidx < 4; pidx++) {
 829                 if (conf->gp_part[pidx].wr_rel_change) {
 830                         if (conf->gp_part[pidx].wr_rel_set)
 831                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
 832                         else
 833                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
 834                 }
 835         }
 836
 837         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
 838             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
 839                 puts("Card does not support host controlled partition write "
 840                      "reliability settings\n");
 841                 return -EMEDIUMTYPE;
 842         }
 843
 844         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
 845             EXT_CSD_PARTITION_SETTING_COMPLETED) {
 846                 printf("Card already partitioned\n");
 847                 return -EPERM;
 848         }
 849
 850         if (mode == MMC_HWPART_CONF_CHECK)
 851                 return 0;
 852
 853         /* Partitioning requires high-capacity size definitions */
 854         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
 855                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 856                                  EXT_CSD_ERASE_GROUP_DEF, 1);
 857
 858                 if (err)
 859                         return err;
 860
 861                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
 862
 863                 /* update erase group size to be high-capacity */
 864                 mmc->erase_grp_size =
 865                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
 866
 867         }
 868
 869         /* all OK, write the configuration */
 870         for (i = 0; i < 4; i++) {
 871                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 872                                  EXT_CSD_ENH_START_ADDR+i,
 873                                  (enh_start_addr >> (i*8)) & 0xFF);
 874                 if (err)
 875                         return err;
 876         }
 877         for (i = 0; i < 3; i++) {
 878                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 879                                  EXT_CSD_ENH_SIZE_MULT+i,
 880                                  (enh_size_mult >> (i*8)) & 0xFF);
 881                 if (err)
 882                         return err;
 883         }
 884         for (pidx = 0; pidx < 4; pidx++) {
 885                 for (i = 0; i < 3; i++) {
 886                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 887                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
 888                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
 889                         if (err)
 890                                 return err;
 891                 }
 892         }
 893         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 894                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
 895         if (err)
 896                 return err;
 897
 898         if (mode == MMC_HWPART_CONF_SET)
 899                 return 0;
 900
 901         /* The WR_REL_SET is a write-once register but shall be
 902          * written before setting PART_SETTING_COMPLETED. As it is
 903          * write-once we can only write it when completing the
 904          * partitioning. */
 905         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
 906                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 907                                  EXT_CSD_WR_REL_SET, wr_rel_set);
 908                 if (err)
 909                         return err;
 910         }
 911
 912         /* Setting PART_SETTING_COMPLETED confirms the partition
 913          * configuration but it only becomes effective after power
 914          * cycle, so we do not adjust the partition related settings
 915          * in the mmc struct. */
 916
 917         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
 918                          EXT_CSD_PARTITION_SETTING,
 919                          EXT_CSD_PARTITION_SETTING_COMPLETED);
 920         if (err)
 921                 return err;
 922
 923         return 0;
 924 }
 925
 926 #if !CONFIG_IS_ENABLED(DM_MMC)
 927 int mmc_getcd(struct mmc *mmc)
 928 {
 929         int cd;
 930
 931         cd = board_mmc_getcd(mmc);
 932
 933         if (cd < 0) {
 934                 if (mmc->cfg->ops->getcd)
 935                         cd = mmc->cfg->ops->getcd(mmc);
 936                 else
 937                         cd = 1;
 938         }
 939
 940         return cd;
 941 }
 942 #endif
 943
 944 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
 945 {
 946         struct mmc_cmd cmd;
 947         struct mmc_data data;
 948
 949         /* Switch the frequency */
 950         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
 951         cmd.resp_type = MMC_RSP_R1;
 952         cmd.cmdarg = (mode << 31) | 0xffffff;
 953         cmd.cmdarg &= ~(0xf << (group * 4));
 954         cmd.cmdarg |= value << (group * 4);
 955
 956         data.dest = (char *)resp;
 957         data.blocksize = 64;
 958         data.blocks = 1;
 959         data.flags = MMC_DATA_READ;
 960
 961         return mmc_send_cmd(mmc, &cmd, &data);
 962 }
 963
 964
 965 static int sd_get_capabilities(struct mmc *mmc)
 966 {
 967         int err;
 968         struct mmc_cmd cmd;
 969         ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
 970         ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
 971         struct mmc_data data;
 972         int timeout;
 973
 974         mmc->card_caps = MMC_MODE_1BIT;
 975
 976         if (mmc_host_is_spi(mmc))
 977                 return 0;
 978
 979         /* Read the SCR to find out if this card supports higher speeds */
 980         cmd.cmdidx = MMC_CMD_APP_CMD;
 981         cmd.resp_type = MMC_RSP_R1;
 982         cmd.cmdarg = mmc->rca << 16;
 983
 984         err = mmc_send_cmd(mmc, &cmd, NULL);
 985
 986         if (err)
 987                 return err;
 988
 989         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
 990         cmd.resp_type = MMC_RSP_R1;
 991         cmd.cmdarg = 0;
 992
 993         timeout = 3;
 994
 995 retry_scr:
 996         data.dest = (char *)scr;
 997         data.blocksize = 8;
 998         data.blocks = 1;
 999         data.flags = MMC_DATA_READ;
1000
1001         err = mmc_send_cmd(mmc, &cmd, &data);
1002
1003         if (err) {
1004                 if (timeout--)
1005                         goto retry_scr;
1006
1007                 return err;
1008         }
1009
1010         mmc->scr[0] = __be32_to_cpu(scr[0]);
1011         mmc->scr[1] = __be32_to_cpu(scr[1]);
1012
1013         switch ((mmc->scr[0] >> 24) & 0xf) {
1014         case 0:
1015                 mmc->version = SD_VERSION_1_0;
1016                 break;
1017         case 1:
1018                 mmc->version = SD_VERSION_1_10;
1019                 break;
1020         case 2:
1021                 mmc->version = SD_VERSION_2;
1022                 if ((mmc->scr[0] >> 15) & 0x1)
1023                         mmc->version = SD_VERSION_3;
1024                 break;
1025         default:
1026                 mmc->version = SD_VERSION_1_0;
1027                 break;
1028         }
1029
1030         if (mmc->scr[0] & SD_DATA_4BIT)
1031                 mmc->card_caps |= MMC_MODE_4BIT;
1032
1033         /* Version 1.0 doesn't support switching */
1034         if (mmc->version == SD_VERSION_1_0)
1035                 return 0;
1036
1037         timeout = 4;
1038         while (timeout--) {
1039                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
1040                                 (u8 *)switch_status);
1041
1042                 if (err)
1043                         return err;
1044
1045                 /* The high-speed function is busy.  Try again */
1046                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
1047                         break;
1048         }
1049
1050         /* If high-speed isn't supported, we return */
1051         if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)
1052                 mmc->card_caps |= MMC_CAP(SD_HS);
1053
1054         return 0;
1055 }
1056
1057 static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode)
1058 {
1059         int err;
1060
1061         ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
1062
1063         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
1064         if (err)
1065                 return err;
1066
1067         if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) != 0x01000000)
1068                 return -ENOTSUPP;
1069
1070         return 0;
1071 }
1072
1073 int sd_select_bus_width(struct mmc *mmc, int w)
1074 {
1075         int err;
1076         struct mmc_cmd cmd;
1077
1078         if ((w != 4) && (w != 1))
1079                 return -EINVAL;
1080
1081         cmd.cmdidx = MMC_CMD_APP_CMD;
1082         cmd.resp_type = MMC_RSP_R1;
1083         cmd.cmdarg = mmc->rca << 16;
1084
1085         err = mmc_send_cmd(mmc, &cmd, NULL);
1086         if (err)
1087                 return err;
1088
1089         cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1090         cmd.resp_type = MMC_RSP_R1;
1091         if (w == 4)
1092                 cmd.cmdarg = 2;
1093         else if (w == 1)
1094                 cmd.cmdarg = 0;
1095         err = mmc_send_cmd(mmc, &cmd, NULL);
1096         if (err)
1097                 return err;
1098
1099         return 0;
1100 }
1101
1102 static int sd_read_ssr(struct mmc *mmc)
1103 {
1104         int err, i;
1105         struct mmc_cmd cmd;
1106         ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1107         struct mmc_data data;
1108         int timeout = 3;
1109         unsigned int au, eo, et, es;
1110
1111         cmd.cmdidx = MMC_CMD_APP_CMD;
1112         cmd.resp_type = MMC_RSP_R1;
1113         cmd.cmdarg = mmc->rca << 16;
1114
1115         err = mmc_send_cmd(mmc, &cmd, NULL);
1116         if (err)
1117                 return err;
1118
1119         cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1120         cmd.resp_type = MMC_RSP_R1;
1121         cmd.cmdarg = 0;
1122
1123 retry_ssr:
1124         data.dest = (char *)ssr;
1125         data.blocksize = 64;
1126         data.blocks = 1;
1127         data.flags = MMC_DATA_READ;
1128
1129         err = mmc_send_cmd(mmc, &cmd, &data);
1130         if (err) {
1131                 if (timeout--)
1132                         goto retry_ssr;
1133
1134                 return err;
1135         }
1136
1137         for (i = 0; i < 16; i++)
1138                 ssr[i] = be32_to_cpu(ssr[i]);
1139
1140         au = (ssr[2] >> 12) & 0xF;
1141         if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1142                 mmc->ssr.au = sd_au_size[au];
1143                 es = (ssr[3] >> 24) & 0xFF;
1144                 es |= (ssr[2] & 0xFF) << 8;
1145                 et = (ssr[3] >> 18) & 0x3F;
1146                 if (es && et) {
1147                         eo = (ssr[3] >> 16) & 0x3;
1148                         mmc->ssr.erase_timeout = (et * 1000) / es;
1149                         mmc->ssr.erase_offset = eo * 1000;
1150                 }
1151         } else {
1152                 debug("Invalid Allocation Unit Size.\n");
1153         }
1154
1155         return 0;
1156 }
1157
1158 /* frequency bases */
1159 /* divided by 10 to be nice to platforms without floating point */
1160 static const int fbase[] = {
1161         10000,
1162         100000,
1163         1000000,
1164         10000000,
1165 };
1166
1167 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
1168  * to platforms without floating point.
1169  */
1170 static const u8 multipliers[] = {
1171         0,      /* reserved */
1172         10,
1173         12,
1174         13,
1175         15,
1176         20,
1177         25,
1178         30,
1179         35,
1180         40,
1181         45,
1182         50,
1183         55,
1184         60,
1185         70,
1186         80,
1187 };
1188
1189 static inline int bus_width(uint cap)
1190 {
1191         if (cap == MMC_MODE_8BIT)
1192                 return 8;
1193         if (cap == MMC_MODE_4BIT)
1194                 return 4;
1195         if (cap == MMC_MODE_1BIT)
1196                 return 1;
1197         printf("invalid bus witdh capability 0x%x\n", cap);
1198         return 0;
1199 }
1200
1201 #if !CONFIG_IS_ENABLED(DM_MMC)
1202 static void mmc_send_init_stream(struct mmc *mmc)
1203 {
1204 }
1205
1206 static int mmc_set_ios(struct mmc *mmc)
1207 {
1208         int ret = 0;
1209
1210         if (mmc->cfg->ops->set_ios)
1211                 ret = mmc->cfg->ops->set_ios(mmc);
1212
1213         return ret;
1214 }
1215 #endif
1216
1217 int mmc_set_clock(struct mmc *mmc, uint clock)
1218 {
1219         if (clock > mmc->cfg->f_max)
1220                 clock = mmc->cfg->f_max;
1221
1222         if (clock < mmc->cfg->f_min)
1223                 clock = mmc->cfg->f_min;
1224
1225         mmc->clock = clock;
1226
1227         return mmc_set_ios(mmc);
1228 }
1229
1230 static int mmc_set_bus_width(struct mmc *mmc, uint width)
1231 {
1232         mmc->bus_width = width;
1233
1234         return mmc_set_ios(mmc);
1235 }
1236
1237 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1238 /*
1239  * helper function to display the capabilities in a human
1240  * friendly manner. The capabilities include bus width and
1241  * supported modes.
1242  */
1243 void mmc_dump_capabilities(const char *text, uint caps)
1244 {
1245         enum bus_mode mode;
1246
1247         printf("%s: widths [", text);
1248         if (caps & MMC_MODE_8BIT)
1249                 printf("8, ");
1250         if (caps & MMC_MODE_4BIT)
1251                 printf("4, ");
1252         if (caps & MMC_MODE_1BIT)
1253                 printf("1, ");
1254         printf("\b\b] modes [");
1255         for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1256                 if (MMC_CAP(mode) & caps)
1257                         printf("%s, ", mmc_mode_name(mode));
1258         printf("\b\b]\n");
1259 }
1260 #endif
1261
1262 struct mode_width_tuning {
1263         enum bus_mode mode;
1264         uint widths;
1265 };
1266
1267 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1268 {
1269         mmc->signal_voltage = signal_voltage;
1270         return mmc_set_ios(mmc);
1271 }
1272
1273 static const struct mode_width_tuning sd_modes_by_pref[] = {
1274         {
1275                 .mode = SD_HS,
1276                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1277         },
1278         {
1279                 .mode = SD_LEGACY,
1280                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1281         }
1282 };
1283
1284 #define for_each_sd_mode_by_pref(caps, mwt) \
1285         for (mwt = sd_modes_by_pref;\
1286              mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\
1287              mwt++) \
1288                 if (caps & MMC_CAP(mwt->mode))
1289
1290 static int sd_select_mode_and_width(struct mmc *mmc)
1291 {
1292         int err;
1293         uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT};
1294         const struct mode_width_tuning *mwt;
1295
1296         err = sd_get_capabilities(mmc);
1297         if (err)
1298                 return err;
1299         /* Restrict card's capabilities by what the host can do */
1300         mmc->card_caps &= (mmc->cfg->host_caps | MMC_MODE_1BIT);
1301
1302         for_each_sd_mode_by_pref(mmc->card_caps, mwt) {
1303                 uint *w;
1304
1305                 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
1306                         if (*w & mmc->card_caps & mwt->widths) {
1307                                 debug("trying mode %s width %d (at %d MHz)\n",
1308                                       mmc_mode_name(mwt->mode),
1309                                       bus_width(*w),
1310                                       mmc_mode2freq(mmc, mwt->mode) / 1000000);
1311
1312                                 /* configure the bus width (card + host) */
1313                                 err = sd_select_bus_width(mmc, bus_width(*w));
1314                                 if (err)
1315                                         goto error;
1316                                 mmc_set_bus_width(mmc, bus_width(*w));
1317
1318                                 /* configure the bus mode (card) */
1319                                 err = sd_set_card_speed(mmc, mwt->mode);
1320                                 if (err)
1321                                         goto error;
1322
1323                                 /* configure the bus mode (host) */
1324                                 mmc_select_mode(mmc, mwt->mode);
1325                                 mmc_set_clock(mmc, mmc->tran_speed);
1326
1327                                 err = sd_read_ssr(mmc);
1328                                 if (!err)
1329                                         return 0;
1330
1331                                 printf("bad ssr\n");
1332
1333 error:
1334                                 /* revert to a safer bus speed */
1335                                 mmc_select_mode(mmc, SD_LEGACY);
1336                                 mmc_set_clock(mmc, mmc->tran_speed);
1337                         }
1338                 }
1339         }
1340
1341         printf("unable to select a mode\n");
1342         return -ENOTSUPP;
1343 }
1344
1345 /*
1346  * read the compare the part of ext csd that is constant.
1347  * This can be used to check that the transfer is working
1348  * as expected.
1349  */
1350 static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
1351 {
1352         int err;
1353         const u8 *ext_csd = mmc->ext_csd;
1354         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1355
1356         err = mmc_send_ext_csd(mmc, test_csd);
1357         if (err)
1358                 return err;
1359
1360         /* Only compare read only fields */
1361         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1362                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1363             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1364                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1365             ext_csd[EXT_CSD_REV]
1366                 == test_csd[EXT_CSD_REV] &&
1367             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1368                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1369             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1370                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1371                 return 0;
1372
1373         return -EBADMSG;
1374 }
1375
1376 static const struct mode_width_tuning mmc_modes_by_pref[] = {
1377         {
1378                 .mode = MMC_HS_200,
1379                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1380         },
1381         {
1382                 .mode = MMC_DDR_52,
1383                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1384         },
1385         {
1386                 .mode = MMC_HS_52,
1387                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1388         },
1389         {
1390                 .mode = MMC_HS,
1391                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1392         },
1393         {
1394                 .mode = MMC_LEGACY,
1395                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1396         }
1397 };
1398
1399 #define for_each_mmc_mode_by_pref(caps, mwt) \
1400         for (mwt = mmc_modes_by_pref;\
1401             mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\
1402             mwt++) \
1403                 if (caps & MMC_CAP(mwt->mode))
1404
1405 static const struct ext_csd_bus_width {
1406         uint cap;
1407         bool is_ddr;
1408         uint ext_csd_bits;
1409 } ext_csd_bus_width[] = {
1410         {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8},
1411         {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4},
1412         {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8},
1413         {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4},
1414         {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1},
1415 };
1416
1417 #define for_each_supported_width(caps, ddr, ecbv) \
1418         for (ecbv = ext_csd_bus_width;\
1419             ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\
1420             ecbv++) \
1421                 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap))
1422
1423 static int mmc_select_mode_and_width(struct mmc *mmc)
1424 {
1425         int err;
1426         const struct mode_width_tuning *mwt;
1427         const struct ext_csd_bus_width *ecbw;
1428
1429         err = mmc_get_capabilities(mmc);
1430         if (err)
1431                 return err;
1432
1433         /* Restrict card's capabilities by what the host can do */
1434         mmc->card_caps &= (mmc->cfg->host_caps | MMC_MODE_1BIT);
1435
1436         /* Only version 4 of MMC supports wider bus widths */
1437         if (mmc->version < MMC_VERSION_4)
1438                 return 0;
1439
1440         if (!mmc->ext_csd) {
1441                 debug("No ext_csd found!\n"); /* this should enver happen */
1442                 return -ENOTSUPP;
1443         }
1444
1445         for_each_mmc_mode_by_pref(mmc->card_caps, mwt) {
1446                 for_each_supported_width(mmc->card_caps & mwt->widths,
1447                                          mmc_is_mode_ddr(mwt->mode), ecbw) {
1448                         debug("trying mode %s width %d (at %d MHz)\n",
1449                               mmc_mode_name(mwt->mode),
1450                               bus_width(ecbw->cap),
1451                               mmc_mode2freq(mmc, mwt->mode) / 1000000);
1452                         /* configure the bus width (card + host) */
1453                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1454                                     EXT_CSD_BUS_WIDTH,
1455                                     ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG);
1456                         if (err)
1457                                 goto error;
1458                         mmc_set_bus_width(mmc, bus_width(ecbw->cap));
1459
1460                         /* configure the bus speed (card) */
1461                         err = mmc_set_card_speed(mmc, mwt->mode);
1462                         if (err)
1463                                 goto error;
1464
1465                         /*
1466                          * configure the bus width AND the ddr mode (card)
1467                          * The host side will be taken care of in the next step
1468                          */
1469                         if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) {
1470                                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1471                                                  EXT_CSD_BUS_WIDTH,
1472                                                  ecbw->ext_csd_bits);
1473                                 if (err)
1474                                         goto error;
1475                         }
1476
1477                         /* configure the bus mode (host) */
1478                         mmc_select_mode(mmc, mwt->mode);
1479                         mmc_set_clock(mmc, mmc->tran_speed);
1480
1481                         /* do a transfer to check the configuration */
1482                         err = mmc_read_and_compare_ext_csd(mmc);
1483                         if (!err)
1484                                 return 0;
1485 error:
1486                         /* if an error occured, revert to a safer bus mode */
1487                         mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1488                                    EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1);
1489                         mmc_select_mode(mmc, MMC_LEGACY);
1490                         mmc_set_bus_width(mmc, 1);
1491                 }
1492         }
1493
1494         printf("unable to select a mode\n");
1495
1496         return -ENOTSUPP;
1497 }
1498
1499 static int mmc_startup_v4(struct mmc *mmc)
1500 {
1501         int err, i;
1502         u64 capacity;
1503         bool has_parts = false;
1504         bool part_completed;
1505         u8 *ext_csd;
1506
1507         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
1508                 return 0;
1509
1510         ext_csd = malloc_cache_aligned(MMC_MAX_BLOCK_LEN);
1511         if (!ext_csd)
1512                 return -ENOMEM;
1513
1514         mmc->ext_csd = ext_csd;
1515
1516         /* check  ext_csd version and capacity */
1517         err = mmc_send_ext_csd(mmc, ext_csd);
1518         if (err)
1519                 return err;
1520         if (ext_csd[EXT_CSD_REV] >= 2) {
1521                 /*
1522                  * According to the JEDEC Standard, the value of
1523                  * ext_csd's capacity is valid if the value is more
1524                  * than 2GB
1525                  */
1526                 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1527                                 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1528                                 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1529                                 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1530                 capacity *= MMC_MAX_BLOCK_LEN;
1531                 if ((capacity >> 20) > 2 * 1024)
1532                         mmc->capacity_user = capacity;
1533         }
1534
1535         switch (ext_csd[EXT_CSD_REV]) {
1536         case 1:
1537                 mmc->version = MMC_VERSION_4_1;
1538                 break;
1539         case 2:
1540                 mmc->version = MMC_VERSION_4_2;
1541                 break;
1542         case 3:
1543                 mmc->version = MMC_VERSION_4_3;
1544                 break;
1545         case 5:
1546                 mmc->version = MMC_VERSION_4_41;
1547                 break;
1548         case 6:
1549                 mmc->version = MMC_VERSION_4_5;
1550                 break;
1551         case 7:
1552                 mmc->version = MMC_VERSION_5_0;
1553                 break;
1554         case 8:
1555                 mmc->version = MMC_VERSION_5_1;
1556                 break;
1557         }
1558
1559         /* The partition data may be non-zero but it is only
1560          * effective if PARTITION_SETTING_COMPLETED is set in
1561          * EXT_CSD, so ignore any data if this bit is not set,
1562          * except for enabling the high-capacity group size
1563          * definition (see below).
1564          */
1565         part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1566                             EXT_CSD_PARTITION_SETTING_COMPLETED);
1567
1568         /* store the partition info of emmc */
1569         mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1570         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1571             ext_csd[EXT_CSD_BOOT_MULT])
1572                 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1573         if (part_completed &&
1574             (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1575                 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1576
1577         mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1578
1579         mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1580
1581         for (i = 0; i < 4; i++) {
1582                 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1583                 uint mult = (ext_csd[idx + 2] << 16) +
1584                         (ext_csd[idx + 1] << 8) + ext_csd[idx];
1585                 if (mult)
1586                         has_parts = true;
1587                 if (!part_completed)
1588                         continue;
1589                 mmc->capacity_gp[i] = mult;
1590                 mmc->capacity_gp[i] *=
1591                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1592                 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1593                 mmc->capacity_gp[i] <<= 19;
1594         }
1595
1596         if (part_completed) {
1597                 mmc->enh_user_size =
1598                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
1599                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
1600                         ext_csd[EXT_CSD_ENH_SIZE_MULT];
1601                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1602                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1603                 mmc->enh_user_size <<= 19;
1604                 mmc->enh_user_start =
1605                         (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
1606                         (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
1607                         (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
1608                         ext_csd[EXT_CSD_ENH_START_ADDR];
1609                 if (mmc->high_capacity)
1610                         mmc->enh_user_start <<= 9;
1611         }
1612
1613         /*
1614          * Host needs to enable ERASE_GRP_DEF bit if device is
1615          * partitioned. This bit will be lost every time after a reset
1616          * or power off. This will affect erase size.
1617          */
1618         if (part_completed)
1619                 has_parts = true;
1620         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1621             (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1622                 has_parts = true;
1623         if (has_parts) {
1624                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1625                                  EXT_CSD_ERASE_GROUP_DEF, 1);
1626
1627                 if (err)
1628                         return err;
1629
1630                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1631         }
1632
1633         if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1634                 /* Read out group size from ext_csd */
1635                 mmc->erase_grp_size =
1636                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1637                 /*
1638                  * if high capacity and partition setting completed
1639                  * SEC_COUNT is valid even if it is smaller than 2 GiB
1640                  * JEDEC Standard JESD84-B45, 6.2.4
1641                  */
1642                 if (mmc->high_capacity && part_completed) {
1643                         capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1644                                 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1645                                 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1646                                 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1647                         capacity *= MMC_MAX_BLOCK_LEN;
1648                         mmc->capacity_user = capacity;
1649                 }
1650         } else {
1651                 /* Calculate the group size from the csd value. */
1652                 int erase_gsz, erase_gmul;
1653
1654                 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1655                 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1656                 mmc->erase_grp_size = (erase_gsz + 1)
1657                         * (erase_gmul + 1);
1658         }
1659
1660         mmc->hc_wp_grp_size = 1024
1661                 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1662                 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1663
1664         mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1665
1666         return 0;
1667 }
1668
1669 static int mmc_startup(struct mmc *mmc)
1670 {
1671         int err, i;
1672         uint mult, freq;
1673         u64 cmult, csize;
1674         struct mmc_cmd cmd;
1675         struct blk_desc *bdesc;
1676
1677 #ifdef CONFIG_MMC_SPI_CRC_ON
1678         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1679                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1680                 cmd.resp_type = MMC_RSP_R1;
1681                 cmd.cmdarg = 1;
1682                 err = mmc_send_cmd(mmc, &cmd, NULL);
1683
1684                 if (err)
1685                         return err;
1686         }
1687 #endif
1688
1689         /* Put the Card in Identify Mode */
1690         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1691                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1692         cmd.resp_type = MMC_RSP_R2;
1693         cmd.cmdarg = 0;
1694
1695         err = mmc_send_cmd(mmc, &cmd, NULL);
1696
1697         if (err)
1698                 return err;
1699
1700         memcpy(mmc->cid, cmd.response, 16);
1701
1702         /*
1703          * For MMC cards, set the Relative Address.
1704          * For SD cards, get the Relatvie Address.
1705          * This also puts the cards into Standby State
1706          */
1707         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1708                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1709                 cmd.cmdarg = mmc->rca << 16;
1710                 cmd.resp_type = MMC_RSP_R6;
1711
1712                 err = mmc_send_cmd(mmc, &cmd, NULL);
1713
1714                 if (err)
1715                         return err;
1716
1717                 if (IS_SD(mmc))
1718                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1719         }
1720
1721         /* Get the Card-Specific Data */
1722         cmd.cmdidx = MMC_CMD_SEND_CSD;
1723         cmd.resp_type = MMC_RSP_R2;
1724         cmd.cmdarg = mmc->rca << 16;
1725
1726         err = mmc_send_cmd(mmc, &cmd, NULL);
1727
1728         if (err)
1729                 return err;
1730
1731         mmc->csd[0] = cmd.response[0];
1732         mmc->csd[1] = cmd.response[1];
1733         mmc->csd[2] = cmd.response[2];
1734         mmc->csd[3] = cmd.response[3];
1735
1736         if (mmc->version == MMC_VERSION_UNKNOWN) {
1737                 int version = (cmd.response[0] >> 26) & 0xf;
1738
1739                 switch (version) {
1740                 case 0:
1741                         mmc->version = MMC_VERSION_1_2;
1742                         break;
1743                 case 1:
1744                         mmc->version = MMC_VERSION_1_4;
1745                         break;
1746                 case 2:
1747                         mmc->version = MMC_VERSION_2_2;
1748                         break;
1749                 case 3:
1750                         mmc->version = MMC_VERSION_3;
1751                         break;
1752                 case 4:
1753                         mmc->version = MMC_VERSION_4;
1754                         break;
1755                 default:
1756                         mmc->version = MMC_VERSION_1_2;
1757                         break;
1758                 }
1759         }
1760
1761         /* divide frequency by 10, since the mults are 10x bigger */
1762         freq = fbase[(cmd.response[0] & 0x7)];
1763         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1764
1765         mmc->legacy_speed = freq * mult;
1766         mmc_select_mode(mmc, MMC_LEGACY);
1767
1768         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1769         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1770
1771         if (IS_SD(mmc))
1772                 mmc->write_bl_len = mmc->read_bl_len;
1773         else
1774                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1775
1776         if (mmc->high_capacity) {
1777                 csize = (mmc->csd[1] & 0x3f) << 16
1778                         | (mmc->csd[2] & 0xffff0000) >> 16;
1779                 cmult = 8;
1780         } else {
1781                 csize = (mmc->csd[1] & 0x3ff) << 2
1782                         | (mmc->csd[2] & 0xc0000000) >> 30;
1783                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1784         }
1785
1786         mmc->capacity_user = (csize + 1) << (cmult + 2);
1787         mmc->capacity_user *= mmc->read_bl_len;
1788         mmc->capacity_boot = 0;
1789         mmc->capacity_rpmb = 0;
1790         for (i = 0; i < 4; i++)
1791                 mmc->capacity_gp[i] = 0;
1792
1793         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1794                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1795
1796         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1797                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1798
1799         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1800                 cmd.cmdidx = MMC_CMD_SET_DSR;
1801                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1802                 cmd.resp_type = MMC_RSP_NONE;
1803                 if (mmc_send_cmd(mmc, &cmd, NULL))
1804                         printf("MMC: SET_DSR failed\n");
1805         }
1806
1807         /* Select the card, and put it into Transfer Mode */
1808         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1809                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1810                 cmd.resp_type = MMC_RSP_R1;
1811                 cmd.cmdarg = mmc->rca << 16;
1812                 err = mmc_send_cmd(mmc, &cmd, NULL);
1813
1814                 if (err)
1815                         return err;
1816         }
1817
1818         /*
1819          * For SD, its erase group is always one sector
1820          */
1821         mmc->erase_grp_size = 1;
1822         mmc->part_config = MMCPART_NOAVAILABLE;
1823
1824         err = mmc_startup_v4(mmc);
1825         if (err)
1826                 return err;
1827
1828         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
1829         if (err)
1830                 return err;
1831
1832         if (IS_SD(mmc))
1833                 err = sd_select_mode_and_width(mmc);
1834         else
1835                 err = mmc_select_mode_and_width(mmc);
1836
1837         if (err)
1838                 return err;
1839
1840
1841         /* Fix the block length for DDR mode */
1842         if (mmc->ddr_mode) {
1843                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1844                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1845         }
1846
1847         /* fill in device description */
1848         bdesc = mmc_get_blk_desc(mmc);
1849         bdesc->lun = 0;
1850         bdesc->hwpart = 0;
1851         bdesc->type = 0;
1852         bdesc->blksz = mmc->read_bl_len;
1853         bdesc->log2blksz = LOG2(bdesc->blksz);
1854         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
1855 #if !defined(CONFIG_SPL_BUILD) || \
1856                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
1857                 !defined(CONFIG_USE_TINY_PRINTF))
1858         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
1859                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1860                 (mmc->cid[3] >> 16) & 0xffff);
1861         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1862                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1863                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1864                 (mmc->cid[2] >> 24) & 0xff);
1865         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1866                 (mmc->cid[2] >> 16) & 0xf);
1867 #else
1868         bdesc->vendor[0] = 0;
1869         bdesc->product[0] = 0;
1870         bdesc->revision[0] = 0;
1871 #endif
1872 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1873         part_init(bdesc);
1874 #endif
1875
1876         return 0;
1877 }
1878
1879 static int mmc_send_if_cond(struct mmc *mmc)
1880 {
1881         struct mmc_cmd cmd;
1882         int err;
1883
1884         cmd.cmdidx = SD_CMD_SEND_IF_COND;
1885         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1886         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1887         cmd.resp_type = MMC_RSP_R7;
1888
1889         err = mmc_send_cmd(mmc, &cmd, NULL);
1890
1891         if (err)
1892                 return err;
1893
1894         if ((cmd.response[0] & 0xff) != 0xaa)
1895                 return -EOPNOTSUPP;
1896         else
1897                 mmc->version = SD_VERSION_2;
1898
1899         return 0;
1900 }
1901
1902 #if !CONFIG_IS_ENABLED(DM_MMC)
1903 /* board-specific MMC power initializations. */
1904 __weak void board_mmc_power_init(void)
1905 {
1906 }
1907 #endif
1908
1909 static int mmc_power_init(struct mmc *mmc)
1910 {
1911 #if CONFIG_IS_ENABLED(DM_MMC)
1912 #if CONFIG_IS_ENABLED(DM_REGULATOR)
1913         int ret;
1914
1915         ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
1916                                           &mmc->vmmc_supply);
1917         if (ret)
1918                 debug("%s: No vmmc supply\n", mmc->dev->name);
1919
1920         ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
1921                                           &mmc->vqmmc_supply);
1922         if (ret)
1923                 debug("%s: No vqmmc supply\n", mmc->dev->name);
1924 #endif
1925 #else /* !CONFIG_DM_MMC */
1926         /*
1927          * Driver model should use a regulator, as above, rather than calling
1928          * out to board code.
1929          */
1930         board_mmc_power_init();
1931 #endif
1932         return 0;
1933 }
1934
1935 /*
1936  * put the host in the initial state:
1937  * - turn on Vdd (card power supply)
1938  * - configure the bus width and clock to minimal values
1939  */
1940 static void mmc_set_initial_state(struct mmc *mmc)
1941 {
1942         int err;
1943
1944         /* First try to set 3.3V. If it fails set to 1.8V */
1945         err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
1946         if (err != 0)
1947                 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
1948         if (err != 0)
1949                 printf("mmc: failed to set signal voltage\n");
1950
1951         mmc_select_mode(mmc, MMC_LEGACY);
1952         mmc_set_bus_width(mmc, 1);
1953         mmc_set_clock(mmc, 0);
1954 }
1955
1956 static int mmc_power_on(struct mmc *mmc)
1957 {
1958 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
1959         if (mmc->vmmc_supply) {
1960                 int ret = regulator_set_enable(mmc->vmmc_supply, true);
1961
1962                 if (ret) {
1963                         puts("Error enabling VMMC supply\n");
1964                         return ret;
1965                 }
1966         }
1967 #endif
1968         return 0;
1969 }
1970
1971 static int mmc_power_off(struct mmc *mmc)
1972 {
1973 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
1974         if (mmc->vmmc_supply) {
1975                 int ret = regulator_set_enable(mmc->vmmc_supply, false);
1976
1977                 if (ret) {
1978                         puts("Error disabling VMMC supply\n");
1979                         return ret;
1980                 }
1981         }
1982 #endif
1983         return 0;
1984 }
1985
1986 static int mmc_power_cycle(struct mmc *mmc)
1987 {
1988         int ret;
1989
1990         ret = mmc_power_off(mmc);
1991         if (ret)
1992                 return ret;
1993         /*
1994          * SD spec recommends at least 1ms of delay. Let's wait for 2ms
1995          * to be on the safer side.
1996          */
1997         udelay(2000);
1998         return mmc_power_on(mmc);
1999 }
2000
2001 int mmc_start_init(struct mmc *mmc)
2002 {
2003         bool no_card;
2004         int err;
2005
2006         /* we pretend there's no card when init is NULL */
2007         no_card = mmc_getcd(mmc) == 0;
2008 #if !CONFIG_IS_ENABLED(DM_MMC)
2009         no_card = no_card || (mmc->cfg->ops->init == NULL);
2010 #endif
2011         if (no_card) {
2012                 mmc->has_init = 0;
2013 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2014                 printf("MMC: no card present\n");
2015 #endif
2016                 return -ENOMEDIUM;
2017         }
2018
2019         if (mmc->has_init)
2020                 return 0;
2021
2022 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
2023         mmc_adapter_card_type_ident();
2024 #endif
2025         err = mmc_power_init(mmc);
2026         if (err)
2027                 return err;
2028
2029         err = mmc_power_on(mmc);
2030         if (err)
2031                 return err;
2032
2033 #if CONFIG_IS_ENABLED(DM_MMC)
2034         /* The device has already been probed ready for use */
2035 #else
2036         /* made sure it's not NULL earlier */
2037         err = mmc->cfg->ops->init(mmc);
2038         if (err)
2039                 return err;
2040 #endif
2041         mmc->ddr_mode = 0;
2042
2043         mmc_set_initial_state(mmc);
2044         mmc_send_init_stream(mmc);
2045
2046         /* Reset the Card */
2047         err = mmc_go_idle(mmc);
2048
2049         if (err)
2050                 return err;
2051
2052         /* The internal partition reset to user partition(0) at every CMD0*/
2053         mmc_get_blk_desc(mmc)->hwpart = 0;
2054
2055         /* Test for SD version 2 */
2056         err = mmc_send_if_cond(mmc);
2057
2058         /* Now try to get the SD card's operating condition */
2059         err = sd_send_op_cond(mmc);
2060
2061         /* If the command timed out, we check for an MMC card */
2062         if (err == -ETIMEDOUT) {
2063                 err = mmc_send_op_cond(mmc);
2064
2065                 if (err) {
2066 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2067                         printf("Card did not respond to voltage select!\n");
2068 #endif
2069                         return -EOPNOTSUPP;
2070                 }
2071         }
2072
2073         if (!err)
2074                 mmc->init_in_progress = 1;
2075
2076         return err;
2077 }
2078
2079 static int mmc_complete_init(struct mmc *mmc)
2080 {
2081         int err = 0;
2082
2083         mmc->init_in_progress = 0;
2084         if (mmc->op_cond_pending)
2085                 err = mmc_complete_op_cond(mmc);
2086
2087         if (!err)
2088                 err = mmc_startup(mmc);
2089         if (err)
2090                 mmc->has_init = 0;
2091         else
2092                 mmc->has_init = 1;
2093         return err;
2094 }
2095
2096 int mmc_init(struct mmc *mmc)
2097 {
2098         int err = 0;
2099         __maybe_unused unsigned start;
2100 #if CONFIG_IS_ENABLED(DM_MMC)
2101         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
2102
2103         upriv->mmc = mmc;
2104 #endif
2105         if (mmc->has_init)
2106                 return 0;
2107
2108         start = get_timer(0);
2109
2110         if (!mmc->init_in_progress)
2111                 err = mmc_start_init(mmc);
2112
2113         if (!err)
2114                 err = mmc_complete_init(mmc);
2115         if (err)
2116                 printf("%s: %d, time %lu\n", __func__, err, get_timer(start));
2117
2118         return err;
2119 }
2120
2121 int mmc_set_dsr(struct mmc *mmc, u16 val)
2122 {
2123         mmc->dsr = val;
2124         return 0;
2125 }
2126
2127 /* CPU-specific MMC initializations */
2128 __weak int cpu_mmc_init(bd_t *bis)
2129 {
2130         return -1;
2131 }
2132
2133 /* board-specific MMC initializations. */
2134 __weak int board_mmc_init(bd_t *bis)
2135 {
2136         return -1;
2137 }
2138
2139 void mmc_set_preinit(struct mmc *mmc, int preinit)
2140 {
2141         mmc->preinit = preinit;
2142 }
2143
2144 #if CONFIG_IS_ENABLED(DM_MMC) && defined(CONFIG_SPL_BUILD)
2145 static int mmc_probe(bd_t *bis)
2146 {
2147         return 0;
2148 }
2149 #elif CONFIG_IS_ENABLED(DM_MMC)
2150 static int mmc_probe(bd_t *bis)
2151 {
2152         int ret, i;
2153         struct uclass *uc;
2154         struct udevice *dev;
2155
2156         ret = uclass_get(UCLASS_MMC, &uc);
2157         if (ret)
2158                 return ret;
2159
2160         /*
2161          * Try to add them in sequence order. Really with driver model we
2162          * should allow holes, but the current MMC list does not allow that.
2163          * So if we request 0, 1, 3 we will get 0, 1, 2.
2164          */
2165         for (i = 0; ; i++) {
2166                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
2167                 if (ret == -ENODEV)
2168                         break;
2169         }
2170         uclass_foreach_dev(dev, uc) {
2171                 ret = device_probe(dev);
2172                 if (ret)
2173                         printf("%s - probe failed: %d\n", dev->name, ret);
2174         }
2175
2176         return 0;
2177 }
2178 #else
2179 static int mmc_probe(bd_t *bis)
2180 {
2181         if (board_mmc_init(bis) < 0)
2182                 cpu_mmc_init(bis);
2183
2184         return 0;
2185 }
2186 #endif
2187
2188 int mmc_initialize(bd_t *bis)
2189 {
2190         static int initialized = 0;
2191         int ret;
2192         if (initialized)        /* Avoid initializing mmc multiple times */
2193                 return 0;
2194         initialized = 1;
2195
2196 #if !CONFIG_IS_ENABLED(BLK)
2197 #if !CONFIG_IS_ENABLED(MMC_TINY)
2198         mmc_list_init();
2199 #endif
2200 #endif
2201         ret = mmc_probe(bis);
2202         if (ret)
2203                 return ret;
2204
2205 #ifndef CONFIG_SPL_BUILD
2206         print_mmc_devices(',');
2207 #endif
2208
2209         mmc_do_preinit();
2210         return 0;
2211 }
2212
2213 #ifdef CONFIG_CMD_BKOPS_ENABLE
2214 int mmc_set_bkops_enable(struct mmc *mmc)
2215 {
2216         int err;
2217         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2218
2219         err = mmc_send_ext_csd(mmc, ext_csd);
2220         if (err) {
2221                 puts("Could not get ext_csd register values\n");
2222                 return err;
2223         }
2224
2225         if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
2226                 puts("Background operations not supported on device\n");
2227                 return -EMEDIUMTYPE;
2228         }
2229
2230         if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
2231                 puts("Background operations already enabled\n");
2232                 return 0;
2233         }
2234
2235         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
2236         if (err) {
2237                 puts("Failed to enable manual background operations\n");
2238                 return err;
2239         }
2240
2241         puts("Enabled manual background operations\n");
2242
2243         return 0;
2244 }
2245 #endif