drivers/mmc/mmc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2008, Freescale Semiconductor, Inc
   4  * Andy Fleming
   5  *
   6  * Based vaguely on the Linux code
   7  */
   8
   9 #include <config.h>
  10 #include <common.h>
  11 #include <command.h>
  12 #include <dm.h>
  13 #include <dm/device-internal.h>
  14 #include <errno.h>
  15 #include <mmc.h>
  16 #include <part.h>
  17 #include <power/regulator.h>
  18 #include <malloc.h>
  19 #include <memalign.h>
  20 #include <linux/list.h>
  21 #include <div64.h>
  22 #include "mmc_private.h"
  23
  24 #define DEFAULT_CMD6_TIMEOUT_MS  500
  25
  26 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
  27 static int mmc_power_cycle(struct mmc *mmc);
  28 #if !CONFIG_IS_ENABLED(MMC_TINY)
  29 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps);
  30 #endif
  31
  32 #if !CONFIG_IS_ENABLED(DM_MMC)
  33
  34 static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout)
  35 {
  36         return -ENOSYS;
  37 }
  38
  39 __weak int board_mmc_getwp(struct mmc *mmc)
  40 {
  41         return -1;
  42 }
  43
  44 int mmc_getwp(struct mmc *mmc)
  45 {
  46         int wp;
  47
  48         wp = board_mmc_getwp(mmc);
  49
  50         if (wp < 0) {
  51                 if (mmc->cfg->ops->getwp)
  52                         wp = mmc->cfg->ops->getwp(mmc);
  53                 else
  54                         wp = 0;
  55         }
  56
  57         return wp;
  58 }
  59
  60 __weak int board_mmc_getcd(struct mmc *mmc)
  61 {
  62         return -1;
  63 }
  64 #endif
  65
  66 #ifdef CONFIG_MMC_TRACE
  67 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
  68 {
  69         printf("CMD_SEND:%d\n", cmd->cmdidx);
  70         printf("\t\tARG\t\t\t 0x%08x\n", cmd->cmdarg);
  71 }
  72
  73 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
  74 {
  75         int i;
  76         u8 *ptr;
  77
  78         if (ret) {
  79                 printf("\t\tRET\t\t\t %d\n", ret);
  80         } else {
  81                 switch (cmd->resp_type) {
  82                 case MMC_RSP_NONE:
  83                         printf("\t\tMMC_RSP_NONE\n");
  84                         break;
  85                 case MMC_RSP_R1:
  86                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08x \n",
  87                                 cmd->response[0]);
  88                         break;
  89                 case MMC_RSP_R1b:
  90                         printf("\t\tMMC_RSP_R1b\t\t 0x%08x \n",
  91                                 cmd->response[0]);
  92                         break;
  93                 case MMC_RSP_R2:
  94                         printf("\t\tMMC_RSP_R2\t\t 0x%08x \n",
  95                                 cmd->response[0]);
  96                         printf("\t\t          \t\t 0x%08x \n",
  97                                 cmd->response[1]);
  98                         printf("\t\t          \t\t 0x%08x \n",
  99                                 cmd->response[2]);
 100                         printf("\t\t          \t\t 0x%08x \n",
 101                                 cmd->response[3]);
 102                         printf("\n");
 103                         printf("\t\t\t\t\tDUMPING DATA\n");
 104                         for (i = 0; i < 4; i++) {
 105                                 int j;
 106                                 printf("\t\t\t\t\t%03d - ", i*4);
 107                                 ptr = (u8 *)&cmd->response[i];
 108                                 ptr += 3;
 109                                 for (j = 0; j < 4; j++)
 110                                         printf("%02x ", *ptr--);
 111                                 printf("\n");
 112                         }
 113                         break;
 114                 case MMC_RSP_R3:
 115                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08x \n",
 116                                 cmd->response[0]);
 117                         break;
 118                 default:
 119                         printf("\t\tERROR MMC rsp not supported\n");
 120                         break;
 121                 }
 122         }
 123 }
 124
 125 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
 126 {
 127         int status;
 128
 129         status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
 130         printf("CURR STATE:%d\n", status);
 131 }
 132 #endif
 133
 134 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
 135 const char *mmc_mode_name(enum bus_mode mode)
 136 {
 137         static const char *const names[] = {
 138               [MMC_LEGACY]      = "MMC legacy",
 139               [SD_LEGACY]       = "SD Legacy",
 140               [MMC_HS]          = "MMC High Speed (26MHz)",
 141               [SD_HS]           = "SD High Speed (50MHz)",
 142               [UHS_SDR12]       = "UHS SDR12 (25MHz)",
 143               [UHS_SDR25]       = "UHS SDR25 (50MHz)",
 144               [UHS_SDR50]       = "UHS SDR50 (100MHz)",
 145               [UHS_SDR104]      = "UHS SDR104 (208MHz)",
 146               [UHS_DDR50]       = "UHS DDR50 (50MHz)",
 147               [MMC_HS_52]       = "MMC High Speed (52MHz)",
 148               [MMC_DDR_52]      = "MMC DDR52 (52MHz)",
 149               [MMC_HS_200]      = "HS200 (200MHz)",
 150               [MMC_HS_400]      = "HS400 (200MHz)",
 151         };
 152
 153         if (mode >= MMC_MODES_END)
 154                 return "Unknown mode";
 155         else
 156                 return names[mode];
 157 }
 158 #endif
 159
 160 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
 161 {
 162         static const int freqs[] = {
 163               [MMC_LEGACY]      = 25000000,
 164               [SD_LEGACY]       = 25000000,
 165               [MMC_HS]          = 26000000,
 166               [SD_HS]           = 50000000,
 167               [MMC_HS_52]       = 52000000,
 168               [MMC_DDR_52]      = 52000000,
 169               [UHS_SDR12]       = 25000000,
 170               [UHS_SDR25]       = 50000000,
 171               [UHS_SDR50]       = 100000000,
 172               [UHS_DDR50]       = 50000000,
 173               [UHS_SDR104]      = 208000000,
 174               [MMC_HS_200]      = 200000000,
 175               [MMC_HS_400]      = 200000000,
 176         };
 177
 178         if (mode == MMC_LEGACY)
 179                 return mmc->legacy_speed;
 180         else if (mode >= MMC_MODES_END)
 181                 return 0;
 182         else
 183                 return freqs[mode];
 184 }
 185
 186 static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
 187 {
 188         mmc->selected_mode = mode;
 189         mmc->tran_speed = mmc_mode2freq(mmc, mode);
 190         mmc->ddr_mode = mmc_is_mode_ddr(mode);
 191         pr_debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
 192                  mmc->tran_speed / 1000000);
 193         return 0;
 194 }
 195
 196 #if !CONFIG_IS_ENABLED(DM_MMC)
 197 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 198 {
 199         int ret;
 200
 201         mmmc_trace_before_send(mmc, cmd);
 202         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
 203         mmmc_trace_after_send(mmc, cmd, ret);
 204
 205         return ret;
 206 }
 207 #endif
 208
 209 int mmc_send_status(struct mmc *mmc, unsigned int *status)
 210 {
 211         struct mmc_cmd cmd;
 212         int err, retries = 5;
 213
 214         cmd.cmdidx = MMC_CMD_SEND_STATUS;
 215         cmd.resp_type = MMC_RSP_R1;
 216         if (!mmc_host_is_spi(mmc))
 217                 cmd.cmdarg = mmc->rca << 16;
 218
 219         while (retries--) {
 220                 err = mmc_send_cmd(mmc, &cmd, NULL);
 221                 if (!err) {
 222                         mmc_trace_state(mmc, &cmd);
 223                         *status = cmd.response[0];
 224                         return 0;
 225                 }
 226         }
 227         mmc_trace_state(mmc, &cmd);
 228         return -ECOMM;
 229 }
 230
 231 int mmc_poll_for_busy(struct mmc *mmc, int timeout)
 232 {
 233         unsigned int status;
 234         int err;
 235
 236         err = mmc_wait_dat0(mmc, 1, timeout);
 237         if (err != -ENOSYS)
 238                 return err;
 239
 240         while (1) {
 241                 err = mmc_send_status(mmc, &status);
 242                 if (err)
 243                         return err;
 244
 245                 if ((status & MMC_STATUS_RDY_FOR_DATA) &&
 246                     (status & MMC_STATUS_CURR_STATE) !=
 247                      MMC_STATE_PRG)
 248                         break;
 249
 250                 if (status & MMC_STATUS_MASK) {
 251 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 252                         pr_err("Status Error: 0x%08x\n", status);
 253 #endif
 254                         return -ECOMM;
 255                 }
 256
 257                 if (timeout-- <= 0)
 258                         break;
 259
 260                 udelay(1000);
 261         }
 262
 263         if (timeout <= 0) {
 264 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 265                 pr_err("Timeout waiting card ready\n");
 266 #endif
 267                 return -ETIMEDOUT;
 268         }
 269
 270         return 0;
 271 }
 272
 273 int mmc_set_blocklen(struct mmc *mmc, int len)
 274 {
 275         struct mmc_cmd cmd;
 276         int err;
 277
 278         if (mmc->ddr_mode)
 279                 return 0;
 280
 281         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
 282         cmd.resp_type = MMC_RSP_R1;
 283         cmd.cmdarg = len;
 284
 285         err = mmc_send_cmd(mmc, &cmd, NULL);
 286
 287 #ifdef CONFIG_MMC_QUIRKS
 288         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) {
 289                 int retries = 4;
 290                 /*
 291                  * It has been seen that SET_BLOCKLEN may fail on the first
 292                  * attempt, let's try a few more time
 293                  */
 294                 do {
 295                         err = mmc_send_cmd(mmc, &cmd, NULL);
 296                         if (!err)
 297                                 break;
 298                 } while (retries--);
 299         }
 300 #endif
 301
 302         return err;
 303 }
 304
 305 #ifdef MMC_SUPPORTS_TUNING
 306 static const u8 tuning_blk_pattern_4bit[] = {
 307         0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
 308         0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
 309         0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
 310         0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
 311         0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
 312         0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
 313         0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
 314         0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
 315 };
 316
 317 static const u8 tuning_blk_pattern_8bit[] = {
 318         0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
 319         0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
 320         0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
 321         0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
 322         0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
 323         0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
 324         0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
 325         0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
 326         0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
 327         0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
 328         0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
 329         0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
 330         0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
 331         0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
 332         0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
 333         0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
 334 };
 335
 336 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error)
 337 {
 338         struct mmc_cmd cmd;
 339         struct mmc_data data;
 340         const u8 *tuning_block_pattern;
 341         int size, err;
 342
 343         if (mmc->bus_width == 8) {
 344                 tuning_block_pattern = tuning_blk_pattern_8bit;
 345                 size = sizeof(tuning_blk_pattern_8bit);
 346         } else if (mmc->bus_width == 4) {
 347                 tuning_block_pattern = tuning_blk_pattern_4bit;
 348                 size = sizeof(tuning_blk_pattern_4bit);
 349         } else {
 350                 return -EINVAL;
 351         }
 352
 353         ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size);
 354
 355         cmd.cmdidx = opcode;
 356         cmd.cmdarg = 0;
 357         cmd.resp_type = MMC_RSP_R1;
 358
 359         data.dest = (void *)data_buf;
 360         data.blocks = 1;
 361         data.blocksize = size;
 362         data.flags = MMC_DATA_READ;
 363
 364         err = mmc_send_cmd(mmc, &cmd, &data);
 365         if (err)
 366                 return err;
 367
 368         if (memcmp(data_buf, tuning_block_pattern, size))
 369                 return -EIO;
 370
 371         return 0;
 372 }
 373 #endif
 374
 375 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 376                            lbaint_t blkcnt)
 377 {
 378         struct mmc_cmd cmd;
 379         struct mmc_data data;
 380
 381         if (blkcnt > 1)
 382                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
 383         else
 384                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
 385
 386         if (mmc->high_capacity)
 387                 cmd.cmdarg = start;
 388         else
 389                 cmd.cmdarg = start * mmc->read_bl_len;
 390
 391         cmd.resp_type = MMC_RSP_R1;
 392
 393         data.dest = dst;
 394         data.blocks = blkcnt;
 395         data.blocksize = mmc->read_bl_len;
 396         data.flags = MMC_DATA_READ;
 397
 398         if (mmc_send_cmd(mmc, &cmd, &data))
 399                 return 0;
 400
 401         if (blkcnt > 1) {
 402                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
 403                 cmd.cmdarg = 0;
 404                 cmd.resp_type = MMC_RSP_R1b;
 405                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
 406 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 407                         pr_err("mmc fail to send stop cmd\n");
 408 #endif
 409                         return 0;
 410                 }
 411         }
 412
 413         return blkcnt;
 414 }
 415
 416 #if CONFIG_IS_ENABLED(BLK)
 417 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 418 #else
 419 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 420                 void *dst)
 421 #endif
 422 {
 423 #if CONFIG_IS_ENABLED(BLK)
 424         struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 425 #endif
 426         int dev_num = block_dev->devnum;
 427         int err;
 428         lbaint_t cur, blocks_todo = blkcnt;
 429
 430         if (blkcnt == 0)
 431                 return 0;
 432
 433         struct mmc *mmc = find_mmc_device(dev_num);
 434         if (!mmc)
 435                 return 0;
 436
 437         if (CONFIG_IS_ENABLED(MMC_TINY))
 438                 err = mmc_switch_part(mmc, block_dev->hwpart);
 439         else
 440                 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
 441
 442         if (err < 0)
 443                 return 0;
 444
 445         if ((start + blkcnt) > block_dev->lba) {
 446 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 447                 pr_err("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
 448                        start + blkcnt, block_dev->lba);
 449 #endif
 450                 return 0;
 451         }
 452
 453         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
 454                 pr_debug("%s: Failed to set blocklen\n", __func__);
 455                 return 0;
 456         }
 457
 458         do {
 459                 cur = (blocks_todo > mmc->cfg->b_max) ?
 460                         mmc->cfg->b_max : blocks_todo;
 461                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 462                         pr_debug("%s: Failed to read blocks\n", __func__);
 463                         return 0;
 464                 }
 465                 blocks_todo -= cur;
 466                 start += cur;
 467                 dst += cur * mmc->read_bl_len;
 468         } while (blocks_todo > 0);
 469
 470         return blkcnt;
 471 }
 472
 473 static int mmc_go_idle(struct mmc *mmc)
 474 {
 475         struct mmc_cmd cmd;
 476         int err;
 477
 478         udelay(1000);
 479
 480         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
 481         cmd.cmdarg = 0;
 482         cmd.resp_type = MMC_RSP_NONE;
 483
 484         err = mmc_send_cmd(mmc, &cmd, NULL);
 485
 486         if (err)
 487                 return err;
 488
 489         udelay(2000);
 490
 491         return 0;
 492 }
 493
 494 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 495 static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
 496 {
 497         struct mmc_cmd cmd;
 498         int err = 0;
 499
 500         /*
 501          * Send CMD11 only if the request is to switch the card to
 502          * 1.8V signalling.
 503          */
 504         if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
 505                 return mmc_set_signal_voltage(mmc, signal_voltage);
 506
 507         cmd.cmdidx = SD_CMD_SWITCH_UHS18V;
 508         cmd.cmdarg = 0;
 509         cmd.resp_type = MMC_RSP_R1;
 510
 511         err = mmc_send_cmd(mmc, &cmd, NULL);
 512         if (err)
 513                 return err;
 514
 515         if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR))
 516                 return -EIO;
 517
 518         /*
 519          * The card should drive cmd and dat[0:3] low immediately
 520          * after the response of cmd11, but wait 100 us to be sure
 521          */
 522         err = mmc_wait_dat0(mmc, 0, 100);
 523         if (err == -ENOSYS)
 524                 udelay(100);
 525         else if (err)
 526                 return -ETIMEDOUT;
 527
 528         /*
 529          * During a signal voltage level switch, the clock must be gated
 530          * for 5 ms according to the SD spec
 531          */
 532         mmc_set_clock(mmc, mmc->clock, MMC_CLK_DISABLE);
 533
 534         err = mmc_set_signal_voltage(mmc, signal_voltage);
 535         if (err)
 536                 return err;
 537
 538         /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
 539         mdelay(10);
 540         mmc_set_clock(mmc, mmc->clock, MMC_CLK_ENABLE);
 541
 542         /*
 543          * Failure to switch is indicated by the card holding
 544          * dat[0:3] low. Wait for at least 1 ms according to spec
 545          */
 546         err = mmc_wait_dat0(mmc, 1, 1000);
 547         if (err == -ENOSYS)
 548                 udelay(1000);
 549         else if (err)
 550                 return -ETIMEDOUT;
 551
 552         return 0;
 553 }
 554 #endif
 555
 556 static int sd_send_op_cond(struct mmc *mmc, bool uhs_en)
 557 {
 558         int timeout = 1000;
 559         int err;
 560         struct mmc_cmd cmd;
 561
 562         while (1) {
 563                 cmd.cmdidx = MMC_CMD_APP_CMD;
 564                 cmd.resp_type = MMC_RSP_R1;
 565                 cmd.cmdarg = 0;
 566
 567                 err = mmc_send_cmd(mmc, &cmd, NULL);
 568
 569                 if (err)
 570                         return err;
 571
 572                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
 573                 cmd.resp_type = MMC_RSP_R3;
 574
 575                 /*
 576                  * Most cards do not answer if some reserved bits
 577                  * in the ocr are set. However, Some controller
 578                  * can set bit 7 (reserved for low voltages), but
 579                  * how to manage low voltages SD card is not yet
 580                  * specified.
 581                  */
 582                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
 583                         (mmc->cfg->voltages & 0xff8000);
 584
 585                 if (mmc->version == SD_VERSION_2)
 586                         cmd.cmdarg |= OCR_HCS;
 587
 588                 if (uhs_en)
 589                         cmd.cmdarg |= OCR_S18R;
 590
 591                 err = mmc_send_cmd(mmc, &cmd, NULL);
 592
 593                 if (err)
 594                         return err;
 595
 596                 if (cmd.response[0] & OCR_BUSY)
 597                         break;
 598
 599                 if (timeout-- <= 0)
 600                         return -EOPNOTSUPP;
 601
 602                 udelay(1000);
 603         }
 604
 605         if (mmc->version != SD_VERSION_2)
 606                 mmc->version = SD_VERSION_1_0;
 607
 608         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 609                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 610                 cmd.resp_type = MMC_RSP_R3;
 611                 cmd.cmdarg = 0;
 612
 613                 err = mmc_send_cmd(mmc, &cmd, NULL);
 614
 615                 if (err)
 616                         return err;
 617         }
 618
 619         mmc->ocr = cmd.response[0];
 620
 621 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 622         if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000)
 623             == 0x41000000) {
 624                 err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
 625                 if (err)
 626                         return err;
 627         }
 628 #endif
 629
 630         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 631         mmc->rca = 0;
 632
 633         return 0;
 634 }
 635
 636 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 637 {
 638         struct mmc_cmd cmd;
 639         int err;
 640
 641         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
 642         cmd.resp_type = MMC_RSP_R3;
 643         cmd.cmdarg = 0;
 644         if (use_arg && !mmc_host_is_spi(mmc))
 645                 cmd.cmdarg = OCR_HCS |
 646                         (mmc->cfg->voltages &
 647                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
 648                         (mmc->ocr & OCR_ACCESS_MODE);
 649
 650         err = mmc_send_cmd(mmc, &cmd, NULL);
 651         if (err)
 652                 return err;
 653         mmc->ocr = cmd.response[0];
 654         return 0;
 655 }
 656
 657 static int mmc_send_op_cond(struct mmc *mmc)
 658 {
 659         int err, i;
 660
 661         /* Some cards seem to need this */
 662         mmc_go_idle(mmc);
 663
 664         /* Asking to the card its capabilities */
 665         for (i = 0; i < 2; i++) {
 666                 err = mmc_send_op_cond_iter(mmc, i != 0);
 667                 if (err)
 668                         return err;
 669
 670                 /* exit if not busy (flag seems to be inverted) */
 671                 if (mmc->ocr & OCR_BUSY)
 672                         break;
 673         }
 674         mmc->op_cond_pending = 1;
 675         return 0;
 676 }
 677
 678 static int mmc_complete_op_cond(struct mmc *mmc)
 679 {
 680         struct mmc_cmd cmd;
 681         int timeout = 1000;
 682         ulong start;
 683         int err;
 684
 685         mmc->op_cond_pending = 0;
 686         if (!(mmc->ocr & OCR_BUSY)) {
 687                 /* Some cards seem to need this */
 688                 mmc_go_idle(mmc);
 689
 690                 start = get_timer(0);
 691                 while (1) {
 692                         err = mmc_send_op_cond_iter(mmc, 1);
 693                         if (err)
 694                                 return err;
 695                         if (mmc->ocr & OCR_BUSY)
 696                                 break;
 697                         if (get_timer(start) > timeout)
 698                                 return -EOPNOTSUPP;
 699                         udelay(100);
 700                 }
 701         }
 702
 703         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 704                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 705                 cmd.resp_type = MMC_RSP_R3;
 706                 cmd.cmdarg = 0;
 707
 708                 err = mmc_send_cmd(mmc, &cmd, NULL);
 709
 710                 if (err)
 711                         return err;
 712
 713                 mmc->ocr = cmd.response[0];
 714         }
 715
 716         mmc->version = MMC_VERSION_UNKNOWN;
 717
 718         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 719         mmc->rca = 1;
 720
 721         return 0;
 722 }
 723
 724
 725 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 726 {
 727         struct mmc_cmd cmd;
 728         struct mmc_data data;
 729         int err;
 730
 731         /* Get the Card Status Register */
 732         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 733         cmd.resp_type = MMC_RSP_R1;
 734         cmd.cmdarg = 0;
 735
 736         data.dest = (char *)ext_csd;
 737         data.blocks = 1;
 738         data.blocksize = MMC_MAX_BLOCK_LEN;
 739         data.flags = MMC_DATA_READ;
 740
 741         err = mmc_send_cmd(mmc, &cmd, &data);
 742
 743         return err;
 744 }
 745
 746 static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value,
 747                         bool send_status)
 748 {
 749         unsigned int status, start;
 750         struct mmc_cmd cmd;
 751         int timeout = DEFAULT_CMD6_TIMEOUT_MS;
 752         bool is_part_switch = (set == EXT_CSD_CMD_SET_NORMAL) &&
 753                               (index == EXT_CSD_PART_CONF);
 754         int retries = 3;
 755         int ret;
 756
 757         if (mmc->gen_cmd6_time)
 758                 timeout = mmc->gen_cmd6_time * 10;
 759
 760         if (is_part_switch  && mmc->part_switch_time)
 761                 timeout = mmc->part_switch_time * 10;
 762
 763         cmd.cmdidx = MMC_CMD_SWITCH;
 764         cmd.resp_type = MMC_RSP_R1b;
 765         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
 766                                  (index << 16) |
 767                                  (value << 8);
 768
 769         do {
 770                 ret = mmc_send_cmd(mmc, &cmd, NULL);
 771         } while (ret && retries-- > 0);
 772
 773         if (ret)
 774                 return ret;
 775
 776         start = get_timer(0);
 777
 778         /* poll dat0 for rdy/buys status */
 779         ret = mmc_wait_dat0(mmc, 1, timeout);
 780         if (ret && ret != -ENOSYS)
 781                 return ret;
 782
 783         /*
 784          * In cases when not allowed to poll by using CMD13 or because we aren't
 785          * capable of polling by using mmc_wait_dat0, then rely on waiting the
 786          * stated timeout to be sufficient.
 787          */
 788         if (ret == -ENOSYS && !send_status)
 789                 mdelay(timeout);
 790
 791         /* Finally wait until the card is ready or indicates a failure
 792          * to switch. It doesn't hurt to use CMD13 here even if send_status
 793          * is false, because by now (after 'timeout' ms) the bus should be
 794          * reliable.
 795          */
 796         do {
 797                 ret = mmc_send_status(mmc, &status);
 798
 799                 if (!ret && (status & MMC_STATUS_SWITCH_ERROR)) {
 800                         pr_debug("switch failed %d/%d/0x%x !\n", set, index,
 801                                  value);
 802                         return -EIO;
 803                 }
 804                 if (!ret && (status & MMC_STATUS_RDY_FOR_DATA))
 805                         return 0;
 806                 udelay(100);
 807         } while (get_timer(start) < timeout);
 808
 809         return -ETIMEDOUT;
 810 }
 811
 812 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 813 {
 814         return __mmc_switch(mmc, set, index, value, true);
 815 }
 816
 817 #if !CONFIG_IS_ENABLED(MMC_TINY)
 818 static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode,
 819                               bool hsdowngrade)
 820 {
 821         int err;
 822         int speed_bits;
 823
 824         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
 825
 826         switch (mode) {
 827         case MMC_HS:
 828         case MMC_HS_52:
 829         case MMC_DDR_52:
 830                 speed_bits = EXT_CSD_TIMING_HS;
 831                 break;
 832 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 833         case MMC_HS_200:
 834                 speed_bits = EXT_CSD_TIMING_HS200;
 835                 break;
 836 #endif
 837 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 838         case MMC_HS_400:
 839                 speed_bits = EXT_CSD_TIMING_HS400;
 840                 break;
 841 #endif
 842         case MMC_LEGACY:
 843                 speed_bits = EXT_CSD_TIMING_LEGACY;
 844                 break;
 845         default:
 846                 return -EINVAL;
 847         }
 848
 849         err = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
 850                            speed_bits, !hsdowngrade);
 851         if (err)
 852                 return err;
 853
 854 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
 855     CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 856         /*
 857          * In case the eMMC is in HS200/HS400 mode and we are downgrading
 858          * to HS mode, the card clock are still running much faster than
 859          * the supported HS mode clock, so we can not reliably read out
 860          * Extended CSD. Reconfigure the controller to run at HS mode.
 861          */
 862         if (hsdowngrade) {
 863                 mmc_select_mode(mmc, MMC_HS);
 864                 mmc_set_clock(mmc, mmc_mode2freq(mmc, MMC_HS), false);
 865         }
 866 #endif
 867
 868         if ((mode == MMC_HS) || (mode == MMC_HS_52)) {
 869                 /* Now check to see that it worked */
 870                 err = mmc_send_ext_csd(mmc, test_csd);
 871                 if (err)
 872                         return err;
 873
 874                 /* No high-speed support */
 875                 if (!test_csd[EXT_CSD_HS_TIMING])
 876                         return -ENOTSUPP;
 877         }
 878
 879         return 0;
 880 }
 881
 882 static int mmc_get_capabilities(struct mmc *mmc)
 883 {
 884         u8 *ext_csd = mmc->ext_csd;
 885         char cardtype;
 886
 887         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
 888
 889         if (mmc_host_is_spi(mmc))
 890                 return 0;
 891
 892         /* Only version 4 supports high-speed */
 893         if (mmc->version < MMC_VERSION_4)
 894                 return 0;
 895
 896         if (!ext_csd) {
 897                 pr_err("No ext_csd found!\n"); /* this should enver happen */
 898                 return -ENOTSUPP;
 899         }
 900
 901         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
 902
 903         cardtype = ext_csd[EXT_CSD_CARD_TYPE];
 904         mmc->cardtype = cardtype;
 905
 906 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 907         if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
 908                         EXT_CSD_CARD_TYPE_HS200_1_8V)) {
 909                 mmc->card_caps |= MMC_MODE_HS200;
 910         }
 911 #endif
 912 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 913         if (cardtype & (EXT_CSD_CARD_TYPE_HS400_1_2V |
 914                         EXT_CSD_CARD_TYPE_HS400_1_8V)) {
 915                 mmc->card_caps |= MMC_MODE_HS400;
 916         }
 917 #endif
 918         if (cardtype & EXT_CSD_CARD_TYPE_52) {
 919                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
 920                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
 921                 mmc->card_caps |= MMC_MODE_HS_52MHz;
 922         }
 923         if (cardtype & EXT_CSD_CARD_TYPE_26)
 924                 mmc->card_caps |= MMC_MODE_HS;
 925
 926         return 0;
 927 }
 928 #endif
 929
 930 static int mmc_set_capacity(struct mmc *mmc, int part_num)
 931 {
 932         switch (part_num) {
 933         case 0:
 934                 mmc->capacity = mmc->capacity_user;
 935                 break;
 936         case 1:
 937         case 2:
 938                 mmc->capacity = mmc->capacity_boot;
 939                 break;
 940         case 3:
 941                 mmc->capacity = mmc->capacity_rpmb;
 942                 break;
 943         case 4:
 944         case 5:
 945         case 6:
 946         case 7:
 947                 mmc->capacity = mmc->capacity_gp[part_num - 4];
 948                 break;
 949         default:
 950                 return -1;
 951         }
 952
 953         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
 954
 955         return 0;
 956 }
 957
 958 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 959 static int mmc_boot_part_access_chk(struct mmc *mmc, unsigned int part_num)
 960 {
 961         int forbidden = 0;
 962         bool change = false;
 963
 964         if (part_num & PART_ACCESS_MASK)
 965                 forbidden = MMC_CAP(MMC_HS_200) | MMC_CAP(MMC_HS_400);
 966
 967         if (MMC_CAP(mmc->selected_mode) & forbidden) {
 968                 pr_debug("selected mode (%s) is forbidden for part %d\n",
 969                          mmc_mode_name(mmc->selected_mode), part_num);
 970                 change = true;
 971         } else if (mmc->selected_mode != mmc->best_mode) {
 972                 pr_debug("selected mode is not optimal\n");
 973                 change = true;
 974         }
 975
 976         if (change)
 977                 return mmc_select_mode_and_width(mmc,
 978                                                  mmc->card_caps & ~forbidden);
 979
 980         return 0;
 981 }
 982 #else
 983 static inline int mmc_boot_part_access_chk(struct mmc *mmc,
 984                                            unsigned int part_num)
 985 {
 986         return 0;
 987 }
 988 #endif
 989
 990 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
 991 {
 992         int ret;
 993
 994         ret = mmc_boot_part_access_chk(mmc, part_num);
 995         if (ret)
 996                 return ret;
 997
 998         ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
 999                          (mmc->part_config & ~PART_ACCESS_MASK)
1000                          | (part_num & PART_ACCESS_MASK));
1001
1002         /*
1003          * Set the capacity if the switch succeeded or was intended
1004          * to return to representing the raw device.
1005          */
1006         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
1007                 ret = mmc_set_capacity(mmc, part_num);
1008                 mmc_get_blk_desc(mmc)->hwpart = part_num;
1009         }
1010
1011         return ret;
1012 }
1013
1014 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
1015 int mmc_hwpart_config(struct mmc *mmc,
1016                       const struct mmc_hwpart_conf *conf,
1017                       enum mmc_hwpart_conf_mode mode)
1018 {
1019         u8 part_attrs = 0;
1020         u32 enh_size_mult;
1021         u32 enh_start_addr;
1022         u32 gp_size_mult[4];
1023         u32 max_enh_size_mult;
1024         u32 tot_enh_size_mult = 0;
1025         u8 wr_rel_set;
1026         int i, pidx, err;
1027         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1028
1029         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
1030                 return -EINVAL;
1031
1032         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
1033                 pr_err("eMMC >= 4.4 required for enhanced user data area\n");
1034                 return -EMEDIUMTYPE;
1035         }
1036
1037         if (!(mmc->part_support & PART_SUPPORT)) {
1038                 pr_err("Card does not support partitioning\n");
1039                 return -EMEDIUMTYPE;
1040         }
1041
1042         if (!mmc->hc_wp_grp_size) {
1043                 pr_err("Card does not define HC WP group size\n");
1044                 return -EMEDIUMTYPE;
1045         }
1046
1047         /* check partition alignment and total enhanced size */
1048         if (conf->user.enh_size) {
1049                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
1050                     conf->user.enh_start % mmc->hc_wp_grp_size) {
1051                         pr_err("User data enhanced area not HC WP group "
1052                                "size aligned\n");
1053                         return -EINVAL;
1054                 }
1055                 part_attrs |= EXT_CSD_ENH_USR;
1056                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
1057                 if (mmc->high_capacity) {
1058                         enh_start_addr = conf->user.enh_start;
1059                 } else {
1060                         enh_start_addr = (conf->user.enh_start << 9);
1061                 }
1062         } else {
1063                 enh_size_mult = 0;
1064                 enh_start_addr = 0;
1065         }
1066         tot_enh_size_mult += enh_size_mult;
1067
1068         for (pidx = 0; pidx < 4; pidx++) {
1069                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
1070                         pr_err("GP%i partition not HC WP group size "
1071                                "aligned\n", pidx+1);
1072                         return -EINVAL;
1073                 }
1074                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
1075                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
1076                         part_attrs |= EXT_CSD_ENH_GP(pidx);
1077                         tot_enh_size_mult += gp_size_mult[pidx];
1078                 }
1079         }
1080
1081         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
1082                 pr_err("Card does not support enhanced attribute\n");
1083                 return -EMEDIUMTYPE;
1084         }
1085
1086         err = mmc_send_ext_csd(mmc, ext_csd);
1087         if (err)
1088                 return err;
1089
1090         max_enh_size_mult =
1091                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
1092                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
1093                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
1094         if (tot_enh_size_mult > max_enh_size_mult) {
1095                 pr_err("Total enhanced size exceeds maximum (%u > %u)\n",
1096                        tot_enh_size_mult, max_enh_size_mult);
1097                 return -EMEDIUMTYPE;
1098         }
1099
1100         /* The default value of EXT_CSD_WR_REL_SET is device
1101          * dependent, the values can only be changed if the
1102          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
1103          * changed only once and before partitioning is completed. */
1104         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1105         if (conf->user.wr_rel_change) {
1106                 if (conf->user.wr_rel_set)
1107                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
1108                 else
1109                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
1110         }
1111         for (pidx = 0; pidx < 4; pidx++) {
1112                 if (conf->gp_part[pidx].wr_rel_change) {
1113                         if (conf->gp_part[pidx].wr_rel_set)
1114                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
1115                         else
1116                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
1117                 }
1118         }
1119
1120         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
1121             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
1122                 puts("Card does not support host controlled partition write "
1123                      "reliability settings\n");
1124                 return -EMEDIUMTYPE;
1125         }
1126
1127         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
1128             EXT_CSD_PARTITION_SETTING_COMPLETED) {
1129                 pr_err("Card already partitioned\n");
1130                 return -EPERM;
1131         }
1132
1133         if (mode == MMC_HWPART_CONF_CHECK)
1134                 return 0;
1135
1136         /* Partitioning requires high-capacity size definitions */
1137         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
1138                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1139                                  EXT_CSD_ERASE_GROUP_DEF, 1);
1140
1141                 if (err)
1142                         return err;
1143
1144                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1145
1146                 /* update erase group size to be high-capacity */
1147                 mmc->erase_grp_size =
1148                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1149
1150         }
1151
1152         /* all OK, write the configuration */
1153         for (i = 0; i < 4; i++) {
1154                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1155                                  EXT_CSD_ENH_START_ADDR+i,
1156                                  (enh_start_addr >> (i*8)) & 0xFF);
1157                 if (err)
1158                         return err;
1159         }
1160         for (i = 0; i < 3; i++) {
1161                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1162                                  EXT_CSD_ENH_SIZE_MULT+i,
1163                                  (enh_size_mult >> (i*8)) & 0xFF);
1164                 if (err)
1165                         return err;
1166         }
1167         for (pidx = 0; pidx < 4; pidx++) {
1168                 for (i = 0; i < 3; i++) {
1169                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1170                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
1171                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
1172                         if (err)
1173                                 return err;
1174                 }
1175         }
1176         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1177                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
1178         if (err)
1179                 return err;
1180
1181         if (mode == MMC_HWPART_CONF_SET)
1182                 return 0;
1183
1184         /* The WR_REL_SET is a write-once register but shall be
1185          * written before setting PART_SETTING_COMPLETED. As it is
1186          * write-once we can only write it when completing the
1187          * partitioning. */
1188         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
1189                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1190                                  EXT_CSD_WR_REL_SET, wr_rel_set);
1191                 if (err)
1192                         return err;
1193         }
1194
1195         /* Setting PART_SETTING_COMPLETED confirms the partition
1196          * configuration but it only becomes effective after power
1197          * cycle, so we do not adjust the partition related settings
1198          * in the mmc struct. */
1199
1200         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1201                          EXT_CSD_PARTITION_SETTING,
1202                          EXT_CSD_PARTITION_SETTING_COMPLETED);
1203         if (err)
1204                 return err;
1205
1206         return 0;
1207 }
1208 #endif
1209
1210 #if !CONFIG_IS_ENABLED(DM_MMC)
1211 int mmc_getcd(struct mmc *mmc)
1212 {
1213         int cd;
1214
1215         cd = board_mmc_getcd(mmc);
1216
1217         if (cd < 0) {
1218                 if (mmc->cfg->ops->getcd)
1219                         cd = mmc->cfg->ops->getcd(mmc);
1220                 else
1221                         cd = 1;
1222         }
1223
1224         return cd;
1225 }
1226 #endif
1227
1228 #if !CONFIG_IS_ENABLED(MMC_TINY)
1229 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
1230 {
1231         struct mmc_cmd cmd;
1232         struct mmc_data data;
1233
1234         /* Switch the frequency */
1235         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
1236         cmd.resp_type = MMC_RSP_R1;
1237         cmd.cmdarg = (mode << 31) | 0xffffff;
1238         cmd.cmdarg &= ~(0xf << (group * 4));
1239         cmd.cmdarg |= value << (group * 4);
1240
1241         data.dest = (char *)resp;
1242         data.blocksize = 64;
1243         data.blocks = 1;
1244         data.flags = MMC_DATA_READ;
1245
1246         return mmc_send_cmd(mmc, &cmd, &data);
1247 }
1248
1249 static int sd_get_capabilities(struct mmc *mmc)
1250 {
1251         int err;
1252         struct mmc_cmd cmd;
1253         ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
1254         ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
1255         struct mmc_data data;
1256         int timeout;
1257 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1258         u32 sd3_bus_mode;
1259 #endif
1260
1261         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(SD_LEGACY);
1262
1263         if (mmc_host_is_spi(mmc))
1264                 return 0;
1265
1266         /* Read the SCR to find out if this card supports higher speeds */
1267         cmd.cmdidx = MMC_CMD_APP_CMD;
1268         cmd.resp_type = MMC_RSP_R1;
1269         cmd.cmdarg = mmc->rca << 16;
1270
1271         err = mmc_send_cmd(mmc, &cmd, NULL);
1272
1273         if (err)
1274                 return err;
1275
1276         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
1277         cmd.resp_type = MMC_RSP_R1;
1278         cmd.cmdarg = 0;
1279
1280         timeout = 3;
1281
1282 retry_scr:
1283         data.dest = (char *)scr;
1284         data.blocksize = 8;
1285         data.blocks = 1;
1286         data.flags = MMC_DATA_READ;
1287
1288         err = mmc_send_cmd(mmc, &cmd, &data);
1289
1290         if (err) {
1291                 if (timeout--)
1292                         goto retry_scr;
1293
1294                 return err;
1295         }
1296
1297         mmc->scr[0] = __be32_to_cpu(scr[0]);
1298         mmc->scr[1] = __be32_to_cpu(scr[1]);
1299
1300         switch ((mmc->scr[0] >> 24) & 0xf) {
1301         case 0:
1302                 mmc->version = SD_VERSION_1_0;
1303                 break;
1304         case 1:
1305                 mmc->version = SD_VERSION_1_10;
1306                 break;
1307         case 2:
1308                 mmc->version = SD_VERSION_2;
1309                 if ((mmc->scr[0] >> 15) & 0x1)
1310                         mmc->version = SD_VERSION_3;
1311                 break;
1312         default:
1313                 mmc->version = SD_VERSION_1_0;
1314                 break;
1315         }
1316
1317         if (mmc->scr[0] & SD_DATA_4BIT)
1318                 mmc->card_caps |= MMC_MODE_4BIT;
1319
1320         /* Version 1.0 doesn't support switching */
1321         if (mmc->version == SD_VERSION_1_0)
1322                 return 0;
1323
1324         timeout = 4;
1325         while (timeout--) {
1326                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
1327                                 (u8 *)switch_status);
1328
1329                 if (err)
1330                         return err;
1331
1332                 /* The high-speed function is busy.  Try again */
1333                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
1334                         break;
1335         }
1336
1337         /* If high-speed isn't supported, we return */
1338         if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)
1339                 mmc->card_caps |= MMC_CAP(SD_HS);
1340
1341 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1342         /* Version before 3.0 don't support UHS modes */
1343         if (mmc->version < SD_VERSION_3)
1344                 return 0;
1345
1346         sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f;
1347         if (sd3_bus_mode & SD_MODE_UHS_SDR104)
1348                 mmc->card_caps |= MMC_CAP(UHS_SDR104);
1349         if (sd3_bus_mode & SD_MODE_UHS_SDR50)
1350                 mmc->card_caps |= MMC_CAP(UHS_SDR50);
1351         if (sd3_bus_mode & SD_MODE_UHS_SDR25)
1352                 mmc->card_caps |= MMC_CAP(UHS_SDR25);
1353         if (sd3_bus_mode & SD_MODE_UHS_SDR12)
1354                 mmc->card_caps |= MMC_CAP(UHS_SDR12);
1355         if (sd3_bus_mode & SD_MODE_UHS_DDR50)
1356                 mmc->card_caps |= MMC_CAP(UHS_DDR50);
1357 #endif
1358
1359         return 0;
1360 }
1361
1362 static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode)
1363 {
1364         int err;
1365
1366         ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
1367         int speed;
1368
1369         /* SD version 1.00 and 1.01 does not support CMD 6 */
1370         if (mmc->version == SD_VERSION_1_0)
1371                 return 0;
1372
1373         switch (mode) {
1374         case SD_LEGACY:
1375                 speed = UHS_SDR12_BUS_SPEED;
1376                 break;
1377         case SD_HS:
1378                 speed = HIGH_SPEED_BUS_SPEED;
1379                 break;
1380 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1381         case UHS_SDR12:
1382                 speed = UHS_SDR12_BUS_SPEED;
1383                 break;
1384         case UHS_SDR25:
1385                 speed = UHS_SDR25_BUS_SPEED;
1386                 break;
1387         case UHS_SDR50:
1388                 speed = UHS_SDR50_BUS_SPEED;
1389                 break;
1390         case UHS_DDR50:
1391                 speed = UHS_DDR50_BUS_SPEED;
1392                 break;
1393         case UHS_SDR104:
1394                 speed = UHS_SDR104_BUS_SPEED;
1395                 break;
1396 #endif
1397         default:
1398                 return -EINVAL;
1399         }
1400
1401         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status);
1402         if (err)
1403                 return err;
1404
1405         if (((__be32_to_cpu(switch_status[4]) >> 24) & 0xF) != speed)
1406                 return -ENOTSUPP;
1407
1408         return 0;
1409 }
1410
1411 static int sd_select_bus_width(struct mmc *mmc, int w)
1412 {
1413         int err;
1414         struct mmc_cmd cmd;
1415
1416         if ((w != 4) && (w != 1))
1417                 return -EINVAL;
1418
1419         cmd.cmdidx = MMC_CMD_APP_CMD;
1420         cmd.resp_type = MMC_RSP_R1;
1421         cmd.cmdarg = mmc->rca << 16;
1422
1423         err = mmc_send_cmd(mmc, &cmd, NULL);
1424         if (err)
1425                 return err;
1426
1427         cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1428         cmd.resp_type = MMC_RSP_R1;
1429         if (w == 4)
1430                 cmd.cmdarg = 2;
1431         else if (w == 1)
1432                 cmd.cmdarg = 0;
1433         err = mmc_send_cmd(mmc, &cmd, NULL);
1434         if (err)
1435                 return err;
1436
1437         return 0;
1438 }
1439 #endif
1440
1441 #if CONFIG_IS_ENABLED(MMC_WRITE)
1442 static int sd_read_ssr(struct mmc *mmc)
1443 {
1444         static const unsigned int sd_au_size[] = {
1445                 0,              SZ_16K / 512,           SZ_32K / 512,
1446                 SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
1447                 SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
1448                 SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
1449                 SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,
1450                 SZ_64M / 512,
1451         };
1452         int err, i;
1453         struct mmc_cmd cmd;
1454         ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1455         struct mmc_data data;
1456         int timeout = 3;
1457         unsigned int au, eo, et, es;
1458
1459         cmd.cmdidx = MMC_CMD_APP_CMD;
1460         cmd.resp_type = MMC_RSP_R1;
1461         cmd.cmdarg = mmc->rca << 16;
1462
1463         err = mmc_send_cmd(mmc, &cmd, NULL);
1464         if (err)
1465                 return err;
1466
1467         cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1468         cmd.resp_type = MMC_RSP_R1;
1469         cmd.cmdarg = 0;
1470
1471 retry_ssr:
1472         data.dest = (char *)ssr;
1473         data.blocksize = 64;
1474         data.blocks = 1;
1475         data.flags = MMC_DATA_READ;
1476
1477         err = mmc_send_cmd(mmc, &cmd, &data);
1478         if (err) {
1479                 if (timeout--)
1480                         goto retry_ssr;
1481
1482                 return err;
1483         }
1484
1485         for (i = 0; i < 16; i++)
1486                 ssr[i] = be32_to_cpu(ssr[i]);
1487
1488         au = (ssr[2] >> 12) & 0xF;
1489         if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1490                 mmc->ssr.au = sd_au_size[au];
1491                 es = (ssr[3] >> 24) & 0xFF;
1492                 es |= (ssr[2] & 0xFF) << 8;
1493                 et = (ssr[3] >> 18) & 0x3F;
1494                 if (es && et) {
1495                         eo = (ssr[3] >> 16) & 0x3;
1496                         mmc->ssr.erase_timeout = (et * 1000) / es;
1497                         mmc->ssr.erase_offset = eo * 1000;
1498                 }
1499         } else {
1500                 pr_debug("Invalid Allocation Unit Size.\n");
1501         }
1502
1503         return 0;
1504 }
1505 #endif
1506 /* frequency bases */
1507 /* divided by 10 to be nice to platforms without floating point */
1508 static const int fbase[] = {
1509         10000,
1510         100000,
1511         1000000,
1512         10000000,
1513 };
1514
1515 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
1516  * to platforms without floating point.
1517  */
1518 static const u8 multipliers[] = {
1519         0,      /* reserved */
1520         10,
1521         12,
1522         13,
1523         15,
1524         20,
1525         25,
1526         30,
1527         35,
1528         40,
1529         45,
1530         50,
1531         55,
1532         60,
1533         70,
1534         80,
1535 };
1536
1537 static inline int bus_width(uint cap)
1538 {
1539         if (cap == MMC_MODE_8BIT)
1540                 return 8;
1541         if (cap == MMC_MODE_4BIT)
1542                 return 4;
1543         if (cap == MMC_MODE_1BIT)
1544                 return 1;
1545         pr_warn("invalid bus witdh capability 0x%x\n", cap);
1546         return 0;
1547 }
1548
1549 #if !CONFIG_IS_ENABLED(DM_MMC)
1550 #ifdef MMC_SUPPORTS_TUNING
1551 static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
1552 {
1553         return -ENOTSUPP;
1554 }
1555 #endif
1556
1557 static int mmc_set_ios(struct mmc *mmc)
1558 {
1559         int ret = 0;
1560
1561         if (mmc->cfg->ops->set_ios)
1562                 ret = mmc->cfg->ops->set_ios(mmc);
1563
1564         return ret;
1565 }
1566 #endif
1567
1568 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
1569 {
1570         if (!disable) {
1571                 if (clock > mmc->cfg->f_max)
1572                         clock = mmc->cfg->f_max;
1573
1574                 if (clock < mmc->cfg->f_min)
1575                         clock = mmc->cfg->f_min;
1576         }
1577
1578         mmc->clock = clock;
1579         mmc->clk_disable = disable;
1580
1581         debug("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock);
1582
1583         return mmc_set_ios(mmc);
1584 }
1585
1586 static int mmc_set_bus_width(struct mmc *mmc, uint width)
1587 {
1588         mmc->bus_width = width;
1589
1590         return mmc_set_ios(mmc);
1591 }
1592
1593 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1594 /*
1595  * helper function to display the capabilities in a human
1596  * friendly manner. The capabilities include bus width and
1597  * supported modes.
1598  */
1599 void mmc_dump_capabilities(const char *text, uint caps)
1600 {
1601         enum bus_mode mode;
1602
1603         pr_debug("%s: widths [", text);
1604         if (caps & MMC_MODE_8BIT)
1605                 pr_debug("8, ");
1606         if (caps & MMC_MODE_4BIT)
1607                 pr_debug("4, ");
1608         if (caps & MMC_MODE_1BIT)
1609                 pr_debug("1, ");
1610         pr_debug("\b\b] modes [");
1611         for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1612                 if (MMC_CAP(mode) & caps)
1613                         pr_debug("%s, ", mmc_mode_name(mode));
1614         pr_debug("\b\b]\n");
1615 }
1616 #endif
1617
1618 struct mode_width_tuning {
1619         enum bus_mode mode;
1620         uint widths;
1621 #ifdef MMC_SUPPORTS_TUNING
1622         uint tuning;
1623 #endif
1624 };
1625
1626 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1627 int mmc_voltage_to_mv(enum mmc_voltage voltage)
1628 {
1629         switch (voltage) {
1630         case MMC_SIGNAL_VOLTAGE_000: return 0;
1631         case MMC_SIGNAL_VOLTAGE_330: return 3300;
1632         case MMC_SIGNAL_VOLTAGE_180: return 1800;
1633         case MMC_SIGNAL_VOLTAGE_120: return 1200;
1634         }
1635         return -EINVAL;
1636 }
1637
1638 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1639 {
1640         int err;
1641
1642         if (mmc->signal_voltage == signal_voltage)
1643                 return 0;
1644
1645         mmc->signal_voltage = signal_voltage;
1646         err = mmc_set_ios(mmc);
1647         if (err)
1648                 pr_debug("unable to set voltage (err %d)\n", err);
1649
1650         return err;
1651 }
1652 #else
1653 static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1654 {
1655         return 0;
1656 }
1657 #endif
1658
1659 #if !CONFIG_IS_ENABLED(MMC_TINY)
1660 static const struct mode_width_tuning sd_modes_by_pref[] = {
1661 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1662 #ifdef MMC_SUPPORTS_TUNING
1663         {
1664                 .mode = UHS_SDR104,
1665                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1666                 .tuning = MMC_CMD_SEND_TUNING_BLOCK
1667         },
1668 #endif
1669         {
1670                 .mode = UHS_SDR50,
1671                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1672         },
1673         {
1674                 .mode = UHS_DDR50,
1675                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1676         },
1677         {
1678                 .mode = UHS_SDR25,
1679                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1680         },
1681 #endif
1682         {
1683                 .mode = SD_HS,
1684                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1685         },
1686 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1687         {
1688                 .mode = UHS_SDR12,
1689                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1690         },
1691 #endif
1692         {
1693                 .mode = SD_LEGACY,
1694                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1695         }
1696 };
1697
1698 #define for_each_sd_mode_by_pref(caps, mwt) \
1699         for (mwt = sd_modes_by_pref;\
1700              mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\
1701              mwt++) \
1702                 if (caps & MMC_CAP(mwt->mode))
1703
1704 static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
1705 {
1706         int err;
1707         uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT};
1708         const struct mode_width_tuning *mwt;
1709 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1710         bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false;
1711 #else
1712         bool uhs_en = false;
1713 #endif
1714         uint caps;
1715
1716 #ifdef DEBUG
1717         mmc_dump_capabilities("sd card", card_caps);
1718         mmc_dump_capabilities("host", mmc->host_caps);
1719 #endif
1720
1721         /* Restrict card's capabilities by what the host can do */
1722         caps = card_caps & mmc->host_caps;
1723
1724         if (!uhs_en)
1725                 caps &= ~UHS_CAPS;
1726
1727         for_each_sd_mode_by_pref(caps, mwt) {
1728                 uint *w;
1729
1730                 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
1731                         if (*w & caps & mwt->widths) {
1732                                 pr_debug("trying mode %s width %d (at %d MHz)\n",
1733                                          mmc_mode_name(mwt->mode),
1734                                          bus_width(*w),
1735                                          mmc_mode2freq(mmc, mwt->mode) / 1000000);
1736
1737                                 /* configure the bus width (card + host) */
1738                                 err = sd_select_bus_width(mmc, bus_width(*w));
1739                                 if (err)
1740                                         goto error;
1741                                 mmc_set_bus_width(mmc, bus_width(*w));
1742
1743                                 /* configure the bus mode (card) */
1744                                 err = sd_set_card_speed(mmc, mwt->mode);
1745                                 if (err)
1746                                         goto error;
1747
1748                                 /* configure the bus mode (host) */
1749                                 mmc_select_mode(mmc, mwt->mode);
1750                                 mmc_set_clock(mmc, mmc->tran_speed,
1751                                                 MMC_CLK_ENABLE);
1752
1753 #ifdef MMC_SUPPORTS_TUNING
1754                                 /* execute tuning if needed */
1755                                 if (mwt->tuning && !mmc_host_is_spi(mmc)) {
1756                                         err = mmc_execute_tuning(mmc,
1757                                                                  mwt->tuning);
1758                                         if (err) {
1759                                                 pr_debug("tuning failed\n");
1760                                                 goto error;
1761                                         }
1762                                 }
1763 #endif
1764
1765 #if CONFIG_IS_ENABLED(MMC_WRITE)
1766                                 err = sd_read_ssr(mmc);
1767                                 if (err)
1768                                         pr_warn("unable to read ssr\n");
1769 #endif
1770                                 if (!err)
1771                                         return 0;
1772
1773 error:
1774                                 /* revert to a safer bus speed */
1775                                 mmc_select_mode(mmc, SD_LEGACY);
1776                                 mmc_set_clock(mmc, mmc->tran_speed,
1777                                                 MMC_CLK_ENABLE);
1778                         }
1779                 }
1780         }
1781
1782         pr_err("unable to select a mode\n");
1783         return -ENOTSUPP;
1784 }
1785
1786 /*
1787  * read the compare the part of ext csd that is constant.
1788  * This can be used to check that the transfer is working
1789  * as expected.
1790  */
1791 static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
1792 {
1793         int err;
1794         const u8 *ext_csd = mmc->ext_csd;
1795         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1796
1797         if (mmc->version < MMC_VERSION_4)
1798                 return 0;
1799
1800         err = mmc_send_ext_csd(mmc, test_csd);
1801         if (err)
1802                 return err;
1803
1804         /* Only compare read only fields */
1805         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1806                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1807             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1808                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1809             ext_csd[EXT_CSD_REV]
1810                 == test_csd[EXT_CSD_REV] &&
1811             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1812                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1813             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1814                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1815                 return 0;
1816
1817         return -EBADMSG;
1818 }
1819
1820 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1821 static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1822                                   uint32_t allowed_mask)
1823 {
1824         u32 card_mask = 0;
1825
1826         switch (mode) {
1827         case MMC_HS_400:
1828         case MMC_HS_200:
1829                 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_8V |
1830                     EXT_CSD_CARD_TYPE_HS400_1_8V))
1831                         card_mask |= MMC_SIGNAL_VOLTAGE_180;
1832                 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
1833                     EXT_CSD_CARD_TYPE_HS400_1_2V))
1834                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1835                 break;
1836         case MMC_DDR_52:
1837                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
1838                         card_mask |= MMC_SIGNAL_VOLTAGE_330 |
1839                                      MMC_SIGNAL_VOLTAGE_180;
1840                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V)
1841                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1842                 break;
1843         default:
1844                 card_mask |= MMC_SIGNAL_VOLTAGE_330;
1845                 break;
1846         }
1847
1848         while (card_mask & allowed_mask) {
1849                 enum mmc_voltage best_match;
1850
1851                 best_match = 1 << (ffs(card_mask & allowed_mask) - 1);
1852                 if (!mmc_set_signal_voltage(mmc,  best_match))
1853                         return 0;
1854
1855                 allowed_mask &= ~best_match;
1856         }
1857
1858         return -ENOTSUPP;
1859 }
1860 #else
1861 static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1862                                          uint32_t allowed_mask)
1863 {
1864         return 0;
1865 }
1866 #endif
1867
1868 static const struct mode_width_tuning mmc_modes_by_pref[] = {
1869 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1870         {
1871                 .mode = MMC_HS_400,
1872                 .widths = MMC_MODE_8BIT,
1873                 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1874         },
1875 #endif
1876 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
1877         {
1878                 .mode = MMC_HS_200,
1879                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1880                 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1881         },
1882 #endif
1883         {
1884                 .mode = MMC_DDR_52,
1885                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1886         },
1887         {
1888                 .mode = MMC_HS_52,
1889                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1890         },
1891         {
1892                 .mode = MMC_HS,
1893                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1894         },
1895         {
1896                 .mode = MMC_LEGACY,
1897                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1898         }
1899 };
1900
1901 #define for_each_mmc_mode_by_pref(caps, mwt) \
1902         for (mwt = mmc_modes_by_pref;\
1903             mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\
1904             mwt++) \
1905                 if (caps & MMC_CAP(mwt->mode))
1906
1907 static const struct ext_csd_bus_width {
1908         uint cap;
1909         bool is_ddr;
1910         uint ext_csd_bits;
1911 } ext_csd_bus_width[] = {
1912         {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8},
1913         {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4},
1914         {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8},
1915         {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4},
1916         {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1},
1917 };
1918
1919 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1920 static int mmc_select_hs400(struct mmc *mmc)
1921 {
1922         int err;
1923
1924         /* Set timing to HS200 for tuning */
1925         err = mmc_set_card_speed(mmc, MMC_HS_200, false);
1926         if (err)
1927                 return err;
1928
1929         /* configure the bus mode (host) */
1930         mmc_select_mode(mmc, MMC_HS_200);
1931         mmc_set_clock(mmc, mmc->tran_speed, false);
1932
1933         /* execute tuning if needed */
1934         err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200);
1935         if (err) {
1936                 debug("tuning failed\n");
1937                 return err;
1938         }
1939
1940         /* Set back to HS */
1941         mmc_set_card_speed(mmc, MMC_HS, true);
1942
1943         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
1944                          EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG);
1945         if (err)
1946                 return err;
1947
1948         err = mmc_set_card_speed(mmc, MMC_HS_400, false);
1949         if (err)
1950                 return err;
1951
1952         mmc_select_mode(mmc, MMC_HS_400);
1953         err = mmc_set_clock(mmc, mmc->tran_speed, false);
1954         if (err)
1955                 return err;
1956
1957         return 0;
1958 }
1959 #else
1960 static int mmc_select_hs400(struct mmc *mmc)
1961 {
1962         return -ENOTSUPP;
1963 }
1964 #endif
1965
1966 #define for_each_supported_width(caps, ddr, ecbv) \
1967         for (ecbv = ext_csd_bus_width;\
1968             ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\
1969             ecbv++) \
1970                 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap))
1971
1972 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
1973 {
1974         int err;
1975         const struct mode_width_tuning *mwt;
1976         const struct ext_csd_bus_width *ecbw;
1977
1978 #ifdef DEBUG
1979         mmc_dump_capabilities("mmc", card_caps);
1980         mmc_dump_capabilities("host", mmc->host_caps);
1981 #endif
1982
1983         /* Restrict card's capabilities by what the host can do */
1984         card_caps &= mmc->host_caps;
1985
1986         /* Only version 4 of MMC supports wider bus widths */
1987         if (mmc->version < MMC_VERSION_4)
1988                 return 0;
1989
1990         if (!mmc->ext_csd) {
1991                 pr_debug("No ext_csd found!\n"); /* this should enver happen */
1992                 return -ENOTSUPP;
1993         }
1994
1995 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
1996     CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1997         /*
1998          * In case the eMMC is in HS200/HS400 mode, downgrade to HS mode
1999          * before doing anything else, since a transition from either of
2000          * the HS200/HS400 mode directly to legacy mode is not supported.
2001          */
2002         if (mmc->selected_mode == MMC_HS_200 ||
2003             mmc->selected_mode == MMC_HS_400)
2004                 mmc_set_card_speed(mmc, MMC_HS, true);
2005         else
2006 #endif
2007                 mmc_set_clock(mmc, mmc->legacy_speed, MMC_CLK_ENABLE);
2008
2009         for_each_mmc_mode_by_pref(card_caps, mwt) {
2010                 for_each_supported_width(card_caps & mwt->widths,
2011                                          mmc_is_mode_ddr(mwt->mode), ecbw) {
2012                         enum mmc_voltage old_voltage;
2013                         pr_debug("trying mode %s width %d (at %d MHz)\n",
2014                                  mmc_mode_name(mwt->mode),
2015                                  bus_width(ecbw->cap),
2016                                  mmc_mode2freq(mmc, mwt->mode) / 1000000);
2017                         old_voltage = mmc->signal_voltage;
2018                         err = mmc_set_lowest_voltage(mmc, mwt->mode,
2019                                                      MMC_ALL_SIGNAL_VOLTAGE);
2020                         if (err)
2021                                 continue;
2022
2023                         /* configure the bus width (card + host) */
2024                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2025                                     EXT_CSD_BUS_WIDTH,
2026                                     ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG);
2027                         if (err)
2028                                 goto error;
2029                         mmc_set_bus_width(mmc, bus_width(ecbw->cap));
2030
2031                         if (mwt->mode == MMC_HS_400) {
2032                                 err = mmc_select_hs400(mmc);
2033                                 if (err) {
2034                                         printf("Select HS400 failed %d\n", err);
2035                                         goto error;
2036                                 }
2037                         } else {
2038                                 /* configure the bus speed (card) */
2039                                 err = mmc_set_card_speed(mmc, mwt->mode, false);
2040                                 if (err)
2041                                         goto error;
2042
2043                                 /*
2044                                  * configure the bus width AND the ddr mode
2045                                  * (card). The host side will be taken care
2046                                  * of in the next step
2047                                  */
2048                                 if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) {
2049                                         err = mmc_switch(mmc,
2050                                                          EXT_CSD_CMD_SET_NORMAL,
2051                                                          EXT_CSD_BUS_WIDTH,
2052                                                          ecbw->ext_csd_bits);
2053                                         if (err)
2054                                                 goto error;
2055                                 }
2056
2057                                 /* configure the bus mode (host) */
2058                                 mmc_select_mode(mmc, mwt->mode);
2059                                 mmc_set_clock(mmc, mmc->tran_speed,
2060                                               MMC_CLK_ENABLE);
2061 #ifdef MMC_SUPPORTS_TUNING
2062
2063                                 /* execute tuning if needed */
2064                                 if (mwt->tuning) {
2065                                         err = mmc_execute_tuning(mmc,
2066                                                                  mwt->tuning);
2067                                         if (err) {
2068                                                 pr_debug("tuning failed\n");
2069                                                 goto error;
2070                                         }
2071                                 }
2072 #endif
2073                         }
2074
2075                         /* do a transfer to check the configuration */
2076                         err = mmc_read_and_compare_ext_csd(mmc);
2077                         if (!err)
2078                                 return 0;
2079 error:
2080                         mmc_set_signal_voltage(mmc, old_voltage);
2081                         /* if an error occured, revert to a safer bus mode */
2082                         mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2083                                    EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1);
2084                         mmc_select_mode(mmc, MMC_LEGACY);
2085                         mmc_set_bus_width(mmc, 1);
2086                 }
2087         }
2088
2089         pr_err("unable to select a mode\n");
2090
2091         return -ENOTSUPP;
2092 }
2093 #endif
2094
2095 #if CONFIG_IS_ENABLED(MMC_TINY)
2096 DEFINE_CACHE_ALIGN_BUFFER(u8, ext_csd_bkup, MMC_MAX_BLOCK_LEN);
2097 #endif
2098
2099 static int mmc_startup_v4(struct mmc *mmc)
2100 {
2101         int err, i;
2102         u64 capacity;
2103         bool has_parts = false;
2104         bool part_completed;
2105         static const u32 mmc_versions[] = {
2106                 MMC_VERSION_4,
2107                 MMC_VERSION_4_1,
2108                 MMC_VERSION_4_2,
2109                 MMC_VERSION_4_3,
2110                 MMC_VERSION_4_4,
2111                 MMC_VERSION_4_41,
2112                 MMC_VERSION_4_5,
2113                 MMC_VERSION_5_0,
2114                 MMC_VERSION_5_1
2115         };
2116
2117 #if CONFIG_IS_ENABLED(MMC_TINY)
2118         u8 *ext_csd = ext_csd_bkup;
2119
2120         if (IS_SD(mmc) || mmc->version < MMC_VERSION_4)
2121                 return 0;
2122
2123         if (!mmc->ext_csd)
2124                 memset(ext_csd_bkup, 0, sizeof(ext_csd_bkup));
2125
2126         err = mmc_send_ext_csd(mmc, ext_csd);
2127         if (err)
2128                 goto error;
2129
2130         /* store the ext csd for future reference */
2131         if (!mmc->ext_csd)
2132                 mmc->ext_csd = ext_csd;
2133 #else
2134         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2135
2136         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
2137                 return 0;
2138
2139         /* check  ext_csd version and capacity */
2140         err = mmc_send_ext_csd(mmc, ext_csd);
2141         if (err)
2142                 goto error;
2143
2144         /* store the ext csd for future reference */
2145         if (!mmc->ext_csd)
2146                 mmc->ext_csd = malloc(MMC_MAX_BLOCK_LEN);
2147         if (!mmc->ext_csd)
2148                 return -ENOMEM;
2149         memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN);
2150 #endif
2151         if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions))
2152                 return -EINVAL;
2153
2154         mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]];
2155
2156         if (mmc->version >= MMC_VERSION_4_2) {
2157                 /*
2158                  * According to the JEDEC Standard, the value of
2159                  * ext_csd's capacity is valid if the value is more
2160                  * than 2GB
2161                  */
2162                 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
2163                                 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
2164                                 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
2165                                 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
2166                 capacity *= MMC_MAX_BLOCK_LEN;
2167                 if ((capacity >> 20) > 2 * 1024)
2168                         mmc->capacity_user = capacity;
2169         }
2170
2171         if (mmc->version >= MMC_VERSION_4_5)
2172                 mmc->gen_cmd6_time = ext_csd[EXT_CSD_GENERIC_CMD6_TIME];
2173
2174         /* The partition data may be non-zero but it is only
2175          * effective if PARTITION_SETTING_COMPLETED is set in
2176          * EXT_CSD, so ignore any data if this bit is not set,
2177          * except for enabling the high-capacity group size
2178          * definition (see below).
2179          */
2180         part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
2181                             EXT_CSD_PARTITION_SETTING_COMPLETED);
2182
2183         mmc->part_switch_time = ext_csd[EXT_CSD_PART_SWITCH_TIME];
2184         /* Some eMMC set the value too low so set a minimum */
2185         if (mmc->part_switch_time < MMC_MIN_PART_SWITCH_TIME && mmc->part_switch_time)
2186                 mmc->part_switch_time = MMC_MIN_PART_SWITCH_TIME;
2187
2188         /* store the partition info of emmc */
2189         mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
2190         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
2191             ext_csd[EXT_CSD_BOOT_MULT])
2192                 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
2193         if (part_completed &&
2194             (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
2195                 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
2196
2197         mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
2198
2199         mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
2200
2201         for (i = 0; i < 4; i++) {
2202                 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
2203                 uint mult = (ext_csd[idx + 2] << 16) +
2204                         (ext_csd[idx + 1] << 8) + ext_csd[idx];
2205                 if (mult)
2206                         has_parts = true;
2207                 if (!part_completed)
2208                         continue;
2209                 mmc->capacity_gp[i] = mult;
2210                 mmc->capacity_gp[i] *=
2211                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2212                 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2213                 mmc->capacity_gp[i] <<= 19;
2214         }
2215
2216 #ifndef CONFIG_SPL_BUILD
2217         if (part_completed) {
2218                 mmc->enh_user_size =
2219                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
2220                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
2221                         ext_csd[EXT_CSD_ENH_SIZE_MULT];
2222                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2223                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2224                 mmc->enh_user_size <<= 19;
2225                 mmc->enh_user_start =
2226                         (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
2227                         (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
2228                         (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
2229                         ext_csd[EXT_CSD_ENH_START_ADDR];
2230                 if (mmc->high_capacity)
2231                         mmc->enh_user_start <<= 9;
2232         }
2233 #endif
2234
2235         /*
2236          * Host needs to enable ERASE_GRP_DEF bit if device is
2237          * partitioned. This bit will be lost every time after a reset
2238          * or power off. This will affect erase size.
2239          */
2240         if (part_completed)
2241                 has_parts = true;
2242         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
2243             (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
2244                 has_parts = true;
2245         if (has_parts) {
2246                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2247                                  EXT_CSD_ERASE_GROUP_DEF, 1);
2248
2249                 if (err)
2250                         goto error;
2251
2252                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
2253         }
2254
2255         if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
2256 #if CONFIG_IS_ENABLED(MMC_WRITE)
2257                 /* Read out group size from ext_csd */
2258                 mmc->erase_grp_size =
2259                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
2260 #endif
2261                 /*
2262                  * if high capacity and partition setting completed
2263                  * SEC_COUNT is valid even if it is smaller than 2 GiB
2264                  * JEDEC Standard JESD84-B45, 6.2.4
2265                  */
2266                 if (mmc->high_capacity && part_completed) {
2267                         capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
2268                                 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
2269                                 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
2270                                 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
2271                         capacity *= MMC_MAX_BLOCK_LEN;
2272                         mmc->capacity_user = capacity;
2273                 }
2274         }
2275 #if CONFIG_IS_ENABLED(MMC_WRITE)
2276         else {
2277                 /* Calculate the group size from the csd value. */
2278                 int erase_gsz, erase_gmul;
2279
2280                 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
2281                 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
2282                 mmc->erase_grp_size = (erase_gsz + 1)
2283                         * (erase_gmul + 1);
2284         }
2285 #endif
2286 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
2287         mmc->hc_wp_grp_size = 1024
2288                 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
2289                 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2290 #endif
2291
2292         mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
2293
2294         return 0;
2295 error:
2296         if (mmc->ext_csd) {
2297 #if !CONFIG_IS_ENABLED(MMC_TINY)
2298                 free(mmc->ext_csd);
2299 #endif
2300                 mmc->ext_csd = NULL;
2301         }
2302         return err;
2303 }
2304
2305 static int mmc_startup(struct mmc *mmc)
2306 {
2307         int err, i;
2308         uint mult, freq;
2309         u64 cmult, csize;
2310         struct mmc_cmd cmd;
2311         struct blk_desc *bdesc;
2312
2313 #ifdef CONFIG_MMC_SPI_CRC_ON
2314         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
2315                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
2316                 cmd.resp_type = MMC_RSP_R1;
2317                 cmd.cmdarg = 1;
2318                 err = mmc_send_cmd(mmc, &cmd, NULL);
2319                 if (err)
2320                         return err;
2321         }
2322 #endif
2323
2324         /* Put the Card in Identify Mode */
2325         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
2326                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
2327         cmd.resp_type = MMC_RSP_R2;
2328         cmd.cmdarg = 0;
2329
2330         err = mmc_send_cmd(mmc, &cmd, NULL);
2331
2332 #ifdef CONFIG_MMC_QUIRKS
2333         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) {
2334                 int retries = 4;
2335                 /*
2336                  * It has been seen that SEND_CID may fail on the first
2337                  * attempt, let's try a few more time
2338                  */
2339                 do {
2340                         err = mmc_send_cmd(mmc, &cmd, NULL);
2341                         if (!err)
2342                                 break;
2343                 } while (retries--);
2344         }
2345 #endif
2346
2347         if (err)
2348                 return err;
2349
2350         memcpy(mmc->cid, cmd.response, 16);
2351
2352         /*
2353          * For MMC cards, set the Relative Address.
2354          * For SD cards, get the Relatvie Address.
2355          * This also puts the cards into Standby State
2356          */
2357         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2358                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
2359                 cmd.cmdarg = mmc->rca << 16;
2360                 cmd.resp_type = MMC_RSP_R6;
2361
2362                 err = mmc_send_cmd(mmc, &cmd, NULL);
2363
2364                 if (err)
2365                         return err;
2366
2367                 if (IS_SD(mmc))
2368                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
2369         }
2370
2371         /* Get the Card-Specific Data */
2372         cmd.cmdidx = MMC_CMD_SEND_CSD;
2373         cmd.resp_type = MMC_RSP_R2;
2374         cmd.cmdarg = mmc->rca << 16;
2375
2376         err = mmc_send_cmd(mmc, &cmd, NULL);
2377
2378         if (err)
2379                 return err;
2380
2381         mmc->csd[0] = cmd.response[0];
2382         mmc->csd[1] = cmd.response[1];
2383         mmc->csd[2] = cmd.response[2];
2384         mmc->csd[3] = cmd.response[3];
2385
2386         if (mmc->version == MMC_VERSION_UNKNOWN) {
2387                 int version = (cmd.response[0] >> 26) & 0xf;
2388
2389                 switch (version) {
2390                 case 0:
2391                         mmc->version = MMC_VERSION_1_2;
2392                         break;
2393                 case 1:
2394                         mmc->version = MMC_VERSION_1_4;
2395                         break;
2396                 case 2:
2397                         mmc->version = MMC_VERSION_2_2;
2398                         break;
2399                 case 3:
2400                         mmc->version = MMC_VERSION_3;
2401                         break;
2402                 case 4:
2403                         mmc->version = MMC_VERSION_4;
2404                         break;
2405                 default:
2406                         mmc->version = MMC_VERSION_1_2;
2407                         break;
2408                 }
2409         }
2410
2411         /* divide frequency by 10, since the mults are 10x bigger */
2412         freq = fbase[(cmd.response[0] & 0x7)];
2413         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
2414
2415         mmc->legacy_speed = freq * mult;
2416         mmc_select_mode(mmc, MMC_LEGACY);
2417
2418         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
2419         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
2420 #if CONFIG_IS_ENABLED(MMC_WRITE)
2421
2422         if (IS_SD(mmc))
2423                 mmc->write_bl_len = mmc->read_bl_len;
2424         else
2425                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
2426 #endif
2427
2428         if (mmc->high_capacity) {
2429                 csize = (mmc->csd[1] & 0x3f) << 16
2430                         | (mmc->csd[2] & 0xffff0000) >> 16;
2431                 cmult = 8;
2432         } else {
2433                 csize = (mmc->csd[1] & 0x3ff) << 2
2434                         | (mmc->csd[2] & 0xc0000000) >> 30;
2435                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
2436         }
2437
2438         mmc->capacity_user = (csize + 1) << (cmult + 2);
2439         mmc->capacity_user *= mmc->read_bl_len;
2440         mmc->capacity_boot = 0;
2441         mmc->capacity_rpmb = 0;
2442         for (i = 0; i < 4; i++)
2443                 mmc->capacity_gp[i] = 0;
2444
2445         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
2446                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2447
2448 #if CONFIG_IS_ENABLED(MMC_WRITE)
2449         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
2450                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2451 #endif
2452
2453         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
2454                 cmd.cmdidx = MMC_CMD_SET_DSR;
2455                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
2456                 cmd.resp_type = MMC_RSP_NONE;
2457                 if (mmc_send_cmd(mmc, &cmd, NULL))
2458                         pr_warn("MMC: SET_DSR failed\n");
2459         }
2460
2461         /* Select the card, and put it into Transfer Mode */
2462         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2463                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
2464                 cmd.resp_type = MMC_RSP_R1;
2465                 cmd.cmdarg = mmc->rca << 16;
2466                 err = mmc_send_cmd(mmc, &cmd, NULL);
2467
2468                 if (err)
2469                         return err;
2470         }
2471
2472         /*
2473          * For SD, its erase group is always one sector
2474          */
2475 #if CONFIG_IS_ENABLED(MMC_WRITE)
2476         mmc->erase_grp_size = 1;
2477 #endif
2478         mmc->part_config = MMCPART_NOAVAILABLE;
2479
2480         err = mmc_startup_v4(mmc);
2481         if (err)
2482                 return err;
2483
2484         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
2485         if (err)
2486                 return err;
2487
2488 #if CONFIG_IS_ENABLED(MMC_TINY)
2489         mmc_set_clock(mmc, mmc->legacy_speed, false);
2490         mmc_select_mode(mmc, IS_SD(mmc) ? SD_LEGACY : MMC_LEGACY);
2491         mmc_set_bus_width(mmc, 1);
2492 #else
2493         if (IS_SD(mmc)) {
2494                 err = sd_get_capabilities(mmc);
2495                 if (err)
2496                         return err;
2497                 err = sd_select_mode_and_width(mmc, mmc->card_caps);
2498         } else {
2499                 err = mmc_get_capabilities(mmc);
2500                 if (err)
2501                         return err;
2502                 mmc_select_mode_and_width(mmc, mmc->card_caps);
2503         }
2504 #endif
2505         if (err)
2506                 return err;
2507
2508         mmc->best_mode = mmc->selected_mode;
2509
2510         /* Fix the block length for DDR mode */
2511         if (mmc->ddr_mode) {
2512                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2513 #if CONFIG_IS_ENABLED(MMC_WRITE)
2514                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2515 #endif
2516         }
2517
2518         /* fill in device description */
2519         bdesc = mmc_get_blk_desc(mmc);
2520         bdesc->lun = 0;
2521         bdesc->hwpart = 0;
2522         bdesc->type = 0;
2523         bdesc->blksz = mmc->read_bl_len;
2524         bdesc->log2blksz = LOG2(bdesc->blksz);
2525         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
2526 #if !defined(CONFIG_SPL_BUILD) || \
2527                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
2528                 !defined(CONFIG_USE_TINY_PRINTF))
2529         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
2530                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
2531                 (mmc->cid[3] >> 16) & 0xffff);
2532         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
2533                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
2534                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
2535                 (mmc->cid[2] >> 24) & 0xff);
2536         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
2537                 (mmc->cid[2] >> 16) & 0xf);
2538 #else
2539         bdesc->vendor[0] = 0;
2540         bdesc->product[0] = 0;
2541         bdesc->revision[0] = 0;
2542 #endif
2543
2544 #if !defined(CONFIG_DM_MMC) && (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT))
2545         part_init(bdesc);
2546 #endif
2547
2548         return 0;
2549 }
2550
2551 static int mmc_send_if_cond(struct mmc *mmc)
2552 {
2553         struct mmc_cmd cmd;
2554         int err;
2555
2556         cmd.cmdidx = SD_CMD_SEND_IF_COND;
2557         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
2558         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
2559         cmd.resp_type = MMC_RSP_R7;
2560
2561         err = mmc_send_cmd(mmc, &cmd, NULL);
2562
2563         if (err)
2564                 return err;
2565
2566         if ((cmd.response[0] & 0xff) != 0xaa)
2567                 return -EOPNOTSUPP;
2568         else
2569                 mmc->version = SD_VERSION_2;
2570
2571         return 0;
2572 }
2573
2574 #if !CONFIG_IS_ENABLED(DM_MMC)
2575 /* board-specific MMC power initializations. */
2576 __weak void board_mmc_power_init(void)
2577 {
2578 }
2579 #endif
2580
2581 static int mmc_power_init(struct mmc *mmc)
2582 {
2583 #if CONFIG_IS_ENABLED(DM_MMC)
2584 #if CONFIG_IS_ENABLED(DM_REGULATOR)
2585         int ret;
2586
2587         ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
2588                                           &mmc->vmmc_supply);
2589         if (ret)
2590                 pr_debug("%s: No vmmc supply\n", mmc->dev->name);
2591
2592         ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
2593                                           &mmc->vqmmc_supply);
2594         if (ret)
2595                 pr_debug("%s: No vqmmc supply\n", mmc->dev->name);
2596 #endif
2597 #else /* !CONFIG_DM_MMC */
2598         /*
2599          * Driver model should use a regulator, as above, rather than calling
2600          * out to board code.
2601          */
2602         board_mmc_power_init();
2603 #endif
2604         return 0;
2605 }
2606
2607 /*
2608  * put the host in the initial state:
2609  * - turn on Vdd (card power supply)
2610  * - configure the bus width and clock to minimal values
2611  */
2612 static void mmc_set_initial_state(struct mmc *mmc)
2613 {
2614         int err;
2615
2616         /* First try to set 3.3V. If it fails set to 1.8V */
2617         err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
2618         if (err != 0)
2619                 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
2620         if (err != 0)
2621                 pr_warn("mmc: failed to set signal voltage\n");
2622
2623         mmc_select_mode(mmc, MMC_LEGACY);
2624         mmc_set_bus_width(mmc, 1);
2625         mmc_set_clock(mmc, 0, MMC_CLK_ENABLE);
2626 }
2627
2628 static int mmc_power_on(struct mmc *mmc)
2629 {
2630 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2631         if (mmc->vmmc_supply) {
2632                 int ret = regulator_set_enable(mmc->vmmc_supply, true);
2633
2634                 if (ret) {
2635                         puts("Error enabling VMMC supply\n");
2636                         return ret;
2637                 }
2638         }
2639 #endif
2640         return 0;
2641 }
2642
2643 static int mmc_power_off(struct mmc *mmc)
2644 {
2645         mmc_set_clock(mmc, 0, MMC_CLK_DISABLE);
2646 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2647         if (mmc->vmmc_supply) {
2648                 int ret = regulator_set_enable(mmc->vmmc_supply, false);
2649
2650                 if (ret) {
2651                         pr_debug("Error disabling VMMC supply\n");
2652                         return ret;
2653                 }
2654         }
2655 #endif
2656         return 0;
2657 }
2658
2659 static int mmc_power_cycle(struct mmc *mmc)
2660 {
2661         int ret;
2662
2663         ret = mmc_power_off(mmc);
2664         if (ret)
2665                 return ret;
2666         /*
2667          * SD spec recommends at least 1ms of delay. Let's wait for 2ms
2668          * to be on the safer side.
2669          */
2670         udelay(2000);
2671         return mmc_power_on(mmc);
2672 }
2673
2674 int mmc_get_op_cond(struct mmc *mmc)
2675 {
2676         bool uhs_en = supports_uhs(mmc->cfg->host_caps);
2677         int err;
2678
2679         if (mmc->has_init)
2680                 return 0;
2681
2682 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
2683         mmc_adapter_card_type_ident();
2684 #endif
2685         err = mmc_power_init(mmc);
2686         if (err)
2687                 return err;
2688
2689 #ifdef CONFIG_MMC_QUIRKS
2690         mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN |
2691                       MMC_QUIRK_RETRY_SEND_CID;
2692 #endif
2693
2694         err = mmc_power_cycle(mmc);
2695         if (err) {
2696                 /*
2697                  * if power cycling is not supported, we should not try
2698                  * to use the UHS modes, because we wouldn't be able to
2699                  * recover from an error during the UHS initialization.
2700                  */
2701                 pr_debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
2702                 uhs_en = false;
2703                 mmc->host_caps &= ~UHS_CAPS;
2704                 err = mmc_power_on(mmc);
2705         }
2706         if (err)
2707                 return err;
2708
2709 #if CONFIG_IS_ENABLED(DM_MMC)
2710         /* The device has already been probed ready for use */
2711 #else
2712         /* made sure it's not NULL earlier */
2713         err = mmc->cfg->ops->init(mmc);
2714         if (err)
2715                 return err;
2716 #endif
2717         mmc->ddr_mode = 0;
2718
2719 retry:
2720         mmc_set_initial_state(mmc);
2721
2722         /* Reset the Card */
2723         err = mmc_go_idle(mmc);
2724
2725         if (err)
2726                 return err;
2727
2728         /* The internal partition reset to user partition(0) at every CMD0*/
2729         mmc_get_blk_desc(mmc)->hwpart = 0;
2730
2731         /* Test for SD version 2 */
2732         err = mmc_send_if_cond(mmc);
2733
2734         /* Now try to get the SD card's operating condition */
2735         err = sd_send_op_cond(mmc, uhs_en);
2736         if (err && uhs_en) {
2737                 uhs_en = false;
2738                 mmc_power_cycle(mmc);
2739                 goto retry;
2740         }
2741
2742         /* If the command timed out, we check for an MMC card */
2743         if (err == -ETIMEDOUT) {
2744                 err = mmc_send_op_cond(mmc);
2745
2746                 if (err) {
2747 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2748                         pr_err("Card did not respond to voltage select!\n");
2749 #endif
2750                         return -EOPNOTSUPP;
2751                 }
2752         }
2753
2754         return err;
2755 }
2756
2757 int mmc_start_init(struct mmc *mmc)
2758 {
2759         bool no_card;
2760         int err = 0;
2761
2762         /*
2763          * all hosts are capable of 1 bit bus-width and able to use the legacy
2764          * timings.
2765          */
2766         mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(SD_LEGACY) |
2767                          MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT;
2768
2769 #if !defined(CONFIG_MMC_BROKEN_CD)
2770         /* we pretend there's no card when init is NULL */
2771         no_card = mmc_getcd(mmc) == 0;
2772 #else
2773         no_card = 0;
2774 #endif
2775 #if !CONFIG_IS_ENABLED(DM_MMC)
2776         no_card = no_card || (mmc->cfg->ops->init == NULL);
2777 #endif
2778         if (no_card) {
2779                 mmc->has_init = 0;
2780 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2781                 pr_err("MMC: no card present\n");
2782 #endif
2783                 return -ENOMEDIUM;
2784         }
2785
2786         err = mmc_get_op_cond(mmc);
2787
2788         if (!err)
2789                 mmc->init_in_progress = 1;
2790
2791         return err;
2792 }
2793
2794 static int mmc_complete_init(struct mmc *mmc)
2795 {
2796         int err = 0;
2797
2798         mmc->init_in_progress = 0;
2799         if (mmc->op_cond_pending)
2800                 err = mmc_complete_op_cond(mmc);
2801
2802         if (!err)
2803                 err = mmc_startup(mmc);
2804         if (err)
2805                 mmc->has_init = 0;
2806         else
2807                 mmc->has_init = 1;
2808         return err;
2809 }
2810
2811 int mmc_init(struct mmc *mmc)
2812 {
2813         int err = 0;
2814         __maybe_unused ulong start;
2815 #if CONFIG_IS_ENABLED(DM_MMC)
2816         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
2817
2818         upriv->mmc = mmc;
2819 #endif
2820         if (mmc->has_init)
2821                 return 0;
2822
2823         start = get_timer(0);
2824
2825         if (!mmc->init_in_progress)
2826                 err = mmc_start_init(mmc);
2827
2828         if (!err)
2829                 err = mmc_complete_init(mmc);
2830         if (err)
2831                 pr_info("%s: %d, time %lu\n", __func__, err, get_timer(start));
2832
2833         return err;
2834 }
2835
2836 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
2837     CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
2838     CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
2839 int mmc_deinit(struct mmc *mmc)
2840 {
2841         u32 caps_filtered;
2842
2843         if (!mmc->has_init)
2844                 return 0;
2845
2846         if (IS_SD(mmc)) {
2847                 caps_filtered = mmc->card_caps &
2848                         ~(MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) |
2849                           MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_DDR50) |
2850                           MMC_CAP(UHS_SDR104));
2851
2852                 return sd_select_mode_and_width(mmc, caps_filtered);
2853         } else {
2854                 caps_filtered = mmc->card_caps &
2855                         ~(MMC_CAP(MMC_HS_200) | MMC_CAP(MMC_HS_400));
2856
2857                 return mmc_select_mode_and_width(mmc, caps_filtered);
2858         }
2859 }
2860 #endif
2861
2862 int mmc_set_dsr(struct mmc *mmc, u16 val)
2863 {
2864         mmc->dsr = val;
2865         return 0;
2866 }
2867
2868 /* CPU-specific MMC initializations */
2869 __weak int cpu_mmc_init(bd_t *bis)
2870 {
2871         return -1;
2872 }
2873
2874 /* board-specific MMC initializations. */
2875 __weak int board_mmc_init(bd_t *bis)
2876 {
2877         return -1;
2878 }
2879
2880 void mmc_set_preinit(struct mmc *mmc, int preinit)
2881 {
2882         mmc->preinit = preinit;
2883 }
2884
2885 #if CONFIG_IS_ENABLED(DM_MMC)
2886 static int mmc_probe(bd_t *bis)
2887 {
2888         int ret, i;
2889         struct uclass *uc;
2890         struct udevice *dev;
2891
2892         ret = uclass_get(UCLASS_MMC, &uc);
2893         if (ret)
2894                 return ret;
2895
2896         /*
2897          * Try to add them in sequence order. Really with driver model we
2898          * should allow holes, but the current MMC list does not allow that.
2899          * So if we request 0, 1, 3 we will get 0, 1, 2.
2900          */
2901         for (i = 0; ; i++) {
2902                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
2903                 if (ret == -ENODEV)
2904                         break;
2905         }
2906         uclass_foreach_dev(dev, uc) {
2907                 ret = device_probe(dev);
2908                 if (ret)
2909                         pr_err("%s - probe failed: %d\n", dev->name, ret);
2910         }
2911
2912         return 0;
2913 }
2914 #else
2915 static int mmc_probe(bd_t *bis)
2916 {
2917         if (board_mmc_init(bis) < 0)
2918                 cpu_mmc_init(bis);
2919
2920         return 0;
2921 }
2922 #endif
2923
2924 int mmc_initialize(bd_t *bis)
2925 {
2926         static int initialized = 0;
2927         int ret;
2928         if (initialized)        /* Avoid initializing mmc multiple times */
2929                 return 0;
2930         initialized = 1;
2931
2932 #if !CONFIG_IS_ENABLED(BLK)
2933 #if !CONFIG_IS_ENABLED(MMC_TINY)
2934         mmc_list_init();
2935 #endif
2936 #endif
2937         ret = mmc_probe(bis);
2938         if (ret)
2939                 return ret;
2940
2941 #ifndef CONFIG_SPL_BUILD
2942         print_mmc_devices(',');
2943 #endif
2944
2945         mmc_do_preinit();
2946         return 0;
2947 }
2948
2949 #ifdef CONFIG_CMD_BKOPS_ENABLE
2950 int mmc_set_bkops_enable(struct mmc *mmc)
2951 {
2952         int err;
2953         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2954
2955         err = mmc_send_ext_csd(mmc, ext_csd);
2956         if (err) {
2957                 puts("Could not get ext_csd register values\n");
2958                 return err;
2959         }
2960
2961         if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
2962                 puts("Background operations not supported on device\n");
2963                 return -EMEDIUMTYPE;
2964         }
2965
2966         if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
2967                 puts("Background operations already enabled\n");
2968                 return 0;
2969         }
2970
2971         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
2972         if (err) {
2973                 puts("Failed to enable manual background operations\n");
2974                 return err;
2975         }
2976
2977         puts("Enabled manual background operations\n");
2978
2979         return 0;
2980 }
2981 #endif