drivers/mmc/mmc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2008, Freescale Semiconductor, Inc
   4  * Andy Fleming
   5  *
   6  * Based vaguely on the Linux code
   7  */
   8
   9 #include <config.h>
  10 #include <common.h>
  11 #include <blk.h>
  12 #include <command.h>
  13 #include <dm.h>
  14 #include <log.h>
  15 #include <dm/device-internal.h>
  16 #include <errno.h>
  17 #include <mmc.h>
  18 #include <part.h>
  19 #include <linux/bitops.h>
  20 #include <linux/delay.h>
  21 #include <power/regulator.h>
  22 #include <malloc.h>
  23 #include <memalign.h>
  24 #include <linux/list.h>
  25 #include <div64.h>
  26 #include "mmc_private.h"
  27
  28 #define DEFAULT_CMD6_TIMEOUT_MS  500
  29
  30 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
  31
  32 #if !CONFIG_IS_ENABLED(DM_MMC)
  33
  34 static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout_us)
  35 {
  36         return -ENOSYS;
  37 }
  38
  39 __weak int board_mmc_getwp(struct mmc *mmc)
  40 {
  41         return -1;
  42 }
  43
  44 int mmc_getwp(struct mmc *mmc)
  45 {
  46         int wp;
  47
  48         wp = board_mmc_getwp(mmc);
  49
  50         if (wp < 0) {
  51                 if (mmc->cfg->ops->getwp)
  52                         wp = mmc->cfg->ops->getwp(mmc);
  53                 else
  54                         wp = 0;
  55         }
  56
  57         return wp;
  58 }
  59
  60 __weak int board_mmc_getcd(struct mmc *mmc)
  61 {
  62         return -1;
  63 }
  64 #endif
  65
  66 #ifdef CONFIG_MMC_TRACE
  67 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
  68 {
  69         printf("CMD_SEND:%d\n", cmd->cmdidx);
  70         printf("\t\tARG\t\t\t 0x%08x\n", cmd->cmdarg);
  71 }
  72
  73 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
  74 {
  75         int i;
  76         u8 *ptr;
  77
  78         if (ret) {
  79                 printf("\t\tRET\t\t\t %d\n", ret);
  80         } else {
  81                 switch (cmd->resp_type) {
  82                 case MMC_RSP_NONE:
  83                         printf("\t\tMMC_RSP_NONE\n");
  84                         break;
  85                 case MMC_RSP_R1:
  86                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08x \n",
  87                                 cmd->response[0]);
  88                         break;
  89                 case MMC_RSP_R1b:
  90                         printf("\t\tMMC_RSP_R1b\t\t 0x%08x \n",
  91                                 cmd->response[0]);
  92                         break;
  93                 case MMC_RSP_R2:
  94                         printf("\t\tMMC_RSP_R2\t\t 0x%08x \n",
  95                                 cmd->response[0]);
  96                         printf("\t\t          \t\t 0x%08x \n",
  97                                 cmd->response[1]);
  98                         printf("\t\t          \t\t 0x%08x \n",
  99                                 cmd->response[2]);
 100                         printf("\t\t          \t\t 0x%08x \n",
 101                                 cmd->response[3]);
 102                         printf("\n");
 103                         printf("\t\t\t\t\tDUMPING DATA\n");
 104                         for (i = 0; i < 4; i++) {
 105                                 int j;
 106                                 printf("\t\t\t\t\t%03d - ", i*4);
 107                                 ptr = (u8 *)&cmd->response[i];
 108                                 ptr += 3;
 109                                 for (j = 0; j < 4; j++)
 110                                         printf("%02x ", *ptr--);
 111                                 printf("\n");
 112                         }
 113                         break;
 114                 case MMC_RSP_R3:
 115                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08x \n",
 116                                 cmd->response[0]);
 117                         break;
 118                 default:
 119                         printf("\t\tERROR MMC rsp not supported\n");
 120                         break;
 121                 }
 122         }
 123 }
 124
 125 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
 126 {
 127         int status;
 128
 129         status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
 130         printf("CURR STATE:%d\n", status);
 131 }
 132 #endif
 133
 134 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
 135 const char *mmc_mode_name(enum bus_mode mode)
 136 {
 137         static const char *const names[] = {
 138               [MMC_LEGACY]      = "MMC legacy",
 139               [MMC_HS]          = "MMC High Speed (26MHz)",
 140               [SD_HS]           = "SD High Speed (50MHz)",
 141               [UHS_SDR12]       = "UHS SDR12 (25MHz)",
 142               [UHS_SDR25]       = "UHS SDR25 (50MHz)",
 143               [UHS_SDR50]       = "UHS SDR50 (100MHz)",
 144               [UHS_SDR104]      = "UHS SDR104 (208MHz)",
 145               [UHS_DDR50]       = "UHS DDR50 (50MHz)",
 146               [MMC_HS_52]       = "MMC High Speed (52MHz)",
 147               [MMC_DDR_52]      = "MMC DDR52 (52MHz)",
 148               [MMC_HS_200]      = "HS200 (200MHz)",
 149               [MMC_HS_400]      = "HS400 (200MHz)",
 150               [MMC_HS_400_ES]   = "HS400ES (200MHz)",
 151         };
 152
 153         if (mode >= MMC_MODES_END)
 154                 return "Unknown mode";
 155         else
 156                 return names[mode];
 157 }
 158 #endif
 159
 160 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
 161 {
 162         static const int freqs[] = {
 163               [MMC_LEGACY]      = 25000000,
 164               [MMC_HS]          = 26000000,
 165               [SD_HS]           = 50000000,
 166               [MMC_HS_52]       = 52000000,
 167               [MMC_DDR_52]      = 52000000,
 168               [UHS_SDR12]       = 25000000,
 169               [UHS_SDR25]       = 50000000,
 170               [UHS_SDR50]       = 100000000,
 171               [UHS_DDR50]       = 50000000,
 172               [UHS_SDR104]      = 208000000,
 173               [MMC_HS_200]      = 200000000,
 174               [MMC_HS_400]      = 200000000,
 175               [MMC_HS_400_ES]   = 200000000,
 176         };
 177
 178         if (mode == MMC_LEGACY)
 179                 return mmc->legacy_speed;
 180         else if (mode >= MMC_MODES_END)
 181                 return 0;
 182         else
 183                 return freqs[mode];
 184 }
 185
 186 static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
 187 {
 188         mmc->selected_mode = mode;
 189         mmc->tran_speed = mmc_mode2freq(mmc, mode);
 190         mmc->ddr_mode = mmc_is_mode_ddr(mode);
 191         pr_debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
 192                  mmc->tran_speed / 1000000);
 193         return 0;
 194 }
 195
 196 #if !CONFIG_IS_ENABLED(DM_MMC)
 197 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 198 {
 199         int ret;
 200
 201         mmmc_trace_before_send(mmc, cmd);
 202         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
 203         mmmc_trace_after_send(mmc, cmd, ret);
 204
 205         return ret;
 206 }
 207 #endif
 208
 209 int mmc_send_status(struct mmc *mmc, unsigned int *status)
 210 {
 211         struct mmc_cmd cmd;
 212         int err, retries = 5;
 213
 214         cmd.cmdidx = MMC_CMD_SEND_STATUS;
 215         cmd.resp_type = MMC_RSP_R1;
 216         if (!mmc_host_is_spi(mmc))
 217                 cmd.cmdarg = mmc->rca << 16;
 218
 219         while (retries--) {
 220                 err = mmc_send_cmd(mmc, &cmd, NULL);
 221                 if (!err) {
 222                         mmc_trace_state(mmc, &cmd);
 223                         *status = cmd.response[0];
 224                         return 0;
 225                 }
 226         }
 227         mmc_trace_state(mmc, &cmd);
 228         return -ECOMM;
 229 }
 230
 231 int mmc_poll_for_busy(struct mmc *mmc, int timeout_ms)
 232 {
 233         unsigned int status;
 234         int err;
 235
 236         err = mmc_wait_dat0(mmc, 1, timeout_ms * 1000);
 237         if (err != -ENOSYS)
 238                 return err;
 239
 240         while (1) {
 241                 err = mmc_send_status(mmc, &status);
 242                 if (err)
 243                         return err;
 244
 245                 if ((status & MMC_STATUS_RDY_FOR_DATA) &&
 246                     (status & MMC_STATUS_CURR_STATE) !=
 247                      MMC_STATE_PRG)
 248                         break;
 249
 250                 if (status & MMC_STATUS_MASK) {
 251 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 252                         pr_err("Status Error: 0x%08x\n", status);
 253 #endif
 254                         return -ECOMM;
 255                 }
 256
 257                 if (timeout_ms-- <= 0)
 258                         break;
 259
 260                 udelay(1000);
 261         }
 262
 263         if (timeout_ms <= 0) {
 264 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 265                 pr_err("Timeout waiting card ready\n");
 266 #endif
 267                 return -ETIMEDOUT;
 268         }
 269
 270         return 0;
 271 }
 272
 273 int mmc_set_blocklen(struct mmc *mmc, int len)
 274 {
 275         struct mmc_cmd cmd;
 276         int err;
 277
 278         if (mmc->ddr_mode)
 279                 return 0;
 280
 281         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
 282         cmd.resp_type = MMC_RSP_R1;
 283         cmd.cmdarg = len;
 284
 285         err = mmc_send_cmd(mmc, &cmd, NULL);
 286
 287 #ifdef CONFIG_MMC_QUIRKS
 288         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) {
 289                 int retries = 4;
 290                 /*
 291                  * It has been seen that SET_BLOCKLEN may fail on the first
 292                  * attempt, let's try a few more time
 293                  */
 294                 do {
 295                         err = mmc_send_cmd(mmc, &cmd, NULL);
 296                         if (!err)
 297                                 break;
 298                 } while (retries--);
 299         }
 300 #endif
 301
 302         return err;
 303 }
 304
 305 #ifdef MMC_SUPPORTS_TUNING
 306 static const u8 tuning_blk_pattern_4bit[] = {
 307         0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
 308         0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
 309         0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
 310         0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
 311         0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
 312         0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
 313         0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
 314         0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
 315 };
 316
 317 static const u8 tuning_blk_pattern_8bit[] = {
 318         0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
 319         0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
 320         0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
 321         0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
 322         0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
 323         0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
 324         0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
 325         0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
 326         0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
 327         0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
 328         0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
 329         0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
 330         0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
 331         0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
 332         0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
 333         0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
 334 };
 335
 336 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error)
 337 {
 338         struct mmc_cmd cmd;
 339         struct mmc_data data;
 340         const u8 *tuning_block_pattern;
 341         int size, err;
 342
 343         if (mmc->bus_width == 8) {
 344                 tuning_block_pattern = tuning_blk_pattern_8bit;
 345                 size = sizeof(tuning_blk_pattern_8bit);
 346         } else if (mmc->bus_width == 4) {
 347                 tuning_block_pattern = tuning_blk_pattern_4bit;
 348                 size = sizeof(tuning_blk_pattern_4bit);
 349         } else {
 350                 return -EINVAL;
 351         }
 352
 353         ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size);
 354
 355         cmd.cmdidx = opcode;
 356         cmd.cmdarg = 0;
 357         cmd.resp_type = MMC_RSP_R1;
 358
 359         data.dest = (void *)data_buf;
 360         data.blocks = 1;
 361         data.blocksize = size;
 362         data.flags = MMC_DATA_READ;
 363
 364         err = mmc_send_cmd(mmc, &cmd, &data);
 365         if (err)
 366                 return err;
 367
 368         if (memcmp(data_buf, tuning_block_pattern, size))
 369                 return -EIO;
 370
 371         return 0;
 372 }
 373 #endif
 374
 375 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 376                            lbaint_t blkcnt)
 377 {
 378         struct mmc_cmd cmd;
 379         struct mmc_data data;
 380
 381         if (blkcnt > 1)
 382                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
 383         else
 384                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
 385
 386         if (mmc->high_capacity)
 387                 cmd.cmdarg = start;
 388         else
 389                 cmd.cmdarg = start * mmc->read_bl_len;
 390
 391         cmd.resp_type = MMC_RSP_R1;
 392
 393         data.dest = dst;
 394         data.blocks = blkcnt;
 395         data.blocksize = mmc->read_bl_len;
 396         data.flags = MMC_DATA_READ;
 397
 398         if (mmc_send_cmd(mmc, &cmd, &data))
 399                 return 0;
 400
 401         if (blkcnt > 1) {
 402                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
 403                 cmd.cmdarg = 0;
 404                 cmd.resp_type = MMC_RSP_R1b;
 405                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
 406 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 407                         pr_err("mmc fail to send stop cmd\n");
 408 #endif
 409                         return 0;
 410                 }
 411         }
 412
 413         return blkcnt;
 414 }
 415
 416 #if !CONFIG_IS_ENABLED(DM_MMC)
 417 static int mmc_get_b_max(struct mmc *mmc, void *dst, lbaint_t blkcnt)
 418 {
 419         if (mmc->cfg->ops->get_b_max)
 420                 return mmc->cfg->ops->get_b_max(mmc, dst, blkcnt);
 421         else
 422                 return mmc->cfg->b_max;
 423 }
 424 #endif
 425
 426 #if CONFIG_IS_ENABLED(BLK)
 427 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 428 #else
 429 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 430                 void *dst)
 431 #endif
 432 {
 433 #if CONFIG_IS_ENABLED(BLK)
 434         struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 435 #endif
 436         int dev_num = block_dev->devnum;
 437         int err;
 438         lbaint_t cur, blocks_todo = blkcnt;
 439         uint b_max;
 440
 441         if (blkcnt == 0)
 442                 return 0;
 443
 444         struct mmc *mmc = find_mmc_device(dev_num);
 445         if (!mmc)
 446                 return 0;
 447
 448         if (CONFIG_IS_ENABLED(MMC_TINY))
 449                 err = mmc_switch_part(mmc, block_dev->hwpart);
 450         else
 451                 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
 452
 453         if (err < 0)
 454                 return 0;
 455
 456         if ((start + blkcnt) > block_dev->lba) {
 457 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 458                 pr_err("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
 459                        start + blkcnt, block_dev->lba);
 460 #endif
 461                 return 0;
 462         }
 463
 464         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
 465                 pr_debug("%s: Failed to set blocklen\n", __func__);
 466                 return 0;
 467         }
 468
 469         b_max = mmc_get_b_max(mmc, dst, blkcnt);
 470
 471         do {
 472                 cur = (blocks_todo > b_max) ? b_max : blocks_todo;
 473                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 474                         pr_debug("%s: Failed to read blocks\n", __func__);
 475                         return 0;
 476                 }
 477                 blocks_todo -= cur;
 478                 start += cur;
 479                 dst += cur * mmc->read_bl_len;
 480         } while (blocks_todo > 0);
 481
 482         return blkcnt;
 483 }
 484
 485 static int mmc_go_idle(struct mmc *mmc)
 486 {
 487         struct mmc_cmd cmd;
 488         int err;
 489
 490         udelay(1000);
 491
 492         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
 493         cmd.cmdarg = 0;
 494         cmd.resp_type = MMC_RSP_NONE;
 495
 496         err = mmc_send_cmd(mmc, &cmd, NULL);
 497
 498         if (err)
 499                 return err;
 500
 501         udelay(2000);
 502
 503         return 0;
 504 }
 505
 506 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 507 static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
 508 {
 509         struct mmc_cmd cmd;
 510         int err = 0;
 511
 512         /*
 513          * Send CMD11 only if the request is to switch the card to
 514          * 1.8V signalling.
 515          */
 516         if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
 517                 return mmc_set_signal_voltage(mmc, signal_voltage);
 518
 519         cmd.cmdidx = SD_CMD_SWITCH_UHS18V;
 520         cmd.cmdarg = 0;
 521         cmd.resp_type = MMC_RSP_R1;
 522
 523         err = mmc_send_cmd(mmc, &cmd, NULL);
 524         if (err)
 525                 return err;
 526
 527         if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR))
 528                 return -EIO;
 529
 530         /*
 531          * The card should drive cmd and dat[0:3] low immediately
 532          * after the response of cmd11, but wait 100 us to be sure
 533          */
 534         err = mmc_wait_dat0(mmc, 0, 100);
 535         if (err == -ENOSYS)
 536                 udelay(100);
 537         else if (err)
 538                 return -ETIMEDOUT;
 539
 540         /*
 541          * During a signal voltage level switch, the clock must be gated
 542          * for 5 ms according to the SD spec
 543          */
 544         mmc_set_clock(mmc, mmc->clock, MMC_CLK_DISABLE);
 545
 546         err = mmc_set_signal_voltage(mmc, signal_voltage);
 547         if (err)
 548                 return err;
 549
 550         /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
 551         mdelay(10);
 552         mmc_set_clock(mmc, mmc->clock, MMC_CLK_ENABLE);
 553
 554         /*
 555          * Failure to switch is indicated by the card holding
 556          * dat[0:3] low. Wait for at least 1 ms according to spec
 557          */
 558         err = mmc_wait_dat0(mmc, 1, 1000);
 559         if (err == -ENOSYS)
 560                 udelay(1000);
 561         else if (err)
 562                 return -ETIMEDOUT;
 563
 564         return 0;
 565 }
 566 #endif
 567
 568 static int sd_send_op_cond(struct mmc *mmc, bool uhs_en)
 569 {
 570         int timeout = 1000;
 571         int err;
 572         struct mmc_cmd cmd;
 573
 574         while (1) {
 575                 cmd.cmdidx = MMC_CMD_APP_CMD;
 576                 cmd.resp_type = MMC_RSP_R1;
 577                 cmd.cmdarg = 0;
 578
 579                 err = mmc_send_cmd(mmc, &cmd, NULL);
 580
 581                 if (err)
 582                         return err;
 583
 584                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
 585                 cmd.resp_type = MMC_RSP_R3;
 586
 587                 /*
 588                  * Most cards do not answer if some reserved bits
 589                  * in the ocr are set. However, Some controller
 590                  * can set bit 7 (reserved for low voltages), but
 591                  * how to manage low voltages SD card is not yet
 592                  * specified.
 593                  */
 594                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
 595                         (mmc->cfg->voltages & 0xff8000);
 596
 597                 if (mmc->version == SD_VERSION_2)
 598                         cmd.cmdarg |= OCR_HCS;
 599
 600                 if (uhs_en)
 601                         cmd.cmdarg |= OCR_S18R;
 602
 603                 err = mmc_send_cmd(mmc, &cmd, NULL);
 604
 605                 if (err)
 606                         return err;
 607
 608                 if (cmd.response[0] & OCR_BUSY)
 609                         break;
 610
 611                 if (timeout-- <= 0)
 612                         return -EOPNOTSUPP;
 613
 614                 udelay(1000);
 615         }
 616
 617         if (mmc->version != SD_VERSION_2)
 618                 mmc->version = SD_VERSION_1_0;
 619
 620         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 621                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 622                 cmd.resp_type = MMC_RSP_R3;
 623                 cmd.cmdarg = 0;
 624
 625                 err = mmc_send_cmd(mmc, &cmd, NULL);
 626
 627                 if (err)
 628                         return err;
 629         }
 630
 631         mmc->ocr = cmd.response[0];
 632
 633 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 634         if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000)
 635             == 0x41000000) {
 636                 err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
 637                 if (err)
 638                         return err;
 639         }
 640 #endif
 641
 642         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 643         mmc->rca = 0;
 644
 645         return 0;
 646 }
 647
 648 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 649 {
 650         struct mmc_cmd cmd;
 651         int err;
 652
 653         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
 654         cmd.resp_type = MMC_RSP_R3;
 655         cmd.cmdarg = 0;
 656         if (use_arg && !mmc_host_is_spi(mmc))
 657                 cmd.cmdarg = OCR_HCS |
 658                         (mmc->cfg->voltages &
 659                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
 660                         (mmc->ocr & OCR_ACCESS_MODE);
 661
 662         err = mmc_send_cmd(mmc, &cmd, NULL);
 663         if (err)
 664                 return err;
 665         mmc->ocr = cmd.response[0];
 666         return 0;
 667 }
 668
 669 static int mmc_send_op_cond(struct mmc *mmc)
 670 {
 671         int err, i;
 672         int timeout = 1000;
 673         uint start;
 674
 675         /* Some cards seem to need this */
 676         mmc_go_idle(mmc);
 677
 678         start = get_timer(0);
 679         /* Asking to the card its capabilities */
 680         for (i = 0; ; i++) {
 681                 err = mmc_send_op_cond_iter(mmc, i != 0);
 682                 if (err)
 683                         return err;
 684
 685                 /* exit if not busy (flag seems to be inverted) */
 686                 if (mmc->ocr & OCR_BUSY)
 687                         break;
 688
 689                 if (get_timer(start) > timeout)
 690                         return -ETIMEDOUT;
 691                 udelay(100);
 692         }
 693         mmc->op_cond_pending = 1;
 694         return 0;
 695 }
 696
 697 static int mmc_complete_op_cond(struct mmc *mmc)
 698 {
 699         struct mmc_cmd cmd;
 700         int timeout = 1000;
 701         ulong start;
 702         int err;
 703
 704         mmc->op_cond_pending = 0;
 705         if (!(mmc->ocr & OCR_BUSY)) {
 706                 /* Some cards seem to need this */
 707                 mmc_go_idle(mmc);
 708
 709                 start = get_timer(0);
 710                 while (1) {
 711                         err = mmc_send_op_cond_iter(mmc, 1);
 712                         if (err)
 713                                 return err;
 714                         if (mmc->ocr & OCR_BUSY)
 715                                 break;
 716                         if (get_timer(start) > timeout)
 717                                 return -EOPNOTSUPP;
 718                         udelay(100);
 719                 }
 720         }
 721
 722         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 723                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 724                 cmd.resp_type = MMC_RSP_R3;
 725                 cmd.cmdarg = 0;
 726
 727                 err = mmc_send_cmd(mmc, &cmd, NULL);
 728
 729                 if (err)
 730                         return err;
 731
 732                 mmc->ocr = cmd.response[0];
 733         }
 734
 735         mmc->version = MMC_VERSION_UNKNOWN;
 736
 737         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 738         mmc->rca = 1;
 739
 740         return 0;
 741 }
 742
 743
 744 int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 745 {
 746         struct mmc_cmd cmd;
 747         struct mmc_data data;
 748         int err;
 749
 750         /* Get the Card Status Register */
 751         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 752         cmd.resp_type = MMC_RSP_R1;
 753         cmd.cmdarg = 0;
 754
 755         data.dest = (char *)ext_csd;
 756         data.blocks = 1;
 757         data.blocksize = MMC_MAX_BLOCK_LEN;
 758         data.flags = MMC_DATA_READ;
 759
 760         err = mmc_send_cmd(mmc, &cmd, &data);
 761
 762         return err;
 763 }
 764
 765 static int __mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value,
 766                         bool send_status)
 767 {
 768         unsigned int status, start;
 769         struct mmc_cmd cmd;
 770         int timeout_ms = DEFAULT_CMD6_TIMEOUT_MS;
 771         bool is_part_switch = (set == EXT_CSD_CMD_SET_NORMAL) &&
 772                               (index == EXT_CSD_PART_CONF);
 773         int retries = 3;
 774         int ret;
 775
 776         if (mmc->gen_cmd6_time)
 777                 timeout_ms = mmc->gen_cmd6_time * 10;
 778
 779         if (is_part_switch  && mmc->part_switch_time)
 780                 timeout_ms = mmc->part_switch_time * 10;
 781
 782         cmd.cmdidx = MMC_CMD_SWITCH;
 783         cmd.resp_type = MMC_RSP_R1b;
 784         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
 785                                  (index << 16) |
 786                                  (value << 8);
 787
 788         do {
 789                 ret = mmc_send_cmd(mmc, &cmd, NULL);
 790         } while (ret && retries-- > 0);
 791
 792         if (ret)
 793                 return ret;
 794
 795         start = get_timer(0);
 796
 797         /* poll dat0 for rdy/buys status */
 798         ret = mmc_wait_dat0(mmc, 1, timeout_ms * 1000);
 799         if (ret && ret != -ENOSYS)
 800                 return ret;
 801
 802         /*
 803          * In cases when not allowed to poll by using CMD13 or because we aren't
 804          * capable of polling by using mmc_wait_dat0, then rely on waiting the
 805          * stated timeout to be sufficient.
 806          */
 807         if (ret == -ENOSYS && !send_status)
 808                 mdelay(timeout_ms);
 809
 810         /* Finally wait until the card is ready or indicates a failure
 811          * to switch. It doesn't hurt to use CMD13 here even if send_status
 812          * is false, because by now (after 'timeout_ms' ms) the bus should be
 813          * reliable.
 814          */
 815         do {
 816                 ret = mmc_send_status(mmc, &status);
 817
 818                 if (!ret && (status & MMC_STATUS_SWITCH_ERROR)) {
 819                         pr_debug("switch failed %d/%d/0x%x !\n", set, index,
 820                                  value);
 821                         return -EIO;
 822                 }
 823                 if (!ret && (status & MMC_STATUS_RDY_FOR_DATA))
 824                         return 0;
 825                 udelay(100);
 826         } while (get_timer(start) < timeout_ms);
 827
 828         return -ETIMEDOUT;
 829 }
 830
 831 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 832 {
 833         return __mmc_switch(mmc, set, index, value, true);
 834 }
 835
 836 int mmc_boot_wp(struct mmc *mmc)
 837 {
 838         return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_WP, 1);
 839 }
 840
 841 #if !CONFIG_IS_ENABLED(MMC_TINY)
 842 static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode,
 843                               bool hsdowngrade)
 844 {
 845         int err;
 846         int speed_bits;
 847
 848         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
 849
 850         switch (mode) {
 851         case MMC_HS:
 852         case MMC_HS_52:
 853         case MMC_DDR_52:
 854                 speed_bits = EXT_CSD_TIMING_HS;
 855                 break;
 856 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 857         case MMC_HS_200:
 858                 speed_bits = EXT_CSD_TIMING_HS200;
 859                 break;
 860 #endif
 861 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 862         case MMC_HS_400:
 863                 speed_bits = EXT_CSD_TIMING_HS400;
 864                 break;
 865 #endif
 866 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
 867         case MMC_HS_400_ES:
 868                 speed_bits = EXT_CSD_TIMING_HS400;
 869                 break;
 870 #endif
 871         case MMC_LEGACY:
 872                 speed_bits = EXT_CSD_TIMING_LEGACY;
 873                 break;
 874         default:
 875                 return -EINVAL;
 876         }
 877
 878         err = __mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
 879                            speed_bits, !hsdowngrade);
 880         if (err)
 881                 return err;
 882
 883 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
 884     CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 885         /*
 886          * In case the eMMC is in HS200/HS400 mode and we are downgrading
 887          * to HS mode, the card clock are still running much faster than
 888          * the supported HS mode clock, so we can not reliably read out
 889          * Extended CSD. Reconfigure the controller to run at HS mode.
 890          */
 891         if (hsdowngrade) {
 892                 mmc_select_mode(mmc, MMC_HS);
 893                 mmc_set_clock(mmc, mmc_mode2freq(mmc, MMC_HS), false);
 894         }
 895 #endif
 896
 897         if ((mode == MMC_HS) || (mode == MMC_HS_52)) {
 898                 /* Now check to see that it worked */
 899                 err = mmc_send_ext_csd(mmc, test_csd);
 900                 if (err)
 901                         return err;
 902
 903                 /* No high-speed support */
 904                 if (!test_csd[EXT_CSD_HS_TIMING])
 905                         return -ENOTSUPP;
 906         }
 907
 908         return 0;
 909 }
 910
 911 static int mmc_get_capabilities(struct mmc *mmc)
 912 {
 913         u8 *ext_csd = mmc->ext_csd;
 914         char cardtype;
 915
 916         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
 917
 918         if (mmc_host_is_spi(mmc))
 919                 return 0;
 920
 921         /* Only version 4 supports high-speed */
 922         if (mmc->version < MMC_VERSION_4)
 923                 return 0;
 924
 925         if (!ext_csd) {
 926                 pr_err("No ext_csd found!\n"); /* this should enver happen */
 927                 return -ENOTSUPP;
 928         }
 929
 930         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
 931
 932         cardtype = ext_csd[EXT_CSD_CARD_TYPE];
 933         mmc->cardtype = cardtype;
 934
 935 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 936         if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
 937                         EXT_CSD_CARD_TYPE_HS200_1_8V)) {
 938                 mmc->card_caps |= MMC_MODE_HS200;
 939         }
 940 #endif
 941 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) || \
 942         CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
 943         if (cardtype & (EXT_CSD_CARD_TYPE_HS400_1_2V |
 944                         EXT_CSD_CARD_TYPE_HS400_1_8V)) {
 945                 mmc->card_caps |= MMC_MODE_HS400;
 946         }
 947 #endif
 948         if (cardtype & EXT_CSD_CARD_TYPE_52) {
 949                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
 950                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
 951                 mmc->card_caps |= MMC_MODE_HS_52MHz;
 952         }
 953         if (cardtype & EXT_CSD_CARD_TYPE_26)
 954                 mmc->card_caps |= MMC_MODE_HS;
 955
 956 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
 957         if (ext_csd[EXT_CSD_STROBE_SUPPORT] &&
 958             (mmc->card_caps & MMC_MODE_HS400)) {
 959                 mmc->card_caps |= MMC_MODE_HS400_ES;
 960         }
 961 #endif
 962
 963         return 0;
 964 }
 965 #endif
 966
 967 static int mmc_set_capacity(struct mmc *mmc, int part_num)
 968 {
 969         switch (part_num) {
 970         case 0:
 971                 mmc->capacity = mmc->capacity_user;
 972                 break;
 973         case 1:
 974         case 2:
 975                 mmc->capacity = mmc->capacity_boot;
 976                 break;
 977         case 3:
 978                 mmc->capacity = mmc->capacity_rpmb;
 979                 break;
 980         case 4:
 981         case 5:
 982         case 6:
 983         case 7:
 984                 mmc->capacity = mmc->capacity_gp[part_num - 4];
 985                 break;
 986         default:
 987                 return -1;
 988         }
 989
 990         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
 991
 992         return 0;
 993 }
 994
 995 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
 996 {
 997         int ret;
 998         int retry = 3;
 999
1000         do {
1001                 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1002                                  EXT_CSD_PART_CONF,
1003                                  (mmc->part_config & ~PART_ACCESS_MASK)
1004                                  | (part_num & PART_ACCESS_MASK));
1005         } while (ret && retry--);
1006
1007         /*
1008          * Set the capacity if the switch succeeded or was intended
1009          * to return to representing the raw device.
1010          */
1011         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
1012                 ret = mmc_set_capacity(mmc, part_num);
1013                 mmc_get_blk_desc(mmc)->hwpart = part_num;
1014         }
1015
1016         return ret;
1017 }
1018
1019 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
1020 int mmc_hwpart_config(struct mmc *mmc,
1021                       const struct mmc_hwpart_conf *conf,
1022                       enum mmc_hwpart_conf_mode mode)
1023 {
1024         u8 part_attrs = 0;
1025         u32 enh_size_mult;
1026         u32 enh_start_addr;
1027         u32 gp_size_mult[4];
1028         u32 max_enh_size_mult;
1029         u32 tot_enh_size_mult = 0;
1030         u8 wr_rel_set;
1031         int i, pidx, err;
1032         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1033
1034         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
1035                 return -EINVAL;
1036
1037         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
1038                 pr_err("eMMC >= 4.4 required for enhanced user data area\n");
1039                 return -EMEDIUMTYPE;
1040         }
1041
1042         if (!(mmc->part_support & PART_SUPPORT)) {
1043                 pr_err("Card does not support partitioning\n");
1044                 return -EMEDIUMTYPE;
1045         }
1046
1047         if (!mmc->hc_wp_grp_size) {
1048                 pr_err("Card does not define HC WP group size\n");
1049                 return -EMEDIUMTYPE;
1050         }
1051
1052         /* check partition alignment and total enhanced size */
1053         if (conf->user.enh_size) {
1054                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
1055                     conf->user.enh_start % mmc->hc_wp_grp_size) {
1056                         pr_err("User data enhanced area not HC WP group "
1057                                "size aligned\n");
1058                         return -EINVAL;
1059                 }
1060                 part_attrs |= EXT_CSD_ENH_USR;
1061                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
1062                 if (mmc->high_capacity) {
1063                         enh_start_addr = conf->user.enh_start;
1064                 } else {
1065                         enh_start_addr = (conf->user.enh_start << 9);
1066                 }
1067         } else {
1068                 enh_size_mult = 0;
1069                 enh_start_addr = 0;
1070         }
1071         tot_enh_size_mult += enh_size_mult;
1072
1073         for (pidx = 0; pidx < 4; pidx++) {
1074                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
1075                         pr_err("GP%i partition not HC WP group size "
1076                                "aligned\n", pidx+1);
1077                         return -EINVAL;
1078                 }
1079                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
1080                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
1081                         part_attrs |= EXT_CSD_ENH_GP(pidx);
1082                         tot_enh_size_mult += gp_size_mult[pidx];
1083                 }
1084         }
1085
1086         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
1087                 pr_err("Card does not support enhanced attribute\n");
1088                 return -EMEDIUMTYPE;
1089         }
1090
1091         err = mmc_send_ext_csd(mmc, ext_csd);
1092         if (err)
1093                 return err;
1094
1095         max_enh_size_mult =
1096                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
1097                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
1098                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
1099         if (tot_enh_size_mult > max_enh_size_mult) {
1100                 pr_err("Total enhanced size exceeds maximum (%u > %u)\n",
1101                        tot_enh_size_mult, max_enh_size_mult);
1102                 return -EMEDIUMTYPE;
1103         }
1104
1105         /* The default value of EXT_CSD_WR_REL_SET is device
1106          * dependent, the values can only be changed if the
1107          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
1108          * changed only once and before partitioning is completed. */
1109         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1110         if (conf->user.wr_rel_change) {
1111                 if (conf->user.wr_rel_set)
1112                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
1113                 else
1114                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
1115         }
1116         for (pidx = 0; pidx < 4; pidx++) {
1117                 if (conf->gp_part[pidx].wr_rel_change) {
1118                         if (conf->gp_part[pidx].wr_rel_set)
1119                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
1120                         else
1121                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
1122                 }
1123         }
1124
1125         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
1126             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
1127                 puts("Card does not support host controlled partition write "
1128                      "reliability settings\n");
1129                 return -EMEDIUMTYPE;
1130         }
1131
1132         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
1133             EXT_CSD_PARTITION_SETTING_COMPLETED) {
1134                 pr_err("Card already partitioned\n");
1135                 return -EPERM;
1136         }
1137
1138         if (mode == MMC_HWPART_CONF_CHECK)
1139                 return 0;
1140
1141         /* Partitioning requires high-capacity size definitions */
1142         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
1143                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1144                                  EXT_CSD_ERASE_GROUP_DEF, 1);
1145
1146                 if (err)
1147                         return err;
1148
1149                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1150
1151 #if CONFIG_IS_ENABLED(MMC_WRITE)
1152                 /* update erase group size to be high-capacity */
1153                 mmc->erase_grp_size =
1154                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1155 #endif
1156
1157         }
1158
1159         /* all OK, write the configuration */
1160         for (i = 0; i < 4; i++) {
1161                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1162                                  EXT_CSD_ENH_START_ADDR+i,
1163                                  (enh_start_addr >> (i*8)) & 0xFF);
1164                 if (err)
1165                         return err;
1166         }
1167         for (i = 0; i < 3; i++) {
1168                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1169                                  EXT_CSD_ENH_SIZE_MULT+i,
1170                                  (enh_size_mult >> (i*8)) & 0xFF);
1171                 if (err)
1172                         return err;
1173         }
1174         for (pidx = 0; pidx < 4; pidx++) {
1175                 for (i = 0; i < 3; i++) {
1176                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1177                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
1178                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
1179                         if (err)
1180                                 return err;
1181                 }
1182         }
1183         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1184                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
1185         if (err)
1186                 return err;
1187
1188         if (mode == MMC_HWPART_CONF_SET)
1189                 return 0;
1190
1191         /* The WR_REL_SET is a write-once register but shall be
1192          * written before setting PART_SETTING_COMPLETED. As it is
1193          * write-once we can only write it when completing the
1194          * partitioning. */
1195         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
1196                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1197                                  EXT_CSD_WR_REL_SET, wr_rel_set);
1198                 if (err)
1199                         return err;
1200         }
1201
1202         /* Setting PART_SETTING_COMPLETED confirms the partition
1203          * configuration but it only becomes effective after power
1204          * cycle, so we do not adjust the partition related settings
1205          * in the mmc struct. */
1206
1207         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1208                          EXT_CSD_PARTITION_SETTING,
1209                          EXT_CSD_PARTITION_SETTING_COMPLETED);
1210         if (err)
1211                 return err;
1212
1213         return 0;
1214 }
1215 #endif
1216
1217 #if !CONFIG_IS_ENABLED(DM_MMC)
1218 int mmc_getcd(struct mmc *mmc)
1219 {
1220         int cd;
1221
1222         cd = board_mmc_getcd(mmc);
1223
1224         if (cd < 0) {
1225                 if (mmc->cfg->ops->getcd)
1226                         cd = mmc->cfg->ops->getcd(mmc);
1227                 else
1228                         cd = 1;
1229         }
1230
1231         return cd;
1232 }
1233 #endif
1234
1235 #if !CONFIG_IS_ENABLED(MMC_TINY)
1236 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
1237 {
1238         struct mmc_cmd cmd;
1239         struct mmc_data data;
1240
1241         /* Switch the frequency */
1242         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
1243         cmd.resp_type = MMC_RSP_R1;
1244         cmd.cmdarg = (mode << 31) | 0xffffff;
1245         cmd.cmdarg &= ~(0xf << (group * 4));
1246         cmd.cmdarg |= value << (group * 4);
1247
1248         data.dest = (char *)resp;
1249         data.blocksize = 64;
1250         data.blocks = 1;
1251         data.flags = MMC_DATA_READ;
1252
1253         return mmc_send_cmd(mmc, &cmd, &data);
1254 }
1255
1256 static int sd_get_capabilities(struct mmc *mmc)
1257 {
1258         int err;
1259         struct mmc_cmd cmd;
1260         ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
1261         ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
1262         struct mmc_data data;
1263         int timeout;
1264 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1265         u32 sd3_bus_mode;
1266 #endif
1267
1268         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
1269
1270         if (mmc_host_is_spi(mmc))
1271                 return 0;
1272
1273         /* Read the SCR to find out if this card supports higher speeds */
1274         cmd.cmdidx = MMC_CMD_APP_CMD;
1275         cmd.resp_type = MMC_RSP_R1;
1276         cmd.cmdarg = mmc->rca << 16;
1277
1278         err = mmc_send_cmd(mmc, &cmd, NULL);
1279
1280         if (err)
1281                 return err;
1282
1283         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
1284         cmd.resp_type = MMC_RSP_R1;
1285         cmd.cmdarg = 0;
1286
1287         timeout = 3;
1288
1289 retry_scr:
1290         data.dest = (char *)scr;
1291         data.blocksize = 8;
1292         data.blocks = 1;
1293         data.flags = MMC_DATA_READ;
1294
1295         err = mmc_send_cmd(mmc, &cmd, &data);
1296
1297         if (err) {
1298                 if (timeout--)
1299                         goto retry_scr;
1300
1301                 return err;
1302         }
1303
1304         mmc->scr[0] = __be32_to_cpu(scr[0]);
1305         mmc->scr[1] = __be32_to_cpu(scr[1]);
1306
1307         switch ((mmc->scr[0] >> 24) & 0xf) {
1308         case 0:
1309                 mmc->version = SD_VERSION_1_0;
1310                 break;
1311         case 1:
1312                 mmc->version = SD_VERSION_1_10;
1313                 break;
1314         case 2:
1315                 mmc->version = SD_VERSION_2;
1316                 if ((mmc->scr[0] >> 15) & 0x1)
1317                         mmc->version = SD_VERSION_3;
1318                 break;
1319         default:
1320                 mmc->version = SD_VERSION_1_0;
1321                 break;
1322         }
1323
1324         if (mmc->scr[0] & SD_DATA_4BIT)
1325                 mmc->card_caps |= MMC_MODE_4BIT;
1326
1327         /* Version 1.0 doesn't support switching */
1328         if (mmc->version == SD_VERSION_1_0)
1329                 return 0;
1330
1331         timeout = 4;
1332         while (timeout--) {
1333                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
1334                                 (u8 *)switch_status);
1335
1336                 if (err)
1337                         return err;
1338
1339                 /* The high-speed function is busy.  Try again */
1340                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
1341                         break;
1342         }
1343
1344         /* If high-speed isn't supported, we return */
1345         if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)
1346                 mmc->card_caps |= MMC_CAP(SD_HS);
1347
1348 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1349         /* Version before 3.0 don't support UHS modes */
1350         if (mmc->version < SD_VERSION_3)
1351                 return 0;
1352
1353         sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f;
1354         if (sd3_bus_mode & SD_MODE_UHS_SDR104)
1355                 mmc->card_caps |= MMC_CAP(UHS_SDR104);
1356         if (sd3_bus_mode & SD_MODE_UHS_SDR50)
1357                 mmc->card_caps |= MMC_CAP(UHS_SDR50);
1358         if (sd3_bus_mode & SD_MODE_UHS_SDR25)
1359                 mmc->card_caps |= MMC_CAP(UHS_SDR25);
1360         if (sd3_bus_mode & SD_MODE_UHS_SDR12)
1361                 mmc->card_caps |= MMC_CAP(UHS_SDR12);
1362         if (sd3_bus_mode & SD_MODE_UHS_DDR50)
1363                 mmc->card_caps |= MMC_CAP(UHS_DDR50);
1364 #endif
1365
1366         return 0;
1367 }
1368
1369 static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode)
1370 {
1371         int err;
1372
1373         ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
1374         int speed;
1375
1376         /* SD version 1.00 and 1.01 does not support CMD 6 */
1377         if (mmc->version == SD_VERSION_1_0)
1378                 return 0;
1379
1380         switch (mode) {
1381         case MMC_LEGACY:
1382                 speed = UHS_SDR12_BUS_SPEED;
1383                 break;
1384         case SD_HS:
1385                 speed = HIGH_SPEED_BUS_SPEED;
1386                 break;
1387 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1388         case UHS_SDR12:
1389                 speed = UHS_SDR12_BUS_SPEED;
1390                 break;
1391         case UHS_SDR25:
1392                 speed = UHS_SDR25_BUS_SPEED;
1393                 break;
1394         case UHS_SDR50:
1395                 speed = UHS_SDR50_BUS_SPEED;
1396                 break;
1397         case UHS_DDR50:
1398                 speed = UHS_DDR50_BUS_SPEED;
1399                 break;
1400         case UHS_SDR104:
1401                 speed = UHS_SDR104_BUS_SPEED;
1402                 break;
1403 #endif
1404         default:
1405                 return -EINVAL;
1406         }
1407
1408         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status);
1409         if (err)
1410                 return err;
1411
1412         if (((__be32_to_cpu(switch_status[4]) >> 24) & 0xF) != speed)
1413                 return -ENOTSUPP;
1414
1415         return 0;
1416 }
1417
1418 static int sd_select_bus_width(struct mmc *mmc, int w)
1419 {
1420         int err;
1421         struct mmc_cmd cmd;
1422
1423         if ((w != 4) && (w != 1))
1424                 return -EINVAL;
1425
1426         cmd.cmdidx = MMC_CMD_APP_CMD;
1427         cmd.resp_type = MMC_RSP_R1;
1428         cmd.cmdarg = mmc->rca << 16;
1429
1430         err = mmc_send_cmd(mmc, &cmd, NULL);
1431         if (err)
1432                 return err;
1433
1434         cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1435         cmd.resp_type = MMC_RSP_R1;
1436         if (w == 4)
1437                 cmd.cmdarg = 2;
1438         else if (w == 1)
1439                 cmd.cmdarg = 0;
1440         err = mmc_send_cmd(mmc, &cmd, NULL);
1441         if (err)
1442                 return err;
1443
1444         return 0;
1445 }
1446 #endif
1447
1448 #if CONFIG_IS_ENABLED(MMC_WRITE)
1449 static int sd_read_ssr(struct mmc *mmc)
1450 {
1451         static const unsigned int sd_au_size[] = {
1452                 0,              SZ_16K / 512,           SZ_32K / 512,
1453                 SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
1454                 SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
1455                 SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
1456                 SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,
1457                 SZ_64M / 512,
1458         };
1459         int err, i;
1460         struct mmc_cmd cmd;
1461         ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1462         struct mmc_data data;
1463         int timeout = 3;
1464         unsigned int au, eo, et, es;
1465
1466         cmd.cmdidx = MMC_CMD_APP_CMD;
1467         cmd.resp_type = MMC_RSP_R1;
1468         cmd.cmdarg = mmc->rca << 16;
1469
1470         err = mmc_send_cmd(mmc, &cmd, NULL);
1471 #ifdef CONFIG_MMC_QUIRKS
1472         if (err && (mmc->quirks & MMC_QUIRK_RETRY_APP_CMD)) {
1473                 int retries = 4;
1474                 /*
1475                  * It has been seen that APP_CMD may fail on the first
1476                  * attempt, let's try a few more times
1477                  */
1478                 do {
1479                         err = mmc_send_cmd(mmc, &cmd, NULL);
1480                         if (!err)
1481                                 break;
1482                 } while (retries--);
1483         }
1484 #endif
1485         if (err)
1486                 return err;
1487
1488         cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1489         cmd.resp_type = MMC_RSP_R1;
1490         cmd.cmdarg = 0;
1491
1492 retry_ssr:
1493         data.dest = (char *)ssr;
1494         data.blocksize = 64;
1495         data.blocks = 1;
1496         data.flags = MMC_DATA_READ;
1497
1498         err = mmc_send_cmd(mmc, &cmd, &data);
1499         if (err) {
1500                 if (timeout--)
1501                         goto retry_ssr;
1502
1503                 return err;
1504         }
1505
1506         for (i = 0; i < 16; i++)
1507                 ssr[i] = be32_to_cpu(ssr[i]);
1508
1509         au = (ssr[2] >> 12) & 0xF;
1510         if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1511                 mmc->ssr.au = sd_au_size[au];
1512                 es = (ssr[3] >> 24) & 0xFF;
1513                 es |= (ssr[2] & 0xFF) << 8;
1514                 et = (ssr[3] >> 18) & 0x3F;
1515                 if (es && et) {
1516                         eo = (ssr[3] >> 16) & 0x3;
1517                         mmc->ssr.erase_timeout = (et * 1000) / es;
1518                         mmc->ssr.erase_offset = eo * 1000;
1519                 }
1520         } else {
1521                 pr_debug("Invalid Allocation Unit Size.\n");
1522         }
1523
1524         return 0;
1525 }
1526 #endif
1527 /* frequency bases */
1528 /* divided by 10 to be nice to platforms without floating point */
1529 static const int fbase[] = {
1530         10000,
1531         100000,
1532         1000000,
1533         10000000,
1534 };
1535
1536 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
1537  * to platforms without floating point.
1538  */
1539 static const u8 multipliers[] = {
1540         0,      /* reserved */
1541         10,
1542         12,
1543         13,
1544         15,
1545         20,
1546         25,
1547         30,
1548         35,
1549         40,
1550         45,
1551         50,
1552         55,
1553         60,
1554         70,
1555         80,
1556 };
1557
1558 static inline int bus_width(uint cap)
1559 {
1560         if (cap == MMC_MODE_8BIT)
1561                 return 8;
1562         if (cap == MMC_MODE_4BIT)
1563                 return 4;
1564         if (cap == MMC_MODE_1BIT)
1565                 return 1;
1566         pr_warn("invalid bus witdh capability 0x%x\n", cap);
1567         return 0;
1568 }
1569
1570 #if !CONFIG_IS_ENABLED(DM_MMC)
1571 #ifdef MMC_SUPPORTS_TUNING
1572 static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
1573 {
1574         return -ENOTSUPP;
1575 }
1576 #endif
1577
1578 static int mmc_set_ios(struct mmc *mmc)
1579 {
1580         int ret = 0;
1581
1582         if (mmc->cfg->ops->set_ios)
1583                 ret = mmc->cfg->ops->set_ios(mmc);
1584
1585         return ret;
1586 }
1587
1588 static int mmc_host_power_cycle(struct mmc *mmc)
1589 {
1590         int ret = 0;
1591
1592         if (mmc->cfg->ops->host_power_cycle)
1593                 ret = mmc->cfg->ops->host_power_cycle(mmc);
1594
1595         return ret;
1596 }
1597 #endif
1598
1599 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
1600 {
1601         if (!disable) {
1602                 if (clock > mmc->cfg->f_max)
1603                         clock = mmc->cfg->f_max;
1604
1605                 if (clock < mmc->cfg->f_min)
1606                         clock = mmc->cfg->f_min;
1607         }
1608
1609         mmc->clock = clock;
1610         mmc->clk_disable = disable;
1611
1612         debug("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock);
1613
1614         return mmc_set_ios(mmc);
1615 }
1616
1617 static int mmc_set_bus_width(struct mmc *mmc, uint width)
1618 {
1619         mmc->bus_width = width;
1620
1621         return mmc_set_ios(mmc);
1622 }
1623
1624 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1625 /*
1626  * helper function to display the capabilities in a human
1627  * friendly manner. The capabilities include bus width and
1628  * supported modes.
1629  */
1630 void mmc_dump_capabilities(const char *text, uint caps)
1631 {
1632         enum bus_mode mode;
1633
1634         pr_debug("%s: widths [", text);
1635         if (caps & MMC_MODE_8BIT)
1636                 pr_debug("8, ");
1637         if (caps & MMC_MODE_4BIT)
1638                 pr_debug("4, ");
1639         if (caps & MMC_MODE_1BIT)
1640                 pr_debug("1, ");
1641         pr_debug("\b\b] modes [");
1642         for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1643                 if (MMC_CAP(mode) & caps)
1644                         pr_debug("%s, ", mmc_mode_name(mode));
1645         pr_debug("\b\b]\n");
1646 }
1647 #endif
1648
1649 struct mode_width_tuning {
1650         enum bus_mode mode;
1651         uint widths;
1652 #ifdef MMC_SUPPORTS_TUNING
1653         uint tuning;
1654 #endif
1655 };
1656
1657 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1658 int mmc_voltage_to_mv(enum mmc_voltage voltage)
1659 {
1660         switch (voltage) {
1661         case MMC_SIGNAL_VOLTAGE_000: return 0;
1662         case MMC_SIGNAL_VOLTAGE_330: return 3300;
1663         case MMC_SIGNAL_VOLTAGE_180: return 1800;
1664         case MMC_SIGNAL_VOLTAGE_120: return 1200;
1665         }
1666         return -EINVAL;
1667 }
1668
1669 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1670 {
1671         int err;
1672
1673         if (mmc->signal_voltage == signal_voltage)
1674                 return 0;
1675
1676         mmc->signal_voltage = signal_voltage;
1677         err = mmc_set_ios(mmc);
1678         if (err)
1679                 pr_debug("unable to set voltage (err %d)\n", err);
1680
1681         return err;
1682 }
1683 #else
1684 static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1685 {
1686         return 0;
1687 }
1688 #endif
1689
1690 #if !CONFIG_IS_ENABLED(MMC_TINY)
1691 static const struct mode_width_tuning sd_modes_by_pref[] = {
1692 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1693 #ifdef MMC_SUPPORTS_TUNING
1694         {
1695                 .mode = UHS_SDR104,
1696                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1697                 .tuning = MMC_CMD_SEND_TUNING_BLOCK
1698         },
1699 #endif
1700         {
1701                 .mode = UHS_SDR50,
1702                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1703         },
1704         {
1705                 .mode = UHS_DDR50,
1706                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1707         },
1708         {
1709                 .mode = UHS_SDR25,
1710                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1711         },
1712 #endif
1713         {
1714                 .mode = SD_HS,
1715                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1716         },
1717 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1718         {
1719                 .mode = UHS_SDR12,
1720                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1721         },
1722 #endif
1723         {
1724                 .mode = MMC_LEGACY,
1725                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1726         }
1727 };
1728
1729 #define for_each_sd_mode_by_pref(caps, mwt) \
1730         for (mwt = sd_modes_by_pref;\
1731              mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\
1732              mwt++) \
1733                 if (caps & MMC_CAP(mwt->mode))
1734
1735 static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
1736 {
1737         int err;
1738         uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT};
1739         const struct mode_width_tuning *mwt;
1740 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1741         bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false;
1742 #else
1743         bool uhs_en = false;
1744 #endif
1745         uint caps;
1746
1747 #ifdef DEBUG
1748         mmc_dump_capabilities("sd card", card_caps);
1749         mmc_dump_capabilities("host", mmc->host_caps);
1750 #endif
1751
1752         if (mmc_host_is_spi(mmc)) {
1753                 mmc_set_bus_width(mmc, 1);
1754                 mmc_select_mode(mmc, MMC_LEGACY);
1755                 mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE);
1756 #if CONFIG_IS_ENABLED(MMC_WRITE)
1757                 err = sd_read_ssr(mmc);
1758                 if (err)
1759                         pr_warn("unable to read ssr\n");
1760 #endif
1761                 return 0;
1762         }
1763
1764         /* Restrict card's capabilities by what the host can do */
1765         caps = card_caps & mmc->host_caps;
1766
1767         if (!uhs_en)
1768                 caps &= ~UHS_CAPS;
1769
1770         for_each_sd_mode_by_pref(caps, mwt) {
1771                 uint *w;
1772
1773                 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
1774                         if (*w & caps & mwt->widths) {
1775                                 pr_debug("trying mode %s width %d (at %d MHz)\n",
1776                                          mmc_mode_name(mwt->mode),
1777                                          bus_width(*w),
1778                                          mmc_mode2freq(mmc, mwt->mode) / 1000000);
1779
1780                                 /* configure the bus width (card + host) */
1781                                 err = sd_select_bus_width(mmc, bus_width(*w));
1782                                 if (err)
1783                                         goto error;
1784                                 mmc_set_bus_width(mmc, bus_width(*w));
1785
1786                                 /* configure the bus mode (card) */
1787                                 err = sd_set_card_speed(mmc, mwt->mode);
1788                                 if (err)
1789                                         goto error;
1790
1791                                 /* configure the bus mode (host) */
1792                                 mmc_select_mode(mmc, mwt->mode);
1793                                 mmc_set_clock(mmc, mmc->tran_speed,
1794                                                 MMC_CLK_ENABLE);
1795
1796 #ifdef MMC_SUPPORTS_TUNING
1797                                 /* execute tuning if needed */
1798                                 if (mwt->tuning && !mmc_host_is_spi(mmc)) {
1799                                         err = mmc_execute_tuning(mmc,
1800                                                                  mwt->tuning);
1801                                         if (err) {
1802                                                 pr_debug("tuning failed\n");
1803                                                 goto error;
1804                                         }
1805                                 }
1806 #endif
1807
1808 #if CONFIG_IS_ENABLED(MMC_WRITE)
1809                                 err = sd_read_ssr(mmc);
1810                                 if (err)
1811                                         pr_warn("unable to read ssr\n");
1812 #endif
1813                                 if (!err)
1814                                         return 0;
1815
1816 error:
1817                                 /* revert to a safer bus speed */
1818                                 mmc_select_mode(mmc, MMC_LEGACY);
1819                                 mmc_set_clock(mmc, mmc->tran_speed,
1820                                                 MMC_CLK_ENABLE);
1821                         }
1822                 }
1823         }
1824
1825         pr_err("unable to select a mode\n");
1826         return -ENOTSUPP;
1827 }
1828
1829 /*
1830  * read the compare the part of ext csd that is constant.
1831  * This can be used to check that the transfer is working
1832  * as expected.
1833  */
1834 static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
1835 {
1836         int err;
1837         const u8 *ext_csd = mmc->ext_csd;
1838         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1839
1840         if (mmc->version < MMC_VERSION_4)
1841                 return 0;
1842
1843         err = mmc_send_ext_csd(mmc, test_csd);
1844         if (err)
1845                 return err;
1846
1847         /* Only compare read only fields */
1848         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1849                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1850             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1851                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1852             ext_csd[EXT_CSD_REV]
1853                 == test_csd[EXT_CSD_REV] &&
1854             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1855                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1856             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1857                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1858                 return 0;
1859
1860         return -EBADMSG;
1861 }
1862
1863 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1864 static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1865                                   uint32_t allowed_mask)
1866 {
1867         u32 card_mask = 0;
1868
1869         switch (mode) {
1870         case MMC_HS_400_ES:
1871         case MMC_HS_400:
1872         case MMC_HS_200:
1873                 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_8V |
1874                     EXT_CSD_CARD_TYPE_HS400_1_8V))
1875                         card_mask |= MMC_SIGNAL_VOLTAGE_180;
1876                 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
1877                     EXT_CSD_CARD_TYPE_HS400_1_2V))
1878                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1879                 break;
1880         case MMC_DDR_52:
1881                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
1882                         card_mask |= MMC_SIGNAL_VOLTAGE_330 |
1883                                      MMC_SIGNAL_VOLTAGE_180;
1884                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V)
1885                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1886                 break;
1887         default:
1888                 card_mask |= MMC_SIGNAL_VOLTAGE_330;
1889                 break;
1890         }
1891
1892         while (card_mask & allowed_mask) {
1893                 enum mmc_voltage best_match;
1894
1895                 best_match = 1 << (ffs(card_mask & allowed_mask) - 1);
1896                 if (!mmc_set_signal_voltage(mmc,  best_match))
1897                         return 0;
1898
1899                 allowed_mask &= ~best_match;
1900         }
1901
1902         return -ENOTSUPP;
1903 }
1904 #else
1905 static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1906                                          uint32_t allowed_mask)
1907 {
1908         return 0;
1909 }
1910 #endif
1911
1912 static const struct mode_width_tuning mmc_modes_by_pref[] = {
1913 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
1914         {
1915                 .mode = MMC_HS_400_ES,
1916                 .widths = MMC_MODE_8BIT,
1917         },
1918 #endif
1919 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1920         {
1921                 .mode = MMC_HS_400,
1922                 .widths = MMC_MODE_8BIT,
1923                 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1924         },
1925 #endif
1926 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
1927         {
1928                 .mode = MMC_HS_200,
1929                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1930                 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1931         },
1932 #endif
1933         {
1934                 .mode = MMC_DDR_52,
1935                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1936         },
1937         {
1938                 .mode = MMC_HS_52,
1939                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1940         },
1941         {
1942                 .mode = MMC_HS,
1943                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1944         },
1945         {
1946                 .mode = MMC_LEGACY,
1947                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1948         }
1949 };
1950
1951 #define for_each_mmc_mode_by_pref(caps, mwt) \
1952         for (mwt = mmc_modes_by_pref;\
1953             mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\
1954             mwt++) \
1955                 if (caps & MMC_CAP(mwt->mode))
1956
1957 static const struct ext_csd_bus_width {
1958         uint cap;
1959         bool is_ddr;
1960         uint ext_csd_bits;
1961 } ext_csd_bus_width[] = {
1962         {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8},
1963         {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4},
1964         {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8},
1965         {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4},
1966         {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1},
1967 };
1968
1969 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1970 static int mmc_select_hs400(struct mmc *mmc)
1971 {
1972         int err;
1973
1974         /* Set timing to HS200 for tuning */
1975         err = mmc_set_card_speed(mmc, MMC_HS_200, false);
1976         if (err)
1977                 return err;
1978
1979         /* configure the bus mode (host) */
1980         mmc_select_mode(mmc, MMC_HS_200);
1981         mmc_set_clock(mmc, mmc->tran_speed, false);
1982
1983         /* execute tuning if needed */
1984         err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200);
1985         if (err) {
1986                 debug("tuning failed\n");
1987                 return err;
1988         }
1989
1990         /* Set back to HS */
1991         mmc_set_card_speed(mmc, MMC_HS, true);
1992
1993         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
1994                          EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG);
1995         if (err)
1996                 return err;
1997
1998         err = mmc_set_card_speed(mmc, MMC_HS_400, false);
1999         if (err)
2000                 return err;
2001
2002         mmc_select_mode(mmc, MMC_HS_400);
2003         err = mmc_set_clock(mmc, mmc->tran_speed, false);
2004         if (err)
2005                 return err;
2006
2007         return 0;
2008 }
2009 #else
2010 static int mmc_select_hs400(struct mmc *mmc)
2011 {
2012         return -ENOTSUPP;
2013 }
2014 #endif
2015
2016 #if CONFIG_IS_ENABLED(MMC_HS400_ES_SUPPORT)
2017 #if !CONFIG_IS_ENABLED(DM_MMC)
2018 static int mmc_set_enhanced_strobe(struct mmc *mmc)
2019 {
2020         return -ENOTSUPP;
2021 }
2022 #endif
2023 static int mmc_select_hs400es(struct mmc *mmc)
2024 {
2025         int err;
2026
2027         err = mmc_set_card_speed(mmc, MMC_HS, true);
2028         if (err)
2029                 return err;
2030
2031         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
2032                          EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG |
2033                          EXT_CSD_BUS_WIDTH_STROBE);
2034         if (err) {
2035                 printf("switch to bus width for hs400 failed\n");
2036                 return err;
2037         }
2038         /* TODO: driver strength */
2039         err = mmc_set_card_speed(mmc, MMC_HS_400_ES, false);
2040         if (err)
2041                 return err;
2042
2043         mmc_select_mode(mmc, MMC_HS_400_ES);
2044         err = mmc_set_clock(mmc, mmc->tran_speed, false);
2045         if (err)
2046                 return err;
2047
2048         return mmc_set_enhanced_strobe(mmc);
2049 }
2050 #else
2051 static int mmc_select_hs400es(struct mmc *mmc)
2052 {
2053         return -ENOTSUPP;
2054 }
2055 #endif
2056
2057 #define for_each_supported_width(caps, ddr, ecbv) \
2058         for (ecbv = ext_csd_bus_width;\
2059             ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\
2060             ecbv++) \
2061                 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap))
2062
2063 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
2064 {
2065         int err;
2066         const struct mode_width_tuning *mwt;
2067         const struct ext_csd_bus_width *ecbw;
2068
2069 #ifdef DEBUG
2070         mmc_dump_capabilities("mmc", card_caps);
2071         mmc_dump_capabilities("host", mmc->host_caps);
2072 #endif
2073
2074         if (mmc_host_is_spi(mmc)) {
2075                 mmc_set_bus_width(mmc, 1);
2076                 mmc_select_mode(mmc, MMC_LEGACY);
2077                 mmc_set_clock(mmc, mmc->tran_speed, MMC_CLK_ENABLE);
2078                 return 0;
2079         }
2080
2081         /* Restrict card's capabilities by what the host can do */
2082         card_caps &= mmc->host_caps;
2083
2084         /* Only version 4 of MMC supports wider bus widths */
2085         if (mmc->version < MMC_VERSION_4)
2086                 return 0;
2087
2088         if (!mmc->ext_csd) {
2089                 pr_debug("No ext_csd found!\n"); /* this should enver happen */
2090                 return -ENOTSUPP;
2091         }
2092
2093 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
2094     CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
2095         /*
2096          * In case the eMMC is in HS200/HS400 mode, downgrade to HS mode
2097          * before doing anything else, since a transition from either of
2098          * the HS200/HS400 mode directly to legacy mode is not supported.
2099          */
2100         if (mmc->selected_mode == MMC_HS_200 ||
2101             mmc->selected_mode == MMC_HS_400)
2102                 mmc_set_card_speed(mmc, MMC_HS, true);
2103         else
2104 #endif
2105                 mmc_set_clock(mmc, mmc->legacy_speed, MMC_CLK_ENABLE);
2106
2107         for_each_mmc_mode_by_pref(card_caps, mwt) {
2108                 for_each_supported_width(card_caps & mwt->widths,
2109                                          mmc_is_mode_ddr(mwt->mode), ecbw) {
2110                         enum mmc_voltage old_voltage;
2111                         pr_debug("trying mode %s width %d (at %d MHz)\n",
2112                                  mmc_mode_name(mwt->mode),
2113                                  bus_width(ecbw->cap),
2114                                  mmc_mode2freq(mmc, mwt->mode) / 1000000);
2115                         old_voltage = mmc->signal_voltage;
2116                         err = mmc_set_lowest_voltage(mmc, mwt->mode,
2117                                                      MMC_ALL_SIGNAL_VOLTAGE);
2118                         if (err)
2119                                 continue;
2120
2121                         /* configure the bus width (card + host) */
2122                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2123                                     EXT_CSD_BUS_WIDTH,
2124                                     ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG);
2125                         if (err)
2126                                 goto error;
2127                         mmc_set_bus_width(mmc, bus_width(ecbw->cap));
2128
2129                         if (mwt->mode == MMC_HS_400) {
2130                                 err = mmc_select_hs400(mmc);
2131                                 if (err) {
2132                                         printf("Select HS400 failed %d\n", err);
2133                                         goto error;
2134                                 }
2135                         } else if (mwt->mode == MMC_HS_400_ES) {
2136                                 err = mmc_select_hs400es(mmc);
2137                                 if (err) {
2138                                         printf("Select HS400ES failed %d\n",
2139                                                err);
2140                                         goto error;
2141                                 }
2142                         } else {
2143                                 /* configure the bus speed (card) */
2144                                 err = mmc_set_card_speed(mmc, mwt->mode, false);
2145                                 if (err)
2146                                         goto error;
2147
2148                                 /*
2149                                  * configure the bus width AND the ddr mode
2150                                  * (card). The host side will be taken care
2151                                  * of in the next step
2152                                  */
2153                                 if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) {
2154                                         err = mmc_switch(mmc,
2155                                                          EXT_CSD_CMD_SET_NORMAL,
2156                                                          EXT_CSD_BUS_WIDTH,
2157                                                          ecbw->ext_csd_bits);
2158                                         if (err)
2159                                                 goto error;
2160                                 }
2161
2162                                 /* configure the bus mode (host) */
2163                                 mmc_select_mode(mmc, mwt->mode);
2164                                 mmc_set_clock(mmc, mmc->tran_speed,
2165                                               MMC_CLK_ENABLE);
2166 #ifdef MMC_SUPPORTS_TUNING
2167
2168                                 /* execute tuning if needed */
2169                                 if (mwt->tuning) {
2170                                         err = mmc_execute_tuning(mmc,
2171                                                                  mwt->tuning);
2172                                         if (err) {
2173                                                 pr_debug("tuning failed\n");
2174                                                 goto error;
2175                                         }
2176                                 }
2177 #endif
2178                         }
2179
2180                         /* do a transfer to check the configuration */
2181                         err = mmc_read_and_compare_ext_csd(mmc);
2182                         if (!err)
2183                                 return 0;
2184 error:
2185                         mmc_set_signal_voltage(mmc, old_voltage);
2186                         /* if an error occured, revert to a safer bus mode */
2187                         mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2188                                    EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1);
2189                         mmc_select_mode(mmc, MMC_LEGACY);
2190                         mmc_set_bus_width(mmc, 1);
2191                 }
2192         }
2193
2194         pr_err("unable to select a mode\n");
2195
2196         return -ENOTSUPP;
2197 }
2198 #endif
2199
2200 #if CONFIG_IS_ENABLED(MMC_TINY)
2201 DEFINE_CACHE_ALIGN_BUFFER(u8, ext_csd_bkup, MMC_MAX_BLOCK_LEN);
2202 #endif
2203
2204 static int mmc_startup_v4(struct mmc *mmc)
2205 {
2206         int err, i;
2207         u64 capacity;
2208         bool has_parts = false;
2209         bool part_completed;
2210         static const u32 mmc_versions[] = {
2211                 MMC_VERSION_4,
2212                 MMC_VERSION_4_1,
2213                 MMC_VERSION_4_2,
2214                 MMC_VERSION_4_3,
2215                 MMC_VERSION_4_4,
2216                 MMC_VERSION_4_41,
2217                 MMC_VERSION_4_5,
2218                 MMC_VERSION_5_0,
2219                 MMC_VERSION_5_1
2220         };
2221
2222 #if CONFIG_IS_ENABLED(MMC_TINY)
2223         u8 *ext_csd = ext_csd_bkup;
2224
2225         if (IS_SD(mmc) || mmc->version < MMC_VERSION_4)
2226                 return 0;
2227
2228         if (!mmc->ext_csd)
2229                 memset(ext_csd_bkup, 0, sizeof(ext_csd_bkup));
2230
2231         err = mmc_send_ext_csd(mmc, ext_csd);
2232         if (err)
2233                 goto error;
2234
2235         /* store the ext csd for future reference */
2236         if (!mmc->ext_csd)
2237                 mmc->ext_csd = ext_csd;
2238 #else
2239         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2240
2241         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
2242                 return 0;
2243
2244         /* check  ext_csd version and capacity */
2245         err = mmc_send_ext_csd(mmc, ext_csd);
2246         if (err)
2247                 goto error;
2248
2249         /* store the ext csd for future reference */
2250         if (!mmc->ext_csd)
2251                 mmc->ext_csd = malloc(MMC_MAX_BLOCK_LEN);
2252         if (!mmc->ext_csd)
2253                 return -ENOMEM;
2254         memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN);
2255 #endif
2256         if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions))
2257                 return -EINVAL;
2258
2259         mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]];
2260
2261         if (mmc->version >= MMC_VERSION_4_2) {
2262                 /*
2263                  * According to the JEDEC Standard, the value of
2264                  * ext_csd's capacity is valid if the value is more
2265                  * than 2GB
2266                  */
2267                 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
2268                                 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
2269                                 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
2270                                 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
2271                 capacity *= MMC_MAX_BLOCK_LEN;
2272                 if ((capacity >> 20) > 2 * 1024)
2273                         mmc->capacity_user = capacity;
2274         }
2275
2276         if (mmc->version >= MMC_VERSION_4_5)
2277                 mmc->gen_cmd6_time = ext_csd[EXT_CSD_GENERIC_CMD6_TIME];
2278
2279         /* The partition data may be non-zero but it is only
2280          * effective if PARTITION_SETTING_COMPLETED is set in
2281          * EXT_CSD, so ignore any data if this bit is not set,
2282          * except for enabling the high-capacity group size
2283          * definition (see below).
2284          */
2285         part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
2286                             EXT_CSD_PARTITION_SETTING_COMPLETED);
2287
2288         mmc->part_switch_time = ext_csd[EXT_CSD_PART_SWITCH_TIME];
2289         /* Some eMMC set the value too low so set a minimum */
2290         if (mmc->part_switch_time < MMC_MIN_PART_SWITCH_TIME && mmc->part_switch_time)
2291                 mmc->part_switch_time = MMC_MIN_PART_SWITCH_TIME;
2292
2293         /* store the partition info of emmc */
2294         mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
2295         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
2296             ext_csd[EXT_CSD_BOOT_MULT])
2297                 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
2298         if (part_completed &&
2299             (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
2300                 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
2301
2302         mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
2303
2304         mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
2305
2306         for (i = 0; i < 4; i++) {
2307                 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
2308                 uint mult = (ext_csd[idx + 2] << 16) +
2309                         (ext_csd[idx + 1] << 8) + ext_csd[idx];
2310                 if (mult)
2311                         has_parts = true;
2312                 if (!part_completed)
2313                         continue;
2314                 mmc->capacity_gp[i] = mult;
2315                 mmc->capacity_gp[i] *=
2316                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2317                 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2318                 mmc->capacity_gp[i] <<= 19;
2319         }
2320
2321 #ifndef CONFIG_SPL_BUILD
2322         if (part_completed) {
2323                 mmc->enh_user_size =
2324                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
2325                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
2326                         ext_csd[EXT_CSD_ENH_SIZE_MULT];
2327                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2328                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2329                 mmc->enh_user_size <<= 19;
2330                 mmc->enh_user_start =
2331                         (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
2332                         (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
2333                         (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
2334                         ext_csd[EXT_CSD_ENH_START_ADDR];
2335                 if (mmc->high_capacity)
2336                         mmc->enh_user_start <<= 9;
2337         }
2338 #endif
2339
2340         /*
2341          * Host needs to enable ERASE_GRP_DEF bit if device is
2342          * partitioned. This bit will be lost every time after a reset
2343          * or power off. This will affect erase size.
2344          */
2345         if (part_completed)
2346                 has_parts = true;
2347         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
2348             (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
2349                 has_parts = true;
2350         if (has_parts) {
2351                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2352                                  EXT_CSD_ERASE_GROUP_DEF, 1);
2353
2354                 if (err)
2355                         goto error;
2356
2357                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
2358         }
2359
2360         if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
2361 #if CONFIG_IS_ENABLED(MMC_WRITE)
2362                 /* Read out group size from ext_csd */
2363                 mmc->erase_grp_size =
2364                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
2365 #endif
2366                 /*
2367                  * if high capacity and partition setting completed
2368                  * SEC_COUNT is valid even if it is smaller than 2 GiB
2369                  * JEDEC Standard JESD84-B45, 6.2.4
2370                  */
2371                 if (mmc->high_capacity && part_completed) {
2372                         capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
2373                                 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
2374                                 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
2375                                 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
2376                         capacity *= MMC_MAX_BLOCK_LEN;
2377                         mmc->capacity_user = capacity;
2378                 }
2379         }
2380 #if CONFIG_IS_ENABLED(MMC_WRITE)
2381         else {
2382                 /* Calculate the group size from the csd value. */
2383                 int erase_gsz, erase_gmul;
2384
2385                 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
2386                 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
2387                 mmc->erase_grp_size = (erase_gsz + 1)
2388                         * (erase_gmul + 1);
2389         }
2390 #endif
2391 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
2392         mmc->hc_wp_grp_size = 1024
2393                 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
2394                 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2395 #endif
2396
2397         mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
2398
2399         return 0;
2400 error:
2401         if (mmc->ext_csd) {
2402 #if !CONFIG_IS_ENABLED(MMC_TINY)
2403                 free(mmc->ext_csd);
2404 #endif
2405                 mmc->ext_csd = NULL;
2406         }
2407         return err;
2408 }
2409
2410 static int mmc_startup(struct mmc *mmc)
2411 {
2412         int err, i;
2413         uint mult, freq;
2414         u64 cmult, csize;
2415         struct mmc_cmd cmd;
2416         struct blk_desc *bdesc;
2417
2418 #ifdef CONFIG_MMC_SPI_CRC_ON
2419         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
2420                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
2421                 cmd.resp_type = MMC_RSP_R1;
2422                 cmd.cmdarg = 1;
2423                 err = mmc_send_cmd(mmc, &cmd, NULL);
2424                 if (err)
2425                         return err;
2426         }
2427 #endif
2428
2429         /* Put the Card in Identify Mode */
2430         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
2431                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
2432         cmd.resp_type = MMC_RSP_R2;
2433         cmd.cmdarg = 0;
2434
2435         err = mmc_send_cmd(mmc, &cmd, NULL);
2436
2437 #ifdef CONFIG_MMC_QUIRKS
2438         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) {
2439                 int retries = 4;
2440                 /*
2441                  * It has been seen that SEND_CID may fail on the first
2442                  * attempt, let's try a few more time
2443                  */
2444                 do {
2445                         err = mmc_send_cmd(mmc, &cmd, NULL);
2446                         if (!err)
2447                                 break;
2448                 } while (retries--);
2449         }
2450 #endif
2451
2452         if (err)
2453                 return err;
2454
2455         memcpy(mmc->cid, cmd.response, 16);
2456
2457         /*
2458          * For MMC cards, set the Relative Address.
2459          * For SD cards, get the Relatvie Address.
2460          * This also puts the cards into Standby State
2461          */
2462         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2463                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
2464                 cmd.cmdarg = mmc->rca << 16;
2465                 cmd.resp_type = MMC_RSP_R6;
2466
2467                 err = mmc_send_cmd(mmc, &cmd, NULL);
2468
2469                 if (err)
2470                         return err;
2471
2472                 if (IS_SD(mmc))
2473                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
2474         }
2475
2476         /* Get the Card-Specific Data */
2477         cmd.cmdidx = MMC_CMD_SEND_CSD;
2478         cmd.resp_type = MMC_RSP_R2;
2479         cmd.cmdarg = mmc->rca << 16;
2480
2481         err = mmc_send_cmd(mmc, &cmd, NULL);
2482
2483         if (err)
2484                 return err;
2485
2486         mmc->csd[0] = cmd.response[0];
2487         mmc->csd[1] = cmd.response[1];
2488         mmc->csd[2] = cmd.response[2];
2489         mmc->csd[3] = cmd.response[3];
2490
2491         if (mmc->version == MMC_VERSION_UNKNOWN) {
2492                 int version = (cmd.response[0] >> 26) & 0xf;
2493
2494                 switch (version) {
2495                 case 0:
2496                         mmc->version = MMC_VERSION_1_2;
2497                         break;
2498                 case 1:
2499                         mmc->version = MMC_VERSION_1_4;
2500                         break;
2501                 case 2:
2502                         mmc->version = MMC_VERSION_2_2;
2503                         break;
2504                 case 3:
2505                         mmc->version = MMC_VERSION_3;
2506                         break;
2507                 case 4:
2508                         mmc->version = MMC_VERSION_4;
2509                         break;
2510                 default:
2511                         mmc->version = MMC_VERSION_1_2;
2512                         break;
2513                 }
2514         }
2515
2516         /* divide frequency by 10, since the mults are 10x bigger */
2517         freq = fbase[(cmd.response[0] & 0x7)];
2518         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
2519
2520         mmc->legacy_speed = freq * mult;
2521         mmc_select_mode(mmc, MMC_LEGACY);
2522
2523         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
2524         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
2525 #if CONFIG_IS_ENABLED(MMC_WRITE)
2526
2527         if (IS_SD(mmc))
2528                 mmc->write_bl_len = mmc->read_bl_len;
2529         else
2530                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
2531 #endif
2532
2533         if (mmc->high_capacity) {
2534                 csize = (mmc->csd[1] & 0x3f) << 16
2535                         | (mmc->csd[2] & 0xffff0000) >> 16;
2536                 cmult = 8;
2537         } else {
2538                 csize = (mmc->csd[1] & 0x3ff) << 2
2539                         | (mmc->csd[2] & 0xc0000000) >> 30;
2540                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
2541         }
2542
2543         mmc->capacity_user = (csize + 1) << (cmult + 2);
2544         mmc->capacity_user *= mmc->read_bl_len;
2545         mmc->capacity_boot = 0;
2546         mmc->capacity_rpmb = 0;
2547         for (i = 0; i < 4; i++)
2548                 mmc->capacity_gp[i] = 0;
2549
2550         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
2551                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2552
2553 #if CONFIG_IS_ENABLED(MMC_WRITE)
2554         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
2555                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2556 #endif
2557
2558         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
2559                 cmd.cmdidx = MMC_CMD_SET_DSR;
2560                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
2561                 cmd.resp_type = MMC_RSP_NONE;
2562                 if (mmc_send_cmd(mmc, &cmd, NULL))
2563                         pr_warn("MMC: SET_DSR failed\n");
2564         }
2565
2566         /* Select the card, and put it into Transfer Mode */
2567         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2568                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
2569                 cmd.resp_type = MMC_RSP_R1;
2570                 cmd.cmdarg = mmc->rca << 16;
2571                 err = mmc_send_cmd(mmc, &cmd, NULL);
2572
2573                 if (err)
2574                         return err;
2575         }
2576
2577         /*
2578          * For SD, its erase group is always one sector
2579          */
2580 #if CONFIG_IS_ENABLED(MMC_WRITE)
2581         mmc->erase_grp_size = 1;
2582 #endif
2583         mmc->part_config = MMCPART_NOAVAILABLE;
2584
2585         err = mmc_startup_v4(mmc);
2586         if (err)
2587                 return err;
2588
2589         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
2590         if (err)
2591                 return err;
2592
2593 #if CONFIG_IS_ENABLED(MMC_TINY)
2594         mmc_set_clock(mmc, mmc->legacy_speed, false);
2595         mmc_select_mode(mmc, MMC_LEGACY);
2596         mmc_set_bus_width(mmc, 1);
2597 #else
2598         if (IS_SD(mmc)) {
2599                 err = sd_get_capabilities(mmc);
2600                 if (err)
2601                         return err;
2602                 err = sd_select_mode_and_width(mmc, mmc->card_caps);
2603         } else {
2604                 err = mmc_get_capabilities(mmc);
2605                 if (err)
2606                         return err;
2607                 err = mmc_select_mode_and_width(mmc, mmc->card_caps);
2608         }
2609 #endif
2610         if (err)
2611                 return err;
2612
2613         mmc->best_mode = mmc->selected_mode;
2614
2615         /* Fix the block length for DDR mode */
2616         if (mmc->ddr_mode) {
2617                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2618 #if CONFIG_IS_ENABLED(MMC_WRITE)
2619                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2620 #endif
2621         }
2622
2623         /* fill in device description */
2624         bdesc = mmc_get_blk_desc(mmc);
2625         bdesc->lun = 0;
2626         bdesc->hwpart = 0;
2627         bdesc->type = 0;
2628         bdesc->blksz = mmc->read_bl_len;
2629         bdesc->log2blksz = LOG2(bdesc->blksz);
2630         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
2631 #if !defined(CONFIG_SPL_BUILD) || \
2632                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
2633                 !CONFIG_IS_ENABLED(USE_TINY_PRINTF))
2634         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
2635                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
2636                 (mmc->cid[3] >> 16) & 0xffff);
2637         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
2638                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
2639                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
2640                 (mmc->cid[2] >> 24) & 0xff);
2641         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
2642                 (mmc->cid[2] >> 16) & 0xf);
2643 #else
2644         bdesc->vendor[0] = 0;
2645         bdesc->product[0] = 0;
2646         bdesc->revision[0] = 0;
2647 #endif
2648
2649 #if !defined(CONFIG_DM_MMC) && (!defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT))
2650         part_init(bdesc);
2651 #endif
2652
2653         return 0;
2654 }
2655
2656 static int mmc_send_if_cond(struct mmc *mmc)
2657 {
2658         struct mmc_cmd cmd;
2659         int err;
2660
2661         cmd.cmdidx = SD_CMD_SEND_IF_COND;
2662         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
2663         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
2664         cmd.resp_type = MMC_RSP_R7;
2665
2666         err = mmc_send_cmd(mmc, &cmd, NULL);
2667
2668         if (err)
2669                 return err;
2670
2671         if ((cmd.response[0] & 0xff) != 0xaa)
2672                 return -EOPNOTSUPP;
2673         else
2674                 mmc->version = SD_VERSION_2;
2675
2676         return 0;
2677 }
2678
2679 #if !CONFIG_IS_ENABLED(DM_MMC)
2680 /* board-specific MMC power initializations. */
2681 __weak void board_mmc_power_init(void)
2682 {
2683 }
2684 #endif
2685
2686 static int mmc_power_init(struct mmc *mmc)
2687 {
2688 #if CONFIG_IS_ENABLED(DM_MMC)
2689 #if CONFIG_IS_ENABLED(DM_REGULATOR)
2690         int ret;
2691
2692         ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
2693                                           &mmc->vmmc_supply);
2694         if (ret)
2695                 pr_debug("%s: No vmmc supply\n", mmc->dev->name);
2696
2697         ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
2698                                           &mmc->vqmmc_supply);
2699         if (ret)
2700                 pr_debug("%s: No vqmmc supply\n", mmc->dev->name);
2701 #endif
2702 #else /* !CONFIG_DM_MMC */
2703         /*
2704          * Driver model should use a regulator, as above, rather than calling
2705          * out to board code.
2706          */
2707         board_mmc_power_init();
2708 #endif
2709         return 0;
2710 }
2711
2712 /*
2713  * put the host in the initial state:
2714  * - turn on Vdd (card power supply)
2715  * - configure the bus width and clock to minimal values
2716  */
2717 static void mmc_set_initial_state(struct mmc *mmc)
2718 {
2719         int err;
2720
2721         /* First try to set 3.3V. If it fails set to 1.8V */
2722         err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
2723         if (err != 0)
2724                 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
2725         if (err != 0)
2726                 pr_warn("mmc: failed to set signal voltage\n");
2727
2728         mmc_select_mode(mmc, MMC_LEGACY);
2729         mmc_set_bus_width(mmc, 1);
2730         mmc_set_clock(mmc, 0, MMC_CLK_ENABLE);
2731 }
2732
2733 static int mmc_power_on(struct mmc *mmc)
2734 {
2735 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2736         if (mmc->vmmc_supply) {
2737                 int ret = regulator_set_enable(mmc->vmmc_supply, true);
2738
2739                 if (ret) {
2740                         puts("Error enabling VMMC supply\n");
2741                         return ret;
2742                 }
2743         }
2744 #endif
2745         return 0;
2746 }
2747
2748 static int mmc_power_off(struct mmc *mmc)
2749 {
2750         mmc_set_clock(mmc, 0, MMC_CLK_DISABLE);
2751 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2752         if (mmc->vmmc_supply) {
2753                 int ret = regulator_set_enable(mmc->vmmc_supply, false);
2754
2755                 if (ret) {
2756                         pr_debug("Error disabling VMMC supply\n");
2757                         return ret;
2758                 }
2759         }
2760 #endif
2761         return 0;
2762 }
2763
2764 static int mmc_power_cycle(struct mmc *mmc)
2765 {
2766         int ret;
2767
2768         ret = mmc_power_off(mmc);
2769         if (ret)
2770                 return ret;
2771
2772         ret = mmc_host_power_cycle(mmc);
2773         if (ret)
2774                 return ret;
2775
2776         /*
2777          * SD spec recommends at least 1ms of delay. Let's wait for 2ms
2778          * to be on the safer side.
2779          */
2780         udelay(2000);
2781         return mmc_power_on(mmc);
2782 }
2783
2784 int mmc_get_op_cond(struct mmc *mmc)
2785 {
2786         bool uhs_en = supports_uhs(mmc->cfg->host_caps);
2787         int err;
2788
2789         if (mmc->has_init)
2790                 return 0;
2791
2792 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
2793         mmc_adapter_card_type_ident();
2794 #endif
2795         err = mmc_power_init(mmc);
2796         if (err)
2797                 return err;
2798
2799 #ifdef CONFIG_MMC_QUIRKS
2800         mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN |
2801                       MMC_QUIRK_RETRY_SEND_CID |
2802                       MMC_QUIRK_RETRY_APP_CMD;
2803 #endif
2804
2805         err = mmc_power_cycle(mmc);
2806         if (err) {
2807                 /*
2808                  * if power cycling is not supported, we should not try
2809                  * to use the UHS modes, because we wouldn't be able to
2810                  * recover from an error during the UHS initialization.
2811                  */
2812                 pr_debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
2813                 uhs_en = false;
2814                 mmc->host_caps &= ~UHS_CAPS;
2815                 err = mmc_power_on(mmc);
2816         }
2817         if (err)
2818                 return err;
2819
2820 #if CONFIG_IS_ENABLED(DM_MMC)
2821         /* The device has already been probed ready for use */
2822 #else
2823         /* made sure it's not NULL earlier */
2824         err = mmc->cfg->ops->init(mmc);
2825         if (err)
2826                 return err;
2827 #endif
2828         mmc->ddr_mode = 0;
2829
2830 retry:
2831         mmc_set_initial_state(mmc);
2832
2833         /* Reset the Card */
2834         err = mmc_go_idle(mmc);
2835
2836         if (err)
2837                 return err;
2838
2839         /* The internal partition reset to user partition(0) at every CMD0 */
2840         mmc_get_blk_desc(mmc)->hwpart = 0;
2841
2842         /* Test for SD version 2 */
2843         err = mmc_send_if_cond(mmc);
2844
2845         /* Now try to get the SD card's operating condition */
2846         err = sd_send_op_cond(mmc, uhs_en);
2847         if (err && uhs_en) {
2848                 uhs_en = false;
2849                 mmc_power_cycle(mmc);
2850                 goto retry;
2851         }
2852
2853         /* If the command timed out, we check for an MMC card */
2854         if (err == -ETIMEDOUT) {
2855                 err = mmc_send_op_cond(mmc);
2856
2857                 if (err) {
2858 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2859                         pr_err("Card did not respond to voltage select!\n");
2860 #endif
2861                         return -EOPNOTSUPP;
2862                 }
2863         }
2864
2865         return err;
2866 }
2867
2868 int mmc_start_init(struct mmc *mmc)
2869 {
2870         bool no_card;
2871         int err = 0;
2872
2873         /*
2874          * all hosts are capable of 1 bit bus-width and able to use the legacy
2875          * timings.
2876          */
2877         mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(MMC_LEGACY) |
2878                          MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT;
2879 #if CONFIG_IS_ENABLED(DM_MMC)
2880         mmc_deferred_probe(mmc);
2881 #endif
2882 #if !defined(CONFIG_MMC_BROKEN_CD)
2883         no_card = mmc_getcd(mmc) == 0;
2884 #else
2885         no_card = 0;
2886 #endif
2887 #if !CONFIG_IS_ENABLED(DM_MMC)
2888         /* we pretend there's no card when init is NULL */
2889         no_card = no_card || (mmc->cfg->ops->init == NULL);
2890 #endif
2891         if (no_card) {
2892                 mmc->has_init = 0;
2893 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2894                 pr_err("MMC: no card present\n");
2895 #endif
2896                 return -ENOMEDIUM;
2897         }
2898
2899         err = mmc_get_op_cond(mmc);
2900
2901         if (!err)
2902                 mmc->init_in_progress = 1;
2903
2904         return err;
2905 }
2906
2907 static int mmc_complete_init(struct mmc *mmc)
2908 {
2909         int err = 0;
2910
2911         mmc->init_in_progress = 0;
2912         if (mmc->op_cond_pending)
2913                 err = mmc_complete_op_cond(mmc);
2914
2915         if (!err)
2916                 err = mmc_startup(mmc);
2917         if (err)
2918                 mmc->has_init = 0;
2919         else
2920                 mmc->has_init = 1;
2921         return err;
2922 }
2923
2924 int mmc_init(struct mmc *mmc)
2925 {
2926         int err = 0;
2927         __maybe_unused ulong start;
2928 #if CONFIG_IS_ENABLED(DM_MMC)
2929         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
2930
2931         upriv->mmc = mmc;
2932 #endif
2933         if (mmc->has_init)
2934                 return 0;
2935
2936         start = get_timer(0);
2937
2938         if (!mmc->init_in_progress)
2939                 err = mmc_start_init(mmc);
2940
2941         if (!err)
2942                 err = mmc_complete_init(mmc);
2943         if (err)
2944                 pr_info("%s: %d, time %lu\n", __func__, err, get_timer(start));
2945
2946         return err;
2947 }
2948
2949 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT) || \
2950     CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \
2951     CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
2952 int mmc_deinit(struct mmc *mmc)
2953 {
2954         u32 caps_filtered;
2955
2956         if (!mmc->has_init)
2957                 return 0;
2958
2959         if (IS_SD(mmc)) {
2960                 caps_filtered = mmc->card_caps &
2961                         ~(MMC_CAP(UHS_SDR12) | MMC_CAP(UHS_SDR25) |
2962                           MMC_CAP(UHS_SDR50) | MMC_CAP(UHS_DDR50) |
2963                           MMC_CAP(UHS_SDR104));
2964
2965                 return sd_select_mode_and_width(mmc, caps_filtered);
2966         } else {
2967                 caps_filtered = mmc->card_caps &
2968                         ~(MMC_CAP(MMC_HS_200) | MMC_CAP(MMC_HS_400));
2969
2970                 return mmc_select_mode_and_width(mmc, caps_filtered);
2971         }
2972 }
2973 #endif
2974
2975 int mmc_set_dsr(struct mmc *mmc, u16 val)
2976 {
2977         mmc->dsr = val;
2978         return 0;
2979 }
2980
2981 /* CPU-specific MMC initializations */
2982 __weak int cpu_mmc_init(bd_t *bis)
2983 {
2984         return -1;
2985 }
2986
2987 /* board-specific MMC initializations. */
2988 __weak int board_mmc_init(bd_t *bis)
2989 {
2990         return -1;
2991 }
2992
2993 void mmc_set_preinit(struct mmc *mmc, int preinit)
2994 {
2995         mmc->preinit = preinit;
2996 }
2997
2998 #if CONFIG_IS_ENABLED(DM_MMC)
2999 static int mmc_probe(bd_t *bis)
3000 {
3001         int ret, i;
3002         struct uclass *uc;
3003         struct udevice *dev;
3004
3005         ret = uclass_get(UCLASS_MMC, &uc);
3006         if (ret)
3007                 return ret;
3008
3009         /*
3010          * Try to add them in sequence order. Really with driver model we
3011          * should allow holes, but the current MMC list does not allow that.
3012          * So if we request 0, 1, 3 we will get 0, 1, 2.
3013          */
3014         for (i = 0; ; i++) {
3015                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
3016                 if (ret == -ENODEV)
3017                         break;
3018         }
3019         uclass_foreach_dev(dev, uc) {
3020                 ret = device_probe(dev);
3021                 if (ret)
3022                         pr_err("%s - probe failed: %d\n", dev->name, ret);
3023         }
3024
3025         return 0;
3026 }
3027 #else
3028 static int mmc_probe(bd_t *bis)
3029 {
3030         if (board_mmc_init(bis) < 0)
3031                 cpu_mmc_init(bis);
3032
3033         return 0;
3034 }
3035 #endif
3036
3037 int mmc_initialize(bd_t *bis)
3038 {
3039         static int initialized = 0;
3040         int ret;
3041         if (initialized)        /* Avoid initializing mmc multiple times */
3042                 return 0;
3043         initialized = 1;
3044
3045 #if !CONFIG_IS_ENABLED(BLK)
3046 #if !CONFIG_IS_ENABLED(MMC_TINY)
3047         mmc_list_init();
3048 #endif
3049 #endif
3050         ret = mmc_probe(bis);
3051         if (ret)
3052                 return ret;
3053
3054 #ifndef CONFIG_SPL_BUILD
3055         print_mmc_devices(',');
3056 #endif
3057
3058         mmc_do_preinit();
3059         return 0;
3060 }
3061
3062 #if CONFIG_IS_ENABLED(DM_MMC)
3063 int mmc_init_device(int num)
3064 {
3065         struct udevice *dev;
3066         struct mmc *m;
3067         int ret;
3068
3069         ret = uclass_get_device(UCLASS_MMC, num, &dev);
3070         if (ret)
3071                 return ret;
3072
3073         m = mmc_get_mmc_dev(dev);
3074         if (!m)
3075                 return 0;
3076 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
3077         mmc_set_preinit(m, 1);
3078 #endif
3079         if (m->preinit)
3080                 mmc_start_init(m);
3081
3082         return 0;
3083 }
3084 #endif
3085
3086 #ifdef CONFIG_CMD_BKOPS_ENABLE
3087 int mmc_set_bkops_enable(struct mmc *mmc)
3088 {
3089         int err;
3090         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
3091
3092         err = mmc_send_ext_csd(mmc, ext_csd);
3093         if (err) {
3094                 puts("Could not get ext_csd register values\n");
3095                 return err;
3096         }
3097
3098         if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
3099                 puts("Background operations not supported on device\n");
3100                 return -EMEDIUMTYPE;
3101         }
3102
3103         if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
3104                 puts("Background operations already enabled\n");
3105                 return 0;
3106         }
3107
3108         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
3109         if (err) {
3110                 puts("Failed to enable manual background operations\n");
3111                 return err;
3112         }
3113
3114         puts("Enabled manual background operations\n");
3115
3116         return 0;
3117 }
3118 #endif