drivers/mmc/mmc.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2008, Freescale Semiconductor, Inc
   4  * Andy Fleming
   5  *
   6  * Based vaguely on the Linux code
   7  */
   8
   9 #include <config.h>
  10 #include <common.h>
  11 #include <command.h>
  12 #include <dm.h>
  13 #include <dm/device-internal.h>
  14 #include <errno.h>
  15 #include <mmc.h>
  16 #include <part.h>
  17 #include <power/regulator.h>
  18 #include <malloc.h>
  19 #include <memalign.h>
  20 #include <linux/list.h>
  21 #include <div64.h>
  22 #include "mmc_private.h"
  23
  24 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage);
  25 static int mmc_power_cycle(struct mmc *mmc);
  26 #if !CONFIG_IS_ENABLED(MMC_TINY)
  27 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps);
  28 #endif
  29
  30 #if !CONFIG_IS_ENABLED(DM_MMC)
  31
  32 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
  33 static int mmc_wait_dat0(struct mmc *mmc, int state, int timeout)
  34 {
  35         return -ENOSYS;
  36 }
  37 #endif
  38
  39 __weak int board_mmc_getwp(struct mmc *mmc)
  40 {
  41         return -1;
  42 }
  43
  44 int mmc_getwp(struct mmc *mmc)
  45 {
  46         int wp;
  47
  48         wp = board_mmc_getwp(mmc);
  49
  50         if (wp < 0) {
  51                 if (mmc->cfg->ops->getwp)
  52                         wp = mmc->cfg->ops->getwp(mmc);
  53                 else
  54                         wp = 0;
  55         }
  56
  57         return wp;
  58 }
  59
  60 __weak int board_mmc_getcd(struct mmc *mmc)
  61 {
  62         return -1;
  63 }
  64 #endif
  65
  66 #ifdef CONFIG_MMC_TRACE
  67 void mmmc_trace_before_send(struct mmc *mmc, struct mmc_cmd *cmd)
  68 {
  69         printf("CMD_SEND:%d\n", cmd->cmdidx);
  70         printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
  71 }
  72
  73 void mmmc_trace_after_send(struct mmc *mmc, struct mmc_cmd *cmd, int ret)
  74 {
  75         int i;
  76         u8 *ptr;
  77
  78         if (ret) {
  79                 printf("\t\tRET\t\t\t %d\n", ret);
  80         } else {
  81                 switch (cmd->resp_type) {
  82                 case MMC_RSP_NONE:
  83                         printf("\t\tMMC_RSP_NONE\n");
  84                         break;
  85                 case MMC_RSP_R1:
  86                         printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
  87                                 cmd->response[0]);
  88                         break;
  89                 case MMC_RSP_R1b:
  90                         printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
  91                                 cmd->response[0]);
  92                         break;
  93                 case MMC_RSP_R2:
  94                         printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
  95                                 cmd->response[0]);
  96                         printf("\t\t          \t\t 0x%08X \n",
  97                                 cmd->response[1]);
  98                         printf("\t\t          \t\t 0x%08X \n",
  99                                 cmd->response[2]);
 100                         printf("\t\t          \t\t 0x%08X \n",
 101                                 cmd->response[3]);
 102                         printf("\n");
 103                         printf("\t\t\t\t\tDUMPING DATA\n");
 104                         for (i = 0; i < 4; i++) {
 105                                 int j;
 106                                 printf("\t\t\t\t\t%03d - ", i*4);
 107                                 ptr = (u8 *)&cmd->response[i];
 108                                 ptr += 3;
 109                                 for (j = 0; j < 4; j++)
 110                                         printf("%02X ", *ptr--);
 111                                 printf("\n");
 112                         }
 113                         break;
 114                 case MMC_RSP_R3:
 115                         printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
 116                                 cmd->response[0]);
 117                         break;
 118                 default:
 119                         printf("\t\tERROR MMC rsp not supported\n");
 120                         break;
 121                 }
 122         }
 123 }
 124
 125 void mmc_trace_state(struct mmc *mmc, struct mmc_cmd *cmd)
 126 {
 127         int status;
 128
 129         status = (cmd->response[0] & MMC_STATUS_CURR_STATE) >> 9;
 130         printf("CURR STATE:%d\n", status);
 131 }
 132 #endif
 133
 134 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
 135 const char *mmc_mode_name(enum bus_mode mode)
 136 {
 137         static const char *const names[] = {
 138               [MMC_LEGACY]      = "MMC legacy",
 139               [SD_LEGACY]       = "SD Legacy",
 140               [MMC_HS]          = "MMC High Speed (26MHz)",
 141               [SD_HS]           = "SD High Speed (50MHz)",
 142               [UHS_SDR12]       = "UHS SDR12 (25MHz)",
 143               [UHS_SDR25]       = "UHS SDR25 (50MHz)",
 144               [UHS_SDR50]       = "UHS SDR50 (100MHz)",
 145               [UHS_SDR104]      = "UHS SDR104 (208MHz)",
 146               [UHS_DDR50]       = "UHS DDR50 (50MHz)",
 147               [MMC_HS_52]       = "MMC High Speed (52MHz)",
 148               [MMC_DDR_52]      = "MMC DDR52 (52MHz)",
 149               [MMC_HS_200]      = "HS200 (200MHz)",
 150               [MMC_HS_400]      = "HS400 (200MHz)",
 151         };
 152
 153         if (mode >= MMC_MODES_END)
 154                 return "Unknown mode";
 155         else
 156                 return names[mode];
 157 }
 158 #endif
 159
 160 static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
 161 {
 162         static const int freqs[] = {
 163               [MMC_LEGACY]      = 25000000,
 164               [SD_LEGACY]       = 25000000,
 165               [MMC_HS]          = 26000000,
 166               [SD_HS]           = 50000000,
 167               [MMC_HS_52]       = 52000000,
 168               [MMC_DDR_52]      = 52000000,
 169               [UHS_SDR12]       = 25000000,
 170               [UHS_SDR25]       = 50000000,
 171               [UHS_SDR50]       = 100000000,
 172               [UHS_DDR50]       = 50000000,
 173               [UHS_SDR104]      = 208000000,
 174               [MMC_HS_200]      = 200000000,
 175               [MMC_HS_400]      = 200000000,
 176         };
 177
 178         if (mode == MMC_LEGACY)
 179                 return mmc->legacy_speed;
 180         else if (mode >= MMC_MODES_END)
 181                 return 0;
 182         else
 183                 return freqs[mode];
 184 }
 185
 186 static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
 187 {
 188         mmc->selected_mode = mode;
 189         mmc->tran_speed = mmc_mode2freq(mmc, mode);
 190         mmc->ddr_mode = mmc_is_mode_ddr(mode);
 191         pr_debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
 192                  mmc->tran_speed / 1000000);
 193         return 0;
 194 }
 195
 196 #if !CONFIG_IS_ENABLED(DM_MMC)
 197 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
 198 {
 199         int ret;
 200
 201         mmmc_trace_before_send(mmc, cmd);
 202         ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
 203         mmmc_trace_after_send(mmc, cmd, ret);
 204
 205         return ret;
 206 }
 207 #endif
 208
 209 int mmc_send_status(struct mmc *mmc, int timeout)
 210 {
 211         struct mmc_cmd cmd;
 212         int err, retries = 5;
 213
 214         cmd.cmdidx = MMC_CMD_SEND_STATUS;
 215         cmd.resp_type = MMC_RSP_R1;
 216         if (!mmc_host_is_spi(mmc))
 217                 cmd.cmdarg = mmc->rca << 16;
 218
 219         while (1) {
 220                 err = mmc_send_cmd(mmc, &cmd, NULL);
 221                 if (!err) {
 222                         if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
 223                             (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
 224                              MMC_STATE_PRG)
 225                                 break;
 226
 227                         if (cmd.response[0] & MMC_STATUS_MASK) {
 228 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 229                                 pr_err("Status Error: 0x%08X\n",
 230                                        cmd.response[0]);
 231 #endif
 232                                 return -ECOMM;
 233                         }
 234                 } else if (--retries < 0)
 235                         return err;
 236
 237                 if (timeout-- <= 0)
 238                         break;
 239
 240                 udelay(1000);
 241         }
 242
 243         mmc_trace_state(mmc, &cmd);
 244         if (timeout <= 0) {
 245 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 246                 pr_err("Timeout waiting card ready\n");
 247 #endif
 248                 return -ETIMEDOUT;
 249         }
 250
 251         return 0;
 252 }
 253
 254 int mmc_set_blocklen(struct mmc *mmc, int len)
 255 {
 256         struct mmc_cmd cmd;
 257         int err;
 258
 259         if (mmc->ddr_mode)
 260                 return 0;
 261
 262         cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
 263         cmd.resp_type = MMC_RSP_R1;
 264         cmd.cmdarg = len;
 265
 266         err = mmc_send_cmd(mmc, &cmd, NULL);
 267
 268 #ifdef CONFIG_MMC_QUIRKS
 269         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SET_BLOCKLEN)) {
 270                 int retries = 4;
 271                 /*
 272                  * It has been seen that SET_BLOCKLEN may fail on the first
 273                  * attempt, let's try a few more time
 274                  */
 275                 do {
 276                         err = mmc_send_cmd(mmc, &cmd, NULL);
 277                         if (!err)
 278                                 break;
 279                 } while (retries--);
 280         }
 281 #endif
 282
 283         return err;
 284 }
 285
 286 #ifdef MMC_SUPPORTS_TUNING
 287 static const u8 tuning_blk_pattern_4bit[] = {
 288         0xff, 0x0f, 0xff, 0x00, 0xff, 0xcc, 0xc3, 0xcc,
 289         0xc3, 0x3c, 0xcc, 0xff, 0xfe, 0xff, 0xfe, 0xef,
 290         0xff, 0xdf, 0xff, 0xdd, 0xff, 0xfb, 0xff, 0xfb,
 291         0xbf, 0xff, 0x7f, 0xff, 0x77, 0xf7, 0xbd, 0xef,
 292         0xff, 0xf0, 0xff, 0xf0, 0x0f, 0xfc, 0xcc, 0x3c,
 293         0xcc, 0x33, 0xcc, 0xcf, 0xff, 0xef, 0xff, 0xee,
 294         0xff, 0xfd, 0xff, 0xfd, 0xdf, 0xff, 0xbf, 0xff,
 295         0xbb, 0xff, 0xf7, 0xff, 0xf7, 0x7f, 0x7b, 0xde,
 296 };
 297
 298 static const u8 tuning_blk_pattern_8bit[] = {
 299         0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00, 0x00,
 300         0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc, 0xcc,
 301         0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff, 0xff,
 302         0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee, 0xff,
 303         0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd, 0xdd,
 304         0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff, 0xbb,
 305         0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff, 0xff,
 306         0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee, 0xff,
 307         0xff, 0xff, 0xff, 0x00, 0xff, 0xff, 0xff, 0x00,
 308         0x00, 0xff, 0xff, 0xcc, 0xcc, 0xcc, 0x33, 0xcc,
 309         0xcc, 0xcc, 0x33, 0x33, 0xcc, 0xcc, 0xcc, 0xff,
 310         0xff, 0xff, 0xee, 0xff, 0xff, 0xff, 0xee, 0xee,
 311         0xff, 0xff, 0xff, 0xdd, 0xff, 0xff, 0xff, 0xdd,
 312         0xdd, 0xff, 0xff, 0xff, 0xbb, 0xff, 0xff, 0xff,
 313         0xbb, 0xbb, 0xff, 0xff, 0xff, 0x77, 0xff, 0xff,
 314         0xff, 0x77, 0x77, 0xff, 0x77, 0xbb, 0xdd, 0xee,
 315 };
 316
 317 int mmc_send_tuning(struct mmc *mmc, u32 opcode, int *cmd_error)
 318 {
 319         struct mmc_cmd cmd;
 320         struct mmc_data data;
 321         const u8 *tuning_block_pattern;
 322         int size, err;
 323
 324         if (mmc->bus_width == 8) {
 325                 tuning_block_pattern = tuning_blk_pattern_8bit;
 326                 size = sizeof(tuning_blk_pattern_8bit);
 327         } else if (mmc->bus_width == 4) {
 328                 tuning_block_pattern = tuning_blk_pattern_4bit;
 329                 size = sizeof(tuning_blk_pattern_4bit);
 330         } else {
 331                 return -EINVAL;
 332         }
 333
 334         ALLOC_CACHE_ALIGN_BUFFER(u8, data_buf, size);
 335
 336         cmd.cmdidx = opcode;
 337         cmd.cmdarg = 0;
 338         cmd.resp_type = MMC_RSP_R1;
 339
 340         data.dest = (void *)data_buf;
 341         data.blocks = 1;
 342         data.blocksize = size;
 343         data.flags = MMC_DATA_READ;
 344
 345         err = mmc_send_cmd(mmc, &cmd, &data);
 346         if (err)
 347                 return err;
 348
 349         if (memcmp(data_buf, tuning_block_pattern, size))
 350                 return -EIO;
 351
 352         return 0;
 353 }
 354 #endif
 355
 356 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
 357                            lbaint_t blkcnt)
 358 {
 359         struct mmc_cmd cmd;
 360         struct mmc_data data;
 361
 362         if (blkcnt > 1)
 363                 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
 364         else
 365                 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
 366
 367         if (mmc->high_capacity)
 368                 cmd.cmdarg = start;
 369         else
 370                 cmd.cmdarg = start * mmc->read_bl_len;
 371
 372         cmd.resp_type = MMC_RSP_R1;
 373
 374         data.dest = dst;
 375         data.blocks = blkcnt;
 376         data.blocksize = mmc->read_bl_len;
 377         data.flags = MMC_DATA_READ;
 378
 379         if (mmc_send_cmd(mmc, &cmd, &data))
 380                 return 0;
 381
 382         if (blkcnt > 1) {
 383                 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
 384                 cmd.cmdarg = 0;
 385                 cmd.resp_type = MMC_RSP_R1b;
 386                 if (mmc_send_cmd(mmc, &cmd, NULL)) {
 387 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 388                         pr_err("mmc fail to send stop cmd\n");
 389 #endif
 390                         return 0;
 391                 }
 392         }
 393
 394         return blkcnt;
 395 }
 396
 397 #if CONFIG_IS_ENABLED(BLK)
 398 ulong mmc_bread(struct udevice *dev, lbaint_t start, lbaint_t blkcnt, void *dst)
 399 #else
 400 ulong mmc_bread(struct blk_desc *block_dev, lbaint_t start, lbaint_t blkcnt,
 401                 void *dst)
 402 #endif
 403 {
 404 #if CONFIG_IS_ENABLED(BLK)
 405         struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
 406 #endif
 407         int dev_num = block_dev->devnum;
 408         int err;
 409         lbaint_t cur, blocks_todo = blkcnt;
 410
 411         if (blkcnt == 0)
 412                 return 0;
 413
 414         struct mmc *mmc = find_mmc_device(dev_num);
 415         if (!mmc)
 416                 return 0;
 417
 418         if (CONFIG_IS_ENABLED(MMC_TINY))
 419                 err = mmc_switch_part(mmc, block_dev->hwpart);
 420         else
 421                 err = blk_dselect_hwpart(block_dev, block_dev->hwpart);
 422
 423         if (err < 0)
 424                 return 0;
 425
 426         if ((start + blkcnt) > block_dev->lba) {
 427 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
 428                 pr_err("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
 429                        start + blkcnt, block_dev->lba);
 430 #endif
 431                 return 0;
 432         }
 433
 434         if (mmc_set_blocklen(mmc, mmc->read_bl_len)) {
 435                 pr_debug("%s: Failed to set blocklen\n", __func__);
 436                 return 0;
 437         }
 438
 439         do {
 440                 cur = (blocks_todo > mmc->cfg->b_max) ?
 441                         mmc->cfg->b_max : blocks_todo;
 442                 if (mmc_read_blocks(mmc, dst, start, cur) != cur) {
 443                         pr_debug("%s: Failed to read blocks\n", __func__);
 444                         return 0;
 445                 }
 446                 blocks_todo -= cur;
 447                 start += cur;
 448                 dst += cur * mmc->read_bl_len;
 449         } while (blocks_todo > 0);
 450
 451         return blkcnt;
 452 }
 453
 454 static int mmc_go_idle(struct mmc *mmc)
 455 {
 456         struct mmc_cmd cmd;
 457         int err;
 458
 459         udelay(1000);
 460
 461         cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
 462         cmd.cmdarg = 0;
 463         cmd.resp_type = MMC_RSP_NONE;
 464
 465         err = mmc_send_cmd(mmc, &cmd, NULL);
 466
 467         if (err)
 468                 return err;
 469
 470         udelay(2000);
 471
 472         return 0;
 473 }
 474
 475 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 476 static int mmc_switch_voltage(struct mmc *mmc, int signal_voltage)
 477 {
 478         struct mmc_cmd cmd;
 479         int err = 0;
 480
 481         /*
 482          * Send CMD11 only if the request is to switch the card to
 483          * 1.8V signalling.
 484          */
 485         if (signal_voltage == MMC_SIGNAL_VOLTAGE_330)
 486                 return mmc_set_signal_voltage(mmc, signal_voltage);
 487
 488         cmd.cmdidx = SD_CMD_SWITCH_UHS18V;
 489         cmd.cmdarg = 0;
 490         cmd.resp_type = MMC_RSP_R1;
 491
 492         err = mmc_send_cmd(mmc, &cmd, NULL);
 493         if (err)
 494                 return err;
 495
 496         if (!mmc_host_is_spi(mmc) && (cmd.response[0] & MMC_STATUS_ERROR))
 497                 return -EIO;
 498
 499         /*
 500          * The card should drive cmd and dat[0:3] low immediately
 501          * after the response of cmd11, but wait 100 us to be sure
 502          */
 503         err = mmc_wait_dat0(mmc, 0, 100);
 504         if (err == -ENOSYS)
 505                 udelay(100);
 506         else if (err)
 507                 return -ETIMEDOUT;
 508
 509         /*
 510          * During a signal voltage level switch, the clock must be gated
 511          * for 5 ms according to the SD spec
 512          */
 513         mmc_set_clock(mmc, mmc->clock, MMC_CLK_DISABLE);
 514
 515         err = mmc_set_signal_voltage(mmc, signal_voltage);
 516         if (err)
 517                 return err;
 518
 519         /* Keep clock gated for at least 10 ms, though spec only says 5 ms */
 520         mdelay(10);
 521         mmc_set_clock(mmc, mmc->clock, MMC_CLK_ENABLE);
 522
 523         /*
 524          * Failure to switch is indicated by the card holding
 525          * dat[0:3] low. Wait for at least 1 ms according to spec
 526          */
 527         err = mmc_wait_dat0(mmc, 1, 1000);
 528         if (err == -ENOSYS)
 529                 udelay(1000);
 530         else if (err)
 531                 return -ETIMEDOUT;
 532
 533         return 0;
 534 }
 535 #endif
 536
 537 static int sd_send_op_cond(struct mmc *mmc, bool uhs_en)
 538 {
 539         int timeout = 1000;
 540         int err;
 541         struct mmc_cmd cmd;
 542
 543         while (1) {
 544                 cmd.cmdidx = MMC_CMD_APP_CMD;
 545                 cmd.resp_type = MMC_RSP_R1;
 546                 cmd.cmdarg = 0;
 547
 548                 err = mmc_send_cmd(mmc, &cmd, NULL);
 549
 550                 if (err)
 551                         return err;
 552
 553                 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
 554                 cmd.resp_type = MMC_RSP_R3;
 555
 556                 /*
 557                  * Most cards do not answer if some reserved bits
 558                  * in the ocr are set. However, Some controller
 559                  * can set bit 7 (reserved for low voltages), but
 560                  * how to manage low voltages SD card is not yet
 561                  * specified.
 562                  */
 563                 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
 564                         (mmc->cfg->voltages & 0xff8000);
 565
 566                 if (mmc->version == SD_VERSION_2)
 567                         cmd.cmdarg |= OCR_HCS;
 568
 569                 if (uhs_en)
 570                         cmd.cmdarg |= OCR_S18R;
 571
 572                 err = mmc_send_cmd(mmc, &cmd, NULL);
 573
 574                 if (err)
 575                         return err;
 576
 577                 if (cmd.response[0] & OCR_BUSY)
 578                         break;
 579
 580                 if (timeout-- <= 0)
 581                         return -EOPNOTSUPP;
 582
 583                 udelay(1000);
 584         }
 585
 586         if (mmc->version != SD_VERSION_2)
 587                 mmc->version = SD_VERSION_1_0;
 588
 589         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 590                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 591                 cmd.resp_type = MMC_RSP_R3;
 592                 cmd.cmdarg = 0;
 593
 594                 err = mmc_send_cmd(mmc, &cmd, NULL);
 595
 596                 if (err)
 597                         return err;
 598         }
 599
 600         mmc->ocr = cmd.response[0];
 601
 602 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
 603         if (uhs_en && !(mmc_host_is_spi(mmc)) && (cmd.response[0] & 0x41000000)
 604             == 0x41000000) {
 605                 err = mmc_switch_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
 606                 if (err)
 607                         return err;
 608         }
 609 #endif
 610
 611         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 612         mmc->rca = 0;
 613
 614         return 0;
 615 }
 616
 617 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
 618 {
 619         struct mmc_cmd cmd;
 620         int err;
 621
 622         cmd.cmdidx = MMC_CMD_SEND_OP_COND;
 623         cmd.resp_type = MMC_RSP_R3;
 624         cmd.cmdarg = 0;
 625         if (use_arg && !mmc_host_is_spi(mmc))
 626                 cmd.cmdarg = OCR_HCS |
 627                         (mmc->cfg->voltages &
 628                         (mmc->ocr & OCR_VOLTAGE_MASK)) |
 629                         (mmc->ocr & OCR_ACCESS_MODE);
 630
 631         err = mmc_send_cmd(mmc, &cmd, NULL);
 632         if (err)
 633                 return err;
 634         mmc->ocr = cmd.response[0];
 635         return 0;
 636 }
 637
 638 static int mmc_send_op_cond(struct mmc *mmc)
 639 {
 640         int err, i;
 641
 642         /* Some cards seem to need this */
 643         mmc_go_idle(mmc);
 644
 645         /* Asking to the card its capabilities */
 646         for (i = 0; i < 2; i++) {
 647                 err = mmc_send_op_cond_iter(mmc, i != 0);
 648                 if (err)
 649                         return err;
 650
 651                 /* exit if not busy (flag seems to be inverted) */
 652                 if (mmc->ocr & OCR_BUSY)
 653                         break;
 654         }
 655         mmc->op_cond_pending = 1;
 656         return 0;
 657 }
 658
 659 static int mmc_complete_op_cond(struct mmc *mmc)
 660 {
 661         struct mmc_cmd cmd;
 662         int timeout = 1000;
 663         ulong start;
 664         int err;
 665
 666         mmc->op_cond_pending = 0;
 667         if (!(mmc->ocr & OCR_BUSY)) {
 668                 /* Some cards seem to need this */
 669                 mmc_go_idle(mmc);
 670
 671                 start = get_timer(0);
 672                 while (1) {
 673                         err = mmc_send_op_cond_iter(mmc, 1);
 674                         if (err)
 675                                 return err;
 676                         if (mmc->ocr & OCR_BUSY)
 677                                 break;
 678                         if (get_timer(start) > timeout)
 679                                 return -EOPNOTSUPP;
 680                         udelay(100);
 681                 }
 682         }
 683
 684         if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
 685                 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
 686                 cmd.resp_type = MMC_RSP_R3;
 687                 cmd.cmdarg = 0;
 688
 689                 err = mmc_send_cmd(mmc, &cmd, NULL);
 690
 691                 if (err)
 692                         return err;
 693
 694                 mmc->ocr = cmd.response[0];
 695         }
 696
 697         mmc->version = MMC_VERSION_UNKNOWN;
 698
 699         mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
 700         mmc->rca = 1;
 701
 702         return 0;
 703 }
 704
 705
 706 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
 707 {
 708         struct mmc_cmd cmd;
 709         struct mmc_data data;
 710         int err;
 711
 712         /* Get the Card Status Register */
 713         cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
 714         cmd.resp_type = MMC_RSP_R1;
 715         cmd.cmdarg = 0;
 716
 717         data.dest = (char *)ext_csd;
 718         data.blocks = 1;
 719         data.blocksize = MMC_MAX_BLOCK_LEN;
 720         data.flags = MMC_DATA_READ;
 721
 722         err = mmc_send_cmd(mmc, &cmd, &data);
 723
 724         return err;
 725 }
 726
 727 int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
 728 {
 729         struct mmc_cmd cmd;
 730         int timeout = 1000;
 731         int retries = 3;
 732         int ret;
 733
 734         cmd.cmdidx = MMC_CMD_SWITCH;
 735         cmd.resp_type = MMC_RSP_R1b;
 736         cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
 737                                  (index << 16) |
 738                                  (value << 8);
 739
 740         while (retries > 0) {
 741                 ret = mmc_send_cmd(mmc, &cmd, NULL);
 742
 743                 /* Waiting for the ready status */
 744                 if (!ret) {
 745                         ret = mmc_send_status(mmc, timeout);
 746                         return ret;
 747                 }
 748
 749                 retries--;
 750         }
 751
 752         return ret;
 753
 754 }
 755
 756 #if !CONFIG_IS_ENABLED(MMC_TINY)
 757 static int mmc_set_card_speed(struct mmc *mmc, enum bus_mode mode)
 758 {
 759         int err;
 760         int speed_bits;
 761
 762         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
 763
 764         switch (mode) {
 765         case MMC_HS:
 766         case MMC_HS_52:
 767         case MMC_DDR_52:
 768                 speed_bits = EXT_CSD_TIMING_HS;
 769                 break;
 770 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 771         case MMC_HS_200:
 772                 speed_bits = EXT_CSD_TIMING_HS200;
 773                 break;
 774 #endif
 775 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 776         case MMC_HS_400:
 777                 speed_bits = EXT_CSD_TIMING_HS400;
 778                 break;
 779 #endif
 780         case MMC_LEGACY:
 781                 speed_bits = EXT_CSD_TIMING_LEGACY;
 782                 break;
 783         default:
 784                 return -EINVAL;
 785         }
 786         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING,
 787                          speed_bits);
 788         if (err)
 789                 return err;
 790
 791         if ((mode == MMC_HS) || (mode == MMC_HS_52)) {
 792                 /* Now check to see that it worked */
 793                 err = mmc_send_ext_csd(mmc, test_csd);
 794                 if (err)
 795                         return err;
 796
 797                 /* No high-speed support */
 798                 if (!test_csd[EXT_CSD_HS_TIMING])
 799                         return -ENOTSUPP;
 800         }
 801
 802         return 0;
 803 }
 804
 805 static int mmc_get_capabilities(struct mmc *mmc)
 806 {
 807         u8 *ext_csd = mmc->ext_csd;
 808         char cardtype;
 809
 810         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(MMC_LEGACY);
 811
 812         if (mmc_host_is_spi(mmc))
 813                 return 0;
 814
 815         /* Only version 4 supports high-speed */
 816         if (mmc->version < MMC_VERSION_4)
 817                 return 0;
 818
 819         if (!ext_csd) {
 820                 pr_err("No ext_csd found!\n"); /* this should enver happen */
 821                 return -ENOTSUPP;
 822         }
 823
 824         mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
 825
 826         cardtype = ext_csd[EXT_CSD_CARD_TYPE];
 827         mmc->cardtype = cardtype;
 828
 829 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 830         if (cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
 831                         EXT_CSD_CARD_TYPE_HS200_1_8V)) {
 832                 mmc->card_caps |= MMC_MODE_HS200;
 833         }
 834 #endif
 835 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
 836         if (cardtype & (EXT_CSD_CARD_TYPE_HS400_1_2V |
 837                         EXT_CSD_CARD_TYPE_HS400_1_8V)) {
 838                 mmc->card_caps |= MMC_MODE_HS400;
 839         }
 840 #endif
 841         if (cardtype & EXT_CSD_CARD_TYPE_52) {
 842                 if (cardtype & EXT_CSD_CARD_TYPE_DDR_52)
 843                         mmc->card_caps |= MMC_MODE_DDR_52MHz;
 844                 mmc->card_caps |= MMC_MODE_HS_52MHz;
 845         }
 846         if (cardtype & EXT_CSD_CARD_TYPE_26)
 847                 mmc->card_caps |= MMC_MODE_HS;
 848
 849         return 0;
 850 }
 851 #endif
 852
 853 static int mmc_set_capacity(struct mmc *mmc, int part_num)
 854 {
 855         switch (part_num) {
 856         case 0:
 857                 mmc->capacity = mmc->capacity_user;
 858                 break;
 859         case 1:
 860         case 2:
 861                 mmc->capacity = mmc->capacity_boot;
 862                 break;
 863         case 3:
 864                 mmc->capacity = mmc->capacity_rpmb;
 865                 break;
 866         case 4:
 867         case 5:
 868         case 6:
 869         case 7:
 870                 mmc->capacity = mmc->capacity_gp[part_num - 4];
 871                 break;
 872         default:
 873                 return -1;
 874         }
 875
 876         mmc_get_blk_desc(mmc)->lba = lldiv(mmc->capacity, mmc->read_bl_len);
 877
 878         return 0;
 879 }
 880
 881 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
 882 static int mmc_boot_part_access_chk(struct mmc *mmc, unsigned int part_num)
 883 {
 884         int forbidden = 0;
 885         bool change = false;
 886
 887         if (part_num & PART_ACCESS_MASK)
 888                 forbidden = MMC_CAP(MMC_HS_200);
 889
 890         if (MMC_CAP(mmc->selected_mode) & forbidden) {
 891                 pr_debug("selected mode (%s) is forbidden for part %d\n",
 892                          mmc_mode_name(mmc->selected_mode), part_num);
 893                 change = true;
 894         } else if (mmc->selected_mode != mmc->best_mode) {
 895                 pr_debug("selected mode is not optimal\n");
 896                 change = true;
 897         }
 898
 899         if (change)
 900                 return mmc_select_mode_and_width(mmc,
 901                                                  mmc->card_caps & ~forbidden);
 902
 903         return 0;
 904 }
 905 #else
 906 static inline int mmc_boot_part_access_chk(struct mmc *mmc,
 907                                            unsigned int part_num)
 908 {
 909         return 0;
 910 }
 911 #endif
 912
 913 int mmc_switch_part(struct mmc *mmc, unsigned int part_num)
 914 {
 915         int ret;
 916
 917         ret = mmc_boot_part_access_chk(mmc, part_num);
 918         if (ret)
 919                 return ret;
 920
 921         ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
 922                          (mmc->part_config & ~PART_ACCESS_MASK)
 923                          | (part_num & PART_ACCESS_MASK));
 924
 925         /*
 926          * Set the capacity if the switch succeeded or was intended
 927          * to return to representing the raw device.
 928          */
 929         if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0))) {
 930                 ret = mmc_set_capacity(mmc, part_num);
 931                 mmc_get_blk_desc(mmc)->hwpart = part_num;
 932         }
 933
 934         return ret;
 935 }
 936
 937 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
 938 int mmc_hwpart_config(struct mmc *mmc,
 939                       const struct mmc_hwpart_conf *conf,
 940                       enum mmc_hwpart_conf_mode mode)
 941 {
 942         u8 part_attrs = 0;
 943         u32 enh_size_mult;
 944         u32 enh_start_addr;
 945         u32 gp_size_mult[4];
 946         u32 max_enh_size_mult;
 947         u32 tot_enh_size_mult = 0;
 948         u8 wr_rel_set;
 949         int i, pidx, err;
 950         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
 951
 952         if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
 953                 return -EINVAL;
 954
 955         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
 956                 pr_err("eMMC >= 4.4 required for enhanced user data area\n");
 957                 return -EMEDIUMTYPE;
 958         }
 959
 960         if (!(mmc->part_support & PART_SUPPORT)) {
 961                 pr_err("Card does not support partitioning\n");
 962                 return -EMEDIUMTYPE;
 963         }
 964
 965         if (!mmc->hc_wp_grp_size) {
 966                 pr_err("Card does not define HC WP group size\n");
 967                 return -EMEDIUMTYPE;
 968         }
 969
 970         /* check partition alignment and total enhanced size */
 971         if (conf->user.enh_size) {
 972                 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
 973                     conf->user.enh_start % mmc->hc_wp_grp_size) {
 974                         pr_err("User data enhanced area not HC WP group "
 975                                "size aligned\n");
 976                         return -EINVAL;
 977                 }
 978                 part_attrs |= EXT_CSD_ENH_USR;
 979                 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
 980                 if (mmc->high_capacity) {
 981                         enh_start_addr = conf->user.enh_start;
 982                 } else {
 983                         enh_start_addr = (conf->user.enh_start << 9);
 984                 }
 985         } else {
 986                 enh_size_mult = 0;
 987                 enh_start_addr = 0;
 988         }
 989         tot_enh_size_mult += enh_size_mult;
 990
 991         for (pidx = 0; pidx < 4; pidx++) {
 992                 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
 993                         pr_err("GP%i partition not HC WP group size "
 994                                "aligned\n", pidx+1);
 995                         return -EINVAL;
 996                 }
 997                 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
 998                 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
 999                         part_attrs |= EXT_CSD_ENH_GP(pidx);
1000                         tot_enh_size_mult += gp_size_mult[pidx];
1001                 }
1002         }
1003
1004         if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
1005                 pr_err("Card does not support enhanced attribute\n");
1006                 return -EMEDIUMTYPE;
1007         }
1008
1009         err = mmc_send_ext_csd(mmc, ext_csd);
1010         if (err)
1011                 return err;
1012
1013         max_enh_size_mult =
1014                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
1015                 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
1016                 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
1017         if (tot_enh_size_mult > max_enh_size_mult) {
1018                 pr_err("Total enhanced size exceeds maximum (%u > %u)\n",
1019                        tot_enh_size_mult, max_enh_size_mult);
1020                 return -EMEDIUMTYPE;
1021         }
1022
1023         /* The default value of EXT_CSD_WR_REL_SET is device
1024          * dependent, the values can only be changed if the
1025          * EXT_CSD_HS_CTRL_REL bit is set. The values can be
1026          * changed only once and before partitioning is completed. */
1027         wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1028         if (conf->user.wr_rel_change) {
1029                 if (conf->user.wr_rel_set)
1030                         wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
1031                 else
1032                         wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
1033         }
1034         for (pidx = 0; pidx < 4; pidx++) {
1035                 if (conf->gp_part[pidx].wr_rel_change) {
1036                         if (conf->gp_part[pidx].wr_rel_set)
1037                                 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
1038                         else
1039                                 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
1040                 }
1041         }
1042
1043         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
1044             !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
1045                 puts("Card does not support host controlled partition write "
1046                      "reliability settings\n");
1047                 return -EMEDIUMTYPE;
1048         }
1049
1050         if (ext_csd[EXT_CSD_PARTITION_SETTING] &
1051             EXT_CSD_PARTITION_SETTING_COMPLETED) {
1052                 pr_err("Card already partitioned\n");
1053                 return -EPERM;
1054         }
1055
1056         if (mode == MMC_HWPART_CONF_CHECK)
1057                 return 0;
1058
1059         /* Partitioning requires high-capacity size definitions */
1060         if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
1061                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1062                                  EXT_CSD_ERASE_GROUP_DEF, 1);
1063
1064                 if (err)
1065                         return err;
1066
1067                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1068
1069                 /* update erase group size to be high-capacity */
1070                 mmc->erase_grp_size =
1071                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1072
1073         }
1074
1075         /* all OK, write the configuration */
1076         for (i = 0; i < 4; i++) {
1077                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1078                                  EXT_CSD_ENH_START_ADDR+i,
1079                                  (enh_start_addr >> (i*8)) & 0xFF);
1080                 if (err)
1081                         return err;
1082         }
1083         for (i = 0; i < 3; i++) {
1084                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1085                                  EXT_CSD_ENH_SIZE_MULT+i,
1086                                  (enh_size_mult >> (i*8)) & 0xFF);
1087                 if (err)
1088                         return err;
1089         }
1090         for (pidx = 0; pidx < 4; pidx++) {
1091                 for (i = 0; i < 3; i++) {
1092                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1093                                          EXT_CSD_GP_SIZE_MULT+pidx*3+i,
1094                                          (gp_size_mult[pidx] >> (i*8)) & 0xFF);
1095                         if (err)
1096                                 return err;
1097                 }
1098         }
1099         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1100                          EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
1101         if (err)
1102                 return err;
1103
1104         if (mode == MMC_HWPART_CONF_SET)
1105                 return 0;
1106
1107         /* The WR_REL_SET is a write-once register but shall be
1108          * written before setting PART_SETTING_COMPLETED. As it is
1109          * write-once we can only write it when completing the
1110          * partitioning. */
1111         if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
1112                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1113                                  EXT_CSD_WR_REL_SET, wr_rel_set);
1114                 if (err)
1115                         return err;
1116         }
1117
1118         /* Setting PART_SETTING_COMPLETED confirms the partition
1119          * configuration but it only becomes effective after power
1120          * cycle, so we do not adjust the partition related settings
1121          * in the mmc struct. */
1122
1123         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1124                          EXT_CSD_PARTITION_SETTING,
1125                          EXT_CSD_PARTITION_SETTING_COMPLETED);
1126         if (err)
1127                 return err;
1128
1129         return 0;
1130 }
1131 #endif
1132
1133 #if !CONFIG_IS_ENABLED(DM_MMC)
1134 int mmc_getcd(struct mmc *mmc)
1135 {
1136         int cd;
1137
1138         cd = board_mmc_getcd(mmc);
1139
1140         if (cd < 0) {
1141                 if (mmc->cfg->ops->getcd)
1142                         cd = mmc->cfg->ops->getcd(mmc);
1143                 else
1144                         cd = 1;
1145         }
1146
1147         return cd;
1148 }
1149 #endif
1150
1151 #if !CONFIG_IS_ENABLED(MMC_TINY)
1152 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
1153 {
1154         struct mmc_cmd cmd;
1155         struct mmc_data data;
1156
1157         /* Switch the frequency */
1158         cmd.cmdidx = SD_CMD_SWITCH_FUNC;
1159         cmd.resp_type = MMC_RSP_R1;
1160         cmd.cmdarg = (mode << 31) | 0xffffff;
1161         cmd.cmdarg &= ~(0xf << (group * 4));
1162         cmd.cmdarg |= value << (group * 4);
1163
1164         data.dest = (char *)resp;
1165         data.blocksize = 64;
1166         data.blocks = 1;
1167         data.flags = MMC_DATA_READ;
1168
1169         return mmc_send_cmd(mmc, &cmd, &data);
1170 }
1171
1172 static int sd_get_capabilities(struct mmc *mmc)
1173 {
1174         int err;
1175         struct mmc_cmd cmd;
1176         ALLOC_CACHE_ALIGN_BUFFER(__be32, scr, 2);
1177         ALLOC_CACHE_ALIGN_BUFFER(__be32, switch_status, 16);
1178         struct mmc_data data;
1179         int timeout;
1180 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1181         u32 sd3_bus_mode;
1182 #endif
1183
1184         mmc->card_caps = MMC_MODE_1BIT | MMC_CAP(SD_LEGACY);
1185
1186         if (mmc_host_is_spi(mmc))
1187                 return 0;
1188
1189         /* Read the SCR to find out if this card supports higher speeds */
1190         cmd.cmdidx = MMC_CMD_APP_CMD;
1191         cmd.resp_type = MMC_RSP_R1;
1192         cmd.cmdarg = mmc->rca << 16;
1193
1194         err = mmc_send_cmd(mmc, &cmd, NULL);
1195
1196         if (err)
1197                 return err;
1198
1199         cmd.cmdidx = SD_CMD_APP_SEND_SCR;
1200         cmd.resp_type = MMC_RSP_R1;
1201         cmd.cmdarg = 0;
1202
1203         timeout = 3;
1204
1205 retry_scr:
1206         data.dest = (char *)scr;
1207         data.blocksize = 8;
1208         data.blocks = 1;
1209         data.flags = MMC_DATA_READ;
1210
1211         err = mmc_send_cmd(mmc, &cmd, &data);
1212
1213         if (err) {
1214                 if (timeout--)
1215                         goto retry_scr;
1216
1217                 return err;
1218         }
1219
1220         mmc->scr[0] = __be32_to_cpu(scr[0]);
1221         mmc->scr[1] = __be32_to_cpu(scr[1]);
1222
1223         switch ((mmc->scr[0] >> 24) & 0xf) {
1224         case 0:
1225                 mmc->version = SD_VERSION_1_0;
1226                 break;
1227         case 1:
1228                 mmc->version = SD_VERSION_1_10;
1229                 break;
1230         case 2:
1231                 mmc->version = SD_VERSION_2;
1232                 if ((mmc->scr[0] >> 15) & 0x1)
1233                         mmc->version = SD_VERSION_3;
1234                 break;
1235         default:
1236                 mmc->version = SD_VERSION_1_0;
1237                 break;
1238         }
1239
1240         if (mmc->scr[0] & SD_DATA_4BIT)
1241                 mmc->card_caps |= MMC_MODE_4BIT;
1242
1243         /* Version 1.0 doesn't support switching */
1244         if (mmc->version == SD_VERSION_1_0)
1245                 return 0;
1246
1247         timeout = 4;
1248         while (timeout--) {
1249                 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
1250                                 (u8 *)switch_status);
1251
1252                 if (err)
1253                         return err;
1254
1255                 /* The high-speed function is busy.  Try again */
1256                 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
1257                         break;
1258         }
1259
1260         /* If high-speed isn't supported, we return */
1261         if (__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED)
1262                 mmc->card_caps |= MMC_CAP(SD_HS);
1263
1264 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1265         /* Version before 3.0 don't support UHS modes */
1266         if (mmc->version < SD_VERSION_3)
1267                 return 0;
1268
1269         sd3_bus_mode = __be32_to_cpu(switch_status[3]) >> 16 & 0x1f;
1270         if (sd3_bus_mode & SD_MODE_UHS_SDR104)
1271                 mmc->card_caps |= MMC_CAP(UHS_SDR104);
1272         if (sd3_bus_mode & SD_MODE_UHS_SDR50)
1273                 mmc->card_caps |= MMC_CAP(UHS_SDR50);
1274         if (sd3_bus_mode & SD_MODE_UHS_SDR25)
1275                 mmc->card_caps |= MMC_CAP(UHS_SDR25);
1276         if (sd3_bus_mode & SD_MODE_UHS_SDR12)
1277                 mmc->card_caps |= MMC_CAP(UHS_SDR12);
1278         if (sd3_bus_mode & SD_MODE_UHS_DDR50)
1279                 mmc->card_caps |= MMC_CAP(UHS_DDR50);
1280 #endif
1281
1282         return 0;
1283 }
1284
1285 static int sd_set_card_speed(struct mmc *mmc, enum bus_mode mode)
1286 {
1287         int err;
1288
1289         ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
1290         int speed;
1291
1292         switch (mode) {
1293         case SD_LEGACY:
1294                 speed = UHS_SDR12_BUS_SPEED;
1295                 break;
1296         case SD_HS:
1297                 speed = HIGH_SPEED_BUS_SPEED;
1298                 break;
1299 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1300         case UHS_SDR12:
1301                 speed = UHS_SDR12_BUS_SPEED;
1302                 break;
1303         case UHS_SDR25:
1304                 speed = UHS_SDR25_BUS_SPEED;
1305                 break;
1306         case UHS_SDR50:
1307                 speed = UHS_SDR50_BUS_SPEED;
1308                 break;
1309         case UHS_DDR50:
1310                 speed = UHS_DDR50_BUS_SPEED;
1311                 break;
1312         case UHS_SDR104:
1313                 speed = UHS_SDR104_BUS_SPEED;
1314                 break;
1315 #endif
1316         default:
1317                 return -EINVAL;
1318         }
1319
1320         err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, speed, (u8 *)switch_status);
1321         if (err)
1322                 return err;
1323
1324         if (((__be32_to_cpu(switch_status[4]) >> 24) & 0xF) != speed)
1325                 return -ENOTSUPP;
1326
1327         return 0;
1328 }
1329
1330 static int sd_select_bus_width(struct mmc *mmc, int w)
1331 {
1332         int err;
1333         struct mmc_cmd cmd;
1334
1335         if ((w != 4) && (w != 1))
1336                 return -EINVAL;
1337
1338         cmd.cmdidx = MMC_CMD_APP_CMD;
1339         cmd.resp_type = MMC_RSP_R1;
1340         cmd.cmdarg = mmc->rca << 16;
1341
1342         err = mmc_send_cmd(mmc, &cmd, NULL);
1343         if (err)
1344                 return err;
1345
1346         cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1347         cmd.resp_type = MMC_RSP_R1;
1348         if (w == 4)
1349                 cmd.cmdarg = 2;
1350         else if (w == 1)
1351                 cmd.cmdarg = 0;
1352         err = mmc_send_cmd(mmc, &cmd, NULL);
1353         if (err)
1354                 return err;
1355
1356         return 0;
1357 }
1358 #endif
1359
1360 #if CONFIG_IS_ENABLED(MMC_WRITE)
1361 static int sd_read_ssr(struct mmc *mmc)
1362 {
1363         static const unsigned int sd_au_size[] = {
1364                 0,              SZ_16K / 512,           SZ_32K / 512,
1365                 SZ_64K / 512,   SZ_128K / 512,          SZ_256K / 512,
1366                 SZ_512K / 512,  SZ_1M / 512,            SZ_2M / 512,
1367                 SZ_4M / 512,    SZ_8M / 512,            (SZ_8M + SZ_4M) / 512,
1368                 SZ_16M / 512,   (SZ_16M + SZ_8M) / 512, SZ_32M / 512,
1369                 SZ_64M / 512,
1370         };
1371         int err, i;
1372         struct mmc_cmd cmd;
1373         ALLOC_CACHE_ALIGN_BUFFER(uint, ssr, 16);
1374         struct mmc_data data;
1375         int timeout = 3;
1376         unsigned int au, eo, et, es;
1377
1378         cmd.cmdidx = MMC_CMD_APP_CMD;
1379         cmd.resp_type = MMC_RSP_R1;
1380         cmd.cmdarg = mmc->rca << 16;
1381
1382         err = mmc_send_cmd(mmc, &cmd, NULL);
1383         if (err)
1384                 return err;
1385
1386         cmd.cmdidx = SD_CMD_APP_SD_STATUS;
1387         cmd.resp_type = MMC_RSP_R1;
1388         cmd.cmdarg = 0;
1389
1390 retry_ssr:
1391         data.dest = (char *)ssr;
1392         data.blocksize = 64;
1393         data.blocks = 1;
1394         data.flags = MMC_DATA_READ;
1395
1396         err = mmc_send_cmd(mmc, &cmd, &data);
1397         if (err) {
1398                 if (timeout--)
1399                         goto retry_ssr;
1400
1401                 return err;
1402         }
1403
1404         for (i = 0; i < 16; i++)
1405                 ssr[i] = be32_to_cpu(ssr[i]);
1406
1407         au = (ssr[2] >> 12) & 0xF;
1408         if ((au <= 9) || (mmc->version == SD_VERSION_3)) {
1409                 mmc->ssr.au = sd_au_size[au];
1410                 es = (ssr[3] >> 24) & 0xFF;
1411                 es |= (ssr[2] & 0xFF) << 8;
1412                 et = (ssr[3] >> 18) & 0x3F;
1413                 if (es && et) {
1414                         eo = (ssr[3] >> 16) & 0x3;
1415                         mmc->ssr.erase_timeout = (et * 1000) / es;
1416                         mmc->ssr.erase_offset = eo * 1000;
1417                 }
1418         } else {
1419                 pr_debug("Invalid Allocation Unit Size.\n");
1420         }
1421
1422         return 0;
1423 }
1424 #endif
1425 /* frequency bases */
1426 /* divided by 10 to be nice to platforms without floating point */
1427 static const int fbase[] = {
1428         10000,
1429         100000,
1430         1000000,
1431         10000000,
1432 };
1433
1434 /* Multiplier values for TRAN_SPEED.  Multiplied by 10 to be nice
1435  * to platforms without floating point.
1436  */
1437 static const u8 multipliers[] = {
1438         0,      /* reserved */
1439         10,
1440         12,
1441         13,
1442         15,
1443         20,
1444         25,
1445         30,
1446         35,
1447         40,
1448         45,
1449         50,
1450         55,
1451         60,
1452         70,
1453         80,
1454 };
1455
1456 static inline int bus_width(uint cap)
1457 {
1458         if (cap == MMC_MODE_8BIT)
1459                 return 8;
1460         if (cap == MMC_MODE_4BIT)
1461                 return 4;
1462         if (cap == MMC_MODE_1BIT)
1463                 return 1;
1464         pr_warn("invalid bus witdh capability 0x%x\n", cap);
1465         return 0;
1466 }
1467
1468 #if !CONFIG_IS_ENABLED(DM_MMC)
1469 #ifdef MMC_SUPPORTS_TUNING
1470 static int mmc_execute_tuning(struct mmc *mmc, uint opcode)
1471 {
1472         return -ENOTSUPP;
1473 }
1474 #endif
1475
1476 static void mmc_send_init_stream(struct mmc *mmc)
1477 {
1478 }
1479
1480 static int mmc_set_ios(struct mmc *mmc)
1481 {
1482         int ret = 0;
1483
1484         if (mmc->cfg->ops->set_ios)
1485                 ret = mmc->cfg->ops->set_ios(mmc);
1486
1487         return ret;
1488 }
1489 #endif
1490
1491 int mmc_set_clock(struct mmc *mmc, uint clock, bool disable)
1492 {
1493         if (!disable) {
1494                 if (clock > mmc->cfg->f_max)
1495                         clock = mmc->cfg->f_max;
1496
1497                 if (clock < mmc->cfg->f_min)
1498                         clock = mmc->cfg->f_min;
1499         }
1500
1501         mmc->clock = clock;
1502         mmc->clk_disable = disable;
1503
1504         debug("clock is %s (%dHz)\n", disable ? "disabled" : "enabled", clock);
1505
1506         return mmc_set_ios(mmc);
1507 }
1508
1509 static int mmc_set_bus_width(struct mmc *mmc, uint width)
1510 {
1511         mmc->bus_width = width;
1512
1513         return mmc_set_ios(mmc);
1514 }
1515
1516 #if CONFIG_IS_ENABLED(MMC_VERBOSE) || defined(DEBUG)
1517 /*
1518  * helper function to display the capabilities in a human
1519  * friendly manner. The capabilities include bus width and
1520  * supported modes.
1521  */
1522 void mmc_dump_capabilities(const char *text, uint caps)
1523 {
1524         enum bus_mode mode;
1525
1526         pr_debug("%s: widths [", text);
1527         if (caps & MMC_MODE_8BIT)
1528                 pr_debug("8, ");
1529         if (caps & MMC_MODE_4BIT)
1530                 pr_debug("4, ");
1531         if (caps & MMC_MODE_1BIT)
1532                 pr_debug("1, ");
1533         pr_debug("\b\b] modes [");
1534         for (mode = MMC_LEGACY; mode < MMC_MODES_END; mode++)
1535                 if (MMC_CAP(mode) & caps)
1536                         pr_debug("%s, ", mmc_mode_name(mode));
1537         pr_debug("\b\b]\n");
1538 }
1539 #endif
1540
1541 struct mode_width_tuning {
1542         enum bus_mode mode;
1543         uint widths;
1544 #ifdef MMC_SUPPORTS_TUNING
1545         uint tuning;
1546 #endif
1547 };
1548
1549 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1550 int mmc_voltage_to_mv(enum mmc_voltage voltage)
1551 {
1552         switch (voltage) {
1553         case MMC_SIGNAL_VOLTAGE_000: return 0;
1554         case MMC_SIGNAL_VOLTAGE_330: return 3300;
1555         case MMC_SIGNAL_VOLTAGE_180: return 1800;
1556         case MMC_SIGNAL_VOLTAGE_120: return 1200;
1557         }
1558         return -EINVAL;
1559 }
1560
1561 static int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1562 {
1563         int err;
1564
1565         if (mmc->signal_voltage == signal_voltage)
1566                 return 0;
1567
1568         mmc->signal_voltage = signal_voltage;
1569         err = mmc_set_ios(mmc);
1570         if (err)
1571                 pr_debug("unable to set voltage (err %d)\n", err);
1572
1573         return err;
1574 }
1575 #else
1576 static inline int mmc_set_signal_voltage(struct mmc *mmc, uint signal_voltage)
1577 {
1578         return 0;
1579 }
1580 #endif
1581
1582 #if !CONFIG_IS_ENABLED(MMC_TINY)
1583 static const struct mode_width_tuning sd_modes_by_pref[] = {
1584 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1585 #ifdef MMC_SUPPORTS_TUNING
1586         {
1587                 .mode = UHS_SDR104,
1588                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1589                 .tuning = MMC_CMD_SEND_TUNING_BLOCK
1590         },
1591 #endif
1592         {
1593                 .mode = UHS_SDR50,
1594                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1595         },
1596         {
1597                 .mode = UHS_DDR50,
1598                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1599         },
1600         {
1601                 .mode = UHS_SDR25,
1602                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1603         },
1604 #endif
1605         {
1606                 .mode = SD_HS,
1607                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1608         },
1609 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1610         {
1611                 .mode = UHS_SDR12,
1612                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1613         },
1614 #endif
1615         {
1616                 .mode = SD_LEGACY,
1617                 .widths = MMC_MODE_4BIT | MMC_MODE_1BIT,
1618         }
1619 };
1620
1621 #define for_each_sd_mode_by_pref(caps, mwt) \
1622         for (mwt = sd_modes_by_pref;\
1623              mwt < sd_modes_by_pref + ARRAY_SIZE(sd_modes_by_pref);\
1624              mwt++) \
1625                 if (caps & MMC_CAP(mwt->mode))
1626
1627 static int sd_select_mode_and_width(struct mmc *mmc, uint card_caps)
1628 {
1629         int err;
1630         uint widths[] = {MMC_MODE_4BIT, MMC_MODE_1BIT};
1631         const struct mode_width_tuning *mwt;
1632 #if CONFIG_IS_ENABLED(MMC_UHS_SUPPORT)
1633         bool uhs_en = (mmc->ocr & OCR_S18R) ? true : false;
1634 #else
1635         bool uhs_en = false;
1636 #endif
1637         uint caps;
1638
1639 #ifdef DEBUG
1640         mmc_dump_capabilities("sd card", card_caps);
1641         mmc_dump_capabilities("host", mmc->host_caps);
1642 #endif
1643
1644         /* Restrict card's capabilities by what the host can do */
1645         caps = card_caps & mmc->host_caps;
1646
1647         if (!uhs_en)
1648                 caps &= ~UHS_CAPS;
1649
1650         for_each_sd_mode_by_pref(caps, mwt) {
1651                 uint *w;
1652
1653                 for (w = widths; w < widths + ARRAY_SIZE(widths); w++) {
1654                         if (*w & caps & mwt->widths) {
1655                                 pr_debug("trying mode %s width %d (at %d MHz)\n",
1656                                          mmc_mode_name(mwt->mode),
1657                                          bus_width(*w),
1658                                          mmc_mode2freq(mmc, mwt->mode) / 1000000);
1659
1660                                 /* configure the bus width (card + host) */
1661                                 err = sd_select_bus_width(mmc, bus_width(*w));
1662                                 if (err)
1663                                         goto error;
1664                                 mmc_set_bus_width(mmc, bus_width(*w));
1665
1666                                 /* configure the bus mode (card) */
1667                                 err = sd_set_card_speed(mmc, mwt->mode);
1668                                 if (err)
1669                                         goto error;
1670
1671                                 /* configure the bus mode (host) */
1672                                 mmc_select_mode(mmc, mwt->mode);
1673                                 mmc_set_clock(mmc, mmc->tran_speed,
1674                                                 MMC_CLK_ENABLE);
1675
1676 #ifdef MMC_SUPPORTS_TUNING
1677                                 /* execute tuning if needed */
1678                                 if (mwt->tuning && !mmc_host_is_spi(mmc)) {
1679                                         err = mmc_execute_tuning(mmc,
1680                                                                  mwt->tuning);
1681                                         if (err) {
1682                                                 pr_debug("tuning failed\n");
1683                                                 goto error;
1684                                         }
1685                                 }
1686 #endif
1687
1688 #if CONFIG_IS_ENABLED(MMC_WRITE)
1689                                 err = sd_read_ssr(mmc);
1690                                 if (err)
1691                                         pr_warn("unable to read ssr\n");
1692 #endif
1693                                 if (!err)
1694                                         return 0;
1695
1696 error:
1697                                 /* revert to a safer bus speed */
1698                                 mmc_select_mode(mmc, SD_LEGACY);
1699                                 mmc_set_clock(mmc, mmc->tran_speed,
1700                                                 MMC_CLK_ENABLE);
1701                         }
1702                 }
1703         }
1704
1705         pr_err("unable to select a mode\n");
1706         return -ENOTSUPP;
1707 }
1708
1709 /*
1710  * read the compare the part of ext csd that is constant.
1711  * This can be used to check that the transfer is working
1712  * as expected.
1713  */
1714 static int mmc_read_and_compare_ext_csd(struct mmc *mmc)
1715 {
1716         int err;
1717         const u8 *ext_csd = mmc->ext_csd;
1718         ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1719
1720         if (mmc->version < MMC_VERSION_4)
1721                 return 0;
1722
1723         err = mmc_send_ext_csd(mmc, test_csd);
1724         if (err)
1725                 return err;
1726
1727         /* Only compare read only fields */
1728         if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1729                 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1730             ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1731                 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1732             ext_csd[EXT_CSD_REV]
1733                 == test_csd[EXT_CSD_REV] &&
1734             ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1735                 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1736             memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1737                    &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1738                 return 0;
1739
1740         return -EBADMSG;
1741 }
1742
1743 #if CONFIG_IS_ENABLED(MMC_IO_VOLTAGE)
1744 static int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1745                                   uint32_t allowed_mask)
1746 {
1747         u32 card_mask = 0;
1748
1749         switch (mode) {
1750         case MMC_HS_400:
1751         case MMC_HS_200:
1752                 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_8V |
1753                     EXT_CSD_CARD_TYPE_HS400_1_8V))
1754                         card_mask |= MMC_SIGNAL_VOLTAGE_180;
1755                 if (mmc->cardtype & (EXT_CSD_CARD_TYPE_HS200_1_2V |
1756                     EXT_CSD_CARD_TYPE_HS400_1_2V))
1757                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1758                 break;
1759         case MMC_DDR_52:
1760                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
1761                         card_mask |= MMC_SIGNAL_VOLTAGE_330 |
1762                                      MMC_SIGNAL_VOLTAGE_180;
1763                 if (mmc->cardtype & EXT_CSD_CARD_TYPE_DDR_1_2V)
1764                         card_mask |= MMC_SIGNAL_VOLTAGE_120;
1765                 break;
1766         default:
1767                 card_mask |= MMC_SIGNAL_VOLTAGE_330;
1768                 break;
1769         }
1770
1771         while (card_mask & allowed_mask) {
1772                 enum mmc_voltage best_match;
1773
1774                 best_match = 1 << (ffs(card_mask & allowed_mask) - 1);
1775                 if (!mmc_set_signal_voltage(mmc,  best_match))
1776                         return 0;
1777
1778                 allowed_mask &= ~best_match;
1779         }
1780
1781         return -ENOTSUPP;
1782 }
1783 #else
1784 static inline int mmc_set_lowest_voltage(struct mmc *mmc, enum bus_mode mode,
1785                                          uint32_t allowed_mask)
1786 {
1787         return 0;
1788 }
1789 #endif
1790
1791 static const struct mode_width_tuning mmc_modes_by_pref[] = {
1792 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1793         {
1794                 .mode = MMC_HS_400,
1795                 .widths = MMC_MODE_8BIT,
1796                 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1797         },
1798 #endif
1799 #if CONFIG_IS_ENABLED(MMC_HS200_SUPPORT)
1800         {
1801                 .mode = MMC_HS_200,
1802                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1803                 .tuning = MMC_CMD_SEND_TUNING_BLOCK_HS200
1804         },
1805 #endif
1806         {
1807                 .mode = MMC_DDR_52,
1808                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT,
1809         },
1810         {
1811                 .mode = MMC_HS_52,
1812                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1813         },
1814         {
1815                 .mode = MMC_HS,
1816                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1817         },
1818         {
1819                 .mode = MMC_LEGACY,
1820                 .widths = MMC_MODE_8BIT | MMC_MODE_4BIT | MMC_MODE_1BIT,
1821         }
1822 };
1823
1824 #define for_each_mmc_mode_by_pref(caps, mwt) \
1825         for (mwt = mmc_modes_by_pref;\
1826             mwt < mmc_modes_by_pref + ARRAY_SIZE(mmc_modes_by_pref);\
1827             mwt++) \
1828                 if (caps & MMC_CAP(mwt->mode))
1829
1830 static const struct ext_csd_bus_width {
1831         uint cap;
1832         bool is_ddr;
1833         uint ext_csd_bits;
1834 } ext_csd_bus_width[] = {
1835         {MMC_MODE_8BIT, true, EXT_CSD_DDR_BUS_WIDTH_8},
1836         {MMC_MODE_4BIT, true, EXT_CSD_DDR_BUS_WIDTH_4},
1837         {MMC_MODE_8BIT, false, EXT_CSD_BUS_WIDTH_8},
1838         {MMC_MODE_4BIT, false, EXT_CSD_BUS_WIDTH_4},
1839         {MMC_MODE_1BIT, false, EXT_CSD_BUS_WIDTH_1},
1840 };
1841
1842 #if CONFIG_IS_ENABLED(MMC_HS400_SUPPORT)
1843 static int mmc_select_hs400(struct mmc *mmc)
1844 {
1845         int err;
1846
1847         /* Set timing to HS200 for tuning */
1848         err = mmc_set_card_speed(mmc, MMC_HS_200);
1849         if (err)
1850                 return err;
1851
1852         /* configure the bus mode (host) */
1853         mmc_select_mode(mmc, MMC_HS_200);
1854         mmc_set_clock(mmc, mmc->tran_speed, false);
1855
1856         /* execute tuning if needed */
1857         err = mmc_execute_tuning(mmc, MMC_CMD_SEND_TUNING_BLOCK_HS200);
1858         if (err) {
1859                 debug("tuning failed\n");
1860                 return err;
1861         }
1862
1863         /* Set back to HS */
1864         mmc_set_card_speed(mmc, MMC_HS);
1865         mmc_set_clock(mmc, mmc_mode2freq(mmc, MMC_HS), false);
1866
1867         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BUS_WIDTH,
1868                          EXT_CSD_BUS_WIDTH_8 | EXT_CSD_DDR_FLAG);
1869         if (err)
1870                 return err;
1871
1872         err = mmc_set_card_speed(mmc, MMC_HS_400);
1873         if (err)
1874                 return err;
1875
1876         mmc_select_mode(mmc, MMC_HS_400);
1877         err = mmc_set_clock(mmc, mmc->tran_speed, false);
1878         if (err)
1879                 return err;
1880
1881         return 0;
1882 }
1883 #else
1884 static int mmc_select_hs400(struct mmc *mmc)
1885 {
1886         return -ENOTSUPP;
1887 }
1888 #endif
1889
1890 #define for_each_supported_width(caps, ddr, ecbv) \
1891         for (ecbv = ext_csd_bus_width;\
1892             ecbv < ext_csd_bus_width + ARRAY_SIZE(ext_csd_bus_width);\
1893             ecbv++) \
1894                 if ((ddr == ecbv->is_ddr) && (caps & ecbv->cap))
1895
1896 static int mmc_select_mode_and_width(struct mmc *mmc, uint card_caps)
1897 {
1898         int err;
1899         const struct mode_width_tuning *mwt;
1900         const struct ext_csd_bus_width *ecbw;
1901
1902 #ifdef DEBUG
1903         mmc_dump_capabilities("mmc", card_caps);
1904         mmc_dump_capabilities("host", mmc->host_caps);
1905 #endif
1906
1907         /* Restrict card's capabilities by what the host can do */
1908         card_caps &= mmc->host_caps;
1909
1910         /* Only version 4 of MMC supports wider bus widths */
1911         if (mmc->version < MMC_VERSION_4)
1912                 return 0;
1913
1914         if (!mmc->ext_csd) {
1915                 pr_debug("No ext_csd found!\n"); /* this should enver happen */
1916                 return -ENOTSUPP;
1917         }
1918
1919         mmc_set_clock(mmc, mmc->legacy_speed, MMC_CLK_ENABLE);
1920
1921         for_each_mmc_mode_by_pref(card_caps, mwt) {
1922                 for_each_supported_width(card_caps & mwt->widths,
1923                                          mmc_is_mode_ddr(mwt->mode), ecbw) {
1924                         enum mmc_voltage old_voltage;
1925                         pr_debug("trying mode %s width %d (at %d MHz)\n",
1926                                  mmc_mode_name(mwt->mode),
1927                                  bus_width(ecbw->cap),
1928                                  mmc_mode2freq(mmc, mwt->mode) / 1000000);
1929                         old_voltage = mmc->signal_voltage;
1930                         err = mmc_set_lowest_voltage(mmc, mwt->mode,
1931                                                      MMC_ALL_SIGNAL_VOLTAGE);
1932                         if (err)
1933                                 continue;
1934
1935                         /* configure the bus width (card + host) */
1936                         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1937                                     EXT_CSD_BUS_WIDTH,
1938                                     ecbw->ext_csd_bits & ~EXT_CSD_DDR_FLAG);
1939                         if (err)
1940                                 goto error;
1941                         mmc_set_bus_width(mmc, bus_width(ecbw->cap));
1942
1943                         if (mwt->mode == MMC_HS_400) {
1944                                 err = mmc_select_hs400(mmc);
1945                                 if (err) {
1946                                         printf("Select HS400 failed %d\n", err);
1947                                         goto error;
1948                                 }
1949                         } else {
1950                                 /* configure the bus speed (card) */
1951                                 err = mmc_set_card_speed(mmc, mwt->mode);
1952                                 if (err)
1953                                         goto error;
1954
1955                                 /*
1956                                  * configure the bus width AND the ddr mode
1957                                  * (card). The host side will be taken care
1958                                  * of in the next step
1959                                  */
1960                                 if (ecbw->ext_csd_bits & EXT_CSD_DDR_FLAG) {
1961                                         err = mmc_switch(mmc,
1962                                                          EXT_CSD_CMD_SET_NORMAL,
1963                                                          EXT_CSD_BUS_WIDTH,
1964                                                          ecbw->ext_csd_bits);
1965                                         if (err)
1966                                                 goto error;
1967                                 }
1968
1969                                 /* configure the bus mode (host) */
1970                                 mmc_select_mode(mmc, mwt->mode);
1971                                 mmc_set_clock(mmc, mmc->tran_speed,
1972                                               MMC_CLK_ENABLE);
1973 #ifdef MMC_SUPPORTS_TUNING
1974
1975                                 /* execute tuning if needed */
1976                                 if (mwt->tuning) {
1977                                         err = mmc_execute_tuning(mmc,
1978                                                                  mwt->tuning);
1979                                         if (err) {
1980                                                 pr_debug("tuning failed\n");
1981                                                 goto error;
1982                                         }
1983                                 }
1984 #endif
1985                         }
1986
1987                         /* do a transfer to check the configuration */
1988                         err = mmc_read_and_compare_ext_csd(mmc);
1989                         if (!err)
1990                                 return 0;
1991 error:
1992                         mmc_set_signal_voltage(mmc, old_voltage);
1993                         /* if an error occured, revert to a safer bus mode */
1994                         mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1995                                    EXT_CSD_BUS_WIDTH, EXT_CSD_BUS_WIDTH_1);
1996                         mmc_select_mode(mmc, MMC_LEGACY);
1997                         mmc_set_bus_width(mmc, 1);
1998                 }
1999         }
2000
2001         pr_err("unable to select a mode\n");
2002
2003         return -ENOTSUPP;
2004 }
2005 #endif
2006
2007 #if CONFIG_IS_ENABLED(MMC_TINY)
2008 DEFINE_CACHE_ALIGN_BUFFER(u8, ext_csd_bkup, MMC_MAX_BLOCK_LEN);
2009 #endif
2010
2011 static int mmc_startup_v4(struct mmc *mmc)
2012 {
2013         int err, i;
2014         u64 capacity;
2015         bool has_parts = false;
2016         bool part_completed;
2017         static const u32 mmc_versions[] = {
2018                 MMC_VERSION_4,
2019                 MMC_VERSION_4_1,
2020                 MMC_VERSION_4_2,
2021                 MMC_VERSION_4_3,
2022                 MMC_VERSION_4_4,
2023                 MMC_VERSION_4_41,
2024                 MMC_VERSION_4_5,
2025                 MMC_VERSION_5_0,
2026                 MMC_VERSION_5_1
2027         };
2028
2029 #if CONFIG_IS_ENABLED(MMC_TINY)
2030         u8 *ext_csd = ext_csd_bkup;
2031
2032         if (IS_SD(mmc) || mmc->version < MMC_VERSION_4)
2033                 return 0;
2034
2035         if (!mmc->ext_csd)
2036                 memset(ext_csd_bkup, 0, sizeof(ext_csd_bkup));
2037
2038         err = mmc_send_ext_csd(mmc, ext_csd);
2039         if (err)
2040                 goto error;
2041
2042         /* store the ext csd for future reference */
2043         if (!mmc->ext_csd)
2044                 mmc->ext_csd = ext_csd;
2045 #else
2046         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2047
2048         if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4))
2049                 return 0;
2050
2051         /* check  ext_csd version and capacity */
2052         err = mmc_send_ext_csd(mmc, ext_csd);
2053         if (err)
2054                 goto error;
2055
2056         /* store the ext csd for future reference */
2057         if (!mmc->ext_csd)
2058                 mmc->ext_csd = malloc(MMC_MAX_BLOCK_LEN);
2059         if (!mmc->ext_csd)
2060                 return -ENOMEM;
2061         memcpy(mmc->ext_csd, ext_csd, MMC_MAX_BLOCK_LEN);
2062 #endif
2063         if (ext_csd[EXT_CSD_REV] >= ARRAY_SIZE(mmc_versions))
2064                 return -EINVAL;
2065
2066         mmc->version = mmc_versions[ext_csd[EXT_CSD_REV]];
2067
2068         if (mmc->version >= MMC_VERSION_4_2) {
2069                 /*
2070                  * According to the JEDEC Standard, the value of
2071                  * ext_csd's capacity is valid if the value is more
2072                  * than 2GB
2073                  */
2074                 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
2075                                 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
2076                                 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
2077                                 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
2078                 capacity *= MMC_MAX_BLOCK_LEN;
2079                 if ((capacity >> 20) > 2 * 1024)
2080                         mmc->capacity_user = capacity;
2081         }
2082
2083         /* The partition data may be non-zero but it is only
2084          * effective if PARTITION_SETTING_COMPLETED is set in
2085          * EXT_CSD, so ignore any data if this bit is not set,
2086          * except for enabling the high-capacity group size
2087          * definition (see below).
2088          */
2089         part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
2090                             EXT_CSD_PARTITION_SETTING_COMPLETED);
2091
2092         /* store the partition info of emmc */
2093         mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
2094         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
2095             ext_csd[EXT_CSD_BOOT_MULT])
2096                 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
2097         if (part_completed &&
2098             (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
2099                 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
2100
2101         mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
2102
2103         mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
2104
2105         for (i = 0; i < 4; i++) {
2106                 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
2107                 uint mult = (ext_csd[idx + 2] << 16) +
2108                         (ext_csd[idx + 1] << 8) + ext_csd[idx];
2109                 if (mult)
2110                         has_parts = true;
2111                 if (!part_completed)
2112                         continue;
2113                 mmc->capacity_gp[i] = mult;
2114                 mmc->capacity_gp[i] *=
2115                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2116                 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2117                 mmc->capacity_gp[i] <<= 19;
2118         }
2119
2120 #ifndef CONFIG_SPL_BUILD
2121         if (part_completed) {
2122                 mmc->enh_user_size =
2123                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 2] << 16) +
2124                         (ext_csd[EXT_CSD_ENH_SIZE_MULT + 1] << 8) +
2125                         ext_csd[EXT_CSD_ENH_SIZE_MULT];
2126                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
2127                 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2128                 mmc->enh_user_size <<= 19;
2129                 mmc->enh_user_start =
2130                         (ext_csd[EXT_CSD_ENH_START_ADDR + 3] << 24) +
2131                         (ext_csd[EXT_CSD_ENH_START_ADDR + 2] << 16) +
2132                         (ext_csd[EXT_CSD_ENH_START_ADDR + 1] << 8) +
2133                         ext_csd[EXT_CSD_ENH_START_ADDR];
2134                 if (mmc->high_capacity)
2135                         mmc->enh_user_start <<= 9;
2136         }
2137 #endif
2138
2139         /*
2140          * Host needs to enable ERASE_GRP_DEF bit if device is
2141          * partitioned. This bit will be lost every time after a reset
2142          * or power off. This will affect erase size.
2143          */
2144         if (part_completed)
2145                 has_parts = true;
2146         if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
2147             (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
2148                 has_parts = true;
2149         if (has_parts) {
2150                 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
2151                                  EXT_CSD_ERASE_GROUP_DEF, 1);
2152
2153                 if (err)
2154                         goto error;
2155
2156                 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
2157         }
2158
2159         if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
2160 #if CONFIG_IS_ENABLED(MMC_WRITE)
2161                 /* Read out group size from ext_csd */
2162                 mmc->erase_grp_size =
2163                         ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
2164 #endif
2165                 /*
2166                  * if high capacity and partition setting completed
2167                  * SEC_COUNT is valid even if it is smaller than 2 GiB
2168                  * JEDEC Standard JESD84-B45, 6.2.4
2169                  */
2170                 if (mmc->high_capacity && part_completed) {
2171                         capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
2172                                 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
2173                                 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
2174                                 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
2175                         capacity *= MMC_MAX_BLOCK_LEN;
2176                         mmc->capacity_user = capacity;
2177                 }
2178         }
2179 #if CONFIG_IS_ENABLED(MMC_WRITE)
2180         else {
2181                 /* Calculate the group size from the csd value. */
2182                 int erase_gsz, erase_gmul;
2183
2184                 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
2185                 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
2186                 mmc->erase_grp_size = (erase_gsz + 1)
2187                         * (erase_gmul + 1);
2188         }
2189 #endif
2190 #if CONFIG_IS_ENABLED(MMC_HW_PARTITIONING)
2191         mmc->hc_wp_grp_size = 1024
2192                 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
2193                 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
2194 #endif
2195
2196         mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
2197
2198         return 0;
2199 error:
2200         if (mmc->ext_csd) {
2201 #if !CONFIG_IS_ENABLED(MMC_TINY)
2202                 free(mmc->ext_csd);
2203 #endif
2204                 mmc->ext_csd = NULL;
2205         }
2206         return err;
2207 }
2208
2209 static int mmc_startup(struct mmc *mmc)
2210 {
2211         int err, i;
2212         uint mult, freq;
2213         u64 cmult, csize;
2214         struct mmc_cmd cmd;
2215         struct blk_desc *bdesc;
2216
2217 #ifdef CONFIG_MMC_SPI_CRC_ON
2218         if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
2219                 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
2220                 cmd.resp_type = MMC_RSP_R1;
2221                 cmd.cmdarg = 1;
2222                 err = mmc_send_cmd(mmc, &cmd, NULL);
2223                 if (err)
2224                         return err;
2225         }
2226 #endif
2227
2228         /* Put the Card in Identify Mode */
2229         cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
2230                 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
2231         cmd.resp_type = MMC_RSP_R2;
2232         cmd.cmdarg = 0;
2233
2234         err = mmc_send_cmd(mmc, &cmd, NULL);
2235
2236 #ifdef CONFIG_MMC_QUIRKS
2237         if (err && (mmc->quirks & MMC_QUIRK_RETRY_SEND_CID)) {
2238                 int retries = 4;
2239                 /*
2240                  * It has been seen that SEND_CID may fail on the first
2241                  * attempt, let's try a few more time
2242                  */
2243                 do {
2244                         err = mmc_send_cmd(mmc, &cmd, NULL);
2245                         if (!err)
2246                                 break;
2247                 } while (retries--);
2248         }
2249 #endif
2250
2251         if (err)
2252                 return err;
2253
2254         memcpy(mmc->cid, cmd.response, 16);
2255
2256         /*
2257          * For MMC cards, set the Relative Address.
2258          * For SD cards, get the Relatvie Address.
2259          * This also puts the cards into Standby State
2260          */
2261         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2262                 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
2263                 cmd.cmdarg = mmc->rca << 16;
2264                 cmd.resp_type = MMC_RSP_R6;
2265
2266                 err = mmc_send_cmd(mmc, &cmd, NULL);
2267
2268                 if (err)
2269                         return err;
2270
2271                 if (IS_SD(mmc))
2272                         mmc->rca = (cmd.response[0] >> 16) & 0xffff;
2273         }
2274
2275         /* Get the Card-Specific Data */
2276         cmd.cmdidx = MMC_CMD_SEND_CSD;
2277         cmd.resp_type = MMC_RSP_R2;
2278         cmd.cmdarg = mmc->rca << 16;
2279
2280         err = mmc_send_cmd(mmc, &cmd, NULL);
2281
2282         if (err)
2283                 return err;
2284
2285         mmc->csd[0] = cmd.response[0];
2286         mmc->csd[1] = cmd.response[1];
2287         mmc->csd[2] = cmd.response[2];
2288         mmc->csd[3] = cmd.response[3];
2289
2290         if (mmc->version == MMC_VERSION_UNKNOWN) {
2291                 int version = (cmd.response[0] >> 26) & 0xf;
2292
2293                 switch (version) {
2294                 case 0:
2295                         mmc->version = MMC_VERSION_1_2;
2296                         break;
2297                 case 1:
2298                         mmc->version = MMC_VERSION_1_4;
2299                         break;
2300                 case 2:
2301                         mmc->version = MMC_VERSION_2_2;
2302                         break;
2303                 case 3:
2304                         mmc->version = MMC_VERSION_3;
2305                         break;
2306                 case 4:
2307                         mmc->version = MMC_VERSION_4;
2308                         break;
2309                 default:
2310                         mmc->version = MMC_VERSION_1_2;
2311                         break;
2312                 }
2313         }
2314
2315         /* divide frequency by 10, since the mults are 10x bigger */
2316         freq = fbase[(cmd.response[0] & 0x7)];
2317         mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
2318
2319         mmc->legacy_speed = freq * mult;
2320         mmc_select_mode(mmc, MMC_LEGACY);
2321
2322         mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
2323         mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
2324 #if CONFIG_IS_ENABLED(MMC_WRITE)
2325
2326         if (IS_SD(mmc))
2327                 mmc->write_bl_len = mmc->read_bl_len;
2328         else
2329                 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
2330 #endif
2331
2332         if (mmc->high_capacity) {
2333                 csize = (mmc->csd[1] & 0x3f) << 16
2334                         | (mmc->csd[2] & 0xffff0000) >> 16;
2335                 cmult = 8;
2336         } else {
2337                 csize = (mmc->csd[1] & 0x3ff) << 2
2338                         | (mmc->csd[2] & 0xc0000000) >> 30;
2339                 cmult = (mmc->csd[2] & 0x00038000) >> 15;
2340         }
2341
2342         mmc->capacity_user = (csize + 1) << (cmult + 2);
2343         mmc->capacity_user *= mmc->read_bl_len;
2344         mmc->capacity_boot = 0;
2345         mmc->capacity_rpmb = 0;
2346         for (i = 0; i < 4; i++)
2347                 mmc->capacity_gp[i] = 0;
2348
2349         if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
2350                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2351
2352 #if CONFIG_IS_ENABLED(MMC_WRITE)
2353         if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
2354                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2355 #endif
2356
2357         if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
2358                 cmd.cmdidx = MMC_CMD_SET_DSR;
2359                 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
2360                 cmd.resp_type = MMC_RSP_NONE;
2361                 if (mmc_send_cmd(mmc, &cmd, NULL))
2362                         pr_warn("MMC: SET_DSR failed\n");
2363         }
2364
2365         /* Select the card, and put it into Transfer Mode */
2366         if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
2367                 cmd.cmdidx = MMC_CMD_SELECT_CARD;
2368                 cmd.resp_type = MMC_RSP_R1;
2369                 cmd.cmdarg = mmc->rca << 16;
2370                 err = mmc_send_cmd(mmc, &cmd, NULL);
2371
2372                 if (err)
2373                         return err;
2374         }
2375
2376         /*
2377          * For SD, its erase group is always one sector
2378          */
2379 #if CONFIG_IS_ENABLED(MMC_WRITE)
2380         mmc->erase_grp_size = 1;
2381 #endif
2382         mmc->part_config = MMCPART_NOAVAILABLE;
2383
2384         err = mmc_startup_v4(mmc);
2385         if (err)
2386                 return err;
2387
2388         err = mmc_set_capacity(mmc, mmc_get_blk_desc(mmc)->hwpart);
2389         if (err)
2390                 return err;
2391
2392 #if CONFIG_IS_ENABLED(MMC_TINY)
2393         mmc_set_clock(mmc, mmc->legacy_speed, false);
2394         mmc_select_mode(mmc, IS_SD(mmc) ? SD_LEGACY : MMC_LEGACY);
2395         mmc_set_bus_width(mmc, 1);
2396 #else
2397         if (IS_SD(mmc)) {
2398                 err = sd_get_capabilities(mmc);
2399                 if (err)
2400                         return err;
2401                 err = sd_select_mode_and_width(mmc, mmc->card_caps);
2402         } else {
2403                 err = mmc_get_capabilities(mmc);
2404                 if (err)
2405                         return err;
2406                 mmc_select_mode_and_width(mmc, mmc->card_caps);
2407         }
2408 #endif
2409         if (err)
2410                 return err;
2411
2412         mmc->best_mode = mmc->selected_mode;
2413
2414         /* Fix the block length for DDR mode */
2415         if (mmc->ddr_mode) {
2416                 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
2417 #if CONFIG_IS_ENABLED(MMC_WRITE)
2418                 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
2419 #endif
2420         }
2421
2422         /* fill in device description */
2423         bdesc = mmc_get_blk_desc(mmc);
2424         bdesc->lun = 0;
2425         bdesc->hwpart = 0;
2426         bdesc->type = 0;
2427         bdesc->blksz = mmc->read_bl_len;
2428         bdesc->log2blksz = LOG2(bdesc->blksz);
2429         bdesc->lba = lldiv(mmc->capacity, mmc->read_bl_len);
2430 #if !defined(CONFIG_SPL_BUILD) || \
2431                 (defined(CONFIG_SPL_LIBCOMMON_SUPPORT) && \
2432                 !defined(CONFIG_USE_TINY_PRINTF))
2433         sprintf(bdesc->vendor, "Man %06x Snr %04x%04x",
2434                 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
2435                 (mmc->cid[3] >> 16) & 0xffff);
2436         sprintf(bdesc->product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
2437                 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
2438                 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
2439                 (mmc->cid[2] >> 24) & 0xff);
2440         sprintf(bdesc->revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
2441                 (mmc->cid[2] >> 16) & 0xf);
2442 #else
2443         bdesc->vendor[0] = 0;
2444         bdesc->product[0] = 0;
2445         bdesc->revision[0] = 0;
2446 #endif
2447
2448         return 0;
2449 }
2450
2451 static int mmc_send_if_cond(struct mmc *mmc)
2452 {
2453         struct mmc_cmd cmd;
2454         int err;
2455
2456         cmd.cmdidx = SD_CMD_SEND_IF_COND;
2457         /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
2458         cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
2459         cmd.resp_type = MMC_RSP_R7;
2460
2461         err = mmc_send_cmd(mmc, &cmd, NULL);
2462
2463         if (err)
2464                 return err;
2465
2466         if ((cmd.response[0] & 0xff) != 0xaa)
2467                 return -EOPNOTSUPP;
2468         else
2469                 mmc->version = SD_VERSION_2;
2470
2471         return 0;
2472 }
2473
2474 #if !CONFIG_IS_ENABLED(DM_MMC)
2475 /* board-specific MMC power initializations. */
2476 __weak void board_mmc_power_init(void)
2477 {
2478 }
2479 #endif
2480
2481 static int mmc_power_init(struct mmc *mmc)
2482 {
2483 #if CONFIG_IS_ENABLED(DM_MMC)
2484 #if CONFIG_IS_ENABLED(DM_REGULATOR)
2485         int ret;
2486
2487         ret = device_get_supply_regulator(mmc->dev, "vmmc-supply",
2488                                           &mmc->vmmc_supply);
2489         if (ret)
2490                 pr_debug("%s: No vmmc supply\n", mmc->dev->name);
2491
2492         ret = device_get_supply_regulator(mmc->dev, "vqmmc-supply",
2493                                           &mmc->vqmmc_supply);
2494         if (ret)
2495                 pr_debug("%s: No vqmmc supply\n", mmc->dev->name);
2496 #endif
2497 #else /* !CONFIG_DM_MMC */
2498         /*
2499          * Driver model should use a regulator, as above, rather than calling
2500          * out to board code.
2501          */
2502         board_mmc_power_init();
2503 #endif
2504         return 0;
2505 }
2506
2507 /*
2508  * put the host in the initial state:
2509  * - turn on Vdd (card power supply)
2510  * - configure the bus width and clock to minimal values
2511  */
2512 static void mmc_set_initial_state(struct mmc *mmc)
2513 {
2514         int err;
2515
2516         /* First try to set 3.3V. If it fails set to 1.8V */
2517         err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_330);
2518         if (err != 0)
2519                 err = mmc_set_signal_voltage(mmc, MMC_SIGNAL_VOLTAGE_180);
2520         if (err != 0)
2521                 pr_warn("mmc: failed to set signal voltage\n");
2522
2523         mmc_select_mode(mmc, MMC_LEGACY);
2524         mmc_set_bus_width(mmc, 1);
2525         mmc_set_clock(mmc, 0, MMC_CLK_ENABLE);
2526 }
2527
2528 static int mmc_power_on(struct mmc *mmc)
2529 {
2530 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2531         if (mmc->vmmc_supply) {
2532                 int ret = regulator_set_enable(mmc->vmmc_supply, true);
2533
2534                 if (ret) {
2535                         puts("Error enabling VMMC supply\n");
2536                         return ret;
2537                 }
2538         }
2539 #endif
2540         return 0;
2541 }
2542
2543 static int mmc_power_off(struct mmc *mmc)
2544 {
2545         mmc_set_clock(mmc, 0, MMC_CLK_DISABLE);
2546 #if CONFIG_IS_ENABLED(DM_MMC) && CONFIG_IS_ENABLED(DM_REGULATOR)
2547         if (mmc->vmmc_supply) {
2548                 int ret = regulator_set_enable(mmc->vmmc_supply, false);
2549
2550                 if (ret) {
2551                         pr_debug("Error disabling VMMC supply\n");
2552                         return ret;
2553                 }
2554         }
2555 #endif
2556         return 0;
2557 }
2558
2559 static int mmc_power_cycle(struct mmc *mmc)
2560 {
2561         int ret;
2562
2563         ret = mmc_power_off(mmc);
2564         if (ret)
2565                 return ret;
2566         /*
2567          * SD spec recommends at least 1ms of delay. Let's wait for 2ms
2568          * to be on the safer side.
2569          */
2570         udelay(2000);
2571         return mmc_power_on(mmc);
2572 }
2573
2574 int mmc_get_op_cond(struct mmc *mmc)
2575 {
2576         bool uhs_en = supports_uhs(mmc->cfg->host_caps);
2577         int err;
2578
2579         if (mmc->has_init)
2580                 return 0;
2581
2582 #ifdef CONFIG_FSL_ESDHC_ADAPTER_IDENT
2583         mmc_adapter_card_type_ident();
2584 #endif
2585         err = mmc_power_init(mmc);
2586         if (err)
2587                 return err;
2588
2589 #ifdef CONFIG_MMC_QUIRKS
2590         mmc->quirks = MMC_QUIRK_RETRY_SET_BLOCKLEN |
2591                       MMC_QUIRK_RETRY_SEND_CID;
2592 #endif
2593
2594         err = mmc_power_cycle(mmc);
2595         if (err) {
2596                 /*
2597                  * if power cycling is not supported, we should not try
2598                  * to use the UHS modes, because we wouldn't be able to
2599                  * recover from an error during the UHS initialization.
2600                  */
2601                 pr_debug("Unable to do a full power cycle. Disabling the UHS modes for safety\n");
2602                 uhs_en = false;
2603                 mmc->host_caps &= ~UHS_CAPS;
2604                 err = mmc_power_on(mmc);
2605         }
2606         if (err)
2607                 return err;
2608
2609 #if CONFIG_IS_ENABLED(DM_MMC)
2610         /* The device has already been probed ready for use */
2611 #else
2612         /* made sure it's not NULL earlier */
2613         err = mmc->cfg->ops->init(mmc);
2614         if (err)
2615                 return err;
2616 #endif
2617         mmc->ddr_mode = 0;
2618
2619 retry:
2620         mmc_set_initial_state(mmc);
2621         mmc_send_init_stream(mmc);
2622
2623         /* Reset the Card */
2624         err = mmc_go_idle(mmc);
2625
2626         if (err)
2627                 return err;
2628
2629         /* The internal partition reset to user partition(0) at every CMD0*/
2630         mmc_get_blk_desc(mmc)->hwpart = 0;
2631
2632         /* Test for SD version 2 */
2633         err = mmc_send_if_cond(mmc);
2634
2635         /* Now try to get the SD card's operating condition */
2636         err = sd_send_op_cond(mmc, uhs_en);
2637         if (err && uhs_en) {
2638                 uhs_en = false;
2639                 mmc_power_cycle(mmc);
2640                 goto retry;
2641         }
2642
2643         /* If the command timed out, we check for an MMC card */
2644         if (err == -ETIMEDOUT) {
2645                 err = mmc_send_op_cond(mmc);
2646
2647                 if (err) {
2648 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2649                         pr_err("Card did not respond to voltage select!\n");
2650 #endif
2651                         return -EOPNOTSUPP;
2652                 }
2653         }
2654
2655         return err;
2656 }
2657
2658 int mmc_start_init(struct mmc *mmc)
2659 {
2660         bool no_card;
2661         int err = 0;
2662
2663         /*
2664          * all hosts are capable of 1 bit bus-width and able to use the legacy
2665          * timings.
2666          */
2667         mmc->host_caps = mmc->cfg->host_caps | MMC_CAP(SD_LEGACY) |
2668                          MMC_CAP(MMC_LEGACY) | MMC_MODE_1BIT;
2669
2670 #if !defined(CONFIG_MMC_BROKEN_CD)
2671         /* we pretend there's no card when init is NULL */
2672         no_card = mmc_getcd(mmc) == 0;
2673 #else
2674         no_card = 0;
2675 #endif
2676 #if !CONFIG_IS_ENABLED(DM_MMC)
2677         no_card = no_card || (mmc->cfg->ops->init == NULL);
2678 #endif
2679         if (no_card) {
2680                 mmc->has_init = 0;
2681 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
2682                 pr_err("MMC: no card present\n");
2683 #endif
2684                 return -ENOMEDIUM;
2685         }
2686
2687         err = mmc_get_op_cond(mmc);
2688
2689         if (!err)
2690                 mmc->init_in_progress = 1;
2691
2692         return err;
2693 }
2694
2695 static int mmc_complete_init(struct mmc *mmc)
2696 {
2697         int err = 0;
2698
2699         mmc->init_in_progress = 0;
2700         if (mmc->op_cond_pending)
2701                 err = mmc_complete_op_cond(mmc);
2702
2703         if (!err)
2704                 err = mmc_startup(mmc);
2705         if (err)
2706                 mmc->has_init = 0;
2707         else
2708                 mmc->has_init = 1;
2709         return err;
2710 }
2711
2712 int mmc_init(struct mmc *mmc)
2713 {
2714         int err = 0;
2715         __maybe_unused ulong start;
2716 #if CONFIG_IS_ENABLED(DM_MMC)
2717         struct mmc_uclass_priv *upriv = dev_get_uclass_priv(mmc->dev);
2718
2719         upriv->mmc = mmc;
2720 #endif
2721         if (mmc->has_init)
2722                 return 0;
2723
2724         start = get_timer(0);
2725
2726         if (!mmc->init_in_progress)
2727                 err = mmc_start_init(mmc);
2728
2729         if (!err)
2730                 err = mmc_complete_init(mmc);
2731         if (err)
2732                 pr_info("%s: %d, time %lu\n", __func__, err, get_timer(start));
2733
2734         return err;
2735 }
2736
2737 int mmc_set_dsr(struct mmc *mmc, u16 val)
2738 {
2739         mmc->dsr = val;
2740         return 0;
2741 }
2742
2743 /* CPU-specific MMC initializations */
2744 __weak int cpu_mmc_init(bd_t *bis)
2745 {
2746         return -1;
2747 }
2748
2749 /* board-specific MMC initializations. */
2750 __weak int board_mmc_init(bd_t *bis)
2751 {
2752         return -1;
2753 }
2754
2755 void mmc_set_preinit(struct mmc *mmc, int preinit)
2756 {
2757         mmc->preinit = preinit;
2758 }
2759
2760 #if CONFIG_IS_ENABLED(DM_MMC)
2761 static int mmc_probe(bd_t *bis)
2762 {
2763         int ret, i;
2764         struct uclass *uc;
2765         struct udevice *dev;
2766
2767         ret = uclass_get(UCLASS_MMC, &uc);
2768         if (ret)
2769                 return ret;
2770
2771         /*
2772          * Try to add them in sequence order. Really with driver model we
2773          * should allow holes, but the current MMC list does not allow that.
2774          * So if we request 0, 1, 3 we will get 0, 1, 2.
2775          */
2776         for (i = 0; ; i++) {
2777                 ret = uclass_get_device_by_seq(UCLASS_MMC, i, &dev);
2778                 if (ret == -ENODEV)
2779                         break;
2780         }
2781         uclass_foreach_dev(dev, uc) {
2782                 ret = device_probe(dev);
2783                 if (ret)
2784                         pr_err("%s - probe failed: %d\n", dev->name, ret);
2785         }
2786
2787         return 0;
2788 }
2789 #else
2790 static int mmc_probe(bd_t *bis)
2791 {
2792         if (board_mmc_init(bis) < 0)
2793                 cpu_mmc_init(bis);
2794
2795         return 0;
2796 }
2797 #endif
2798
2799 int mmc_initialize(bd_t *bis)
2800 {
2801         static int initialized = 0;
2802         int ret;
2803         if (initialized)        /* Avoid initializing mmc multiple times */
2804                 return 0;
2805         initialized = 1;
2806
2807 #if !CONFIG_IS_ENABLED(BLK)
2808 #if !CONFIG_IS_ENABLED(MMC_TINY)
2809         mmc_list_init();
2810 #endif
2811 #endif
2812         ret = mmc_probe(bis);
2813         if (ret)
2814                 return ret;
2815
2816 #ifndef CONFIG_SPL_BUILD
2817         print_mmc_devices(',');
2818 #endif
2819
2820         mmc_do_preinit();
2821         return 0;
2822 }
2823
2824 #ifdef CONFIG_CMD_BKOPS_ENABLE
2825 int mmc_set_bkops_enable(struct mmc *mmc)
2826 {
2827         int err;
2828         ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
2829
2830         err = mmc_send_ext_csd(mmc, ext_csd);
2831         if (err) {
2832                 puts("Could not get ext_csd register values\n");
2833                 return err;
2834         }
2835
2836         if (!(ext_csd[EXT_CSD_BKOPS_SUPPORT] & 0x1)) {
2837                 puts("Background operations not supported on device\n");
2838                 return -EMEDIUMTYPE;
2839         }
2840
2841         if (ext_csd[EXT_CSD_BKOPS_EN] & 0x1) {
2842                 puts("Background operations already enabled\n");
2843                 return 0;
2844         }
2845
2846         err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BKOPS_EN, 1);
2847         if (err) {
2848                 puts("Failed to enable manual background operations\n");
2849                 return err;
2850         }
2851
2852         puts("Enabled manual background operations\n");
2853
2854         return 0;
2855 }
2856 #endif