2 * Copyright 2008, Freescale Semiconductor, Inc
5 * Based vaguely on the Linux code
7 * SPDX-License-Identifier: GPL-2.0+
17 #include <linux/list.h>
19 #include "mmc_private.h"
21 static struct list_head mmc_devices;
22 static int cur_dev_num = -1;
24 __weak int board_mmc_getwp(struct mmc *mmc)
29 int mmc_getwp(struct mmc *mmc)
33 wp = board_mmc_getwp(mmc);
36 if (mmc->cfg->ops->getwp)
37 wp = mmc->cfg->ops->getwp(mmc);
45 __weak int board_mmc_getcd(struct mmc *mmc)
50 int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
54 #ifdef CONFIG_MMC_TRACE
58 printf("CMD_SEND:%d\n", cmd->cmdidx);
59 printf("\t\tARG\t\t\t 0x%08X\n", cmd->cmdarg);
60 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
61 switch (cmd->resp_type) {
63 printf("\t\tMMC_RSP_NONE\n");
66 printf("\t\tMMC_RSP_R1,5,6,7 \t 0x%08X \n",
70 printf("\t\tMMC_RSP_R1b\t\t 0x%08X \n",
74 printf("\t\tMMC_RSP_R2\t\t 0x%08X \n",
76 printf("\t\t \t\t 0x%08X \n",
78 printf("\t\t \t\t 0x%08X \n",
80 printf("\t\t \t\t 0x%08X \n",
83 printf("\t\t\t\t\tDUMPING DATA\n");
84 for (i = 0; i < 4; i++) {
86 printf("\t\t\t\t\t%03d - ", i*4);
87 ptr = (u8 *)&cmd->response[i];
89 for (j = 0; j < 4; j++)
90 printf("%02X ", *ptr--);
95 printf("\t\tMMC_RSP_R3,4\t\t 0x%08X \n",
99 printf("\t\tERROR MMC rsp not supported\n");
103 ret = mmc->cfg->ops->send_cmd(mmc, cmd, data);
108 int mmc_send_status(struct mmc *mmc, int timeout)
111 int err, retries = 5;
112 #ifdef CONFIG_MMC_TRACE
116 cmd.cmdidx = MMC_CMD_SEND_STATUS;
117 cmd.resp_type = MMC_RSP_R1;
118 if (!mmc_host_is_spi(mmc))
119 cmd.cmdarg = mmc->rca << 16;
122 err = mmc_send_cmd(mmc, &cmd, NULL);
124 if ((cmd.response[0] & MMC_STATUS_RDY_FOR_DATA) &&
125 (cmd.response[0] & MMC_STATUS_CURR_STATE) !=
128 else if (cmd.response[0] & MMC_STATUS_MASK) {
129 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
130 printf("Status Error: 0x%08X\n",
135 } else if (--retries < 0)
144 #ifdef CONFIG_MMC_TRACE
145 status = (cmd.response[0] & MMC_STATUS_CURR_STATE) >> 9;
146 printf("CURR STATE:%d\n", status);
149 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
150 printf("Timeout waiting card ready\n");
154 if (cmd.response[0] & MMC_STATUS_SWITCH_ERROR)
160 int mmc_set_blocklen(struct mmc *mmc, int len)
167 cmd.cmdidx = MMC_CMD_SET_BLOCKLEN;
168 cmd.resp_type = MMC_RSP_R1;
171 return mmc_send_cmd(mmc, &cmd, NULL);
174 struct mmc *find_mmc_device(int dev_num)
177 struct list_head *entry;
179 list_for_each(entry, &mmc_devices) {
180 m = list_entry(entry, struct mmc, link);
182 if (m->block_dev.dev == dev_num)
186 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
187 printf("MMC Device %d not found\n", dev_num);
193 static int mmc_read_blocks(struct mmc *mmc, void *dst, lbaint_t start,
197 struct mmc_data data;
200 cmd.cmdidx = MMC_CMD_READ_MULTIPLE_BLOCK;
202 cmd.cmdidx = MMC_CMD_READ_SINGLE_BLOCK;
204 if (mmc->high_capacity)
207 cmd.cmdarg = start * mmc->read_bl_len;
209 cmd.resp_type = MMC_RSP_R1;
212 data.blocks = blkcnt;
213 data.blocksize = mmc->read_bl_len;
214 data.flags = MMC_DATA_READ;
216 if (mmc_send_cmd(mmc, &cmd, &data))
220 cmd.cmdidx = MMC_CMD_STOP_TRANSMISSION;
222 cmd.resp_type = MMC_RSP_R1b;
223 if (mmc_send_cmd(mmc, &cmd, NULL)) {
224 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
225 printf("mmc fail to send stop cmd\n");
234 static ulong mmc_bread(int dev_num, lbaint_t start, lbaint_t blkcnt, void *dst)
236 lbaint_t cur, blocks_todo = blkcnt;
241 struct mmc *mmc = find_mmc_device(dev_num);
245 if ((start + blkcnt) > mmc->block_dev.lba) {
246 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
247 printf("MMC: block number 0x" LBAF " exceeds max(0x" LBAF ")\n",
248 start + blkcnt, mmc->block_dev.lba);
253 if (mmc_set_blocklen(mmc, mmc->read_bl_len))
257 cur = (blocks_todo > mmc->cfg->b_max) ?
258 mmc->cfg->b_max : blocks_todo;
259 if(mmc_read_blocks(mmc, dst, start, cur) != cur)
263 dst += cur * mmc->read_bl_len;
264 } while (blocks_todo > 0);
269 static int mmc_go_idle(struct mmc *mmc)
276 cmd.cmdidx = MMC_CMD_GO_IDLE_STATE;
278 cmd.resp_type = MMC_RSP_NONE;
280 err = mmc_send_cmd(mmc, &cmd, NULL);
290 static int sd_send_op_cond(struct mmc *mmc)
297 cmd.cmdidx = MMC_CMD_APP_CMD;
298 cmd.resp_type = MMC_RSP_R1;
301 err = mmc_send_cmd(mmc, &cmd, NULL);
306 cmd.cmdidx = SD_CMD_APP_SEND_OP_COND;
307 cmd.resp_type = MMC_RSP_R3;
310 * Most cards do not answer if some reserved bits
311 * in the ocr are set. However, Some controller
312 * can set bit 7 (reserved for low voltages), but
313 * how to manage low voltages SD card is not yet
316 cmd.cmdarg = mmc_host_is_spi(mmc) ? 0 :
317 (mmc->cfg->voltages & 0xff8000);
319 if (mmc->version == SD_VERSION_2)
320 cmd.cmdarg |= OCR_HCS;
322 err = mmc_send_cmd(mmc, &cmd, NULL);
327 if (cmd.response[0] & OCR_BUSY)
336 if (mmc->version != SD_VERSION_2)
337 mmc->version = SD_VERSION_1_0;
339 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
340 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
341 cmd.resp_type = MMC_RSP_R3;
344 err = mmc_send_cmd(mmc, &cmd, NULL);
350 mmc->ocr = cmd.response[0];
352 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
358 static int mmc_send_op_cond_iter(struct mmc *mmc, int use_arg)
363 cmd.cmdidx = MMC_CMD_SEND_OP_COND;
364 cmd.resp_type = MMC_RSP_R3;
366 if (use_arg && !mmc_host_is_spi(mmc)) {
368 (mmc->cfg->voltages &
369 (mmc->ocr & OCR_VOLTAGE_MASK)) |
370 (mmc->ocr & OCR_ACCESS_MODE);
372 if (mmc->cfg->host_caps & MMC_MODE_HC)
373 cmd.cmdarg |= OCR_HCS;
375 err = mmc_send_cmd(mmc, &cmd, NULL);
378 mmc->ocr = cmd.response[0];
382 static int mmc_send_op_cond(struct mmc *mmc)
386 /* Some cards seem to need this */
389 /* Asking to the card its capabilities */
390 mmc->op_cond_pending = 1;
391 for (i = 0; i < 2; i++) {
392 err = mmc_send_op_cond_iter(mmc, i != 0);
396 /* exit if not busy (flag seems to be inverted) */
397 if (mmc->ocr & OCR_BUSY)
403 static int mmc_complete_op_cond(struct mmc *mmc)
410 mmc->op_cond_pending = 0;
411 if (!(mmc->ocr & OCR_BUSY)) {
412 start = get_timer(0);
414 err = mmc_send_op_cond_iter(mmc, 1);
417 if (mmc->ocr & OCR_BUSY)
419 if (get_timer(start) > timeout)
425 if (mmc_host_is_spi(mmc)) { /* read OCR for spi */
426 cmd.cmdidx = MMC_CMD_SPI_READ_OCR;
427 cmd.resp_type = MMC_RSP_R3;
430 err = mmc_send_cmd(mmc, &cmd, NULL);
435 mmc->ocr = cmd.response[0];
438 mmc->version = MMC_VERSION_UNKNOWN;
440 mmc->high_capacity = ((mmc->ocr & OCR_HCS) == OCR_HCS);
447 static int mmc_send_ext_csd(struct mmc *mmc, u8 *ext_csd)
450 struct mmc_data data;
453 /* Get the Card Status Register */
454 cmd.cmdidx = MMC_CMD_SEND_EXT_CSD;
455 cmd.resp_type = MMC_RSP_R1;
458 data.dest = (char *)ext_csd;
460 data.blocksize = MMC_MAX_BLOCK_LEN;
461 data.flags = MMC_DATA_READ;
463 err = mmc_send_cmd(mmc, &cmd, &data);
469 static int mmc_switch(struct mmc *mmc, u8 set, u8 index, u8 value)
475 cmd.cmdidx = MMC_CMD_SWITCH;
476 cmd.resp_type = MMC_RSP_R1b;
477 cmd.cmdarg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) |
481 ret = mmc_send_cmd(mmc, &cmd, NULL);
483 /* Waiting for the ready status */
485 ret = mmc_send_status(mmc, timeout);
491 static int mmc_change_freq(struct mmc *mmc)
493 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
499 if (mmc_host_is_spi(mmc))
502 /* Only version 4 supports high-speed */
503 if (mmc->version < MMC_VERSION_4)
506 mmc->card_caps |= MMC_MODE_4BIT | MMC_MODE_8BIT;
508 err = mmc_send_ext_csd(mmc, ext_csd);
513 cardtype = ext_csd[EXT_CSD_CARD_TYPE] & 0xf;
515 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_HS_TIMING, 1);
518 return err == SWITCH_ERR ? 0 : err;
520 /* Now check to see that it worked */
521 err = mmc_send_ext_csd(mmc, ext_csd);
526 /* No high-speed support */
527 if (!ext_csd[EXT_CSD_HS_TIMING])
530 /* High Speed is set, there are two types: 52MHz and 26MHz */
531 if (cardtype & EXT_CSD_CARD_TYPE_52) {
532 if (cardtype & EXT_CSD_CARD_TYPE_DDR_1_8V)
533 mmc->card_caps |= MMC_MODE_DDR_52MHz;
534 mmc->card_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS;
536 mmc->card_caps |= MMC_MODE_HS;
542 static int mmc_set_capacity(struct mmc *mmc, int part_num)
546 mmc->capacity = mmc->capacity_user;
550 mmc->capacity = mmc->capacity_boot;
553 mmc->capacity = mmc->capacity_rpmb;
559 mmc->capacity = mmc->capacity_gp[part_num - 4];
565 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
570 int mmc_select_hwpart(int dev_num, int hwpart)
572 struct mmc *mmc = find_mmc_device(dev_num);
578 if (mmc->part_num == hwpart)
581 if (mmc->part_config == MMCPART_NOAVAILABLE) {
582 printf("Card doesn't support part_switch\n");
586 ret = mmc_switch_part(dev_num, hwpart);
590 mmc->part_num = hwpart;
596 int mmc_switch_part(int dev_num, unsigned int part_num)
598 struct mmc *mmc = find_mmc_device(dev_num);
604 ret = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
605 (mmc->part_config & ~PART_ACCESS_MASK)
606 | (part_num & PART_ACCESS_MASK));
609 * Set the capacity if the switch succeeded or was intended
610 * to return to representing the raw device.
612 if ((ret == 0) || ((ret == -ENODEV) && (part_num == 0)))
613 ret = mmc_set_capacity(mmc, part_num);
618 int mmc_hwpart_config(struct mmc *mmc,
619 const struct mmc_hwpart_conf *conf,
620 enum mmc_hwpart_conf_mode mode)
626 u32 max_enh_size_mult;
627 u32 tot_enh_size_mult = 0;
630 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
632 if (mode < MMC_HWPART_CONF_CHECK || mode > MMC_HWPART_CONF_COMPLETE)
635 if (IS_SD(mmc) || (mmc->version < MMC_VERSION_4_41)) {
636 printf("eMMC >= 4.4 required for enhanced user data area\n");
640 if (!(mmc->part_support & PART_SUPPORT)) {
641 printf("Card does not support partitioning\n");
645 if (!mmc->hc_wp_grp_size) {
646 printf("Card does not define HC WP group size\n");
650 /* check partition alignment and total enhanced size */
651 if (conf->user.enh_size) {
652 if (conf->user.enh_size % mmc->hc_wp_grp_size ||
653 conf->user.enh_start % mmc->hc_wp_grp_size) {
654 printf("User data enhanced area not HC WP group "
658 part_attrs |= EXT_CSD_ENH_USR;
659 enh_size_mult = conf->user.enh_size / mmc->hc_wp_grp_size;
660 if (mmc->high_capacity) {
661 enh_start_addr = conf->user.enh_start;
663 enh_start_addr = (conf->user.enh_start << 9);
669 tot_enh_size_mult += enh_size_mult;
671 for (pidx = 0; pidx < 4; pidx++) {
672 if (conf->gp_part[pidx].size % mmc->hc_wp_grp_size) {
673 printf("GP%i partition not HC WP group size "
674 "aligned\n", pidx+1);
677 gp_size_mult[pidx] = conf->gp_part[pidx].size / mmc->hc_wp_grp_size;
678 if (conf->gp_part[pidx].size && conf->gp_part[pidx].enhanced) {
679 part_attrs |= EXT_CSD_ENH_GP(pidx);
680 tot_enh_size_mult += gp_size_mult[pidx];
684 if (part_attrs && ! (mmc->part_support & ENHNCD_SUPPORT)) {
685 printf("Card does not support enhanced attribute\n");
689 err = mmc_send_ext_csd(mmc, ext_csd);
694 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+2] << 16) +
695 (ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT+1] << 8) +
696 ext_csd[EXT_CSD_MAX_ENH_SIZE_MULT];
697 if (tot_enh_size_mult > max_enh_size_mult) {
698 printf("Total enhanced size exceeds maximum (%u > %u)\n",
699 tot_enh_size_mult, max_enh_size_mult);
703 /* The default value of EXT_CSD_WR_REL_SET is device
704 * dependent, the values can only be changed if the
705 * EXT_CSD_HS_CTRL_REL bit is set. The values can be
706 * changed only once and before partitioning is completed. */
707 wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
708 if (conf->user.wr_rel_change) {
709 if (conf->user.wr_rel_set)
710 wr_rel_set |= EXT_CSD_WR_DATA_REL_USR;
712 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_USR;
714 for (pidx = 0; pidx < 4; pidx++) {
715 if (conf->gp_part[pidx].wr_rel_change) {
716 if (conf->gp_part[pidx].wr_rel_set)
717 wr_rel_set |= EXT_CSD_WR_DATA_REL_GP(pidx);
719 wr_rel_set &= ~EXT_CSD_WR_DATA_REL_GP(pidx);
723 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET] &&
724 !(ext_csd[EXT_CSD_WR_REL_PARAM] & EXT_CSD_HS_CTRL_REL)) {
725 puts("Card does not support host controlled partition write "
726 "reliability settings\n");
730 if (ext_csd[EXT_CSD_PARTITION_SETTING] &
731 EXT_CSD_PARTITION_SETTING_COMPLETED) {
732 printf("Card already partitioned\n");
736 if (mode == MMC_HWPART_CONF_CHECK)
739 /* Partitioning requires high-capacity size definitions */
740 if (!(ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01)) {
741 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
742 EXT_CSD_ERASE_GROUP_DEF, 1);
747 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
749 /* update erase group size to be high-capacity */
750 mmc->erase_grp_size =
751 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
755 /* all OK, write the configuration */
756 for (i = 0; i < 4; i++) {
757 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
758 EXT_CSD_ENH_START_ADDR+i,
759 (enh_start_addr >> (i*8)) & 0xFF);
763 for (i = 0; i < 3; i++) {
764 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
765 EXT_CSD_ENH_SIZE_MULT+i,
766 (enh_size_mult >> (i*8)) & 0xFF);
770 for (pidx = 0; pidx < 4; pidx++) {
771 for (i = 0; i < 3; i++) {
772 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
773 EXT_CSD_GP_SIZE_MULT+pidx*3+i,
774 (gp_size_mult[pidx] >> (i*8)) & 0xFF);
779 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
780 EXT_CSD_PARTITIONS_ATTRIBUTE, part_attrs);
784 if (mode == MMC_HWPART_CONF_SET)
787 /* The WR_REL_SET is a write-once register but shall be
788 * written before setting PART_SETTING_COMPLETED. As it is
789 * write-once we can only write it when completing the
791 if (wr_rel_set != ext_csd[EXT_CSD_WR_REL_SET]) {
792 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
793 EXT_CSD_WR_REL_SET, wr_rel_set);
798 /* Setting PART_SETTING_COMPLETED confirms the partition
799 * configuration but it only becomes effective after power
800 * cycle, so we do not adjust the partition related settings
801 * in the mmc struct. */
803 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
804 EXT_CSD_PARTITION_SETTING,
805 EXT_CSD_PARTITION_SETTING_COMPLETED);
812 int mmc_getcd(struct mmc *mmc)
816 cd = board_mmc_getcd(mmc);
819 if (mmc->cfg->ops->getcd)
820 cd = mmc->cfg->ops->getcd(mmc);
828 static int sd_switch(struct mmc *mmc, int mode, int group, u8 value, u8 *resp)
831 struct mmc_data data;
833 /* Switch the frequency */
834 cmd.cmdidx = SD_CMD_SWITCH_FUNC;
835 cmd.resp_type = MMC_RSP_R1;
836 cmd.cmdarg = (mode << 31) | 0xffffff;
837 cmd.cmdarg &= ~(0xf << (group * 4));
838 cmd.cmdarg |= value << (group * 4);
840 data.dest = (char *)resp;
843 data.flags = MMC_DATA_READ;
845 return mmc_send_cmd(mmc, &cmd, &data);
849 static int sd_change_freq(struct mmc *mmc)
853 ALLOC_CACHE_ALIGN_BUFFER(uint, scr, 2);
854 ALLOC_CACHE_ALIGN_BUFFER(uint, switch_status, 16);
855 struct mmc_data data;
860 if (mmc_host_is_spi(mmc))
863 /* Read the SCR to find out if this card supports higher speeds */
864 cmd.cmdidx = MMC_CMD_APP_CMD;
865 cmd.resp_type = MMC_RSP_R1;
866 cmd.cmdarg = mmc->rca << 16;
868 err = mmc_send_cmd(mmc, &cmd, NULL);
873 cmd.cmdidx = SD_CMD_APP_SEND_SCR;
874 cmd.resp_type = MMC_RSP_R1;
880 data.dest = (char *)scr;
883 data.flags = MMC_DATA_READ;
885 err = mmc_send_cmd(mmc, &cmd, &data);
894 mmc->scr[0] = __be32_to_cpu(scr[0]);
895 mmc->scr[1] = __be32_to_cpu(scr[1]);
897 switch ((mmc->scr[0] >> 24) & 0xf) {
899 mmc->version = SD_VERSION_1_0;
902 mmc->version = SD_VERSION_1_10;
905 mmc->version = SD_VERSION_2;
906 if ((mmc->scr[0] >> 15) & 0x1)
907 mmc->version = SD_VERSION_3;
910 mmc->version = SD_VERSION_1_0;
914 if (mmc->scr[0] & SD_DATA_4BIT)
915 mmc->card_caps |= MMC_MODE_4BIT;
917 /* Version 1.0 doesn't support switching */
918 if (mmc->version == SD_VERSION_1_0)
923 err = sd_switch(mmc, SD_SWITCH_CHECK, 0, 1,
924 (u8 *)switch_status);
929 /* The high-speed function is busy. Try again */
930 if (!(__be32_to_cpu(switch_status[7]) & SD_HIGHSPEED_BUSY))
934 /* If high-speed isn't supported, we return */
935 if (!(__be32_to_cpu(switch_status[3]) & SD_HIGHSPEED_SUPPORTED))
939 * If the host doesn't support SD_HIGHSPEED, do not switch card to
940 * HIGHSPEED mode even if the card support SD_HIGHSPPED.
941 * This can avoid furthur problem when the card runs in different
942 * mode between the host.
944 if (!((mmc->cfg->host_caps & MMC_MODE_HS_52MHz) &&
945 (mmc->cfg->host_caps & MMC_MODE_HS)))
948 err = sd_switch(mmc, SD_SWITCH_SWITCH, 0, 1, (u8 *)switch_status);
953 if ((__be32_to_cpu(switch_status[4]) & 0x0f000000) == 0x01000000)
954 mmc->card_caps |= MMC_MODE_HS;
959 /* frequency bases */
960 /* divided by 10 to be nice to platforms without floating point */
961 static const int fbase[] = {
968 /* Multiplier values for TRAN_SPEED. Multiplied by 10 to be nice
969 * to platforms without floating point.
971 static const int multipliers[] = {
990 static void mmc_set_ios(struct mmc *mmc)
992 if (mmc->cfg->ops->set_ios)
993 mmc->cfg->ops->set_ios(mmc);
996 void mmc_set_clock(struct mmc *mmc, uint clock)
998 if (clock > mmc->cfg->f_max)
999 clock = mmc->cfg->f_max;
1001 if (clock < mmc->cfg->f_min)
1002 clock = mmc->cfg->f_min;
1009 static void mmc_set_bus_width(struct mmc *mmc, uint width)
1011 mmc->bus_width = width;
1016 static int mmc_startup(struct mmc *mmc)
1020 u64 cmult, csize, capacity;
1022 ALLOC_CACHE_ALIGN_BUFFER(u8, ext_csd, MMC_MAX_BLOCK_LEN);
1023 ALLOC_CACHE_ALIGN_BUFFER(u8, test_csd, MMC_MAX_BLOCK_LEN);
1025 bool has_parts = false;
1026 bool part_completed;
1028 #ifdef CONFIG_MMC_SPI_CRC_ON
1029 if (mmc_host_is_spi(mmc)) { /* enable CRC check for spi */
1030 cmd.cmdidx = MMC_CMD_SPI_CRC_ON_OFF;
1031 cmd.resp_type = MMC_RSP_R1;
1033 err = mmc_send_cmd(mmc, &cmd, NULL);
1040 /* Put the Card in Identify Mode */
1041 cmd.cmdidx = mmc_host_is_spi(mmc) ? MMC_CMD_SEND_CID :
1042 MMC_CMD_ALL_SEND_CID; /* cmd not supported in spi */
1043 cmd.resp_type = MMC_RSP_R2;
1046 err = mmc_send_cmd(mmc, &cmd, NULL);
1051 memcpy(mmc->cid, cmd.response, 16);
1054 * For MMC cards, set the Relative Address.
1055 * For SD cards, get the Relatvie Address.
1056 * This also puts the cards into Standby State
1058 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1059 cmd.cmdidx = SD_CMD_SEND_RELATIVE_ADDR;
1060 cmd.cmdarg = mmc->rca << 16;
1061 cmd.resp_type = MMC_RSP_R6;
1063 err = mmc_send_cmd(mmc, &cmd, NULL);
1069 mmc->rca = (cmd.response[0] >> 16) & 0xffff;
1072 /* Get the Card-Specific Data */
1073 cmd.cmdidx = MMC_CMD_SEND_CSD;
1074 cmd.resp_type = MMC_RSP_R2;
1075 cmd.cmdarg = mmc->rca << 16;
1077 err = mmc_send_cmd(mmc, &cmd, NULL);
1079 /* Waiting for the ready status */
1080 mmc_send_status(mmc, timeout);
1085 mmc->csd[0] = cmd.response[0];
1086 mmc->csd[1] = cmd.response[1];
1087 mmc->csd[2] = cmd.response[2];
1088 mmc->csd[3] = cmd.response[3];
1090 if (mmc->version == MMC_VERSION_UNKNOWN) {
1091 int version = (cmd.response[0] >> 26) & 0xf;
1095 mmc->version = MMC_VERSION_1_2;
1098 mmc->version = MMC_VERSION_1_4;
1101 mmc->version = MMC_VERSION_2_2;
1104 mmc->version = MMC_VERSION_3;
1107 mmc->version = MMC_VERSION_4;
1110 mmc->version = MMC_VERSION_1_2;
1115 /* divide frequency by 10, since the mults are 10x bigger */
1116 freq = fbase[(cmd.response[0] & 0x7)];
1117 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1119 mmc->tran_speed = freq * mult;
1121 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1122 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1125 mmc->write_bl_len = mmc->read_bl_len;
1127 mmc->write_bl_len = 1 << ((cmd.response[3] >> 22) & 0xf);
1129 if (mmc->high_capacity) {
1130 csize = (mmc->csd[1] & 0x3f) << 16
1131 | (mmc->csd[2] & 0xffff0000) >> 16;
1134 csize = (mmc->csd[1] & 0x3ff) << 2
1135 | (mmc->csd[2] & 0xc0000000) >> 30;
1136 cmult = (mmc->csd[2] & 0x00038000) >> 15;
1139 mmc->capacity_user = (csize + 1) << (cmult + 2);
1140 mmc->capacity_user *= mmc->read_bl_len;
1141 mmc->capacity_boot = 0;
1142 mmc->capacity_rpmb = 0;
1143 for (i = 0; i < 4; i++)
1144 mmc->capacity_gp[i] = 0;
1146 if (mmc->read_bl_len > MMC_MAX_BLOCK_LEN)
1147 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1149 if (mmc->write_bl_len > MMC_MAX_BLOCK_LEN)
1150 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1152 if ((mmc->dsr_imp) && (0xffffffff != mmc->dsr)) {
1153 cmd.cmdidx = MMC_CMD_SET_DSR;
1154 cmd.cmdarg = (mmc->dsr & 0xffff) << 16;
1155 cmd.resp_type = MMC_RSP_NONE;
1156 if (mmc_send_cmd(mmc, &cmd, NULL))
1157 printf("MMC: SET_DSR failed\n");
1160 /* Select the card, and put it into Transfer Mode */
1161 if (!mmc_host_is_spi(mmc)) { /* cmd not supported in spi */
1162 cmd.cmdidx = MMC_CMD_SELECT_CARD;
1163 cmd.resp_type = MMC_RSP_R1;
1164 cmd.cmdarg = mmc->rca << 16;
1165 err = mmc_send_cmd(mmc, &cmd, NULL);
1172 * For SD, its erase group is always one sector
1174 mmc->erase_grp_size = 1;
1175 mmc->part_config = MMCPART_NOAVAILABLE;
1176 if (!IS_SD(mmc) && (mmc->version >= MMC_VERSION_4)) {
1177 /* check ext_csd version and capacity */
1178 err = mmc_send_ext_csd(mmc, ext_csd);
1181 if (ext_csd[EXT_CSD_REV] >= 2) {
1183 * According to the JEDEC Standard, the value of
1184 * ext_csd's capacity is valid if the value is more
1187 capacity = ext_csd[EXT_CSD_SEC_CNT] << 0
1188 | ext_csd[EXT_CSD_SEC_CNT + 1] << 8
1189 | ext_csd[EXT_CSD_SEC_CNT + 2] << 16
1190 | ext_csd[EXT_CSD_SEC_CNT + 3] << 24;
1191 capacity *= MMC_MAX_BLOCK_LEN;
1192 if ((capacity >> 20) > 2 * 1024)
1193 mmc->capacity_user = capacity;
1196 switch (ext_csd[EXT_CSD_REV]) {
1198 mmc->version = MMC_VERSION_4_1;
1201 mmc->version = MMC_VERSION_4_2;
1204 mmc->version = MMC_VERSION_4_3;
1207 mmc->version = MMC_VERSION_4_41;
1210 mmc->version = MMC_VERSION_4_5;
1213 mmc->version = MMC_VERSION_5_0;
1217 /* The partition data may be non-zero but it is only
1218 * effective if PARTITION_SETTING_COMPLETED is set in
1219 * EXT_CSD, so ignore any data if this bit is not set,
1220 * except for enabling the high-capacity group size
1221 * definition (see below). */
1222 part_completed = !!(ext_csd[EXT_CSD_PARTITION_SETTING] &
1223 EXT_CSD_PARTITION_SETTING_COMPLETED);
1225 /* store the partition info of emmc */
1226 mmc->part_support = ext_csd[EXT_CSD_PARTITIONING_SUPPORT];
1227 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) ||
1228 ext_csd[EXT_CSD_BOOT_MULT])
1229 mmc->part_config = ext_csd[EXT_CSD_PART_CONF];
1230 if (part_completed &&
1231 (ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & ENHNCD_SUPPORT))
1232 mmc->part_attr = ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE];
1234 mmc->capacity_boot = ext_csd[EXT_CSD_BOOT_MULT] << 17;
1236 mmc->capacity_rpmb = ext_csd[EXT_CSD_RPMB_MULT] << 17;
1238 for (i = 0; i < 4; i++) {
1239 int idx = EXT_CSD_GP_SIZE_MULT + i * 3;
1240 uint mult = (ext_csd[idx + 2] << 16) +
1241 (ext_csd[idx + 1] << 8) + ext_csd[idx];
1244 if (!part_completed)
1246 mmc->capacity_gp[i] = mult;
1247 mmc->capacity_gp[i] *=
1248 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1249 mmc->capacity_gp[i] *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1250 mmc->capacity_gp[i] <<= 19;
1253 if (part_completed) {
1254 mmc->enh_user_size =
1255 (ext_csd[EXT_CSD_ENH_SIZE_MULT+2] << 16) +
1256 (ext_csd[EXT_CSD_ENH_SIZE_MULT+1] << 8) +
1257 ext_csd[EXT_CSD_ENH_SIZE_MULT];
1258 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE];
1259 mmc->enh_user_size *= ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1260 mmc->enh_user_size <<= 19;
1261 mmc->enh_user_start =
1262 (ext_csd[EXT_CSD_ENH_START_ADDR+3] << 24) +
1263 (ext_csd[EXT_CSD_ENH_START_ADDR+2] << 16) +
1264 (ext_csd[EXT_CSD_ENH_START_ADDR+1] << 8) +
1265 ext_csd[EXT_CSD_ENH_START_ADDR];
1266 if (mmc->high_capacity)
1267 mmc->enh_user_start <<= 9;
1271 * Host needs to enable ERASE_GRP_DEF bit if device is
1272 * partitioned. This bit will be lost every time after a reset
1273 * or power off. This will affect erase size.
1277 if ((ext_csd[EXT_CSD_PARTITIONING_SUPPORT] & PART_SUPPORT) &&
1278 (ext_csd[EXT_CSD_PARTITIONS_ATTRIBUTE] & PART_ENH_ATTRIB))
1281 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1282 EXT_CSD_ERASE_GROUP_DEF, 1);
1287 ext_csd[EXT_CSD_ERASE_GROUP_DEF] = 1;
1290 if (ext_csd[EXT_CSD_ERASE_GROUP_DEF] & 0x01) {
1291 /* Read out group size from ext_csd */
1292 mmc->erase_grp_size =
1293 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE] * 1024;
1295 * if high capacity and partition setting completed
1296 * SEC_COUNT is valid even if it is smaller than 2 GiB
1297 * JEDEC Standard JESD84-B45, 6.2.4
1299 if (mmc->high_capacity && part_completed) {
1300 capacity = (ext_csd[EXT_CSD_SEC_CNT]) |
1301 (ext_csd[EXT_CSD_SEC_CNT + 1] << 8) |
1302 (ext_csd[EXT_CSD_SEC_CNT + 2] << 16) |
1303 (ext_csd[EXT_CSD_SEC_CNT + 3] << 24);
1304 capacity *= MMC_MAX_BLOCK_LEN;
1305 mmc->capacity_user = capacity;
1308 /* Calculate the group size from the csd value. */
1309 int erase_gsz, erase_gmul;
1310 erase_gsz = (mmc->csd[2] & 0x00007c00) >> 10;
1311 erase_gmul = (mmc->csd[2] & 0x000003e0) >> 5;
1312 mmc->erase_grp_size = (erase_gsz + 1)
1316 mmc->hc_wp_grp_size = 1024
1317 * ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1318 * ext_csd[EXT_CSD_HC_WP_GRP_SIZE];
1320 mmc->wr_rel_set = ext_csd[EXT_CSD_WR_REL_SET];
1323 err = mmc_set_capacity(mmc, mmc->part_num);
1328 err = sd_change_freq(mmc);
1330 err = mmc_change_freq(mmc);
1335 /* Restrict card's capabilities by what the host can do */
1336 mmc->card_caps &= mmc->cfg->host_caps;
1339 if (mmc->card_caps & MMC_MODE_4BIT) {
1340 cmd.cmdidx = MMC_CMD_APP_CMD;
1341 cmd.resp_type = MMC_RSP_R1;
1342 cmd.cmdarg = mmc->rca << 16;
1344 err = mmc_send_cmd(mmc, &cmd, NULL);
1348 cmd.cmdidx = SD_CMD_APP_SET_BUS_WIDTH;
1349 cmd.resp_type = MMC_RSP_R1;
1351 err = mmc_send_cmd(mmc, &cmd, NULL);
1355 mmc_set_bus_width(mmc, 4);
1358 if (mmc->card_caps & MMC_MODE_HS)
1359 mmc->tran_speed = 50000000;
1361 mmc->tran_speed = 25000000;
1362 } else if (mmc->version >= MMC_VERSION_4) {
1363 /* Only version 4 of MMC supports wider bus widths */
1366 /* An array of possible bus widths in order of preference */
1367 static unsigned ext_csd_bits[] = {
1368 EXT_CSD_DDR_BUS_WIDTH_8,
1369 EXT_CSD_DDR_BUS_WIDTH_4,
1370 EXT_CSD_BUS_WIDTH_8,
1371 EXT_CSD_BUS_WIDTH_4,
1372 EXT_CSD_BUS_WIDTH_1,
1375 /* An array to map CSD bus widths to host cap bits */
1376 static unsigned ext_to_hostcaps[] = {
1377 [EXT_CSD_DDR_BUS_WIDTH_4] =
1378 MMC_MODE_DDR_52MHz | MMC_MODE_4BIT,
1379 [EXT_CSD_DDR_BUS_WIDTH_8] =
1380 MMC_MODE_DDR_52MHz | MMC_MODE_8BIT,
1381 [EXT_CSD_BUS_WIDTH_4] = MMC_MODE_4BIT,
1382 [EXT_CSD_BUS_WIDTH_8] = MMC_MODE_8BIT,
1385 /* An array to map chosen bus width to an integer */
1386 static unsigned widths[] = {
1390 for (idx=0; idx < ARRAY_SIZE(ext_csd_bits); idx++) {
1391 unsigned int extw = ext_csd_bits[idx];
1392 unsigned int caps = ext_to_hostcaps[extw];
1395 * If the bus width is still not changed,
1396 * don't try to set the default again.
1397 * Otherwise, recover from switch attempts
1398 * by switching to 1-bit bus width.
1400 if (extw == EXT_CSD_BUS_WIDTH_1 &&
1401 mmc->bus_width == 1) {
1407 * Check to make sure the card and controller support
1408 * these capabilities
1410 if ((mmc->card_caps & caps) != caps)
1413 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL,
1414 EXT_CSD_BUS_WIDTH, extw);
1419 mmc->ddr_mode = (caps & MMC_MODE_DDR_52MHz) ? 1 : 0;
1420 mmc_set_bus_width(mmc, widths[idx]);
1422 err = mmc_send_ext_csd(mmc, test_csd);
1427 /* Only compare read only fields */
1428 if (ext_csd[EXT_CSD_PARTITIONING_SUPPORT]
1429 == test_csd[EXT_CSD_PARTITIONING_SUPPORT] &&
1430 ext_csd[EXT_CSD_HC_WP_GRP_SIZE]
1431 == test_csd[EXT_CSD_HC_WP_GRP_SIZE] &&
1432 ext_csd[EXT_CSD_REV]
1433 == test_csd[EXT_CSD_REV] &&
1434 ext_csd[EXT_CSD_HC_ERASE_GRP_SIZE]
1435 == test_csd[EXT_CSD_HC_ERASE_GRP_SIZE] &&
1436 memcmp(&ext_csd[EXT_CSD_SEC_CNT],
1437 &test_csd[EXT_CSD_SEC_CNT], 4) == 0)
1446 if (mmc->card_caps & MMC_MODE_HS) {
1447 if (mmc->card_caps & MMC_MODE_HS_52MHz)
1448 mmc->tran_speed = 52000000;
1450 mmc->tran_speed = 26000000;
1454 mmc_set_clock(mmc, mmc->tran_speed);
1456 /* Fix the block length for DDR mode */
1457 if (mmc->ddr_mode) {
1458 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1459 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1462 /* fill in device description */
1463 mmc->block_dev.lun = 0;
1464 mmc->block_dev.type = 0;
1465 mmc->block_dev.blksz = mmc->read_bl_len;
1466 mmc->block_dev.log2blksz = LOG2(mmc->block_dev.blksz);
1467 mmc->block_dev.lba = lldiv(mmc->capacity, mmc->read_bl_len);
1468 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1469 sprintf(mmc->block_dev.vendor, "Man %06x Snr %04x%04x",
1470 mmc->cid[0] >> 24, (mmc->cid[2] & 0xffff),
1471 (mmc->cid[3] >> 16) & 0xffff);
1472 sprintf(mmc->block_dev.product, "%c%c%c%c%c%c", mmc->cid[0] & 0xff,
1473 (mmc->cid[1] >> 24), (mmc->cid[1] >> 16) & 0xff,
1474 (mmc->cid[1] >> 8) & 0xff, mmc->cid[1] & 0xff,
1475 (mmc->cid[2] >> 24) & 0xff);
1476 sprintf(mmc->block_dev.revision, "%d.%d", (mmc->cid[2] >> 20) & 0xf,
1477 (mmc->cid[2] >> 16) & 0xf);
1479 mmc->block_dev.vendor[0] = 0;
1480 mmc->block_dev.product[0] = 0;
1481 mmc->block_dev.revision[0] = 0;
1483 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBDISK_SUPPORT)
1484 init_part(&mmc->block_dev);
1490 static int mmc_send_if_cond(struct mmc *mmc)
1495 cmd.cmdidx = SD_CMD_SEND_IF_COND;
1496 /* We set the bit if the host supports voltages between 2.7 and 3.6 V */
1497 cmd.cmdarg = ((mmc->cfg->voltages & 0xff8000) != 0) << 8 | 0xaa;
1498 cmd.resp_type = MMC_RSP_R7;
1500 err = mmc_send_cmd(mmc, &cmd, NULL);
1505 if ((cmd.response[0] & 0xff) != 0xaa)
1506 return UNUSABLE_ERR;
1508 mmc->version = SD_VERSION_2;
1513 /* not used any more */
1514 int __deprecated mmc_register(struct mmc *mmc)
1516 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1517 printf("%s is deprecated! use mmc_create() instead.\n", __func__);
1522 struct mmc *mmc_create(const struct mmc_config *cfg, void *priv)
1526 /* quick validation */
1527 if (cfg == NULL || cfg->ops == NULL || cfg->ops->send_cmd == NULL ||
1528 cfg->f_min == 0 || cfg->f_max == 0 || cfg->b_max == 0)
1531 mmc = calloc(1, sizeof(*mmc));
1538 /* the following chunk was mmc_register() */
1540 /* Setup dsr related values */
1542 mmc->dsr = 0xffffffff;
1543 /* Setup the universal parts of the block interface just once */
1544 mmc->block_dev.if_type = IF_TYPE_MMC;
1545 mmc->block_dev.dev = cur_dev_num++;
1546 mmc->block_dev.removable = 1;
1547 mmc->block_dev.block_read = mmc_bread;
1548 mmc->block_dev.block_write = mmc_bwrite;
1549 mmc->block_dev.block_erase = mmc_berase;
1551 /* setup initial part type */
1552 mmc->block_dev.part_type = mmc->cfg->part_type;
1554 INIT_LIST_HEAD(&mmc->link);
1556 list_add_tail(&mmc->link, &mmc_devices);
1561 void mmc_destroy(struct mmc *mmc)
1563 /* only freeing memory for now */
1567 #ifdef CONFIG_PARTITIONS
1568 block_dev_desc_t *mmc_get_dev(int dev)
1570 struct mmc *mmc = find_mmc_device(dev);
1571 if (!mmc || mmc_init(mmc))
1574 return &mmc->block_dev;
1578 /* board-specific MMC power initializations. */
1579 __weak void board_mmc_power_init(void)
1583 int mmc_start_init(struct mmc *mmc)
1587 /* we pretend there's no card when init is NULL */
1588 if (mmc_getcd(mmc) == 0 || mmc->cfg->ops->init == NULL) {
1590 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1591 printf("MMC: no card present\n");
1599 board_mmc_power_init();
1601 /* made sure it's not NULL earlier */
1602 err = mmc->cfg->ops->init(mmc);
1608 mmc_set_bus_width(mmc, 1);
1609 mmc_set_clock(mmc, 1);
1611 /* Reset the Card */
1612 err = mmc_go_idle(mmc);
1617 /* The internal partition reset to user partition(0) at every CMD0*/
1620 /* Test for SD version 2 */
1621 err = mmc_send_if_cond(mmc);
1623 /* Now try to get the SD card's operating condition */
1624 err = sd_send_op_cond(mmc);
1626 /* If the command timed out, we check for an MMC card */
1627 if (err == TIMEOUT) {
1628 err = mmc_send_op_cond(mmc);
1630 if (err && err != IN_PROGRESS) {
1631 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1632 printf("Card did not respond to voltage select!\n");
1634 return UNUSABLE_ERR;
1638 if (err == IN_PROGRESS)
1639 mmc->init_in_progress = 1;
1644 static int mmc_complete_init(struct mmc *mmc)
1648 if (mmc->op_cond_pending)
1649 err = mmc_complete_op_cond(mmc);
1652 err = mmc_startup(mmc);
1657 mmc->init_in_progress = 0;
1661 int mmc_init(struct mmc *mmc)
1663 int err = IN_PROGRESS;
1669 start = get_timer(0);
1671 if (!mmc->init_in_progress)
1672 err = mmc_start_init(mmc);
1674 if (!err || err == IN_PROGRESS)
1675 err = mmc_complete_init(mmc);
1676 debug("%s: %d, time %lu\n", __func__, err, get_timer(start));
1680 int mmc_set_dsr(struct mmc *mmc, u16 val)
1686 /* CPU-specific MMC initializations */
1687 __weak int cpu_mmc_init(bd_t *bis)
1692 /* board-specific MMC initializations. */
1693 __weak int board_mmc_init(bd_t *bis)
1698 #if !defined(CONFIG_SPL_BUILD) || defined(CONFIG_SPL_LIBCOMMON_SUPPORT)
1700 void print_mmc_devices(char separator)
1703 struct list_head *entry;
1706 list_for_each(entry, &mmc_devices) {
1707 m = list_entry(entry, struct mmc, link);
1710 mmc_type = IS_SD(m) ? "SD" : "eMMC";
1714 printf("%s: %d", m->cfg->name, m->block_dev.dev);
1716 printf(" (%s)", mmc_type);
1718 if (entry->next != &mmc_devices) {
1719 printf("%c", separator);
1720 if (separator != '\n')
1729 void print_mmc_devices(char separator) { }
1732 int get_mmc_num(void)
1737 void mmc_set_preinit(struct mmc *mmc, int preinit)
1739 mmc->preinit = preinit;
1742 static void do_preinit(void)
1745 struct list_head *entry;
1747 list_for_each(entry, &mmc_devices) {
1748 m = list_entry(entry, struct mmc, link);
1756 int mmc_initialize(bd_t *bis)
1758 INIT_LIST_HEAD (&mmc_devices);
1761 if (board_mmc_init(bis) < 0)
1764 #ifndef CONFIG_SPL_BUILD
1765 print_mmc_devices(',');
1772 #ifdef CONFIG_SUPPORT_EMMC_BOOT
1774 * This function changes the size of boot partition and the size of rpmb
1775 * partition present on EMMC devices.
1778 * struct *mmc: pointer for the mmc device strcuture
1779 * bootsize: size of boot partition
1780 * rpmbsize: size of rpmb partition
1782 * Returns 0 on success.
1785 int mmc_boot_partition_size_change(struct mmc *mmc, unsigned long bootsize,
1786 unsigned long rpmbsize)
1791 /* Only use this command for raw EMMC moviNAND. Enter backdoor mode */
1792 cmd.cmdidx = MMC_CMD_RES_MAN;
1793 cmd.resp_type = MMC_RSP_R1b;
1794 cmd.cmdarg = MMC_CMD62_ARG1;
1796 err = mmc_send_cmd(mmc, &cmd, NULL);
1798 debug("mmc_boot_partition_size_change: Error1 = %d\n", err);
1802 /* Boot partition changing mode */
1803 cmd.cmdidx = MMC_CMD_RES_MAN;
1804 cmd.resp_type = MMC_RSP_R1b;
1805 cmd.cmdarg = MMC_CMD62_ARG2;
1807 err = mmc_send_cmd(mmc, &cmd, NULL);
1809 debug("mmc_boot_partition_size_change: Error2 = %d\n", err);
1812 /* boot partition size is multiple of 128KB */
1813 bootsize = (bootsize * 1024) / 128;
1815 /* Arg: boot partition size */
1816 cmd.cmdidx = MMC_CMD_RES_MAN;
1817 cmd.resp_type = MMC_RSP_R1b;
1818 cmd.cmdarg = bootsize;
1820 err = mmc_send_cmd(mmc, &cmd, NULL);
1822 debug("mmc_boot_partition_size_change: Error3 = %d\n", err);
1825 /* RPMB partition size is multiple of 128KB */
1826 rpmbsize = (rpmbsize * 1024) / 128;
1827 /* Arg: RPMB partition size */
1828 cmd.cmdidx = MMC_CMD_RES_MAN;
1829 cmd.resp_type = MMC_RSP_R1b;
1830 cmd.cmdarg = rpmbsize;
1832 err = mmc_send_cmd(mmc, &cmd, NULL);
1834 debug("mmc_boot_partition_size_change: Error4 = %d\n", err);
1841 * Modify EXT_CSD[177] which is BOOT_BUS_WIDTH
1842 * based on the passed in values for BOOT_BUS_WIDTH, RESET_BOOT_BUS_WIDTH
1845 * Returns 0 on success.
1847 int mmc_set_boot_bus_width(struct mmc *mmc, u8 width, u8 reset, u8 mode)
1851 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_BOOT_BUS_WIDTH,
1852 EXT_CSD_BOOT_BUS_WIDTH_MODE(mode) |
1853 EXT_CSD_BOOT_BUS_WIDTH_RESET(reset) |
1854 EXT_CSD_BOOT_BUS_WIDTH_WIDTH(width));
1862 * Modify EXT_CSD[179] which is PARTITION_CONFIG (formerly BOOT_CONFIG)
1863 * based on the passed in values for BOOT_ACK, BOOT_PARTITION_ENABLE and
1866 * Returns 0 on success.
1868 int mmc_set_part_conf(struct mmc *mmc, u8 ack, u8 part_num, u8 access)
1872 err = mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_PART_CONF,
1873 EXT_CSD_BOOT_ACK(ack) |
1874 EXT_CSD_BOOT_PART_NUM(part_num) |
1875 EXT_CSD_PARTITION_ACCESS(access));
1883 * Modify EXT_CSD[162] which is RST_n_FUNCTION based on the given value
1884 * for enable. Note that this is a write-once field for non-zero values.
1886 * Returns 0 on success.
1888 int mmc_set_rst_n_function(struct mmc *mmc, u8 enable)
1890 return mmc_switch(mmc, EXT_CSD_CMD_SET_NORMAL, EXT_CSD_RST_N_FUNCTION,