2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/mmc.h>
39 #include <linux/mmc/slot-gpio.h>
40 #include <linux/mmc/tmio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/mmc/sdio.h>
48 #include <linux/scatterlist.h>
49 #include <linux/spinlock.h>
50 #include <linux/workqueue.h>
54 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
56 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
57 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
60 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
62 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
63 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
66 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
68 sd_ctrl_write32(host, CTL_STATUS, ~i);
71 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
73 host->sg_len = data->sg_len;
74 host->sg_ptr = data->sg;
75 host->sg_orig = data->sg;
79 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
81 host->sg_ptr = sg_next(host->sg_ptr);
83 return --host->sg_len;
86 #ifdef CONFIG_MMC_DEBUG
88 #define STATUS_TO_TEXT(a, status, i) \
90 if (status & TMIO_STAT_##a) { \
97 static void pr_debug_status(u32 status)
100 pr_debug("status: %08x = ", status);
101 STATUS_TO_TEXT(CARD_REMOVE, status, i);
102 STATUS_TO_TEXT(CARD_INSERT, status, i);
103 STATUS_TO_TEXT(SIGSTATE, status, i);
104 STATUS_TO_TEXT(WRPROTECT, status, i);
105 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
106 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
107 STATUS_TO_TEXT(SIGSTATE_A, status, i);
108 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
109 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
110 STATUS_TO_TEXT(ILL_FUNC, status, i);
111 STATUS_TO_TEXT(CMD_BUSY, status, i);
112 STATUS_TO_TEXT(CMDRESPEND, status, i);
113 STATUS_TO_TEXT(DATAEND, status, i);
114 STATUS_TO_TEXT(CRCFAIL, status, i);
115 STATUS_TO_TEXT(DATATIMEOUT, status, i);
116 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
117 STATUS_TO_TEXT(RXOVERFLOW, status, i);
118 STATUS_TO_TEXT(TXUNDERRUN, status, i);
119 STATUS_TO_TEXT(RXRDY, status, i);
120 STATUS_TO_TEXT(TXRQ, status, i);
121 STATUS_TO_TEXT(ILL_ACCESS, status, i);
126 #define pr_debug_status(s) do { } while (0)
129 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
131 struct tmio_mmc_host *host = mmc_priv(mmc);
133 if (enable && !host->sdio_irq_enabled) {
134 /* Keep device active while SDIO irq is enabled */
135 pm_runtime_get_sync(mmc_dev(mmc));
136 host->sdio_irq_enabled = true;
138 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
139 ~TMIO_SDIO_STAT_IOIRQ;
140 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
141 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
142 } else if (!enable && host->sdio_irq_enabled) {
143 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
144 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
145 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
147 host->sdio_irq_enabled = false;
148 pm_runtime_mark_last_busy(mmc_dev(mmc));
149 pm_runtime_put_autosuspend(mmc_dev(mmc));
153 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
154 unsigned int new_clock)
159 for (clock = host->mmc->f_min, clk = 0x80000080;
160 new_clock >= (clock<<1); clk >>= 1)
165 if (host->set_clk_div)
166 host->set_clk_div(host->pdev, (clk>>22) & 1);
168 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
172 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
174 /* implicit BUG_ON(!res) */
175 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
176 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
180 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
181 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
185 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
187 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
188 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
191 /* implicit BUG_ON(!res) */
192 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
193 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
198 static void tmio_mmc_reset(struct tmio_mmc_host *host)
200 /* FIXME - should we set stop clock reg here */
201 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
202 /* implicit BUG_ON(!res) */
203 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
204 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
206 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
207 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
208 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
212 static void tmio_mmc_reset_work(struct work_struct *work)
214 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
215 delayed_reset_work.work);
216 struct mmc_request *mrq;
219 spin_lock_irqsave(&host->lock, flags);
223 * is request already finished? Since we use a non-blocking
224 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
225 * us, so, have to check for IS_ERR(host->mrq)
227 if (IS_ERR_OR_NULL(mrq)
228 || time_is_after_jiffies(host->last_req_ts +
229 msecs_to_jiffies(2000))) {
230 spin_unlock_irqrestore(&host->lock, flags);
234 dev_warn(&host->pdev->dev,
235 "timeout waiting for hardware interrupt (CMD%u)\n",
239 host->data->error = -ETIMEDOUT;
241 host->cmd->error = -ETIMEDOUT;
243 mrq->cmd->error = -ETIMEDOUT;
247 host->force_pio = false;
249 spin_unlock_irqrestore(&host->lock, flags);
251 tmio_mmc_reset(host);
253 /* Ready for new calls */
256 tmio_mmc_abort_dma(host);
257 mmc_request_done(host->mmc, mrq);
259 pm_runtime_mark_last_busy(mmc_dev(host->mmc));
260 pm_runtime_put_autosuspend(mmc_dev(host->mmc));
263 /* called with host->lock held, interrupts disabled */
264 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
266 struct mmc_request *mrq;
269 spin_lock_irqsave(&host->lock, flags);
272 if (IS_ERR_OR_NULL(mrq)) {
273 spin_unlock_irqrestore(&host->lock, flags);
279 host->force_pio = false;
281 cancel_delayed_work(&host->delayed_reset_work);
284 spin_unlock_irqrestore(&host->lock, flags);
286 if (mrq->cmd->error || (mrq->data && mrq->data->error))
287 tmio_mmc_abort_dma(host);
289 mmc_request_done(host->mmc, mrq);
291 pm_runtime_mark_last_busy(mmc_dev(host->mmc));
292 pm_runtime_put_autosuspend(mmc_dev(host->mmc));
295 static void tmio_mmc_done_work(struct work_struct *work)
297 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
299 tmio_mmc_finish_request(host);
302 /* These are the bitmasks the tmio chip requires to implement the MMC response
303 * types. Note that R1 and R6 are the same in this scheme. */
304 #define APP_CMD 0x0040
305 #define RESP_NONE 0x0300
306 #define RESP_R1 0x0400
307 #define RESP_R1B 0x0500
308 #define RESP_R2 0x0600
309 #define RESP_R3 0x0700
310 #define DATA_PRESENT 0x0800
311 #define TRANSFER_READ 0x1000
312 #define TRANSFER_MULTI 0x2000
313 #define SECURITY_CMD 0x4000
314 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
316 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
318 struct mmc_data *data = host->data;
320 u32 irq_mask = TMIO_MASK_CMD;
322 /* CMD12 is handled by hardware */
323 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
324 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
328 switch (mmc_resp_type(cmd)) {
329 case MMC_RSP_NONE: c |= RESP_NONE; break;
330 case MMC_RSP_R1: c |= RESP_R1; break;
331 case MMC_RSP_R1B: c |= RESP_R1B; break;
332 case MMC_RSP_R2: c |= RESP_R2; break;
333 case MMC_RSP_R3: c |= RESP_R3; break;
335 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
341 /* FIXME - this seems to be ok commented out but the spec suggest this bit
342 * should be set when issuing app commands.
343 * if(cmd->flags & MMC_FLAG_ACMD)
348 if (data->blocks > 1) {
349 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
353 * Disable auto CMD12 at IO_RW_EXTENDED when
354 * multiple block transfer
356 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
357 (cmd->opcode == SD_IO_RW_EXTENDED))
360 if (data->flags & MMC_DATA_READ)
364 if (!host->native_hotplug)
365 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
366 tmio_mmc_enable_mmc_irqs(host, irq_mask);
368 /* Fire off the command */
369 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
370 sd_ctrl_write16(host, CTL_SD_CMD, c);
376 * This chip always returns (at least?) as much data as you ask for.
377 * I'm unsure what happens if you ask for less than a block. This should be
378 * looked into to ensure that a funny length read doesn't hose the controller.
380 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
382 struct mmc_data *data = host->data;
388 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
389 pr_err("PIO IRQ in DMA mode!\n");
392 pr_debug("Spurious PIO IRQ\n");
396 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
397 buf = (unsigned short *)(sg_virt + host->sg_off);
399 count = host->sg_ptr->length - host->sg_off;
400 if (count > data->blksz)
403 pr_debug("count: %08x offset: %08x flags %08x\n",
404 count, host->sg_off, data->flags);
406 /* Transfer the data */
407 if (data->flags & MMC_DATA_READ)
408 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
410 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
412 host->sg_off += count;
414 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
416 if (host->sg_off == host->sg_ptr->length)
417 tmio_mmc_next_sg(host);
422 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
424 if (host->sg_ptr == &host->bounce_sg) {
426 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
427 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
428 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
432 /* needs to be called with host->lock held */
433 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
435 struct mmc_data *data = host->data;
436 struct mmc_command *stop;
441 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
446 /* FIXME - return correct transfer count on errors */
448 data->bytes_xfered = data->blocks * data->blksz;
450 data->bytes_xfered = 0;
452 pr_debug("Completed data request\n");
455 * FIXME: other drivers allow an optional stop command of any given type
456 * which we dont do, as the chip can auto generate them.
457 * Perhaps we can be smarter about when to use auto CMD12 and
458 * only issue the auto request when we know this is the desired
459 * stop command, allowing fallback to the stop command the
460 * upper layers expect. For now, we do what works.
463 if (data->flags & MMC_DATA_READ) {
464 if (host->chan_rx && !host->force_pio)
465 tmio_mmc_check_bounce_buffer(host);
466 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
469 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
474 if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
475 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
480 schedule_work(&host->done);
483 static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
485 struct mmc_data *data;
486 spin_lock(&host->lock);
492 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
494 * Has all data been written out yet? Testing on SuperH showed,
495 * that in most cases the first interrupt comes already with the
496 * BUSY status bit clear, but on some operations, like mount or
497 * in the beginning of a write / sync / umount, there is one
498 * DATAEND interrupt with the BUSY bit set, in this cases
499 * waiting for one more interrupt fixes the problem.
501 if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
502 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
503 tasklet_schedule(&host->dma_complete);
505 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
506 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
507 tasklet_schedule(&host->dma_complete);
509 tmio_mmc_do_data_irq(host);
510 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
513 spin_unlock(&host->lock);
516 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
519 struct mmc_command *cmd = host->cmd;
522 spin_lock(&host->lock);
525 pr_debug("Spurious CMD irq\n");
531 /* This controller is sicker than the PXA one. Not only do we need to
532 * drop the top 8 bits of the first response word, we also need to
533 * modify the order of the response for short response command types.
536 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
537 cmd->resp[i] = sd_ctrl_read32(host, addr);
539 if (cmd->flags & MMC_RSP_136) {
540 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
541 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
542 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
544 } else if (cmd->flags & MMC_RSP_R3) {
545 cmd->resp[0] = cmd->resp[3];
548 if (stat & TMIO_STAT_CMDTIMEOUT)
549 cmd->error = -ETIMEDOUT;
550 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
551 cmd->error = -EILSEQ;
553 /* If there is data to handle we enable data IRQs here, and
554 * we will ultimatley finish the request in the data_end handler.
555 * If theres no data or we encountered an error, finish now.
557 if (host->data && !cmd->error) {
558 if (host->data->flags & MMC_DATA_READ) {
559 if (host->force_pio || !host->chan_rx)
560 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
562 tasklet_schedule(&host->dma_issue);
564 if (host->force_pio || !host->chan_tx)
565 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
567 tasklet_schedule(&host->dma_issue);
570 schedule_work(&host->done);
574 spin_unlock(&host->lock);
577 static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
578 int *ireg, int *status)
580 *status = sd_ctrl_read32(host, CTL_STATUS);
581 *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
583 pr_debug_status(*status);
584 pr_debug_status(*ireg);
586 /* Clear the status except the interrupt status */
587 sd_ctrl_write32(host, CTL_STATUS, TMIO_MASK_IRQ);
590 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
591 int ireg, int status)
593 struct mmc_host *mmc = host->mmc;
595 /* Card insert / remove attempts */
596 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
597 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
598 TMIO_STAT_CARD_REMOVE);
599 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
600 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
601 !work_pending(&mmc->detect.work))
602 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
609 irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
611 unsigned int ireg, status;
612 struct tmio_mmc_host *host = devid;
614 tmio_mmc_card_irq_status(host, &ireg, &status);
615 __tmio_mmc_card_detect_irq(host, ireg, status);
619 EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
621 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
622 int ireg, int status)
624 /* Command completion */
625 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
626 tmio_mmc_ack_mmc_irqs(host,
627 TMIO_STAT_CMDRESPEND |
628 TMIO_STAT_CMDTIMEOUT);
629 tmio_mmc_cmd_irq(host, status);
634 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
635 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
636 tmio_mmc_pio_irq(host);
640 /* Data transfer completion */
641 if (ireg & TMIO_STAT_DATAEND) {
642 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
643 tmio_mmc_data_irq(host);
650 irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
652 unsigned int ireg, status;
653 struct tmio_mmc_host *host = devid;
655 tmio_mmc_card_irq_status(host, &ireg, &status);
656 __tmio_mmc_sdcard_irq(host, ireg, status);
660 EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
662 irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
664 struct tmio_mmc_host *host = devid;
665 struct mmc_host *mmc = host->mmc;
666 struct tmio_mmc_data *pdata = host->pdata;
667 unsigned int ireg, status;
669 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
672 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
673 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
675 sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL);
677 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
678 mmc_signal_sdio_irq(mmc);
682 EXPORT_SYMBOL(tmio_mmc_sdio_irq);
684 irqreturn_t tmio_mmc_irq(int irq, void *devid)
686 struct tmio_mmc_host *host = devid;
687 unsigned int ireg, status;
689 pr_debug("MMC IRQ begin\n");
691 tmio_mmc_card_irq_status(host, &ireg, &status);
692 if (__tmio_mmc_card_detect_irq(host, ireg, status))
694 if (__tmio_mmc_sdcard_irq(host, ireg, status))
697 tmio_mmc_sdio_irq(irq, devid);
701 EXPORT_SYMBOL(tmio_mmc_irq);
703 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
704 struct mmc_data *data)
706 struct tmio_mmc_data *pdata = host->pdata;
708 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
709 data->blksz, data->blocks);
711 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
712 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
713 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
715 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
716 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
717 mmc_hostname(host->mmc), data->blksz);
722 tmio_mmc_init_sg(host, data);
725 /* Set transfer length / blocksize */
726 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
727 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
729 tmio_mmc_start_dma(host, data);
734 /* Process requests from the MMC layer */
735 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
737 struct tmio_mmc_host *host = mmc_priv(mmc);
741 spin_lock_irqsave(&host->lock, flags);
744 pr_debug("request not null\n");
745 if (IS_ERR(host->mrq)) {
746 spin_unlock_irqrestore(&host->lock, flags);
747 mrq->cmd->error = -EAGAIN;
748 mmc_request_done(mmc, mrq);
753 host->last_req_ts = jiffies;
757 spin_unlock_irqrestore(&host->lock, flags);
759 pm_runtime_get_sync(mmc_dev(mmc));
762 ret = tmio_mmc_start_data(host, mrq->data);
767 ret = tmio_mmc_start_command(host, mrq->cmd);
769 schedule_delayed_work(&host->delayed_reset_work,
770 msecs_to_jiffies(2000));
775 host->force_pio = false;
777 mrq->cmd->error = ret;
778 mmc_request_done(mmc, mrq);
780 pm_runtime_mark_last_busy(mmc_dev(mmc));
781 pm_runtime_put_autosuspend(mmc_dev(mmc));
784 static int tmio_mmc_clk_update(struct tmio_mmc_host *host)
786 struct mmc_host *mmc = host->mmc;
787 struct tmio_mmc_data *pdata = host->pdata;
790 if (!pdata->clk_enable)
793 ret = pdata->clk_enable(host->pdev, &mmc->f_max);
795 mmc->f_min = mmc->f_max / 512;
800 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
802 struct mmc_host *mmc = host->mmc;
805 /* .set_ios() is returning void, so, no chance to report an error */
808 host->set_pwr(host->pdev, 1);
810 if (!IS_ERR(mmc->supply.vmmc)) {
811 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
813 * Attention: empiric value. With a b43 WiFi SDIO card this
814 * delay proved necessary for reliable card-insertion probing.
815 * 100us were not enough. Is this the same 140us delay, as in
816 * tmio_mmc_set_ios()?
821 * It seems, VccQ should be switched on after Vcc, this is also what the
822 * omap_hsmmc.c driver does.
824 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
825 ret = regulator_enable(mmc->supply.vqmmc);
830 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
834 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
836 struct mmc_host *mmc = host->mmc;
838 if (!IS_ERR(mmc->supply.vqmmc))
839 regulator_disable(mmc->supply.vqmmc);
841 if (!IS_ERR(mmc->supply.vmmc))
842 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
845 host->set_pwr(host->pdev, 0);
848 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
849 unsigned char bus_width)
852 case MMC_BUS_WIDTH_1:
853 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
855 case MMC_BUS_WIDTH_4:
856 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
861 /* Set MMC clock / power.
862 * Note: This controller uses a simple divider scheme therefore it cannot
863 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
864 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
867 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
869 struct tmio_mmc_host *host = mmc_priv(mmc);
870 struct device *dev = &host->pdev->dev;
873 pm_runtime_get_sync(mmc_dev(mmc));
875 mutex_lock(&host->ios_lock);
877 spin_lock_irqsave(&host->lock, flags);
879 if (IS_ERR(host->mrq)) {
881 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
882 current->comm, task_pid_nr(current),
883 ios->clock, ios->power_mode);
884 host->mrq = ERR_PTR(-EINTR);
887 "%s.%d: CMD%u active since %lu, now %lu!\n",
888 current->comm, task_pid_nr(current),
889 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
891 spin_unlock_irqrestore(&host->lock, flags);
893 mutex_unlock(&host->ios_lock);
897 host->mrq = ERR_PTR(-EBUSY);
899 spin_unlock_irqrestore(&host->lock, flags);
901 switch (ios->power_mode) {
903 tmio_mmc_power_off(host);
904 tmio_mmc_clk_stop(host);
907 tmio_mmc_set_clock(host, ios->clock);
908 tmio_mmc_power_on(host, ios->vdd);
909 tmio_mmc_clk_start(host);
910 tmio_mmc_set_bus_width(host, ios->bus_width);
913 tmio_mmc_set_clock(host, ios->clock);
914 tmio_mmc_clk_start(host);
915 tmio_mmc_set_bus_width(host, ios->bus_width);
919 /* Let things settle. delay taken from winCE driver */
921 if (PTR_ERR(host->mrq) == -EINTR)
922 dev_dbg(&host->pdev->dev,
923 "%s.%d: IOS interrupted: clk %u, mode %u",
924 current->comm, task_pid_nr(current),
925 ios->clock, ios->power_mode);
928 host->clk_cache = ios->clock;
930 mutex_unlock(&host->ios_lock);
932 pm_runtime_mark_last_busy(mmc_dev(mmc));
933 pm_runtime_put_autosuspend(mmc_dev(mmc));
936 static int tmio_mmc_get_ro(struct mmc_host *mmc)
938 struct tmio_mmc_host *host = mmc_priv(mmc);
939 struct tmio_mmc_data *pdata = host->pdata;
940 int ret = mmc_gpio_get_ro(mmc);
944 pm_runtime_get_sync(mmc_dev(mmc));
945 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
946 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
947 pm_runtime_mark_last_busy(mmc_dev(mmc));
948 pm_runtime_put_autosuspend(mmc_dev(mmc));
953 static const struct mmc_host_ops tmio_mmc_ops = {
954 .request = tmio_mmc_request,
955 .set_ios = tmio_mmc_set_ios,
956 .get_ro = tmio_mmc_get_ro,
957 .get_cd = mmc_gpio_get_cd,
958 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
961 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
963 struct tmio_mmc_data *pdata = host->pdata;
964 struct mmc_host *mmc = host->mmc;
966 mmc_regulator_get_supply(mmc);
968 /* use ocr_mask if no regulator */
970 mmc->ocr_avail = pdata->ocr_mask;
974 * There is possibility that regulator has not been probed
977 return -EPROBE_DEFER;
982 static void tmio_mmc_of_parse(struct platform_device *pdev,
983 struct tmio_mmc_data *pdata)
985 const struct device_node *np = pdev->dev.of_node;
989 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
990 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
993 int tmio_mmc_host_probe(struct tmio_mmc_host **host,
994 struct platform_device *pdev,
995 struct tmio_mmc_data *pdata)
997 struct tmio_mmc_host *_host;
998 struct mmc_host *mmc;
999 struct resource *res_ctl;
1001 u32 irq_mask = TMIO_MASK_CMD;
1003 tmio_mmc_of_parse(pdev, pdata);
1005 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1006 pdata->write16_hook = NULL;
1008 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1012 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1016 ret = mmc_of_parse(mmc);
1020 pdata->dev = &pdev->dev;
1021 _host = mmc_priv(mmc);
1022 _host->pdata = pdata;
1025 platform_set_drvdata(pdev, mmc);
1027 _host->set_pwr = pdata->set_pwr;
1028 _host->set_clk_div = pdata->set_clk_div;
1030 ret = tmio_mmc_init_ocr(_host);
1034 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
1040 mmc->ops = &tmio_mmc_ops;
1041 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1042 mmc->caps2 |= pdata->capabilities2;
1044 mmc->max_blk_size = 512;
1045 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
1047 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1048 mmc->max_seg_size = mmc->max_req_size;
1050 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1051 mmc->caps & MMC_CAP_NEEDS_POLL ||
1052 mmc->caps & MMC_CAP_NONREMOVABLE ||
1053 mmc->slot.cd_irq >= 0);
1055 if (tmio_mmc_clk_update(_host) < 0) {
1056 mmc->f_max = pdata->hclk;
1057 mmc->f_min = mmc->f_max / 512;
1061 * While using internal tmio hardware logic for card detection, we need
1062 * to ensure it stays powered for it to work.
1064 if (_host->native_hotplug)
1065 pm_runtime_get_noresume(&pdev->dev);
1067 tmio_mmc_clk_stop(_host);
1068 tmio_mmc_reset(_host);
1070 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
1071 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1073 /* Unmask the IRQs we want to know about */
1074 if (!_host->chan_rx)
1075 irq_mask |= TMIO_MASK_READOP;
1076 if (!_host->chan_tx)
1077 irq_mask |= TMIO_MASK_WRITEOP;
1078 if (!_host->native_hotplug)
1079 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1081 _host->sdcard_irq_mask &= ~irq_mask;
1083 _host->sdio_irq_enabled = false;
1084 if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
1085 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1086 sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
1087 sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000);
1090 spin_lock_init(&_host->lock);
1091 mutex_init(&_host->ios_lock);
1093 /* Init delayed work for request timeouts */
1094 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1095 INIT_WORK(&_host->done, tmio_mmc_done_work);
1097 /* See if we also get DMA */
1098 tmio_mmc_request_dma(_host, pdata);
1100 pm_runtime_set_active(&pdev->dev);
1101 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1102 pm_runtime_use_autosuspend(&pdev->dev);
1103 pm_runtime_enable(&pdev->dev);
1105 ret = mmc_add_host(mmc);
1107 tmio_mmc_host_remove(_host);
1111 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1113 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1114 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1116 tmio_mmc_host_remove(_host);
1130 EXPORT_SYMBOL(tmio_mmc_host_probe);
1132 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1134 struct platform_device *pdev = host->pdev;
1135 struct mmc_host *mmc = host->mmc;
1137 if (!host->native_hotplug)
1138 pm_runtime_get_sync(&pdev->dev);
1140 dev_pm_qos_hide_latency_limit(&pdev->dev);
1142 mmc_remove_host(mmc);
1143 cancel_work_sync(&host->done);
1144 cancel_delayed_work_sync(&host->delayed_reset_work);
1145 tmio_mmc_release_dma(host);
1147 pm_runtime_put_sync(&pdev->dev);
1148 pm_runtime_disable(&pdev->dev);
1153 EXPORT_SYMBOL(tmio_mmc_host_remove);
1156 int tmio_mmc_host_runtime_suspend(struct device *dev)
1158 struct mmc_host *mmc = dev_get_drvdata(dev);
1159 struct tmio_mmc_host *host = mmc_priv(mmc);
1161 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1163 if (host->clk_cache)
1164 tmio_mmc_clk_stop(host);
1166 if (host->pdata->clk_disable)
1167 host->pdata->clk_disable(host->pdev);
1171 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1173 int tmio_mmc_host_runtime_resume(struct device *dev)
1175 struct mmc_host *mmc = dev_get_drvdata(dev);
1176 struct tmio_mmc_host *host = mmc_priv(mmc);
1178 tmio_mmc_reset(host);
1179 tmio_mmc_clk_update(host);
1181 if (host->clk_cache) {
1182 tmio_mmc_set_clock(host, host->clk_cache);
1183 tmio_mmc_clk_start(host);
1186 tmio_mmc_enable_dma(host, true);
1190 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1193 MODULE_LICENSE("GPL v2");