2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/mmc.h>
39 #include <linux/mmc/slot-gpio.h>
40 #include <linux/mmc/tmio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/scatterlist.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
53 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
55 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
56 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
59 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
61 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
62 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
65 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
67 sd_ctrl_write32(host, CTL_STATUS, ~i);
70 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
72 host->sg_len = data->sg_len;
73 host->sg_ptr = data->sg;
74 host->sg_orig = data->sg;
78 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
80 host->sg_ptr = sg_next(host->sg_ptr);
82 return --host->sg_len;
85 #ifdef CONFIG_MMC_DEBUG
87 #define STATUS_TO_TEXT(a, status, i) \
89 if (status & TMIO_STAT_##a) { \
96 static void pr_debug_status(u32 status)
99 pr_debug("status: %08x = ", status);
100 STATUS_TO_TEXT(CARD_REMOVE, status, i);
101 STATUS_TO_TEXT(CARD_INSERT, status, i);
102 STATUS_TO_TEXT(SIGSTATE, status, i);
103 STATUS_TO_TEXT(WRPROTECT, status, i);
104 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
105 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
106 STATUS_TO_TEXT(SIGSTATE_A, status, i);
107 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
108 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
109 STATUS_TO_TEXT(ILL_FUNC, status, i);
110 STATUS_TO_TEXT(CMD_BUSY, status, i);
111 STATUS_TO_TEXT(CMDRESPEND, status, i);
112 STATUS_TO_TEXT(DATAEND, status, i);
113 STATUS_TO_TEXT(CRCFAIL, status, i);
114 STATUS_TO_TEXT(DATATIMEOUT, status, i);
115 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
116 STATUS_TO_TEXT(RXOVERFLOW, status, i);
117 STATUS_TO_TEXT(TXUNDERRUN, status, i);
118 STATUS_TO_TEXT(RXRDY, status, i);
119 STATUS_TO_TEXT(TXRQ, status, i);
120 STATUS_TO_TEXT(ILL_ACCESS, status, i);
125 #define pr_debug_status(s) do { } while (0)
128 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
130 struct tmio_mmc_host *host = mmc_priv(mmc);
132 if (enable && !host->sdio_irq_enabled) {
133 /* Keep device active while SDIO irq is enabled */
134 pm_runtime_get_sync(mmc_dev(mmc));
135 host->sdio_irq_enabled = true;
137 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
138 ~TMIO_SDIO_STAT_IOIRQ;
139 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
140 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
141 } else if (!enable && host->sdio_irq_enabled) {
142 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
143 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
144 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
146 host->sdio_irq_enabled = false;
147 pm_runtime_mark_last_busy(mmc_dev(mmc));
148 pm_runtime_put_autosuspend(mmc_dev(mmc));
152 static void tmio_mmc_set_clock(struct tmio_mmc_host *host, int new_clock)
157 for (clock = host->mmc->f_min, clk = 0x80000080;
158 new_clock >= (clock<<1); clk >>= 1)
163 if (host->set_clk_div)
164 host->set_clk_div(host->pdev, (clk>>22) & 1);
166 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
170 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
172 /* implicit BUG_ON(!res) */
173 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
174 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
178 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
179 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
183 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
185 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
186 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
189 /* implicit BUG_ON(!res) */
190 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
191 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
196 static void tmio_mmc_reset(struct tmio_mmc_host *host)
198 /* FIXME - should we set stop clock reg here */
199 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
200 /* implicit BUG_ON(!res) */
201 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
202 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
204 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
205 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
206 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
210 static void tmio_mmc_reset_work(struct work_struct *work)
212 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
213 delayed_reset_work.work);
214 struct mmc_request *mrq;
217 spin_lock_irqsave(&host->lock, flags);
221 * is request already finished? Since we use a non-blocking
222 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
223 * us, so, have to check for IS_ERR(host->mrq)
225 if (IS_ERR_OR_NULL(mrq)
226 || time_is_after_jiffies(host->last_req_ts +
227 msecs_to_jiffies(2000))) {
228 spin_unlock_irqrestore(&host->lock, flags);
232 dev_warn(&host->pdev->dev,
233 "timeout waiting for hardware interrupt (CMD%u)\n",
237 host->data->error = -ETIMEDOUT;
239 host->cmd->error = -ETIMEDOUT;
241 mrq->cmd->error = -ETIMEDOUT;
245 host->force_pio = false;
247 spin_unlock_irqrestore(&host->lock, flags);
249 tmio_mmc_reset(host);
251 /* Ready for new calls */
254 tmio_mmc_abort_dma(host);
255 mmc_request_done(host->mmc, mrq);
257 pm_runtime_mark_last_busy(mmc_dev(host->mmc));
258 pm_runtime_put_autosuspend(mmc_dev(host->mmc));
261 /* called with host->lock held, interrupts disabled */
262 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
264 struct mmc_request *mrq;
267 spin_lock_irqsave(&host->lock, flags);
270 if (IS_ERR_OR_NULL(mrq)) {
271 spin_unlock_irqrestore(&host->lock, flags);
277 host->force_pio = false;
279 cancel_delayed_work(&host->delayed_reset_work);
282 spin_unlock_irqrestore(&host->lock, flags);
284 if (mrq->cmd->error || (mrq->data && mrq->data->error))
285 tmio_mmc_abort_dma(host);
287 mmc_request_done(host->mmc, mrq);
289 pm_runtime_mark_last_busy(mmc_dev(host->mmc));
290 pm_runtime_put_autosuspend(mmc_dev(host->mmc));
293 static void tmio_mmc_done_work(struct work_struct *work)
295 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
297 tmio_mmc_finish_request(host);
300 /* These are the bitmasks the tmio chip requires to implement the MMC response
301 * types. Note that R1 and R6 are the same in this scheme. */
302 #define APP_CMD 0x0040
303 #define RESP_NONE 0x0300
304 #define RESP_R1 0x0400
305 #define RESP_R1B 0x0500
306 #define RESP_R2 0x0600
307 #define RESP_R3 0x0700
308 #define DATA_PRESENT 0x0800
309 #define TRANSFER_READ 0x1000
310 #define TRANSFER_MULTI 0x2000
311 #define SECURITY_CMD 0x4000
313 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
315 struct mmc_data *data = host->data;
317 u32 irq_mask = TMIO_MASK_CMD;
319 /* CMD12 is handled by hardware */
320 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
321 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
325 switch (mmc_resp_type(cmd)) {
326 case MMC_RSP_NONE: c |= RESP_NONE; break;
327 case MMC_RSP_R1: c |= RESP_R1; break;
328 case MMC_RSP_R1B: c |= RESP_R1B; break;
329 case MMC_RSP_R2: c |= RESP_R2; break;
330 case MMC_RSP_R3: c |= RESP_R3; break;
332 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
338 /* FIXME - this seems to be ok commented out but the spec suggest this bit
339 * should be set when issuing app commands.
340 * if(cmd->flags & MMC_FLAG_ACMD)
345 if (data->blocks > 1) {
346 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
349 if (data->flags & MMC_DATA_READ)
353 if (!host->native_hotplug)
354 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
355 tmio_mmc_enable_mmc_irqs(host, irq_mask);
357 /* Fire off the command */
358 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
359 sd_ctrl_write16(host, CTL_SD_CMD, c);
365 * This chip always returns (at least?) as much data as you ask for.
366 * I'm unsure what happens if you ask for less than a block. This should be
367 * looked into to ensure that a funny length read doesn't hose the controller.
369 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
371 struct mmc_data *data = host->data;
377 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
378 pr_err("PIO IRQ in DMA mode!\n");
381 pr_debug("Spurious PIO IRQ\n");
385 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
386 buf = (unsigned short *)(sg_virt + host->sg_off);
388 count = host->sg_ptr->length - host->sg_off;
389 if (count > data->blksz)
392 pr_debug("count: %08x offset: %08x flags %08x\n",
393 count, host->sg_off, data->flags);
395 /* Transfer the data */
396 if (data->flags & MMC_DATA_READ)
397 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
399 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
401 host->sg_off += count;
403 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
405 if (host->sg_off == host->sg_ptr->length)
406 tmio_mmc_next_sg(host);
411 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
413 if (host->sg_ptr == &host->bounce_sg) {
415 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
416 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
417 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
421 /* needs to be called with host->lock held */
422 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
424 struct mmc_data *data = host->data;
425 struct mmc_command *stop;
430 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
435 /* FIXME - return correct transfer count on errors */
437 data->bytes_xfered = data->blocks * data->blksz;
439 data->bytes_xfered = 0;
441 pr_debug("Completed data request\n");
444 * FIXME: other drivers allow an optional stop command of any given type
445 * which we dont do, as the chip can auto generate them.
446 * Perhaps we can be smarter about when to use auto CMD12 and
447 * only issue the auto request when we know this is the desired
448 * stop command, allowing fallback to the stop command the
449 * upper layers expect. For now, we do what works.
452 if (data->flags & MMC_DATA_READ) {
453 if (host->chan_rx && !host->force_pio)
454 tmio_mmc_check_bounce_buffer(host);
455 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
458 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
463 if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
464 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
469 schedule_work(&host->done);
472 static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
474 struct mmc_data *data;
475 spin_lock(&host->lock);
481 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
483 * Has all data been written out yet? Testing on SuperH showed,
484 * that in most cases the first interrupt comes already with the
485 * BUSY status bit clear, but on some operations, like mount or
486 * in the beginning of a write / sync / umount, there is one
487 * DATAEND interrupt with the BUSY bit set, in this cases
488 * waiting for one more interrupt fixes the problem.
490 if (!(sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_CMD_BUSY)) {
491 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
492 tasklet_schedule(&host->dma_complete);
494 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
495 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
496 tasklet_schedule(&host->dma_complete);
498 tmio_mmc_do_data_irq(host);
499 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
502 spin_unlock(&host->lock);
505 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
508 struct mmc_command *cmd = host->cmd;
511 spin_lock(&host->lock);
514 pr_debug("Spurious CMD irq\n");
520 /* This controller is sicker than the PXA one. Not only do we need to
521 * drop the top 8 bits of the first response word, we also need to
522 * modify the order of the response for short response command types.
525 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
526 cmd->resp[i] = sd_ctrl_read32(host, addr);
528 if (cmd->flags & MMC_RSP_136) {
529 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
530 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
531 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
533 } else if (cmd->flags & MMC_RSP_R3) {
534 cmd->resp[0] = cmd->resp[3];
537 if (stat & TMIO_STAT_CMDTIMEOUT)
538 cmd->error = -ETIMEDOUT;
539 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
540 cmd->error = -EILSEQ;
542 /* If there is data to handle we enable data IRQs here, and
543 * we will ultimatley finish the request in the data_end handler.
544 * If theres no data or we encountered an error, finish now.
546 if (host->data && !cmd->error) {
547 if (host->data->flags & MMC_DATA_READ) {
548 if (host->force_pio || !host->chan_rx)
549 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
551 tasklet_schedule(&host->dma_issue);
553 if (host->force_pio || !host->chan_tx)
554 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
556 tasklet_schedule(&host->dma_issue);
559 schedule_work(&host->done);
563 spin_unlock(&host->lock);
566 static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
567 int *ireg, int *status)
569 *status = sd_ctrl_read32(host, CTL_STATUS);
570 *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
572 pr_debug_status(*status);
573 pr_debug_status(*ireg);
576 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
577 int ireg, int status)
579 struct mmc_host *mmc = host->mmc;
581 /* Card insert / remove attempts */
582 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
583 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
584 TMIO_STAT_CARD_REMOVE);
585 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
586 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
587 !work_pending(&mmc->detect.work))
588 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
595 irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
597 unsigned int ireg, status;
598 struct tmio_mmc_host *host = devid;
600 tmio_mmc_card_irq_status(host, &ireg, &status);
601 __tmio_mmc_card_detect_irq(host, ireg, status);
605 EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
607 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
608 int ireg, int status)
610 /* Command completion */
611 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
612 tmio_mmc_ack_mmc_irqs(host,
613 TMIO_STAT_CMDRESPEND |
614 TMIO_STAT_CMDTIMEOUT);
615 tmio_mmc_cmd_irq(host, status);
620 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
621 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
622 tmio_mmc_pio_irq(host);
626 /* Data transfer completion */
627 if (ireg & TMIO_STAT_DATAEND) {
628 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
629 tmio_mmc_data_irq(host);
636 irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
638 unsigned int ireg, status;
639 struct tmio_mmc_host *host = devid;
641 tmio_mmc_card_irq_status(host, &ireg, &status);
642 __tmio_mmc_sdcard_irq(host, ireg, status);
646 EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
648 irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
650 struct tmio_mmc_host *host = devid;
651 struct mmc_host *mmc = host->mmc;
652 struct tmio_mmc_data *pdata = host->pdata;
653 unsigned int ireg, status;
655 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
658 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
659 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
661 sd_ctrl_write16(host, CTL_SDIO_STATUS, status & ~TMIO_SDIO_MASK_ALL);
663 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
664 mmc_signal_sdio_irq(mmc);
668 EXPORT_SYMBOL(tmio_mmc_sdio_irq);
670 irqreturn_t tmio_mmc_irq(int irq, void *devid)
672 struct tmio_mmc_host *host = devid;
673 unsigned int ireg, status;
675 pr_debug("MMC IRQ begin\n");
677 tmio_mmc_card_irq_status(host, &ireg, &status);
678 if (__tmio_mmc_card_detect_irq(host, ireg, status))
680 if (__tmio_mmc_sdcard_irq(host, ireg, status))
683 tmio_mmc_sdio_irq(irq, devid);
687 EXPORT_SYMBOL(tmio_mmc_irq);
689 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
690 struct mmc_data *data)
692 struct tmio_mmc_data *pdata = host->pdata;
694 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
695 data->blksz, data->blocks);
697 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
698 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
699 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
701 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
702 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
703 mmc_hostname(host->mmc), data->blksz);
708 tmio_mmc_init_sg(host, data);
711 /* Set transfer length / blocksize */
712 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
713 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
715 tmio_mmc_start_dma(host, data);
720 /* Process requests from the MMC layer */
721 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
723 struct tmio_mmc_host *host = mmc_priv(mmc);
727 spin_lock_irqsave(&host->lock, flags);
730 pr_debug("request not null\n");
731 if (IS_ERR(host->mrq)) {
732 spin_unlock_irqrestore(&host->lock, flags);
733 mrq->cmd->error = -EAGAIN;
734 mmc_request_done(mmc, mrq);
739 host->last_req_ts = jiffies;
743 spin_unlock_irqrestore(&host->lock, flags);
745 pm_runtime_get_sync(mmc_dev(mmc));
748 ret = tmio_mmc_start_data(host, mrq->data);
753 ret = tmio_mmc_start_command(host, mrq->cmd);
755 schedule_delayed_work(&host->delayed_reset_work,
756 msecs_to_jiffies(2000));
761 host->force_pio = false;
763 mrq->cmd->error = ret;
764 mmc_request_done(mmc, mrq);
766 pm_runtime_mark_last_busy(mmc_dev(mmc));
767 pm_runtime_put_autosuspend(mmc_dev(mmc));
770 static int tmio_mmc_clk_update(struct mmc_host *mmc)
772 struct tmio_mmc_host *host = mmc_priv(mmc);
773 struct tmio_mmc_data *pdata = host->pdata;
776 if (!pdata->clk_enable)
779 ret = pdata->clk_enable(host->pdev, &mmc->f_max);
781 mmc->f_min = mmc->f_max / 512;
786 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
788 struct mmc_host *mmc = host->mmc;
791 /* .set_ios() is returning void, so, no chance to report an error */
794 host->set_pwr(host->pdev, 1);
796 if (!IS_ERR(mmc->supply.vmmc)) {
797 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
799 * Attention: empiric value. With a b43 WiFi SDIO card this
800 * delay proved necessary for reliable card-insertion probing.
801 * 100us were not enough. Is this the same 140us delay, as in
802 * tmio_mmc_set_ios()?
807 * It seems, VccQ should be switched on after Vcc, this is also what the
808 * omap_hsmmc.c driver does.
810 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
811 ret = regulator_enable(mmc->supply.vqmmc);
816 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
820 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
822 struct mmc_host *mmc = host->mmc;
824 if (!IS_ERR(mmc->supply.vqmmc))
825 regulator_disable(mmc->supply.vqmmc);
827 if (!IS_ERR(mmc->supply.vmmc))
828 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
831 host->set_pwr(host->pdev, 0);
834 /* Set MMC clock / power.
835 * Note: This controller uses a simple divider scheme therefore it cannot
836 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
837 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
840 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
842 struct tmio_mmc_host *host = mmc_priv(mmc);
843 struct device *dev = &host->pdev->dev;
846 pm_runtime_get_sync(mmc_dev(mmc));
848 mutex_lock(&host->ios_lock);
850 spin_lock_irqsave(&host->lock, flags);
852 if (IS_ERR(host->mrq)) {
854 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
855 current->comm, task_pid_nr(current),
856 ios->clock, ios->power_mode);
857 host->mrq = ERR_PTR(-EINTR);
860 "%s.%d: CMD%u active since %lu, now %lu!\n",
861 current->comm, task_pid_nr(current),
862 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
864 spin_unlock_irqrestore(&host->lock, flags);
866 mutex_unlock(&host->ios_lock);
870 host->mrq = ERR_PTR(-EBUSY);
872 spin_unlock_irqrestore(&host->lock, flags);
875 * host->power toggles between false and true in both cases - either
876 * or not the controller can be runtime-suspended during inactivity.
877 * But if the controller has to be kept on, the runtime-pm usage_count
878 * is kept positive, so no suspending actually takes place.
880 if (ios->power_mode == MMC_POWER_ON && ios->clock) {
881 if (host->power != TMIO_MMC_ON_RUN) {
882 tmio_mmc_clk_update(mmc);
883 if (host->resuming) {
884 tmio_mmc_reset(host);
885 host->resuming = false;
888 if (host->power == TMIO_MMC_OFF_STOP)
889 tmio_mmc_reset(host);
890 tmio_mmc_set_clock(host, ios->clock);
891 if (host->power == TMIO_MMC_OFF_STOP)
892 /* power up SD card and the bus */
893 tmio_mmc_power_on(host, ios->vdd);
894 host->power = TMIO_MMC_ON_RUN;
895 /* start bus clock */
896 tmio_mmc_clk_start(host);
897 } else if (ios->power_mode != MMC_POWER_UP) {
898 struct tmio_mmc_data *pdata = host->pdata;
899 unsigned int old_power = host->power;
901 if (old_power != TMIO_MMC_OFF_STOP) {
902 if (ios->power_mode == MMC_POWER_OFF) {
903 tmio_mmc_power_off(host);
904 host->power = TMIO_MMC_OFF_STOP;
906 host->power = TMIO_MMC_ON_STOP;
910 if (old_power == TMIO_MMC_ON_RUN) {
911 tmio_mmc_clk_stop(host);
912 if (pdata->clk_disable)
913 pdata->clk_disable(host->pdev);
917 if (host->power != TMIO_MMC_OFF_STOP) {
918 switch (ios->bus_width) {
919 case MMC_BUS_WIDTH_1:
920 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
922 case MMC_BUS_WIDTH_4:
923 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
928 /* Let things settle. delay taken from winCE driver */
930 if (PTR_ERR(host->mrq) == -EINTR)
931 dev_dbg(&host->pdev->dev,
932 "%s.%d: IOS interrupted: clk %u, mode %u",
933 current->comm, task_pid_nr(current),
934 ios->clock, ios->power_mode);
937 mutex_unlock(&host->ios_lock);
939 pm_runtime_mark_last_busy(mmc_dev(mmc));
940 pm_runtime_put_autosuspend(mmc_dev(mmc));
943 static int tmio_mmc_get_ro(struct mmc_host *mmc)
945 struct tmio_mmc_host *host = mmc_priv(mmc);
946 struct tmio_mmc_data *pdata = host->pdata;
947 int ret = mmc_gpio_get_ro(mmc);
951 pm_runtime_get_sync(mmc_dev(mmc));
952 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
953 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
954 pm_runtime_mark_last_busy(mmc_dev(mmc));
955 pm_runtime_put_autosuspend(mmc_dev(mmc));
960 static const struct mmc_host_ops tmio_mmc_ops = {
961 .request = tmio_mmc_request,
962 .set_ios = tmio_mmc_set_ios,
963 .get_ro = tmio_mmc_get_ro,
964 .get_cd = mmc_gpio_get_cd,
965 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
968 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
970 struct tmio_mmc_data *pdata = host->pdata;
971 struct mmc_host *mmc = host->mmc;
973 mmc_regulator_get_supply(mmc);
975 /* use ocr_mask if no regulator */
977 mmc->ocr_avail = pdata->ocr_mask;
981 * There is possibility that regulator has not been probed
984 return -EPROBE_DEFER;
989 static void tmio_mmc_of_parse(struct platform_device *pdev,
990 struct tmio_mmc_data *pdata)
992 const struct device_node *np = pdev->dev.of_node;
996 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
997 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1000 int tmio_mmc_host_probe(struct tmio_mmc_host **host,
1001 struct platform_device *pdev,
1002 struct tmio_mmc_data *pdata)
1004 struct tmio_mmc_host *_host;
1005 struct mmc_host *mmc;
1006 struct resource *res_ctl;
1008 u32 irq_mask = TMIO_MASK_CMD;
1010 tmio_mmc_of_parse(pdev, pdata);
1012 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1013 pdata->write16_hook = NULL;
1015 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1019 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1023 ret = mmc_of_parse(mmc);
1027 pdata->dev = &pdev->dev;
1028 _host = mmc_priv(mmc);
1029 _host->pdata = pdata;
1032 platform_set_drvdata(pdev, mmc);
1034 _host->set_pwr = pdata->set_pwr;
1035 _host->set_clk_div = pdata->set_clk_div;
1037 ret = tmio_mmc_init_ocr(_host);
1041 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
1047 mmc->ops = &tmio_mmc_ops;
1048 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1049 mmc->caps2 |= pdata->capabilities2;
1051 mmc->max_blk_size = 512;
1052 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
1054 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1055 mmc->max_seg_size = mmc->max_req_size;
1057 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1058 mmc->caps & MMC_CAP_NEEDS_POLL ||
1059 mmc->caps & MMC_CAP_NONREMOVABLE ||
1060 mmc->slot.cd_irq >= 0);
1062 _host->power = TMIO_MMC_OFF_STOP;
1063 if (tmio_mmc_clk_update(mmc) < 0) {
1064 mmc->f_max = pdata->hclk;
1065 mmc->f_min = mmc->f_max / 512;
1069 * While using internal tmio hardware logic for card detection, we need
1070 * to ensure it stays powered for it to work.
1072 if (_host->native_hotplug)
1073 pm_runtime_get_noresume(&pdev->dev);
1075 tmio_mmc_clk_stop(_host);
1076 tmio_mmc_reset(_host);
1078 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
1079 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1081 /* Unmask the IRQs we want to know about */
1082 if (!_host->chan_rx)
1083 irq_mask |= TMIO_MASK_READOP;
1084 if (!_host->chan_tx)
1085 irq_mask |= TMIO_MASK_WRITEOP;
1086 if (!_host->native_hotplug)
1087 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1089 _host->sdcard_irq_mask &= ~irq_mask;
1091 _host->sdio_irq_enabled = false;
1092 if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
1093 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1094 sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
1095 sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000);
1098 spin_lock_init(&_host->lock);
1099 mutex_init(&_host->ios_lock);
1101 /* Init delayed work for request timeouts */
1102 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1103 INIT_WORK(&_host->done, tmio_mmc_done_work);
1105 /* See if we also get DMA */
1106 tmio_mmc_request_dma(_host, pdata);
1108 pm_runtime_set_active(&pdev->dev);
1109 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1110 pm_runtime_use_autosuspend(&pdev->dev);
1111 pm_runtime_enable(&pdev->dev);
1113 ret = mmc_add_host(mmc);
1114 if (pdata->clk_disable)
1115 pdata->clk_disable(pdev);
1117 tmio_mmc_host_remove(_host);
1121 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1123 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1124 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1126 tmio_mmc_host_remove(_host);
1140 EXPORT_SYMBOL(tmio_mmc_host_probe);
1142 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1144 struct platform_device *pdev = host->pdev;
1145 struct mmc_host *mmc = host->mmc;
1147 if (!host->native_hotplug)
1148 pm_runtime_get_sync(&pdev->dev);
1150 dev_pm_qos_hide_latency_limit(&pdev->dev);
1152 mmc_remove_host(mmc);
1153 cancel_work_sync(&host->done);
1154 cancel_delayed_work_sync(&host->delayed_reset_work);
1155 tmio_mmc_release_dma(host);
1157 pm_runtime_put_sync(&pdev->dev);
1158 pm_runtime_disable(&pdev->dev);
1163 EXPORT_SYMBOL(tmio_mmc_host_remove);
1165 #ifdef CONFIG_PM_SLEEP
1166 int tmio_mmc_host_suspend(struct device *dev)
1168 struct mmc_host *mmc = dev_get_drvdata(dev);
1169 struct tmio_mmc_host *host = mmc_priv(mmc);
1171 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1174 EXPORT_SYMBOL(tmio_mmc_host_suspend);
1176 int tmio_mmc_host_resume(struct device *dev)
1178 struct mmc_host *mmc = dev_get_drvdata(dev);
1179 struct tmio_mmc_host *host = mmc_priv(mmc);
1181 tmio_mmc_enable_dma(host, true);
1183 /* The MMC core will perform the complete set up */
1184 host->resuming = true;
1187 EXPORT_SYMBOL(tmio_mmc_host_resume);
1190 #ifdef CONFIG_PM_RUNTIME
1191 int tmio_mmc_host_runtime_suspend(struct device *dev)
1195 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1197 int tmio_mmc_host_runtime_resume(struct device *dev)
1199 struct mmc_host *mmc = dev_get_drvdata(dev);
1200 struct tmio_mmc_host *host = mmc_priv(mmc);
1202 tmio_mmc_enable_dma(host, true);
1206 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1209 MODULE_LICENSE("GPL v2");