2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/mmc.h>
39 #include <linux/mmc/slot-gpio.h>
40 #include <linux/mmc/tmio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/mmc/sdio.h>
48 #include <linux/scatterlist.h>
49 #include <linux/spinlock.h>
50 #include <linux/workqueue.h>
54 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
56 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
57 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
60 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
62 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
63 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
66 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
68 sd_ctrl_write32(host, CTL_STATUS, ~i);
71 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
73 host->sg_len = data->sg_len;
74 host->sg_ptr = data->sg;
75 host->sg_orig = data->sg;
79 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
81 host->sg_ptr = sg_next(host->sg_ptr);
83 return --host->sg_len;
86 #ifdef CONFIG_MMC_DEBUG
88 #define STATUS_TO_TEXT(a, status, i) \
90 if (status & TMIO_STAT_##a) { \
97 static void pr_debug_status(u32 status)
100 pr_debug("status: %08x = ", status);
101 STATUS_TO_TEXT(CARD_REMOVE, status, i);
102 STATUS_TO_TEXT(CARD_INSERT, status, i);
103 STATUS_TO_TEXT(SIGSTATE, status, i);
104 STATUS_TO_TEXT(WRPROTECT, status, i);
105 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
106 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
107 STATUS_TO_TEXT(SIGSTATE_A, status, i);
108 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
109 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
110 STATUS_TO_TEXT(ILL_FUNC, status, i);
111 STATUS_TO_TEXT(CMD_BUSY, status, i);
112 STATUS_TO_TEXT(CMDRESPEND, status, i);
113 STATUS_TO_TEXT(DATAEND, status, i);
114 STATUS_TO_TEXT(CRCFAIL, status, i);
115 STATUS_TO_TEXT(DATATIMEOUT, status, i);
116 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
117 STATUS_TO_TEXT(RXOVERFLOW, status, i);
118 STATUS_TO_TEXT(TXUNDERRUN, status, i);
119 STATUS_TO_TEXT(RXRDY, status, i);
120 STATUS_TO_TEXT(TXRQ, status, i);
121 STATUS_TO_TEXT(ILL_ACCESS, status, i);
126 #define pr_debug_status(s) do { } while (0)
129 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
131 struct tmio_mmc_host *host = mmc_priv(mmc);
133 if (enable && !host->sdio_irq_enabled) {
134 /* Keep device active while SDIO irq is enabled */
135 pm_runtime_get_sync(mmc_dev(mmc));
136 host->sdio_irq_enabled = true;
138 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
139 ~TMIO_SDIO_STAT_IOIRQ;
140 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
141 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
142 } else if (!enable && host->sdio_irq_enabled) {
143 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
144 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
145 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
147 host->sdio_irq_enabled = false;
148 pm_runtime_mark_last_busy(mmc_dev(mmc));
149 pm_runtime_put_autosuspend(mmc_dev(mmc));
153 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
154 unsigned int new_clock)
159 for (clock = host->mmc->f_min, clk = 0x80000080;
160 new_clock >= (clock<<1); clk >>= 1)
164 if (host->set_clk_div)
165 host->set_clk_div(host->pdev, (clk>>22) & 1);
167 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
171 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
173 /* implicit BUG_ON(!res) */
174 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
175 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
179 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
180 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
184 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
186 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
187 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
190 /* implicit BUG_ON(!res) */
191 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
192 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
197 static void tmio_mmc_reset(struct tmio_mmc_host *host)
199 /* FIXME - should we set stop clock reg here */
200 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
201 /* implicit BUG_ON(!res) */
202 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
203 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
205 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
206 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
207 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
211 static void tmio_mmc_reset_work(struct work_struct *work)
213 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
214 delayed_reset_work.work);
215 struct mmc_request *mrq;
218 spin_lock_irqsave(&host->lock, flags);
222 * is request already finished? Since we use a non-blocking
223 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
224 * us, so, have to check for IS_ERR(host->mrq)
226 if (IS_ERR_OR_NULL(mrq)
227 || time_is_after_jiffies(host->last_req_ts +
228 msecs_to_jiffies(2000))) {
229 spin_unlock_irqrestore(&host->lock, flags);
233 dev_warn(&host->pdev->dev,
234 "timeout waiting for hardware interrupt (CMD%u)\n",
238 host->data->error = -ETIMEDOUT;
240 host->cmd->error = -ETIMEDOUT;
242 mrq->cmd->error = -ETIMEDOUT;
246 host->force_pio = false;
248 spin_unlock_irqrestore(&host->lock, flags);
250 tmio_mmc_reset(host);
252 /* Ready for new calls */
255 tmio_mmc_abort_dma(host);
256 mmc_request_done(host->mmc, mrq);
258 pm_runtime_mark_last_busy(mmc_dev(host->mmc));
259 pm_runtime_put_autosuspend(mmc_dev(host->mmc));
262 /* called with host->lock held, interrupts disabled */
263 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
265 struct mmc_request *mrq;
268 spin_lock_irqsave(&host->lock, flags);
271 if (IS_ERR_OR_NULL(mrq)) {
272 spin_unlock_irqrestore(&host->lock, flags);
278 host->force_pio = false;
280 cancel_delayed_work(&host->delayed_reset_work);
283 spin_unlock_irqrestore(&host->lock, flags);
285 if (mrq->cmd->error || (mrq->data && mrq->data->error))
286 tmio_mmc_abort_dma(host);
288 mmc_request_done(host->mmc, mrq);
290 pm_runtime_mark_last_busy(mmc_dev(host->mmc));
291 pm_runtime_put_autosuspend(mmc_dev(host->mmc));
294 static void tmio_mmc_done_work(struct work_struct *work)
296 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
298 tmio_mmc_finish_request(host);
301 /* These are the bitmasks the tmio chip requires to implement the MMC response
302 * types. Note that R1 and R6 are the same in this scheme. */
303 #define APP_CMD 0x0040
304 #define RESP_NONE 0x0300
305 #define RESP_R1 0x0400
306 #define RESP_R1B 0x0500
307 #define RESP_R2 0x0600
308 #define RESP_R3 0x0700
309 #define DATA_PRESENT 0x0800
310 #define TRANSFER_READ 0x1000
311 #define TRANSFER_MULTI 0x2000
312 #define SECURITY_CMD 0x4000
313 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
315 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
317 struct mmc_data *data = host->data;
319 u32 irq_mask = TMIO_MASK_CMD;
321 /* CMD12 is handled by hardware */
322 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
323 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
327 switch (mmc_resp_type(cmd)) {
328 case MMC_RSP_NONE: c |= RESP_NONE; break;
329 case MMC_RSP_R1: c |= RESP_R1; break;
330 case MMC_RSP_R1B: c |= RESP_R1B; break;
331 case MMC_RSP_R2: c |= RESP_R2; break;
332 case MMC_RSP_R3: c |= RESP_R3; break;
334 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
340 /* FIXME - this seems to be ok commented out but the spec suggest this bit
341 * should be set when issuing app commands.
342 * if(cmd->flags & MMC_FLAG_ACMD)
347 if (data->blocks > 1) {
348 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
352 * Disable auto CMD12 at IO_RW_EXTENDED when
353 * multiple block transfer
355 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
356 (cmd->opcode == SD_IO_RW_EXTENDED))
359 if (data->flags & MMC_DATA_READ)
363 if (!host->native_hotplug)
364 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
365 tmio_mmc_enable_mmc_irqs(host, irq_mask);
367 /* Fire off the command */
368 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
369 sd_ctrl_write16(host, CTL_SD_CMD, c);
375 * This chip always returns (at least?) as much data as you ask for.
376 * I'm unsure what happens if you ask for less than a block. This should be
377 * looked into to ensure that a funny length read doesn't hose the controller.
379 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
381 struct mmc_data *data = host->data;
387 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
388 pr_err("PIO IRQ in DMA mode!\n");
391 pr_debug("Spurious PIO IRQ\n");
395 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
396 buf = (unsigned short *)(sg_virt + host->sg_off);
398 count = host->sg_ptr->length - host->sg_off;
399 if (count > data->blksz)
402 pr_debug("count: %08x offset: %08x flags %08x\n",
403 count, host->sg_off, data->flags);
405 /* Transfer the data */
406 if (data->flags & MMC_DATA_READ)
407 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
409 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
411 host->sg_off += count;
413 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
415 if (host->sg_off == host->sg_ptr->length)
416 tmio_mmc_next_sg(host);
421 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
423 if (host->sg_ptr == &host->bounce_sg) {
425 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
426 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
427 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
431 /* needs to be called with host->lock held */
432 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
434 struct mmc_data *data = host->data;
435 struct mmc_command *stop;
440 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
445 /* FIXME - return correct transfer count on errors */
447 data->bytes_xfered = data->blocks * data->blksz;
449 data->bytes_xfered = 0;
451 pr_debug("Completed data request\n");
454 * FIXME: other drivers allow an optional stop command of any given type
455 * which we dont do, as the chip can auto generate them.
456 * Perhaps we can be smarter about when to use auto CMD12 and
457 * only issue the auto request when we know this is the desired
458 * stop command, allowing fallback to the stop command the
459 * upper layers expect. For now, we do what works.
462 if (data->flags & MMC_DATA_READ) {
463 if (host->chan_rx && !host->force_pio)
464 tmio_mmc_check_bounce_buffer(host);
465 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
468 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
473 if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
474 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
479 schedule_work(&host->done);
482 static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
484 struct mmc_data *data;
485 spin_lock(&host->lock);
491 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
492 u32 status = sd_ctrl_read32(host, CTL_STATUS);
496 * Has all data been written out yet? Testing on SuperH showed,
497 * that in most cases the first interrupt comes already with the
498 * BUSY status bit clear, but on some operations, like mount or
499 * in the beginning of a write / sync / umount, there is one
500 * DATAEND interrupt with the BUSY bit set, in this cases
501 * waiting for one more interrupt fixes the problem.
503 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
504 if (status & TMIO_STAT_ILL_FUNC)
507 if (!(status & TMIO_STAT_CMD_BUSY))
512 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
513 tasklet_schedule(&host->dma_complete);
515 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
516 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
517 tasklet_schedule(&host->dma_complete);
519 tmio_mmc_do_data_irq(host);
520 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
523 spin_unlock(&host->lock);
526 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
529 struct mmc_command *cmd = host->cmd;
532 spin_lock(&host->lock);
535 pr_debug("Spurious CMD irq\n");
541 /* This controller is sicker than the PXA one. Not only do we need to
542 * drop the top 8 bits of the first response word, we also need to
543 * modify the order of the response for short response command types.
546 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
547 cmd->resp[i] = sd_ctrl_read32(host, addr);
549 if (cmd->flags & MMC_RSP_136) {
550 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
551 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
552 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
554 } else if (cmd->flags & MMC_RSP_R3) {
555 cmd->resp[0] = cmd->resp[3];
558 if (stat & TMIO_STAT_CMDTIMEOUT)
559 cmd->error = -ETIMEDOUT;
560 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
561 cmd->error = -EILSEQ;
563 /* If there is data to handle we enable data IRQs here, and
564 * we will ultimatley finish the request in the data_end handler.
565 * If theres no data or we encountered an error, finish now.
567 if (host->data && !cmd->error) {
568 if (host->data->flags & MMC_DATA_READ) {
569 if (host->force_pio || !host->chan_rx)
570 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
572 tasklet_schedule(&host->dma_issue);
574 if (host->force_pio || !host->chan_tx)
575 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
577 tasklet_schedule(&host->dma_issue);
580 schedule_work(&host->done);
584 spin_unlock(&host->lock);
587 static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
588 int *ireg, int *status)
590 *status = sd_ctrl_read32(host, CTL_STATUS);
591 *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
593 pr_debug_status(*status);
594 pr_debug_status(*ireg);
596 /* Clear the status except the interrupt status */
597 sd_ctrl_write32(host, CTL_STATUS, TMIO_MASK_IRQ);
600 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
601 int ireg, int status)
603 struct mmc_host *mmc = host->mmc;
605 /* Card insert / remove attempts */
606 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
607 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
608 TMIO_STAT_CARD_REMOVE);
609 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
610 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
611 !work_pending(&mmc->detect.work))
612 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
619 irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
621 unsigned int ireg, status;
622 struct tmio_mmc_host *host = devid;
624 tmio_mmc_card_irq_status(host, &ireg, &status);
625 __tmio_mmc_card_detect_irq(host, ireg, status);
629 EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
631 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
632 int ireg, int status)
634 /* Command completion */
635 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
636 tmio_mmc_ack_mmc_irqs(host,
637 TMIO_STAT_CMDRESPEND |
638 TMIO_STAT_CMDTIMEOUT);
639 tmio_mmc_cmd_irq(host, status);
644 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
645 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
646 tmio_mmc_pio_irq(host);
650 /* Data transfer completion */
651 if (ireg & TMIO_STAT_DATAEND) {
652 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
653 tmio_mmc_data_irq(host);
660 irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
662 unsigned int ireg, status;
663 struct tmio_mmc_host *host = devid;
665 tmio_mmc_card_irq_status(host, &ireg, &status);
666 __tmio_mmc_sdcard_irq(host, ireg, status);
670 EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
672 irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
674 struct tmio_mmc_host *host = devid;
675 struct mmc_host *mmc = host->mmc;
676 struct tmio_mmc_data *pdata = host->pdata;
677 unsigned int ireg, status;
678 unsigned int sdio_status;
680 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
683 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
684 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
686 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
687 if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
690 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
692 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
693 mmc_signal_sdio_irq(mmc);
697 EXPORT_SYMBOL(tmio_mmc_sdio_irq);
699 irqreturn_t tmio_mmc_irq(int irq, void *devid)
701 struct tmio_mmc_host *host = devid;
702 unsigned int ireg, status;
704 pr_debug("MMC IRQ begin\n");
706 tmio_mmc_card_irq_status(host, &ireg, &status);
707 if (__tmio_mmc_card_detect_irq(host, ireg, status))
709 if (__tmio_mmc_sdcard_irq(host, ireg, status))
712 tmio_mmc_sdio_irq(irq, devid);
716 EXPORT_SYMBOL(tmio_mmc_irq);
718 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
719 struct mmc_data *data)
721 struct tmio_mmc_data *pdata = host->pdata;
723 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
724 data->blksz, data->blocks);
726 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
727 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
728 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
730 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
731 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
732 mmc_hostname(host->mmc), data->blksz);
737 tmio_mmc_init_sg(host, data);
740 /* Set transfer length / blocksize */
741 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
742 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
744 tmio_mmc_start_dma(host, data);
749 /* Process requests from the MMC layer */
750 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
752 struct tmio_mmc_host *host = mmc_priv(mmc);
756 spin_lock_irqsave(&host->lock, flags);
759 pr_debug("request not null\n");
760 if (IS_ERR(host->mrq)) {
761 spin_unlock_irqrestore(&host->lock, flags);
762 mrq->cmd->error = -EAGAIN;
763 mmc_request_done(mmc, mrq);
768 host->last_req_ts = jiffies;
772 spin_unlock_irqrestore(&host->lock, flags);
774 pm_runtime_get_sync(mmc_dev(mmc));
777 ret = tmio_mmc_start_data(host, mrq->data);
782 ret = tmio_mmc_start_command(host, mrq->cmd);
784 schedule_delayed_work(&host->delayed_reset_work,
785 msecs_to_jiffies(2000));
790 host->force_pio = false;
792 mrq->cmd->error = ret;
793 mmc_request_done(mmc, mrq);
795 pm_runtime_mark_last_busy(mmc_dev(mmc));
796 pm_runtime_put_autosuspend(mmc_dev(mmc));
799 static int tmio_mmc_clk_update(struct tmio_mmc_host *host)
801 struct mmc_host *mmc = host->mmc;
802 struct tmio_mmc_data *pdata = host->pdata;
805 if (!pdata->clk_enable)
808 ret = pdata->clk_enable(host->pdev, &mmc->f_max);
810 mmc->f_min = mmc->f_max / 512;
815 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
817 struct mmc_host *mmc = host->mmc;
820 /* .set_ios() is returning void, so, no chance to report an error */
823 host->set_pwr(host->pdev, 1);
825 if (!IS_ERR(mmc->supply.vmmc)) {
826 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
828 * Attention: empiric value. With a b43 WiFi SDIO card this
829 * delay proved necessary for reliable card-insertion probing.
830 * 100us were not enough. Is this the same 140us delay, as in
831 * tmio_mmc_set_ios()?
836 * It seems, VccQ should be switched on after Vcc, this is also what the
837 * omap_hsmmc.c driver does.
839 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
840 ret = regulator_enable(mmc->supply.vqmmc);
845 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
849 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
851 struct mmc_host *mmc = host->mmc;
853 if (!IS_ERR(mmc->supply.vqmmc))
854 regulator_disable(mmc->supply.vqmmc);
856 if (!IS_ERR(mmc->supply.vmmc))
857 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
860 host->set_pwr(host->pdev, 0);
863 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
864 unsigned char bus_width)
867 case MMC_BUS_WIDTH_1:
868 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
870 case MMC_BUS_WIDTH_4:
871 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
876 /* Set MMC clock / power.
877 * Note: This controller uses a simple divider scheme therefore it cannot
878 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
879 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
882 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
884 struct tmio_mmc_host *host = mmc_priv(mmc);
885 struct device *dev = &host->pdev->dev;
888 pm_runtime_get_sync(mmc_dev(mmc));
890 mutex_lock(&host->ios_lock);
892 spin_lock_irqsave(&host->lock, flags);
894 if (IS_ERR(host->mrq)) {
896 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
897 current->comm, task_pid_nr(current),
898 ios->clock, ios->power_mode);
899 host->mrq = ERR_PTR(-EINTR);
902 "%s.%d: CMD%u active since %lu, now %lu!\n",
903 current->comm, task_pid_nr(current),
904 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
906 spin_unlock_irqrestore(&host->lock, flags);
908 mutex_unlock(&host->ios_lock);
912 host->mrq = ERR_PTR(-EBUSY);
914 spin_unlock_irqrestore(&host->lock, flags);
916 switch (ios->power_mode) {
918 tmio_mmc_power_off(host);
919 tmio_mmc_clk_stop(host);
922 tmio_mmc_set_clock(host, ios->clock);
923 tmio_mmc_power_on(host, ios->vdd);
924 tmio_mmc_clk_start(host);
925 tmio_mmc_set_bus_width(host, ios->bus_width);
928 tmio_mmc_set_clock(host, ios->clock);
929 tmio_mmc_clk_start(host);
930 tmio_mmc_set_bus_width(host, ios->bus_width);
934 /* Let things settle. delay taken from winCE driver */
936 if (PTR_ERR(host->mrq) == -EINTR)
937 dev_dbg(&host->pdev->dev,
938 "%s.%d: IOS interrupted: clk %u, mode %u",
939 current->comm, task_pid_nr(current),
940 ios->clock, ios->power_mode);
943 host->clk_cache = ios->clock;
945 mutex_unlock(&host->ios_lock);
947 pm_runtime_mark_last_busy(mmc_dev(mmc));
948 pm_runtime_put_autosuspend(mmc_dev(mmc));
951 static int tmio_mmc_get_ro(struct mmc_host *mmc)
953 struct tmio_mmc_host *host = mmc_priv(mmc);
954 struct tmio_mmc_data *pdata = host->pdata;
955 int ret = mmc_gpio_get_ro(mmc);
959 pm_runtime_get_sync(mmc_dev(mmc));
960 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
961 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
962 pm_runtime_mark_last_busy(mmc_dev(mmc));
963 pm_runtime_put_autosuspend(mmc_dev(mmc));
968 static const struct mmc_host_ops tmio_mmc_ops = {
969 .request = tmio_mmc_request,
970 .set_ios = tmio_mmc_set_ios,
971 .get_ro = tmio_mmc_get_ro,
972 .get_cd = mmc_gpio_get_cd,
973 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
976 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
978 struct tmio_mmc_data *pdata = host->pdata;
979 struct mmc_host *mmc = host->mmc;
981 mmc_regulator_get_supply(mmc);
983 /* use ocr_mask if no regulator */
985 mmc->ocr_avail = pdata->ocr_mask;
989 * There is possibility that regulator has not been probed
992 return -EPROBE_DEFER;
997 static void tmio_mmc_of_parse(struct platform_device *pdev,
998 struct tmio_mmc_data *pdata)
1000 const struct device_node *np = pdev->dev.of_node;
1004 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1005 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1008 int tmio_mmc_host_probe(struct tmio_mmc_host **host,
1009 struct platform_device *pdev,
1010 struct tmio_mmc_data *pdata)
1012 struct tmio_mmc_host *_host;
1013 struct mmc_host *mmc;
1014 struct resource *res_ctl;
1016 u32 irq_mask = TMIO_MASK_CMD;
1018 tmio_mmc_of_parse(pdev, pdata);
1020 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1021 pdata->write16_hook = NULL;
1023 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1027 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1031 ret = mmc_of_parse(mmc);
1035 pdata->dev = &pdev->dev;
1036 _host = mmc_priv(mmc);
1037 _host->pdata = pdata;
1040 platform_set_drvdata(pdev, mmc);
1042 _host->set_pwr = pdata->set_pwr;
1043 _host->set_clk_div = pdata->set_clk_div;
1045 ret = tmio_mmc_init_ocr(_host);
1049 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
1055 mmc->ops = &tmio_mmc_ops;
1056 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1057 mmc->caps2 |= pdata->capabilities2;
1059 mmc->max_blk_size = 512;
1060 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
1062 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1063 mmc->max_seg_size = mmc->max_req_size;
1065 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1066 mmc->caps & MMC_CAP_NEEDS_POLL ||
1067 mmc->caps & MMC_CAP_NONREMOVABLE ||
1068 mmc->slot.cd_irq >= 0);
1070 if (tmio_mmc_clk_update(_host) < 0) {
1071 mmc->f_max = pdata->hclk;
1072 mmc->f_min = mmc->f_max / 512;
1076 * While using internal tmio hardware logic for card detection, we need
1077 * to ensure it stays powered for it to work.
1079 if (_host->native_hotplug)
1080 pm_runtime_get_noresume(&pdev->dev);
1082 tmio_mmc_clk_stop(_host);
1083 tmio_mmc_reset(_host);
1085 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
1086 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1088 /* Unmask the IRQs we want to know about */
1089 if (!_host->chan_rx)
1090 irq_mask |= TMIO_MASK_READOP;
1091 if (!_host->chan_tx)
1092 irq_mask |= TMIO_MASK_WRITEOP;
1093 if (!_host->native_hotplug)
1094 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1096 _host->sdcard_irq_mask &= ~irq_mask;
1098 _host->sdio_irq_enabled = false;
1099 if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
1100 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1101 sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
1102 sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000);
1105 spin_lock_init(&_host->lock);
1106 mutex_init(&_host->ios_lock);
1108 /* Init delayed work for request timeouts */
1109 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1110 INIT_WORK(&_host->done, tmio_mmc_done_work);
1112 /* See if we also get DMA */
1113 tmio_mmc_request_dma(_host, pdata);
1115 pm_runtime_set_active(&pdev->dev);
1116 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1117 pm_runtime_use_autosuspend(&pdev->dev);
1118 pm_runtime_enable(&pdev->dev);
1120 ret = mmc_add_host(mmc);
1122 tmio_mmc_host_remove(_host);
1126 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1128 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1129 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1131 tmio_mmc_host_remove(_host);
1145 EXPORT_SYMBOL(tmio_mmc_host_probe);
1147 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1149 struct platform_device *pdev = host->pdev;
1150 struct mmc_host *mmc = host->mmc;
1152 if (!host->native_hotplug)
1153 pm_runtime_get_sync(&pdev->dev);
1155 dev_pm_qos_hide_latency_limit(&pdev->dev);
1157 mmc_remove_host(mmc);
1158 cancel_work_sync(&host->done);
1159 cancel_delayed_work_sync(&host->delayed_reset_work);
1160 tmio_mmc_release_dma(host);
1162 pm_runtime_put_sync(&pdev->dev);
1163 pm_runtime_disable(&pdev->dev);
1168 EXPORT_SYMBOL(tmio_mmc_host_remove);
1171 int tmio_mmc_host_runtime_suspend(struct device *dev)
1173 struct mmc_host *mmc = dev_get_drvdata(dev);
1174 struct tmio_mmc_host *host = mmc_priv(mmc);
1176 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1178 if (host->clk_cache)
1179 tmio_mmc_clk_stop(host);
1181 if (host->pdata->clk_disable)
1182 host->pdata->clk_disable(host->pdev);
1186 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1188 int tmio_mmc_host_runtime_resume(struct device *dev)
1190 struct mmc_host *mmc = dev_get_drvdata(dev);
1191 struct tmio_mmc_host *host = mmc_priv(mmc);
1193 tmio_mmc_reset(host);
1194 tmio_mmc_clk_update(host);
1196 if (host->clk_cache) {
1197 tmio_mmc_set_clock(host, host->clk_cache);
1198 tmio_mmc_clk_start(host);
1201 tmio_mmc_enable_dma(host, true);
1205 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1208 MODULE_LICENSE("GPL v2");