2 * linux/drivers/mmc/host/tmio_mmc_pio.c
4 * Copyright (C) 2011 Guennadi Liakhovetski
5 * Copyright (C) 2007 Ian Molton
6 * Copyright (C) 2004 Ian Molton
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
12 * Driver for the MMC / SD / SDIO IP found in:
14 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/mmc.h>
39 #include <linux/mmc/slot-gpio.h>
40 #include <linux/mmc/tmio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/mmc/sdio.h>
48 #include <linux/scatterlist.h>
49 #include <linux/spinlock.h>
50 #include <linux/workqueue.h>
54 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
56 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
57 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
60 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
62 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
63 sd_ctrl_write32(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
66 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
68 sd_ctrl_write32(host, CTL_STATUS, ~i);
71 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
73 host->sg_len = data->sg_len;
74 host->sg_ptr = data->sg;
75 host->sg_orig = data->sg;
79 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
81 host->sg_ptr = sg_next(host->sg_ptr);
83 return --host->sg_len;
86 #ifdef CONFIG_MMC_DEBUG
88 #define STATUS_TO_TEXT(a, status, i) \
90 if (status & TMIO_STAT_##a) { \
97 static void pr_debug_status(u32 status)
100 pr_debug("status: %08x = ", status);
101 STATUS_TO_TEXT(CARD_REMOVE, status, i);
102 STATUS_TO_TEXT(CARD_INSERT, status, i);
103 STATUS_TO_TEXT(SIGSTATE, status, i);
104 STATUS_TO_TEXT(WRPROTECT, status, i);
105 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
106 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
107 STATUS_TO_TEXT(SIGSTATE_A, status, i);
108 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
109 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
110 STATUS_TO_TEXT(ILL_FUNC, status, i);
111 STATUS_TO_TEXT(CMD_BUSY, status, i);
112 STATUS_TO_TEXT(CMDRESPEND, status, i);
113 STATUS_TO_TEXT(DATAEND, status, i);
114 STATUS_TO_TEXT(CRCFAIL, status, i);
115 STATUS_TO_TEXT(DATATIMEOUT, status, i);
116 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
117 STATUS_TO_TEXT(RXOVERFLOW, status, i);
118 STATUS_TO_TEXT(TXUNDERRUN, status, i);
119 STATUS_TO_TEXT(RXRDY, status, i);
120 STATUS_TO_TEXT(TXRQ, status, i);
121 STATUS_TO_TEXT(ILL_ACCESS, status, i);
126 #define pr_debug_status(s) do { } while (0)
129 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
131 struct tmio_mmc_host *host = mmc_priv(mmc);
133 if (enable && !host->sdio_irq_enabled) {
134 /* Keep device active while SDIO irq is enabled */
135 pm_runtime_get_sync(mmc_dev(mmc));
136 host->sdio_irq_enabled = true;
138 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
139 ~TMIO_SDIO_STAT_IOIRQ;
140 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
141 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
142 } else if (!enable && host->sdio_irq_enabled) {
143 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
144 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
145 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
147 host->sdio_irq_enabled = false;
148 pm_runtime_mark_last_busy(mmc_dev(mmc));
149 pm_runtime_put_autosuspend(mmc_dev(mmc));
153 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
154 unsigned int new_clock)
159 for (clock = host->mmc->f_min, clk = 0x80000080;
160 new_clock >= (clock<<1); clk >>= 1)
163 /* 1/1 clock is option */
164 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) &&
169 if (host->set_clk_div)
170 host->set_clk_div(host->pdev, (clk>>22) & 1);
172 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & 0x1ff);
176 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
178 /* implicit BUG_ON(!res) */
179 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
180 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
184 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~0x0100 &
185 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
189 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
191 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, 0x0100 |
192 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
195 /* implicit BUG_ON(!res) */
196 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
197 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
202 static void tmio_mmc_reset(struct tmio_mmc_host *host)
204 /* FIXME - should we set stop clock reg here */
205 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
206 /* implicit BUG_ON(!res) */
207 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
208 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
210 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
211 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
212 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
216 static void tmio_mmc_reset_work(struct work_struct *work)
218 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
219 delayed_reset_work.work);
220 struct mmc_request *mrq;
223 spin_lock_irqsave(&host->lock, flags);
227 * is request already finished? Since we use a non-blocking
228 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
229 * us, so, have to check for IS_ERR(host->mrq)
231 if (IS_ERR_OR_NULL(mrq)
232 || time_is_after_jiffies(host->last_req_ts +
233 msecs_to_jiffies(2000))) {
234 spin_unlock_irqrestore(&host->lock, flags);
238 dev_warn(&host->pdev->dev,
239 "timeout waiting for hardware interrupt (CMD%u)\n",
243 host->data->error = -ETIMEDOUT;
245 host->cmd->error = -ETIMEDOUT;
247 mrq->cmd->error = -ETIMEDOUT;
251 host->force_pio = false;
253 spin_unlock_irqrestore(&host->lock, flags);
255 tmio_mmc_reset(host);
257 /* Ready for new calls */
260 tmio_mmc_abort_dma(host);
261 mmc_request_done(host->mmc, mrq);
263 pm_runtime_mark_last_busy(mmc_dev(host->mmc));
264 pm_runtime_put_autosuspend(mmc_dev(host->mmc));
267 /* called with host->lock held, interrupts disabled */
268 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
270 struct mmc_request *mrq;
273 spin_lock_irqsave(&host->lock, flags);
276 if (IS_ERR_OR_NULL(mrq)) {
277 spin_unlock_irqrestore(&host->lock, flags);
283 host->force_pio = false;
285 cancel_delayed_work(&host->delayed_reset_work);
288 spin_unlock_irqrestore(&host->lock, flags);
290 if (mrq->cmd->error || (mrq->data && mrq->data->error))
291 tmio_mmc_abort_dma(host);
293 mmc_request_done(host->mmc, mrq);
295 pm_runtime_mark_last_busy(mmc_dev(host->mmc));
296 pm_runtime_put_autosuspend(mmc_dev(host->mmc));
299 static void tmio_mmc_done_work(struct work_struct *work)
301 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
303 tmio_mmc_finish_request(host);
306 /* These are the bitmasks the tmio chip requires to implement the MMC response
307 * types. Note that R1 and R6 are the same in this scheme. */
308 #define APP_CMD 0x0040
309 #define RESP_NONE 0x0300
310 #define RESP_R1 0x0400
311 #define RESP_R1B 0x0500
312 #define RESP_R2 0x0600
313 #define RESP_R3 0x0700
314 #define DATA_PRESENT 0x0800
315 #define TRANSFER_READ 0x1000
316 #define TRANSFER_MULTI 0x2000
317 #define SECURITY_CMD 0x4000
318 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
320 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
322 struct mmc_data *data = host->data;
324 u32 irq_mask = TMIO_MASK_CMD;
326 /* CMD12 is handled by hardware */
327 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
328 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x001);
332 switch (mmc_resp_type(cmd)) {
333 case MMC_RSP_NONE: c |= RESP_NONE; break;
334 case MMC_RSP_R1: c |= RESP_R1; break;
335 case MMC_RSP_R1B: c |= RESP_R1B; break;
336 case MMC_RSP_R2: c |= RESP_R2; break;
337 case MMC_RSP_R3: c |= RESP_R3; break;
339 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
345 /* FIXME - this seems to be ok commented out but the spec suggest this bit
346 * should be set when issuing app commands.
347 * if(cmd->flags & MMC_FLAG_ACMD)
352 if (data->blocks > 1) {
353 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x100);
357 * Disable auto CMD12 at IO_RW_EXTENDED when
358 * multiple block transfer
360 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
361 (cmd->opcode == SD_IO_RW_EXTENDED))
364 if (data->flags & MMC_DATA_READ)
368 if (!host->native_hotplug)
369 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
370 tmio_mmc_enable_mmc_irqs(host, irq_mask);
372 /* Fire off the command */
373 sd_ctrl_write32(host, CTL_ARG_REG, cmd->arg);
374 sd_ctrl_write16(host, CTL_SD_CMD, c);
380 * This chip always returns (at least?) as much data as you ask for.
381 * I'm unsure what happens if you ask for less than a block. This should be
382 * looked into to ensure that a funny length read doesn't hose the controller.
384 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
386 struct mmc_data *data = host->data;
392 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
393 pr_err("PIO IRQ in DMA mode!\n");
396 pr_debug("Spurious PIO IRQ\n");
400 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
401 buf = (unsigned short *)(sg_virt + host->sg_off);
403 count = host->sg_ptr->length - host->sg_off;
404 if (count > data->blksz)
407 pr_debug("count: %08x offset: %08x flags %08x\n",
408 count, host->sg_off, data->flags);
410 /* Transfer the data */
411 if (data->flags & MMC_DATA_READ)
412 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
414 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
416 host->sg_off += count;
418 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
420 if (host->sg_off == host->sg_ptr->length)
421 tmio_mmc_next_sg(host);
426 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
428 if (host->sg_ptr == &host->bounce_sg) {
430 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
431 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
432 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
436 /* needs to be called with host->lock held */
437 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
439 struct mmc_data *data = host->data;
440 struct mmc_command *stop;
445 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
450 /* FIXME - return correct transfer count on errors */
452 data->bytes_xfered = data->blocks * data->blksz;
454 data->bytes_xfered = 0;
456 pr_debug("Completed data request\n");
459 * FIXME: other drivers allow an optional stop command of any given type
460 * which we dont do, as the chip can auto generate them.
461 * Perhaps we can be smarter about when to use auto CMD12 and
462 * only issue the auto request when we know this is the desired
463 * stop command, allowing fallback to the stop command the
464 * upper layers expect. For now, we do what works.
467 if (data->flags & MMC_DATA_READ) {
468 if (host->chan_rx && !host->force_pio)
469 tmio_mmc_check_bounce_buffer(host);
470 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
473 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
478 if (stop->opcode == MMC_STOP_TRANSMISSION && !stop->arg)
479 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0x000);
484 schedule_work(&host->done);
487 static void tmio_mmc_data_irq(struct tmio_mmc_host *host)
489 struct mmc_data *data;
490 spin_lock(&host->lock);
496 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
497 u32 status = sd_ctrl_read32(host, CTL_STATUS);
501 * Has all data been written out yet? Testing on SuperH showed,
502 * that in most cases the first interrupt comes already with the
503 * BUSY status bit clear, but on some operations, like mount or
504 * in the beginning of a write / sync / umount, there is one
505 * DATAEND interrupt with the BUSY bit set, in this cases
506 * waiting for one more interrupt fixes the problem.
508 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
509 if (status & TMIO_STAT_ILL_FUNC)
512 if (!(status & TMIO_STAT_CMD_BUSY))
517 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
518 tasklet_schedule(&host->dma_complete);
520 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
521 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
522 tasklet_schedule(&host->dma_complete);
524 tmio_mmc_do_data_irq(host);
525 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
528 spin_unlock(&host->lock);
531 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
534 struct mmc_command *cmd = host->cmd;
537 spin_lock(&host->lock);
540 pr_debug("Spurious CMD irq\n");
546 /* This controller is sicker than the PXA one. Not only do we need to
547 * drop the top 8 bits of the first response word, we also need to
548 * modify the order of the response for short response command types.
551 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
552 cmd->resp[i] = sd_ctrl_read32(host, addr);
554 if (cmd->flags & MMC_RSP_136) {
555 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
556 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
557 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
559 } else if (cmd->flags & MMC_RSP_R3) {
560 cmd->resp[0] = cmd->resp[3];
563 if (stat & TMIO_STAT_CMDTIMEOUT)
564 cmd->error = -ETIMEDOUT;
565 else if (stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC)
566 cmd->error = -EILSEQ;
568 /* If there is data to handle we enable data IRQs here, and
569 * we will ultimatley finish the request in the data_end handler.
570 * If theres no data or we encountered an error, finish now.
572 if (host->data && !cmd->error) {
573 if (host->data->flags & MMC_DATA_READ) {
574 if (host->force_pio || !host->chan_rx)
575 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
577 tasklet_schedule(&host->dma_issue);
579 if (host->force_pio || !host->chan_tx)
580 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
582 tasklet_schedule(&host->dma_issue);
585 schedule_work(&host->done);
589 spin_unlock(&host->lock);
592 static void tmio_mmc_card_irq_status(struct tmio_mmc_host *host,
593 int *ireg, int *status)
595 *status = sd_ctrl_read32(host, CTL_STATUS);
596 *ireg = *status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
598 pr_debug_status(*status);
599 pr_debug_status(*ireg);
601 /* Clear the status except the interrupt status */
602 sd_ctrl_write32(host, CTL_STATUS, TMIO_MASK_IRQ);
605 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
606 int ireg, int status)
608 struct mmc_host *mmc = host->mmc;
610 /* Card insert / remove attempts */
611 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
612 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
613 TMIO_STAT_CARD_REMOVE);
614 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
615 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
616 !work_pending(&mmc->detect.work))
617 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
624 irqreturn_t tmio_mmc_card_detect_irq(int irq, void *devid)
626 unsigned int ireg, status;
627 struct tmio_mmc_host *host = devid;
629 tmio_mmc_card_irq_status(host, &ireg, &status);
630 __tmio_mmc_card_detect_irq(host, ireg, status);
634 EXPORT_SYMBOL(tmio_mmc_card_detect_irq);
636 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
637 int ireg, int status)
639 /* Command completion */
640 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
641 tmio_mmc_ack_mmc_irqs(host,
642 TMIO_STAT_CMDRESPEND |
643 TMIO_STAT_CMDTIMEOUT);
644 tmio_mmc_cmd_irq(host, status);
649 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
650 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
651 tmio_mmc_pio_irq(host);
655 /* Data transfer completion */
656 if (ireg & TMIO_STAT_DATAEND) {
657 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
658 tmio_mmc_data_irq(host);
665 irqreturn_t tmio_mmc_sdcard_irq(int irq, void *devid)
667 unsigned int ireg, status;
668 struct tmio_mmc_host *host = devid;
670 tmio_mmc_card_irq_status(host, &ireg, &status);
671 __tmio_mmc_sdcard_irq(host, ireg, status);
675 EXPORT_SYMBOL(tmio_mmc_sdcard_irq);
677 irqreturn_t tmio_mmc_sdio_irq(int irq, void *devid)
679 struct tmio_mmc_host *host = devid;
680 struct mmc_host *mmc = host->mmc;
681 struct tmio_mmc_data *pdata = host->pdata;
682 unsigned int ireg, status;
683 unsigned int sdio_status;
685 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
688 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
689 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdcard_irq_mask;
691 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
692 if (pdata->flags & TMIO_MMC_SDIO_STATUS_QUIRK)
695 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
697 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
698 mmc_signal_sdio_irq(mmc);
702 EXPORT_SYMBOL(tmio_mmc_sdio_irq);
704 irqreturn_t tmio_mmc_irq(int irq, void *devid)
706 struct tmio_mmc_host *host = devid;
707 unsigned int ireg, status;
709 pr_debug("MMC IRQ begin\n");
711 tmio_mmc_card_irq_status(host, &ireg, &status);
712 if (__tmio_mmc_card_detect_irq(host, ireg, status))
714 if (__tmio_mmc_sdcard_irq(host, ireg, status))
717 tmio_mmc_sdio_irq(irq, devid);
721 EXPORT_SYMBOL(tmio_mmc_irq);
723 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
724 struct mmc_data *data)
726 struct tmio_mmc_data *pdata = host->pdata;
728 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
729 data->blksz, data->blocks);
731 /* Some hardware cannot perform 2 byte requests in 4 bit mode */
732 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4) {
733 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
735 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
736 pr_err("%s: %d byte block unsupported in 4 bit mode\n",
737 mmc_hostname(host->mmc), data->blksz);
742 tmio_mmc_init_sg(host, data);
745 /* Set transfer length / blocksize */
746 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
747 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
749 tmio_mmc_start_dma(host, data);
754 /* Process requests from the MMC layer */
755 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
757 struct tmio_mmc_host *host = mmc_priv(mmc);
761 spin_lock_irqsave(&host->lock, flags);
764 pr_debug("request not null\n");
765 if (IS_ERR(host->mrq)) {
766 spin_unlock_irqrestore(&host->lock, flags);
767 mrq->cmd->error = -EAGAIN;
768 mmc_request_done(mmc, mrq);
773 host->last_req_ts = jiffies;
777 spin_unlock_irqrestore(&host->lock, flags);
779 pm_runtime_get_sync(mmc_dev(mmc));
782 ret = tmio_mmc_start_data(host, mrq->data);
787 ret = tmio_mmc_start_command(host, mrq->cmd);
789 schedule_delayed_work(&host->delayed_reset_work,
790 msecs_to_jiffies(2000));
795 host->force_pio = false;
797 mrq->cmd->error = ret;
798 mmc_request_done(mmc, mrq);
800 pm_runtime_mark_last_busy(mmc_dev(mmc));
801 pm_runtime_put_autosuspend(mmc_dev(mmc));
804 static int tmio_mmc_clk_update(struct tmio_mmc_host *host)
806 struct mmc_host *mmc = host->mmc;
807 struct tmio_mmc_data *pdata = host->pdata;
810 if (!pdata->clk_enable)
813 ret = pdata->clk_enable(host->pdev, &mmc->f_max);
815 mmc->f_min = mmc->f_max / 512;
820 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
822 struct mmc_host *mmc = host->mmc;
825 /* .set_ios() is returning void, so, no chance to report an error */
828 host->set_pwr(host->pdev, 1);
830 if (!IS_ERR(mmc->supply.vmmc)) {
831 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
833 * Attention: empiric value. With a b43 WiFi SDIO card this
834 * delay proved necessary for reliable card-insertion probing.
835 * 100us were not enough. Is this the same 140us delay, as in
836 * tmio_mmc_set_ios()?
841 * It seems, VccQ should be switched on after Vcc, this is also what the
842 * omap_hsmmc.c driver does.
844 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
845 ret = regulator_enable(mmc->supply.vqmmc);
850 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
854 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
856 struct mmc_host *mmc = host->mmc;
858 if (!IS_ERR(mmc->supply.vqmmc))
859 regulator_disable(mmc->supply.vqmmc);
861 if (!IS_ERR(mmc->supply.vmmc))
862 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
865 host->set_pwr(host->pdev, 0);
868 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
869 unsigned char bus_width)
872 case MMC_BUS_WIDTH_1:
873 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x80e0);
875 case MMC_BUS_WIDTH_4:
876 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, 0x00e0);
881 /* Set MMC clock / power.
882 * Note: This controller uses a simple divider scheme therefore it cannot
883 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
884 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
887 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
889 struct tmio_mmc_host *host = mmc_priv(mmc);
890 struct device *dev = &host->pdev->dev;
893 pm_runtime_get_sync(mmc_dev(mmc));
895 mutex_lock(&host->ios_lock);
897 spin_lock_irqsave(&host->lock, flags);
899 if (IS_ERR(host->mrq)) {
901 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
902 current->comm, task_pid_nr(current),
903 ios->clock, ios->power_mode);
904 host->mrq = ERR_PTR(-EINTR);
907 "%s.%d: CMD%u active since %lu, now %lu!\n",
908 current->comm, task_pid_nr(current),
909 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
911 spin_unlock_irqrestore(&host->lock, flags);
913 mutex_unlock(&host->ios_lock);
917 host->mrq = ERR_PTR(-EBUSY);
919 spin_unlock_irqrestore(&host->lock, flags);
921 switch (ios->power_mode) {
923 tmio_mmc_power_off(host);
924 tmio_mmc_clk_stop(host);
927 tmio_mmc_set_clock(host, ios->clock);
928 tmio_mmc_power_on(host, ios->vdd);
929 tmio_mmc_clk_start(host);
930 tmio_mmc_set_bus_width(host, ios->bus_width);
933 tmio_mmc_set_clock(host, ios->clock);
934 tmio_mmc_clk_start(host);
935 tmio_mmc_set_bus_width(host, ios->bus_width);
939 /* Let things settle. delay taken from winCE driver */
941 if (PTR_ERR(host->mrq) == -EINTR)
942 dev_dbg(&host->pdev->dev,
943 "%s.%d: IOS interrupted: clk %u, mode %u",
944 current->comm, task_pid_nr(current),
945 ios->clock, ios->power_mode);
948 host->clk_cache = ios->clock;
950 mutex_unlock(&host->ios_lock);
952 pm_runtime_mark_last_busy(mmc_dev(mmc));
953 pm_runtime_put_autosuspend(mmc_dev(mmc));
956 static int tmio_mmc_get_ro(struct mmc_host *mmc)
958 struct tmio_mmc_host *host = mmc_priv(mmc);
959 struct tmio_mmc_data *pdata = host->pdata;
960 int ret = mmc_gpio_get_ro(mmc);
964 pm_runtime_get_sync(mmc_dev(mmc));
965 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
966 (sd_ctrl_read32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
967 pm_runtime_mark_last_busy(mmc_dev(mmc));
968 pm_runtime_put_autosuspend(mmc_dev(mmc));
973 static int tmio_multi_io_quirk(struct mmc_card *card,
974 unsigned int direction, int blk_size)
976 struct tmio_mmc_host *host = mmc_priv(card->host);
977 struct tmio_mmc_data *pdata = host->pdata;
979 if (pdata->multi_io_quirk)
980 return pdata->multi_io_quirk(card, direction, blk_size);
985 static const struct mmc_host_ops tmio_mmc_ops = {
986 .request = tmio_mmc_request,
987 .set_ios = tmio_mmc_set_ios,
988 .get_ro = tmio_mmc_get_ro,
989 .get_cd = mmc_gpio_get_cd,
990 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
991 .multi_io_quirk = tmio_multi_io_quirk,
994 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
996 struct tmio_mmc_data *pdata = host->pdata;
997 struct mmc_host *mmc = host->mmc;
999 mmc_regulator_get_supply(mmc);
1001 /* use ocr_mask if no regulator */
1002 if (!mmc->ocr_avail)
1003 mmc->ocr_avail = pdata->ocr_mask;
1007 * There is possibility that regulator has not been probed
1009 if (!mmc->ocr_avail)
1010 return -EPROBE_DEFER;
1015 static void tmio_mmc_of_parse(struct platform_device *pdev,
1016 struct tmio_mmc_data *pdata)
1018 const struct device_node *np = pdev->dev.of_node;
1022 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1023 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1026 int tmio_mmc_host_probe(struct tmio_mmc_host **host,
1027 struct platform_device *pdev,
1028 struct tmio_mmc_data *pdata)
1030 struct tmio_mmc_host *_host;
1031 struct mmc_host *mmc;
1032 struct resource *res_ctl;
1034 u32 irq_mask = TMIO_MASK_CMD;
1036 tmio_mmc_of_parse(pdev, pdata);
1038 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1039 pdata->write16_hook = NULL;
1041 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1045 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1049 ret = mmc_of_parse(mmc);
1053 pdata->dev = &pdev->dev;
1054 _host = mmc_priv(mmc);
1055 _host->pdata = pdata;
1058 platform_set_drvdata(pdev, mmc);
1060 _host->set_pwr = pdata->set_pwr;
1061 _host->set_clk_div = pdata->set_clk_div;
1063 ret = tmio_mmc_init_ocr(_host);
1067 _host->ctl = ioremap(res_ctl->start, resource_size(res_ctl));
1073 mmc->ops = &tmio_mmc_ops;
1074 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1075 mmc->caps2 |= pdata->capabilities2;
1077 mmc->max_blk_size = 512;
1078 mmc->max_blk_count = (PAGE_CACHE_SIZE / mmc->max_blk_size) *
1080 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1081 mmc->max_seg_size = mmc->max_req_size;
1083 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1084 mmc->caps & MMC_CAP_NEEDS_POLL ||
1085 mmc->caps & MMC_CAP_NONREMOVABLE ||
1086 mmc->slot.cd_irq >= 0);
1088 if (tmio_mmc_clk_update(_host) < 0) {
1089 mmc->f_max = pdata->hclk;
1090 mmc->f_min = mmc->f_max / 512;
1094 * While using internal tmio hardware logic for card detection, we need
1095 * to ensure it stays powered for it to work.
1097 if (_host->native_hotplug)
1098 pm_runtime_get_noresume(&pdev->dev);
1100 tmio_mmc_clk_stop(_host);
1101 tmio_mmc_reset(_host);
1103 _host->sdcard_irq_mask = sd_ctrl_read32(_host, CTL_IRQ_MASK);
1104 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1106 /* Unmask the IRQs we want to know about */
1107 if (!_host->chan_rx)
1108 irq_mask |= TMIO_MASK_READOP;
1109 if (!_host->chan_tx)
1110 irq_mask |= TMIO_MASK_WRITEOP;
1111 if (!_host->native_hotplug)
1112 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1114 _host->sdcard_irq_mask &= ~irq_mask;
1116 _host->sdio_irq_enabled = false;
1117 if (pdata->flags & TMIO_MMC_SDIO_IRQ) {
1118 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1119 sd_ctrl_write16(_host, CTL_SDIO_IRQ_MASK, _host->sdio_irq_mask);
1120 sd_ctrl_write16(_host, CTL_TRANSACTION_CTL, 0x0000);
1123 spin_lock_init(&_host->lock);
1124 mutex_init(&_host->ios_lock);
1126 /* Init delayed work for request timeouts */
1127 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1128 INIT_WORK(&_host->done, tmio_mmc_done_work);
1130 /* See if we also get DMA */
1131 tmio_mmc_request_dma(_host, pdata);
1133 pm_runtime_set_active(&pdev->dev);
1134 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1135 pm_runtime_use_autosuspend(&pdev->dev);
1136 pm_runtime_enable(&pdev->dev);
1138 ret = mmc_add_host(mmc);
1140 tmio_mmc_host_remove(_host);
1144 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1146 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1147 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1149 tmio_mmc_host_remove(_host);
1163 EXPORT_SYMBOL(tmio_mmc_host_probe);
1165 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1167 struct platform_device *pdev = host->pdev;
1168 struct mmc_host *mmc = host->mmc;
1170 if (!host->native_hotplug)
1171 pm_runtime_get_sync(&pdev->dev);
1173 dev_pm_qos_hide_latency_limit(&pdev->dev);
1175 mmc_remove_host(mmc);
1176 cancel_work_sync(&host->done);
1177 cancel_delayed_work_sync(&host->delayed_reset_work);
1178 tmio_mmc_release_dma(host);
1180 pm_runtime_put_sync(&pdev->dev);
1181 pm_runtime_disable(&pdev->dev);
1186 EXPORT_SYMBOL(tmio_mmc_host_remove);
1189 int tmio_mmc_host_runtime_suspend(struct device *dev)
1191 struct mmc_host *mmc = dev_get_drvdata(dev);
1192 struct tmio_mmc_host *host = mmc_priv(mmc);
1194 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1196 if (host->clk_cache)
1197 tmio_mmc_clk_stop(host);
1199 if (host->pdata->clk_disable)
1200 host->pdata->clk_disable(host->pdev);
1204 EXPORT_SYMBOL(tmio_mmc_host_runtime_suspend);
1206 int tmio_mmc_host_runtime_resume(struct device *dev)
1208 struct mmc_host *mmc = dev_get_drvdata(dev);
1209 struct tmio_mmc_host *host = mmc_priv(mmc);
1211 tmio_mmc_reset(host);
1212 tmio_mmc_clk_update(host);
1214 if (host->clk_cache) {
1215 tmio_mmc_set_clock(host, host->clk_cache);
1216 tmio_mmc_clk_start(host);
1219 tmio_mmc_enable_dma(host, true);
1223 EXPORT_SYMBOL(tmio_mmc_host_runtime_resume);
1226 MODULE_LICENSE("GPL v2");