2 * Driver for the MMC / SD / SDIO IP found in:
4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6 * Copyright (C) 2016 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2015-16 Renesas Electronics Corporation
8 * Copyright (C) 2011 Guennadi Liakhovetski
9 * Copyright (C) 2007 Ian Molton
10 * Copyright (C) 2004 Ian Molton
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
16 * This driver draws mainly on scattered spec sheets, Reverse engineering
17 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
18 * support). (Further 4 bit support from a later datasheet).
21 * Investigate using a workqueue for PIO transfers
23 * Better Power management
24 * Handle MMC errors better
25 * double buffer support
29 #include <linux/delay.h>
30 #include <linux/device.h>
31 #include <linux/highmem.h>
32 #include <linux/interrupt.h>
34 #include <linux/irq.h>
35 #include <linux/mfd/tmio.h>
36 #include <linux/mmc/card.h>
37 #include <linux/mmc/host.h>
38 #include <linux/mmc/mmc.h>
39 #include <linux/mmc/slot-gpio.h>
40 #include <linux/module.h>
41 #include <linux/pagemap.h>
42 #include <linux/platform_device.h>
43 #include <linux/pm_qos.h>
44 #include <linux/pm_runtime.h>
45 #include <linux/regulator/consumer.h>
46 #include <linux/mmc/sdio.h>
47 #include <linux/scatterlist.h>
48 #include <linux/spinlock.h>
49 #include <linux/workqueue.h>
53 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
54 struct mmc_data *data)
57 host->dma_ops->start(host, data);
60 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
63 host->dma_ops->enable(host, enable);
66 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
67 struct tmio_mmc_data *pdata)
70 host->dma_ops->request(host, pdata);
77 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
80 host->dma_ops->release(host);
83 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
86 host->dma_ops->abort(host);
89 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
91 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
92 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
94 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
96 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
98 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
99 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
101 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
103 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
105 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
108 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
110 host->sg_len = data->sg_len;
111 host->sg_ptr = data->sg;
112 host->sg_orig = data->sg;
116 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
118 host->sg_ptr = sg_next(host->sg_ptr);
120 return --host->sg_len;
123 #define CMDREQ_TIMEOUT 5000
125 #ifdef CONFIG_MMC_DEBUG
127 #define STATUS_TO_TEXT(a, status, i) \
129 if (status & TMIO_STAT_##a) { \
136 static void pr_debug_status(u32 status)
139 pr_debug("status: %08x = ", status);
140 STATUS_TO_TEXT(CARD_REMOVE, status, i);
141 STATUS_TO_TEXT(CARD_INSERT, status, i);
142 STATUS_TO_TEXT(SIGSTATE, status, i);
143 STATUS_TO_TEXT(WRPROTECT, status, i);
144 STATUS_TO_TEXT(CARD_REMOVE_A, status, i);
145 STATUS_TO_TEXT(CARD_INSERT_A, status, i);
146 STATUS_TO_TEXT(SIGSTATE_A, status, i);
147 STATUS_TO_TEXT(CMD_IDX_ERR, status, i);
148 STATUS_TO_TEXT(STOPBIT_ERR, status, i);
149 STATUS_TO_TEXT(ILL_FUNC, status, i);
150 STATUS_TO_TEXT(CMD_BUSY, status, i);
151 STATUS_TO_TEXT(CMDRESPEND, status, i);
152 STATUS_TO_TEXT(DATAEND, status, i);
153 STATUS_TO_TEXT(CRCFAIL, status, i);
154 STATUS_TO_TEXT(DATATIMEOUT, status, i);
155 STATUS_TO_TEXT(CMDTIMEOUT, status, i);
156 STATUS_TO_TEXT(RXOVERFLOW, status, i);
157 STATUS_TO_TEXT(TXUNDERRUN, status, i);
158 STATUS_TO_TEXT(RXRDY, status, i);
159 STATUS_TO_TEXT(TXRQ, status, i);
160 STATUS_TO_TEXT(ILL_ACCESS, status, i);
165 #define pr_debug_status(s) do { } while (0)
168 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
170 struct tmio_mmc_host *host = mmc_priv(mmc);
172 if (enable && !host->sdio_irq_enabled) {
175 /* Keep device active while SDIO irq is enabled */
176 pm_runtime_get_sync(mmc_dev(mmc));
178 host->sdio_irq_enabled = true;
179 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL &
180 ~TMIO_SDIO_STAT_IOIRQ;
182 /* Clear obsolete interrupts before enabling */
183 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
184 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
185 sdio_status |= TMIO_SDIO_SETBITS_MASK;
186 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
188 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
189 } else if (!enable && host->sdio_irq_enabled) {
190 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
191 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
193 host->sdio_irq_enabled = false;
194 pm_runtime_mark_last_busy(mmc_dev(mmc));
195 pm_runtime_put_autosuspend(mmc_dev(mmc));
199 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
201 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
202 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
203 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 1 : 10);
205 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
206 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
211 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
213 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
214 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
218 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
219 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
220 msleep(host->pdata->flags & TMIO_MMC_MIN_RCAR2 ? 5 : 10);
223 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
224 unsigned int new_clock)
228 if (new_clock == 0) {
229 tmio_mmc_clk_stop(host);
233 if (host->clk_update)
234 clock = host->clk_update(host, new_clock) / 512;
236 clock = host->mmc->f_min;
238 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
241 /* 1/1 clock is option */
242 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
245 if (host->set_clk_div)
246 host->set_clk_div(host->pdev, (clk >> 22) & 1);
248 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
249 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
250 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
251 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
254 tmio_mmc_clk_start(host);
257 static void tmio_mmc_reset(struct tmio_mmc_host *host)
259 /* FIXME - should we set stop clock reg here */
260 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
261 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
262 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
264 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
265 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
266 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
269 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
270 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
271 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
276 static void tmio_mmc_reset_work(struct work_struct *work)
278 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
279 delayed_reset_work.work);
280 struct mmc_request *mrq;
283 spin_lock_irqsave(&host->lock, flags);
287 * is request already finished? Since we use a non-blocking
288 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
289 * us, so, have to check for IS_ERR(host->mrq)
291 if (IS_ERR_OR_NULL(mrq)
292 || time_is_after_jiffies(host->last_req_ts +
293 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
294 spin_unlock_irqrestore(&host->lock, flags);
298 dev_warn(&host->pdev->dev,
299 "timeout waiting for hardware interrupt (CMD%u)\n",
303 host->data->error = -ETIMEDOUT;
305 host->cmd->error = -ETIMEDOUT;
307 mrq->cmd->error = -ETIMEDOUT;
311 host->force_pio = false;
313 spin_unlock_irqrestore(&host->lock, flags);
315 tmio_mmc_reset(host);
317 /* Ready for new calls */
320 tmio_mmc_abort_dma(host);
321 mmc_request_done(host->mmc, mrq);
324 /* These are the bitmasks the tmio chip requires to implement the MMC response
325 * types. Note that R1 and R6 are the same in this scheme. */
326 #define APP_CMD 0x0040
327 #define RESP_NONE 0x0300
328 #define RESP_R1 0x0400
329 #define RESP_R1B 0x0500
330 #define RESP_R2 0x0600
331 #define RESP_R3 0x0700
332 #define DATA_PRESENT 0x0800
333 #define TRANSFER_READ 0x1000
334 #define TRANSFER_MULTI 0x2000
335 #define SECURITY_CMD 0x4000
336 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
338 static int tmio_mmc_start_command(struct tmio_mmc_host *host, struct mmc_command *cmd)
340 struct mmc_data *data = host->data;
342 u32 irq_mask = TMIO_MASK_CMD;
344 /* CMD12 is handled by hardware */
345 if (cmd->opcode == MMC_STOP_TRANSMISSION && !cmd->arg) {
346 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_STP);
350 switch (mmc_resp_type(cmd)) {
351 case MMC_RSP_NONE: c |= RESP_NONE; break;
353 case MMC_RSP_R1_NO_CRC:
355 case MMC_RSP_R1B: c |= RESP_R1B; break;
356 case MMC_RSP_R2: c |= RESP_R2; break;
357 case MMC_RSP_R3: c |= RESP_R3; break;
359 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
365 /* FIXME - this seems to be ok commented out but the spec suggest this bit
366 * should be set when issuing app commands.
367 * if(cmd->flags & MMC_FLAG_ACMD)
372 if (data->blocks > 1) {
373 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
377 * Disable auto CMD12 at IO_RW_EXTENDED and SET_BLOCK_COUNT
378 * when doing multiple block transfer
380 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
381 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
384 if (data->flags & MMC_DATA_READ)
388 if (!host->native_hotplug)
389 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
390 tmio_mmc_enable_mmc_irqs(host, irq_mask);
392 /* Fire off the command */
393 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
394 sd_ctrl_write16(host, CTL_SD_CMD, c);
399 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
403 int is_read = host->data->flags & MMC_DATA_READ;
409 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
413 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
416 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, (u32 *)buf,
419 /* if count was multiple of 4 */
423 buf8 = (u8 *)(buf + (count >> 2));
427 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT,
429 memcpy(buf8, data, count);
431 memcpy(data, buf8, count);
432 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT,
440 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
442 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
444 /* if count was even number */
448 /* if count was odd number */
449 buf8 = (u8 *)(buf + (count >> 1));
454 * driver and this function are assuming that
455 * it is used as little endian
458 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
460 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
464 * This chip always returns (at least?) as much data as you ask for.
465 * I'm unsure what happens if you ask for less than a block. This should be
466 * looked into to ensure that a funny length read doesn't hose the controller.
468 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
470 struct mmc_data *data = host->data;
476 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
477 pr_err("PIO IRQ in DMA mode!\n");
480 pr_debug("Spurious PIO IRQ\n");
484 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
485 buf = (unsigned short *)(sg_virt + host->sg_off);
487 count = host->sg_ptr->length - host->sg_off;
488 if (count > data->blksz)
491 pr_debug("count: %08x offset: %08x flags %08x\n",
492 count, host->sg_off, data->flags);
494 /* Transfer the data */
495 tmio_mmc_transfer_data(host, buf, count);
497 host->sg_off += count;
499 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
501 if (host->sg_off == host->sg_ptr->length)
502 tmio_mmc_next_sg(host);
507 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
509 if (host->sg_ptr == &host->bounce_sg) {
511 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
512 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
513 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
517 /* needs to be called with host->lock held */
518 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
520 struct mmc_data *data = host->data;
521 struct mmc_command *stop;
526 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
531 /* FIXME - return correct transfer count on errors */
533 data->bytes_xfered = data->blocks * data->blksz;
535 data->bytes_xfered = 0;
537 pr_debug("Completed data request\n");
540 * FIXME: other drivers allow an optional stop command of any given type
541 * which we dont do, as the chip can auto generate them.
542 * Perhaps we can be smarter about when to use auto CMD12 and
543 * only issue the auto request when we know this is the desired
544 * stop command, allowing fallback to the stop command the
545 * upper layers expect. For now, we do what works.
548 if (data->flags & MMC_DATA_READ) {
549 if (host->chan_rx && !host->force_pio)
550 tmio_mmc_check_bounce_buffer(host);
551 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
554 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
558 if (stop && !host->mrq->sbc) {
559 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
560 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
561 stop->opcode, stop->arg);
563 /* fill in response from auto CMD12 */
564 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
566 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
569 schedule_work(&host->done);
571 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
573 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
575 struct mmc_data *data;
576 spin_lock(&host->lock);
582 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
583 stat & TMIO_STAT_TXUNDERRUN)
584 data->error = -EILSEQ;
585 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
586 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
590 * Has all data been written out yet? Testing on SuperH showed,
591 * that in most cases the first interrupt comes already with the
592 * BUSY status bit clear, but on some operations, like mount or
593 * in the beginning of a write / sync / umount, there is one
594 * DATAEND interrupt with the BUSY bit set, in this cases
595 * waiting for one more interrupt fixes the problem.
597 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
598 if (status & TMIO_STAT_SCLKDIVEN)
601 if (!(status & TMIO_STAT_CMD_BUSY))
606 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
607 complete(&host->dma_dataend);
609 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
610 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
611 complete(&host->dma_dataend);
613 tmio_mmc_do_data_irq(host);
614 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
617 spin_unlock(&host->lock);
620 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host,
623 struct mmc_command *cmd = host->cmd;
626 spin_lock(&host->lock);
629 pr_debug("Spurious CMD irq\n");
633 /* This controller is sicker than the PXA one. Not only do we need to
634 * drop the top 8 bits of the first response word, we also need to
635 * modify the order of the response for short response command types.
638 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
639 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
641 if (cmd->flags & MMC_RSP_136) {
642 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
643 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
644 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
646 } else if (cmd->flags & MMC_RSP_R3) {
647 cmd->resp[0] = cmd->resp[3];
650 if (stat & TMIO_STAT_CMDTIMEOUT)
651 cmd->error = -ETIMEDOUT;
652 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
653 stat & TMIO_STAT_STOPBIT_ERR ||
654 stat & TMIO_STAT_CMD_IDX_ERR)
655 cmd->error = -EILSEQ;
657 /* If there is data to handle we enable data IRQs here, and
658 * we will ultimatley finish the request in the data_end handler.
659 * If theres no data or we encountered an error, finish now.
661 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
662 if (host->data->flags & MMC_DATA_READ) {
663 if (host->force_pio || !host->chan_rx)
664 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
666 tasklet_schedule(&host->dma_issue);
668 if (host->force_pio || !host->chan_tx)
669 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
671 tasklet_schedule(&host->dma_issue);
674 schedule_work(&host->done);
678 spin_unlock(&host->lock);
681 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
682 int ireg, int status)
684 struct mmc_host *mmc = host->mmc;
686 /* Card insert / remove attempts */
687 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
688 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
689 TMIO_STAT_CARD_REMOVE);
690 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
691 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
692 !work_pending(&mmc->detect.work))
693 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
700 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host,
701 int ireg, int status)
703 /* Command completion */
704 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
705 tmio_mmc_ack_mmc_irqs(host,
706 TMIO_STAT_CMDRESPEND |
707 TMIO_STAT_CMDTIMEOUT);
708 tmio_mmc_cmd_irq(host, status);
713 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
714 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
715 tmio_mmc_pio_irq(host);
719 /* Data transfer completion */
720 if (ireg & TMIO_STAT_DATAEND) {
721 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
722 tmio_mmc_data_irq(host, status);
729 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
731 struct mmc_host *mmc = host->mmc;
732 struct tmio_mmc_data *pdata = host->pdata;
733 unsigned int ireg, status;
734 unsigned int sdio_status;
736 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
739 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
740 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
742 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
743 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
744 sdio_status |= TMIO_SDIO_SETBITS_MASK;
746 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
748 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
749 mmc_signal_sdio_irq(mmc);
752 irqreturn_t tmio_mmc_irq(int irq, void *devid)
754 struct tmio_mmc_host *host = devid;
755 unsigned int ireg, status;
757 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
758 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
760 pr_debug_status(status);
761 pr_debug_status(ireg);
763 /* Clear the status except the interrupt status */
764 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
766 if (__tmio_mmc_card_detect_irq(host, ireg, status))
768 if (__tmio_mmc_sdcard_irq(host, ireg, status))
771 __tmio_mmc_sdio_irq(host);
775 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
777 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
778 struct mmc_data *data)
780 struct tmio_mmc_data *pdata = host->pdata;
782 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
783 data->blksz, data->blocks);
785 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
786 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
787 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
788 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
790 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
791 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
792 mmc_hostname(host->mmc), data->blksz);
797 tmio_mmc_init_sg(host, data);
800 /* Set transfer length / blocksize */
801 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
802 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
804 tmio_mmc_start_dma(host, data);
809 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
811 struct tmio_mmc_host *host = mmc_priv(mmc);
814 host->hw_reset(host);
817 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
819 struct tmio_mmc_host *host = mmc_priv(mmc);
822 if (!host->init_tuning || !host->select_tuning)
823 /* Tuning is not supported */
826 host->tap_num = host->init_tuning(host);
828 /* Tuning is not supported */
831 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
832 dev_warn_once(&host->pdev->dev,
833 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
837 bitmap_zero(host->taps, host->tap_num * 2);
839 /* Issue CMD19 twice for each tap */
840 for (i = 0; i < 2 * host->tap_num; i++) {
841 if (host->prepare_tuning)
842 host->prepare_tuning(host, i % host->tap_num);
844 ret = mmc_send_tuning(mmc, opcode, NULL);
845 if (ret && ret != -EILSEQ)
848 set_bit(i, host->taps);
853 ret = host->select_tuning(host);
857 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
858 tmio_mmc_hw_reset(mmc);
864 static void tmio_process_mrq(struct tmio_mmc_host *host, struct mmc_request *mrq)
866 struct mmc_command *cmd;
869 if (mrq->sbc && host->cmd != mrq->sbc) {
874 ret = tmio_mmc_start_data(host, mrq->data);
880 ret = tmio_mmc_start_command(host, cmd);
884 schedule_delayed_work(&host->delayed_reset_work,
885 msecs_to_jiffies(CMDREQ_TIMEOUT));
889 host->force_pio = false;
891 mrq->cmd->error = ret;
892 mmc_request_done(host->mmc, mrq);
895 /* Process requests from the MMC layer */
896 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
898 struct tmio_mmc_host *host = mmc_priv(mmc);
901 spin_lock_irqsave(&host->lock, flags);
904 pr_debug("request not null\n");
905 if (IS_ERR(host->mrq)) {
906 spin_unlock_irqrestore(&host->lock, flags);
907 mrq->cmd->error = -EAGAIN;
908 mmc_request_done(mmc, mrq);
913 host->last_req_ts = jiffies;
917 spin_unlock_irqrestore(&host->lock, flags);
919 tmio_process_mrq(host, mrq);
922 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
924 struct mmc_request *mrq;
927 spin_lock_irqsave(&host->lock, flags);
930 if (IS_ERR_OR_NULL(mrq)) {
931 spin_unlock_irqrestore(&host->lock, flags);
935 /* If not SET_BLOCK_COUNT, clear old data */
936 if (host->cmd != mrq->sbc) {
939 host->force_pio = false;
943 cancel_delayed_work(&host->delayed_reset_work);
945 spin_unlock_irqrestore(&host->lock, flags);
947 if (mrq->cmd->error || (mrq->data && mrq->data->error))
948 tmio_mmc_abort_dma(host);
950 if (host->check_scc_error)
951 host->check_scc_error(host);
953 /* If SET_BLOCK_COUNT, continue with main command */
955 tmio_process_mrq(host, mrq);
959 mmc_request_done(host->mmc, mrq);
962 static void tmio_mmc_done_work(struct work_struct *work)
964 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
966 tmio_mmc_finish_request(host);
969 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
971 if (!host->clk_enable)
974 return host->clk_enable(host);
977 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
979 if (host->clk_disable)
980 host->clk_disable(host);
983 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
985 struct mmc_host *mmc = host->mmc;
988 /* .set_ios() is returning void, so, no chance to report an error */
991 host->set_pwr(host->pdev, 1);
993 if (!IS_ERR(mmc->supply.vmmc)) {
994 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
996 * Attention: empiric value. With a b43 WiFi SDIO card this
997 * delay proved necessary for reliable card-insertion probing.
998 * 100us were not enough. Is this the same 140us delay, as in
999 * tmio_mmc_set_ios()?
1004 * It seems, VccQ should be switched on after Vcc, this is also what the
1005 * omap_hsmmc.c driver does.
1007 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
1008 ret = regulator_enable(mmc->supply.vqmmc);
1013 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
1017 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
1019 struct mmc_host *mmc = host->mmc;
1021 if (!IS_ERR(mmc->supply.vqmmc))
1022 regulator_disable(mmc->supply.vqmmc);
1024 if (!IS_ERR(mmc->supply.vmmc))
1025 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
1028 host->set_pwr(host->pdev, 0);
1031 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
1032 unsigned char bus_width)
1034 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
1035 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
1037 /* reg now applies to MMC_BUS_WIDTH_4 */
1038 if (bus_width == MMC_BUS_WIDTH_1)
1039 reg |= CARD_OPT_WIDTH;
1040 else if (bus_width == MMC_BUS_WIDTH_8)
1041 reg |= CARD_OPT_WIDTH8;
1043 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
1046 /* Set MMC clock / power.
1047 * Note: This controller uses a simple divider scheme therefore it cannot
1048 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
1049 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
1052 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1054 struct tmio_mmc_host *host = mmc_priv(mmc);
1055 struct device *dev = &host->pdev->dev;
1056 unsigned long flags;
1058 mutex_lock(&host->ios_lock);
1060 spin_lock_irqsave(&host->lock, flags);
1062 if (IS_ERR(host->mrq)) {
1064 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
1065 current->comm, task_pid_nr(current),
1066 ios->clock, ios->power_mode);
1067 host->mrq = ERR_PTR(-EINTR);
1070 "%s.%d: CMD%u active since %lu, now %lu!\n",
1071 current->comm, task_pid_nr(current),
1072 host->mrq->cmd->opcode, host->last_req_ts, jiffies);
1074 spin_unlock_irqrestore(&host->lock, flags);
1076 mutex_unlock(&host->ios_lock);
1080 host->mrq = ERR_PTR(-EBUSY);
1082 spin_unlock_irqrestore(&host->lock, flags);
1084 switch (ios->power_mode) {
1086 tmio_mmc_power_off(host);
1087 tmio_mmc_clk_stop(host);
1090 tmio_mmc_power_on(host, ios->vdd);
1091 tmio_mmc_set_clock(host, ios->clock);
1092 tmio_mmc_set_bus_width(host, ios->bus_width);
1095 tmio_mmc_set_clock(host, ios->clock);
1096 tmio_mmc_set_bus_width(host, ios->bus_width);
1100 /* Let things settle. delay taken from winCE driver */
1102 if (PTR_ERR(host->mrq) == -EINTR)
1103 dev_dbg(&host->pdev->dev,
1104 "%s.%d: IOS interrupted: clk %u, mode %u",
1105 current->comm, task_pid_nr(current),
1106 ios->clock, ios->power_mode);
1109 host->clk_cache = ios->clock;
1111 mutex_unlock(&host->ios_lock);
1114 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1116 struct tmio_mmc_host *host = mmc_priv(mmc);
1117 struct tmio_mmc_data *pdata = host->pdata;
1118 int ret = mmc_gpio_get_ro(mmc);
1122 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
1123 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
1128 static int tmio_multi_io_quirk(struct mmc_card *card,
1129 unsigned int direction, int blk_size)
1131 struct tmio_mmc_host *host = mmc_priv(card->host);
1133 if (host->multi_io_quirk)
1134 return host->multi_io_quirk(card, direction, blk_size);
1139 static struct mmc_host_ops tmio_mmc_ops = {
1140 .request = tmio_mmc_request,
1141 .set_ios = tmio_mmc_set_ios,
1142 .get_ro = tmio_mmc_get_ro,
1143 .get_cd = mmc_gpio_get_cd,
1144 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1145 .multi_io_quirk = tmio_multi_io_quirk,
1146 .hw_reset = tmio_mmc_hw_reset,
1147 .execute_tuning = tmio_mmc_execute_tuning,
1150 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1152 struct tmio_mmc_data *pdata = host->pdata;
1153 struct mmc_host *mmc = host->mmc;
1155 mmc_regulator_get_supply(mmc);
1157 /* use ocr_mask if no regulator */
1158 if (!mmc->ocr_avail)
1159 mmc->ocr_avail = pdata->ocr_mask;
1163 * There is possibility that regulator has not been probed
1165 if (!mmc->ocr_avail)
1166 return -EPROBE_DEFER;
1171 static void tmio_mmc_of_parse(struct platform_device *pdev,
1172 struct tmio_mmc_data *pdata)
1174 const struct device_node *np = pdev->dev.of_node;
1178 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1179 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1182 struct tmio_mmc_host*
1183 tmio_mmc_host_alloc(struct platform_device *pdev)
1185 struct tmio_mmc_host *host;
1186 struct mmc_host *mmc;
1188 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1192 host = mmc_priv(mmc);
1198 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1200 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1202 mmc_free_host(host->mmc);
1204 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1206 int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1207 struct tmio_mmc_data *pdata,
1208 const struct tmio_mmc_dma_ops *dma_ops)
1210 struct platform_device *pdev = _host->pdev;
1211 struct mmc_host *mmc = _host->mmc;
1212 struct resource *res_ctl;
1214 u32 irq_mask = TMIO_MASK_CMD;
1216 tmio_mmc_of_parse(pdev, pdata);
1218 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1219 _host->write16_hook = NULL;
1221 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1225 ret = mmc_of_parse(mmc);
1229 _host->pdata = pdata;
1230 platform_set_drvdata(pdev, mmc);
1232 _host->set_pwr = pdata->set_pwr;
1233 _host->set_clk_div = pdata->set_clk_div;
1235 ret = tmio_mmc_init_ocr(_host);
1239 _host->ctl = devm_ioremap(&pdev->dev,
1240 res_ctl->start, resource_size(res_ctl));
1244 tmio_mmc_ops.card_busy = _host->card_busy;
1245 tmio_mmc_ops.start_signal_voltage_switch = _host->start_signal_voltage_switch;
1246 mmc->ops = &tmio_mmc_ops;
1248 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1249 mmc->caps2 |= pdata->capabilities2;
1251 mmc->max_blk_size = 512;
1252 mmc->max_blk_count = (PAGE_SIZE / mmc->max_blk_size) *
1254 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1255 mmc->max_seg_size = mmc->max_req_size;
1257 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1258 mmc->caps & MMC_CAP_NEEDS_POLL ||
1259 !mmc_card_is_removable(mmc));
1262 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1263 * hotplug gets disabled. It seems RuntimePM related yet we need further
1264 * research. Since we are planning a PM overhaul anyway, let's enforce
1265 * for now the device being active by enabling native hotplug always.
1267 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1268 _host->native_hotplug = true;
1270 if (tmio_mmc_clk_enable(_host) < 0) {
1271 mmc->f_max = pdata->hclk;
1272 mmc->f_min = mmc->f_max / 512;
1276 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1277 * looping forever...
1279 if (mmc->f_min == 0)
1283 * While using internal tmio hardware logic for card detection, we need
1284 * to ensure it stays powered for it to work.
1286 if (_host->native_hotplug)
1287 pm_runtime_get_noresume(&pdev->dev);
1289 _host->sdio_irq_enabled = false;
1290 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1291 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1293 tmio_mmc_clk_stop(_host);
1294 tmio_mmc_reset(_host);
1296 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1297 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1299 /* Unmask the IRQs we want to know about */
1300 if (!_host->chan_rx)
1301 irq_mask |= TMIO_MASK_READOP;
1302 if (!_host->chan_tx)
1303 irq_mask |= TMIO_MASK_WRITEOP;
1304 if (!_host->native_hotplug)
1305 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1307 _host->sdcard_irq_mask &= ~irq_mask;
1309 spin_lock_init(&_host->lock);
1310 mutex_init(&_host->ios_lock);
1312 /* Init delayed work for request timeouts */
1313 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1314 INIT_WORK(&_host->done, tmio_mmc_done_work);
1316 /* See if we also get DMA */
1317 _host->dma_ops = dma_ops;
1318 tmio_mmc_request_dma(_host, pdata);
1320 pm_runtime_set_active(&pdev->dev);
1321 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1322 pm_runtime_use_autosuspend(&pdev->dev);
1323 pm_runtime_enable(&pdev->dev);
1325 ret = mmc_add_host(mmc);
1327 tmio_mmc_host_remove(_host);
1331 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1333 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1334 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1336 tmio_mmc_host_remove(_host);
1339 mmc_gpiod_request_cd_irq(mmc);
1344 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1346 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1348 struct platform_device *pdev = host->pdev;
1349 struct mmc_host *mmc = host->mmc;
1351 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1352 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1354 if (!host->native_hotplug)
1355 pm_runtime_get_sync(&pdev->dev);
1357 dev_pm_qos_hide_latency_limit(&pdev->dev);
1359 mmc_remove_host(mmc);
1360 cancel_work_sync(&host->done);
1361 cancel_delayed_work_sync(&host->delayed_reset_work);
1362 tmio_mmc_release_dma(host);
1364 pm_runtime_put_sync(&pdev->dev);
1365 pm_runtime_disable(&pdev->dev);
1367 tmio_mmc_clk_disable(host);
1369 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1372 int tmio_mmc_host_runtime_suspend(struct device *dev)
1374 struct mmc_host *mmc = dev_get_drvdata(dev);
1375 struct tmio_mmc_host *host = mmc_priv(mmc);
1377 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1379 if (host->clk_cache)
1380 tmio_mmc_clk_stop(host);
1382 tmio_mmc_clk_disable(host);
1386 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1388 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1390 return host->tap_num && mmc_can_retune(host->mmc);
1393 int tmio_mmc_host_runtime_resume(struct device *dev)
1395 struct mmc_host *mmc = dev_get_drvdata(dev);
1396 struct tmio_mmc_host *host = mmc_priv(mmc);
1398 tmio_mmc_reset(host);
1399 tmio_mmc_clk_enable(host);
1401 if (host->clk_cache)
1402 tmio_mmc_set_clock(host, host->clk_cache);
1404 tmio_mmc_enable_dma(host, true);
1406 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1407 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1411 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1414 MODULE_LICENSE("GPL v2");