2 * Driver for the MMC / SD / SDIO IP found in:
4 * TC6393XB, TC6391XB, TC6387XB, T7L66XB, ASIC3, SH-Mobile SoCs
6 * Copyright (C) 2015-17 Renesas Electronics Corporation
7 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
8 * Copyright (C) 2017 Horms Solutions, Simon Horman
9 * Copyright (C) 2011 Guennadi Liakhovetski
10 * Copyright (C) 2007 Ian Molton
11 * Copyright (C) 2004 Ian Molton
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
17 * This driver draws mainly on scattered spec sheets, Reverse engineering
18 * of the toshiba e800 SD driver and some parts of the 2.4 ASIC3 driver (4 bit
19 * support). (Further 4 bit support from a later datasheet).
22 * Investigate using a workqueue for PIO transfers
24 * Better Power management
25 * Handle MMC errors better
26 * double buffer support
30 #include <linux/delay.h>
31 #include <linux/device.h>
32 #include <linux/highmem.h>
33 #include <linux/interrupt.h>
35 #include <linux/irq.h>
36 #include <linux/mfd/tmio.h>
37 #include <linux/mmc/card.h>
38 #include <linux/mmc/host.h>
39 #include <linux/mmc/mmc.h>
40 #include <linux/mmc/slot-gpio.h>
41 #include <linux/module.h>
42 #include <linux/pagemap.h>
43 #include <linux/platform_device.h>
44 #include <linux/pm_qos.h>
45 #include <linux/pm_runtime.h>
46 #include <linux/regulator/consumer.h>
47 #include <linux/mmc/sdio.h>
48 #include <linux/scatterlist.h>
49 #include <linux/spinlock.h>
50 #include <linux/swiotlb.h>
51 #include <linux/workqueue.h>
55 static inline void tmio_mmc_start_dma(struct tmio_mmc_host *host,
56 struct mmc_data *data)
59 host->dma_ops->start(host, data);
62 static inline void tmio_mmc_enable_dma(struct tmio_mmc_host *host, bool enable)
65 host->dma_ops->enable(host, enable);
68 static inline void tmio_mmc_request_dma(struct tmio_mmc_host *host,
69 struct tmio_mmc_data *pdata)
72 host->dma_ops->request(host, pdata);
79 static inline void tmio_mmc_release_dma(struct tmio_mmc_host *host)
82 host->dma_ops->release(host);
85 static inline void tmio_mmc_abort_dma(struct tmio_mmc_host *host)
88 host->dma_ops->abort(host);
91 static inline void tmio_mmc_dataend_dma(struct tmio_mmc_host *host)
94 host->dma_ops->dataend(host);
97 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
99 host->sdcard_irq_mask &= ~(i & TMIO_MASK_IRQ);
100 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
102 EXPORT_SYMBOL_GPL(tmio_mmc_enable_mmc_irqs);
104 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i)
106 host->sdcard_irq_mask |= (i & TMIO_MASK_IRQ);
107 sd_ctrl_write32_as_16_and_16(host, CTL_IRQ_MASK, host->sdcard_irq_mask);
109 EXPORT_SYMBOL_GPL(tmio_mmc_disable_mmc_irqs);
111 static void tmio_mmc_ack_mmc_irqs(struct tmio_mmc_host *host, u32 i)
113 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, ~i);
116 static void tmio_mmc_init_sg(struct tmio_mmc_host *host, struct mmc_data *data)
118 host->sg_len = data->sg_len;
119 host->sg_ptr = data->sg;
120 host->sg_orig = data->sg;
124 static int tmio_mmc_next_sg(struct tmio_mmc_host *host)
126 host->sg_ptr = sg_next(host->sg_ptr);
128 return --host->sg_len;
131 #define CMDREQ_TIMEOUT 5000
133 static void tmio_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
135 struct tmio_mmc_host *host = mmc_priv(mmc);
137 if (enable && !host->sdio_irq_enabled) {
140 /* Keep device active while SDIO irq is enabled */
141 pm_runtime_get_sync(mmc_dev(mmc));
143 host->sdio_irq_enabled = true;
144 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL & ~TMIO_SDIO_STAT_IOIRQ;
146 /* Clear obsolete interrupts before enabling */
147 sdio_status = sd_ctrl_read16(host, CTL_SDIO_STATUS) & ~TMIO_SDIO_MASK_ALL;
148 if (host->pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
149 sdio_status |= TMIO_SDIO_SETBITS_MASK;
150 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
152 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
153 } else if (!enable && host->sdio_irq_enabled) {
154 host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
155 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
157 host->sdio_irq_enabled = false;
158 pm_runtime_mark_last_busy(mmc_dev(mmc));
159 pm_runtime_put_autosuspend(mmc_dev(mmc));
163 static void tmio_mmc_clk_start(struct tmio_mmc_host *host)
165 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, CLK_CTL_SCLKEN |
166 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
168 /* HW engineers overrode docs: no sleep needed on R-Car2+ */
169 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
170 usleep_range(10000, 11000);
172 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
173 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0100);
174 usleep_range(10000, 11000);
178 static void tmio_mmc_clk_stop(struct tmio_mmc_host *host)
180 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG) {
181 sd_ctrl_write16(host, CTL_CLK_AND_WAIT_CTL, 0x0000);
182 usleep_range(10000, 11000);
185 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
186 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
188 /* HW engineers overrode docs: no sleep needed on R-Car2+ */
189 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
190 usleep_range(10000, 11000);
193 static void tmio_mmc_set_clock(struct tmio_mmc_host *host,
194 unsigned int new_clock)
198 if (new_clock == 0) {
199 tmio_mmc_clk_stop(host);
203 if (host->clk_update)
204 clock = host->clk_update(host, new_clock) / 512;
206 clock = host->mmc->f_min;
208 for (clk = 0x80000080; new_clock >= (clock << 1); clk >>= 1)
211 /* 1/1 clock is option */
212 if ((host->pdata->flags & TMIO_MMC_CLK_ACTUAL) && ((clk >> 22) & 0x1))
215 if (host->set_clk_div)
216 host->set_clk_div(host->pdev, (clk >> 22) & 1);
218 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, ~CLK_CTL_SCLKEN &
219 sd_ctrl_read16(host, CTL_SD_CARD_CLK_CTL));
220 sd_ctrl_write16(host, CTL_SD_CARD_CLK_CTL, clk & CLK_CTL_DIV_MASK);
221 if (!(host->pdata->flags & TMIO_MMC_MIN_RCAR2))
222 usleep_range(10000, 11000);
224 tmio_mmc_clk_start(host);
227 static void tmio_mmc_reset(struct tmio_mmc_host *host)
229 /* FIXME - should we set stop clock reg here */
230 sd_ctrl_write16(host, CTL_RESET_SD, 0x0000);
231 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
232 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0000);
233 usleep_range(10000, 11000);
234 sd_ctrl_write16(host, CTL_RESET_SD, 0x0001);
235 if (host->pdata->flags & TMIO_MMC_HAVE_HIGH_REG)
236 sd_ctrl_write16(host, CTL_RESET_SDIO, 0x0001);
237 usleep_range(10000, 11000);
239 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ) {
240 sd_ctrl_write16(host, CTL_SDIO_IRQ_MASK, host->sdio_irq_mask);
241 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0001);
246 static void tmio_mmc_reset_work(struct work_struct *work)
248 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
249 delayed_reset_work.work);
250 struct mmc_request *mrq;
253 spin_lock_irqsave(&host->lock, flags);
257 * is request already finished? Since we use a non-blocking
258 * cancel_delayed_work(), it can happen, that a .set_ios() call preempts
259 * us, so, have to check for IS_ERR(host->mrq)
261 if (IS_ERR_OR_NULL(mrq) ||
262 time_is_after_jiffies(host->last_req_ts +
263 msecs_to_jiffies(CMDREQ_TIMEOUT))) {
264 spin_unlock_irqrestore(&host->lock, flags);
268 dev_warn(&host->pdev->dev,
269 "timeout waiting for hardware interrupt (CMD%u)\n",
273 host->data->error = -ETIMEDOUT;
275 host->cmd->error = -ETIMEDOUT;
277 mrq->cmd->error = -ETIMEDOUT;
281 host->force_pio = false;
283 spin_unlock_irqrestore(&host->lock, flags);
285 tmio_mmc_reset(host);
287 /* Ready for new calls */
290 tmio_mmc_abort_dma(host);
291 mmc_request_done(host->mmc, mrq);
294 /* These are the bitmasks the tmio chip requires to implement the MMC response
295 * types. Note that R1 and R6 are the same in this scheme. */
296 #define APP_CMD 0x0040
297 #define RESP_NONE 0x0300
298 #define RESP_R1 0x0400
299 #define RESP_R1B 0x0500
300 #define RESP_R2 0x0600
301 #define RESP_R3 0x0700
302 #define DATA_PRESENT 0x0800
303 #define TRANSFER_READ 0x1000
304 #define TRANSFER_MULTI 0x2000
305 #define SECURITY_CMD 0x4000
306 #define NO_CMD12_ISSUE 0x4000 /* TMIO_MMC_HAVE_CMD12_CTRL */
308 static int tmio_mmc_start_command(struct tmio_mmc_host *host,
309 struct mmc_command *cmd)
311 struct mmc_data *data = host->data;
313 u32 irq_mask = TMIO_MASK_CMD;
315 switch (mmc_resp_type(cmd)) {
316 case MMC_RSP_NONE: c |= RESP_NONE; break;
318 case MMC_RSP_R1_NO_CRC:
320 case MMC_RSP_R1B: c |= RESP_R1B; break;
321 case MMC_RSP_R2: c |= RESP_R2; break;
322 case MMC_RSP_R3: c |= RESP_R3; break;
324 pr_debug("Unknown response type %d\n", mmc_resp_type(cmd));
330 /* FIXME - this seems to be ok commented out but the spec suggest this bit
331 * should be set when issuing app commands.
332 * if(cmd->flags & MMC_FLAG_ACMD)
337 if (data->blocks > 1) {
338 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, TMIO_STOP_SEC);
342 * Disable auto CMD12 at IO_RW_EXTENDED and
343 * SET_BLOCK_COUNT when doing multiple block transfer
345 if ((host->pdata->flags & TMIO_MMC_HAVE_CMD12_CTRL) &&
346 (cmd->opcode == SD_IO_RW_EXTENDED || host->mrq->sbc))
349 if (data->flags & MMC_DATA_READ)
353 if (!host->native_hotplug)
354 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
355 tmio_mmc_enable_mmc_irqs(host, irq_mask);
357 /* Fire off the command */
358 sd_ctrl_write32_as_16_and_16(host, CTL_ARG_REG, cmd->arg);
359 sd_ctrl_write16(host, CTL_SD_CMD, c);
364 static void tmio_mmc_transfer_data(struct tmio_mmc_host *host,
368 int is_read = host->data->flags & MMC_DATA_READ;
374 if (host->pdata->flags & TMIO_MMC_32BIT_DATA_PORT) {
376 u32 *buf32 = (u32 *)buf;
379 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, buf32,
382 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, buf32,
385 /* if count was multiple of 4 */
393 sd_ctrl_read32_rep(host, CTL_SD_DATA_PORT, &data, 1);
394 memcpy(buf32, &data, count);
396 memcpy(&data, buf32, count);
397 sd_ctrl_write32_rep(host, CTL_SD_DATA_PORT, &data, 1);
404 sd_ctrl_read16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
406 sd_ctrl_write16_rep(host, CTL_SD_DATA_PORT, buf, count >> 1);
408 /* if count was even number */
412 /* if count was odd number */
413 buf8 = (u8 *)(buf + (count >> 1));
418 * driver and this function are assuming that
419 * it is used as little endian
422 *buf8 = sd_ctrl_read16(host, CTL_SD_DATA_PORT) & 0xff;
424 sd_ctrl_write16(host, CTL_SD_DATA_PORT, *buf8);
428 * This chip always returns (at least?) as much data as you ask for.
429 * I'm unsure what happens if you ask for less than a block. This should be
430 * looked into to ensure that a funny length read doesn't hose the controller.
432 static void tmio_mmc_pio_irq(struct tmio_mmc_host *host)
434 struct mmc_data *data = host->data;
440 if ((host->chan_tx || host->chan_rx) && !host->force_pio) {
441 pr_err("PIO IRQ in DMA mode!\n");
444 pr_debug("Spurious PIO IRQ\n");
448 sg_virt = tmio_mmc_kmap_atomic(host->sg_ptr, &flags);
449 buf = (unsigned short *)(sg_virt + host->sg_off);
451 count = host->sg_ptr->length - host->sg_off;
452 if (count > data->blksz)
455 pr_debug("count: %08x offset: %08x flags %08x\n",
456 count, host->sg_off, data->flags);
458 /* Transfer the data */
459 tmio_mmc_transfer_data(host, buf, count);
461 host->sg_off += count;
463 tmio_mmc_kunmap_atomic(host->sg_ptr, &flags, sg_virt);
465 if (host->sg_off == host->sg_ptr->length)
466 tmio_mmc_next_sg(host);
469 static void tmio_mmc_check_bounce_buffer(struct tmio_mmc_host *host)
471 if (host->sg_ptr == &host->bounce_sg) {
473 void *sg_vaddr = tmio_mmc_kmap_atomic(host->sg_orig, &flags);
475 memcpy(sg_vaddr, host->bounce_buf, host->bounce_sg.length);
476 tmio_mmc_kunmap_atomic(host->sg_orig, &flags, sg_vaddr);
480 /* needs to be called with host->lock held */
481 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host)
483 struct mmc_data *data = host->data;
484 struct mmc_command *stop;
489 dev_warn(&host->pdev->dev, "Spurious data end IRQ\n");
494 /* FIXME - return correct transfer count on errors */
496 data->bytes_xfered = data->blocks * data->blksz;
498 data->bytes_xfered = 0;
500 pr_debug("Completed data request\n");
503 * FIXME: other drivers allow an optional stop command of any given type
504 * which we dont do, as the chip can auto generate them.
505 * Perhaps we can be smarter about when to use auto CMD12 and
506 * only issue the auto request when we know this is the desired
507 * stop command, allowing fallback to the stop command the
508 * upper layers expect. For now, we do what works.
511 if (data->flags & MMC_DATA_READ) {
512 if (host->chan_rx && !host->force_pio)
513 tmio_mmc_check_bounce_buffer(host);
514 dev_dbg(&host->pdev->dev, "Complete Rx request %p\n",
517 dev_dbg(&host->pdev->dev, "Complete Tx request %p\n",
521 if (stop && !host->mrq->sbc) {
522 if (stop->opcode != MMC_STOP_TRANSMISSION || stop->arg)
523 dev_err(&host->pdev->dev, "unsupported stop: CMD%u,0x%x. We did CMD12,0\n",
524 stop->opcode, stop->arg);
526 /* fill in response from auto CMD12 */
527 stop->resp[0] = sd_ctrl_read16_and_16_as_32(host, CTL_RESPONSE);
529 sd_ctrl_write16(host, CTL_STOP_INTERNAL_ACTION, 0);
532 schedule_work(&host->done);
534 EXPORT_SYMBOL_GPL(tmio_mmc_do_data_irq);
536 static void tmio_mmc_data_irq(struct tmio_mmc_host *host, unsigned int stat)
538 struct mmc_data *data;
540 spin_lock(&host->lock);
546 if (stat & TMIO_STAT_CRCFAIL || stat & TMIO_STAT_STOPBIT_ERR ||
547 stat & TMIO_STAT_TXUNDERRUN)
548 data->error = -EILSEQ;
549 if (host->chan_tx && (data->flags & MMC_DATA_WRITE) && !host->force_pio) {
550 u32 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
554 * Has all data been written out yet? Testing on SuperH showed,
555 * that in most cases the first interrupt comes already with the
556 * BUSY status bit clear, but on some operations, like mount or
557 * in the beginning of a write / sync / umount, there is one
558 * DATAEND interrupt with the BUSY bit set, in this cases
559 * waiting for one more interrupt fixes the problem.
561 if (host->pdata->flags & TMIO_MMC_HAS_IDLE_WAIT) {
562 if (status & TMIO_STAT_SCLKDIVEN)
565 if (!(status & TMIO_STAT_CMD_BUSY))
570 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
571 tmio_mmc_dataend_dma(host);
573 } else if (host->chan_rx && (data->flags & MMC_DATA_READ) && !host->force_pio) {
574 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_DATAEND);
575 tmio_mmc_dataend_dma(host);
577 tmio_mmc_do_data_irq(host);
578 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_READOP | TMIO_MASK_WRITEOP);
581 spin_unlock(&host->lock);
584 static void tmio_mmc_cmd_irq(struct tmio_mmc_host *host, unsigned int stat)
586 struct mmc_command *cmd = host->cmd;
589 spin_lock(&host->lock);
592 pr_debug("Spurious CMD irq\n");
596 /* This controller is sicker than the PXA one. Not only do we need to
597 * drop the top 8 bits of the first response word, we also need to
598 * modify the order of the response for short response command types.
601 for (i = 3, addr = CTL_RESPONSE ; i >= 0 ; i--, addr += 4)
602 cmd->resp[i] = sd_ctrl_read16_and_16_as_32(host, addr);
604 if (cmd->flags & MMC_RSP_136) {
605 cmd->resp[0] = (cmd->resp[0] << 8) | (cmd->resp[1] >> 24);
606 cmd->resp[1] = (cmd->resp[1] << 8) | (cmd->resp[2] >> 24);
607 cmd->resp[2] = (cmd->resp[2] << 8) | (cmd->resp[3] >> 24);
609 } else if (cmd->flags & MMC_RSP_R3) {
610 cmd->resp[0] = cmd->resp[3];
613 if (stat & TMIO_STAT_CMDTIMEOUT)
614 cmd->error = -ETIMEDOUT;
615 else if ((stat & TMIO_STAT_CRCFAIL && cmd->flags & MMC_RSP_CRC) ||
616 stat & TMIO_STAT_STOPBIT_ERR ||
617 stat & TMIO_STAT_CMD_IDX_ERR)
618 cmd->error = -EILSEQ;
620 /* If there is data to handle we enable data IRQs here, and
621 * we will ultimatley finish the request in the data_end handler.
622 * If theres no data or we encountered an error, finish now.
624 if (host->data && (!cmd->error || cmd->error == -EILSEQ)) {
625 if (host->data->flags & MMC_DATA_READ) {
626 if (host->force_pio || !host->chan_rx)
627 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_READOP);
629 tasklet_schedule(&host->dma_issue);
631 if (host->force_pio || !host->chan_tx)
632 tmio_mmc_enable_mmc_irqs(host, TMIO_MASK_WRITEOP);
634 tasklet_schedule(&host->dma_issue);
637 schedule_work(&host->done);
641 spin_unlock(&host->lock);
644 static bool __tmio_mmc_card_detect_irq(struct tmio_mmc_host *host,
645 int ireg, int status)
647 struct mmc_host *mmc = host->mmc;
649 /* Card insert / remove attempts */
650 if (ireg & (TMIO_STAT_CARD_INSERT | TMIO_STAT_CARD_REMOVE)) {
651 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CARD_INSERT |
652 TMIO_STAT_CARD_REMOVE);
653 if ((((ireg & TMIO_STAT_CARD_REMOVE) && mmc->card) ||
654 ((ireg & TMIO_STAT_CARD_INSERT) && !mmc->card)) &&
655 !work_pending(&mmc->detect.work))
656 mmc_detect_change(host->mmc, msecs_to_jiffies(100));
663 static bool __tmio_mmc_sdcard_irq(struct tmio_mmc_host *host, int ireg,
666 /* Command completion */
667 if (ireg & (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT)) {
668 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_CMDRESPEND |
669 TMIO_STAT_CMDTIMEOUT);
670 tmio_mmc_cmd_irq(host, status);
675 if (ireg & (TMIO_STAT_RXRDY | TMIO_STAT_TXRQ)) {
676 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_RXRDY | TMIO_STAT_TXRQ);
677 tmio_mmc_pio_irq(host);
681 /* Data transfer completion */
682 if (ireg & TMIO_STAT_DATAEND) {
683 tmio_mmc_ack_mmc_irqs(host, TMIO_STAT_DATAEND);
684 tmio_mmc_data_irq(host, status);
691 static void __tmio_mmc_sdio_irq(struct tmio_mmc_host *host)
693 struct mmc_host *mmc = host->mmc;
694 struct tmio_mmc_data *pdata = host->pdata;
695 unsigned int ireg, status;
696 unsigned int sdio_status;
698 if (!(pdata->flags & TMIO_MMC_SDIO_IRQ))
701 status = sd_ctrl_read16(host, CTL_SDIO_STATUS);
702 ireg = status & TMIO_SDIO_MASK_ALL & ~host->sdio_irq_mask;
704 sdio_status = status & ~TMIO_SDIO_MASK_ALL;
705 if (pdata->flags & TMIO_MMC_SDIO_STATUS_SETBITS)
706 sdio_status |= TMIO_SDIO_SETBITS_MASK;
708 sd_ctrl_write16(host, CTL_SDIO_STATUS, sdio_status);
710 if (mmc->caps & MMC_CAP_SDIO_IRQ && ireg & TMIO_SDIO_STAT_IOIRQ)
711 mmc_signal_sdio_irq(mmc);
714 irqreturn_t tmio_mmc_irq(int irq, void *devid)
716 struct tmio_mmc_host *host = devid;
717 unsigned int ireg, status;
719 status = sd_ctrl_read16_and_16_as_32(host, CTL_STATUS);
720 ireg = status & TMIO_MASK_IRQ & ~host->sdcard_irq_mask;
722 /* Clear the status except the interrupt status */
723 sd_ctrl_write32_as_16_and_16(host, CTL_STATUS, TMIO_MASK_IRQ);
725 if (__tmio_mmc_card_detect_irq(host, ireg, status))
727 if (__tmio_mmc_sdcard_irq(host, ireg, status))
730 __tmio_mmc_sdio_irq(host);
734 EXPORT_SYMBOL_GPL(tmio_mmc_irq);
736 static int tmio_mmc_start_data(struct tmio_mmc_host *host,
737 struct mmc_data *data)
739 struct tmio_mmc_data *pdata = host->pdata;
741 pr_debug("setup data transfer: blocksize %08x nr_blocks %d\n",
742 data->blksz, data->blocks);
744 /* Some hardware cannot perform 2 byte requests in 4/8 bit mode */
745 if (host->mmc->ios.bus_width == MMC_BUS_WIDTH_4 ||
746 host->mmc->ios.bus_width == MMC_BUS_WIDTH_8) {
747 int blksz_2bytes = pdata->flags & TMIO_MMC_BLKSZ_2BYTES;
749 if (data->blksz < 2 || (data->blksz < 4 && !blksz_2bytes)) {
750 pr_err("%s: %d byte block unsupported in 4/8 bit mode\n",
751 mmc_hostname(host->mmc), data->blksz);
756 tmio_mmc_init_sg(host, data);
759 /* Set transfer length / blocksize */
760 sd_ctrl_write16(host, CTL_SD_XFER_LEN, data->blksz);
761 sd_ctrl_write16(host, CTL_XFER_BLK_COUNT, data->blocks);
763 tmio_mmc_start_dma(host, data);
768 static void tmio_mmc_hw_reset(struct mmc_host *mmc)
770 struct tmio_mmc_host *host = mmc_priv(mmc);
773 host->hw_reset(host);
776 static int tmio_mmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
778 struct tmio_mmc_host *host = mmc_priv(mmc);
781 if (!host->init_tuning || !host->select_tuning)
782 /* Tuning is not supported */
785 host->tap_num = host->init_tuning(host);
787 /* Tuning is not supported */
790 if (host->tap_num * 2 >= sizeof(host->taps) * BITS_PER_BYTE) {
791 dev_warn_once(&host->pdev->dev,
792 "Too many taps, skipping tuning. Please consider updating size of taps field of tmio_mmc_host\n");
796 bitmap_zero(host->taps, host->tap_num * 2);
798 /* Issue CMD19 twice for each tap */
799 for (i = 0; i < 2 * host->tap_num; i++) {
800 if (host->prepare_tuning)
801 host->prepare_tuning(host, i % host->tap_num);
803 ret = mmc_send_tuning(mmc, opcode, NULL);
804 if (ret && ret != -EILSEQ)
807 set_bit(i, host->taps);
809 usleep_range(1000, 1200);
812 ret = host->select_tuning(host);
816 dev_warn(&host->pdev->dev, "Tuning procedure failed\n");
817 tmio_mmc_hw_reset(mmc);
823 static void tmio_process_mrq(struct tmio_mmc_host *host,
824 struct mmc_request *mrq)
826 struct mmc_command *cmd;
829 if (mrq->sbc && host->cmd != mrq->sbc) {
834 ret = tmio_mmc_start_data(host, mrq->data);
840 ret = tmio_mmc_start_command(host, cmd);
844 schedule_delayed_work(&host->delayed_reset_work,
845 msecs_to_jiffies(CMDREQ_TIMEOUT));
849 host->force_pio = false;
851 mrq->cmd->error = ret;
852 mmc_request_done(host->mmc, mrq);
855 /* Process requests from the MMC layer */
856 static void tmio_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
858 struct tmio_mmc_host *host = mmc_priv(mmc);
861 spin_lock_irqsave(&host->lock, flags);
864 pr_debug("request not null\n");
865 if (IS_ERR(host->mrq)) {
866 spin_unlock_irqrestore(&host->lock, flags);
867 mrq->cmd->error = -EAGAIN;
868 mmc_request_done(mmc, mrq);
873 host->last_req_ts = jiffies;
877 spin_unlock_irqrestore(&host->lock, flags);
879 tmio_process_mrq(host, mrq);
882 static void tmio_mmc_finish_request(struct tmio_mmc_host *host)
884 struct mmc_request *mrq;
887 spin_lock_irqsave(&host->lock, flags);
890 if (IS_ERR_OR_NULL(mrq)) {
891 spin_unlock_irqrestore(&host->lock, flags);
895 /* If not SET_BLOCK_COUNT, clear old data */
896 if (host->cmd != mrq->sbc) {
899 host->force_pio = false;
903 cancel_delayed_work(&host->delayed_reset_work);
905 spin_unlock_irqrestore(&host->lock, flags);
907 if (mrq->cmd->error || (mrq->data && mrq->data->error))
908 tmio_mmc_abort_dma(host);
910 if (host->check_scc_error)
911 host->check_scc_error(host);
913 /* If SET_BLOCK_COUNT, continue with main command */
915 tmio_process_mrq(host, mrq);
919 mmc_request_done(host->mmc, mrq);
922 static void tmio_mmc_done_work(struct work_struct *work)
924 struct tmio_mmc_host *host = container_of(work, struct tmio_mmc_host,
926 tmio_mmc_finish_request(host);
929 static int tmio_mmc_clk_enable(struct tmio_mmc_host *host)
931 if (!host->clk_enable)
934 return host->clk_enable(host);
937 static void tmio_mmc_clk_disable(struct tmio_mmc_host *host)
939 if (host->clk_disable)
940 host->clk_disable(host);
943 static void tmio_mmc_power_on(struct tmio_mmc_host *host, unsigned short vdd)
945 struct mmc_host *mmc = host->mmc;
948 /* .set_ios() is returning void, so, no chance to report an error */
951 host->set_pwr(host->pdev, 1);
953 if (!IS_ERR(mmc->supply.vmmc)) {
954 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, vdd);
956 * Attention: empiric value. With a b43 WiFi SDIO card this
957 * delay proved necessary for reliable card-insertion probing.
958 * 100us were not enough. Is this the same 140us delay, as in
959 * tmio_mmc_set_ios()?
961 usleep_range(200, 300);
964 * It seems, VccQ should be switched on after Vcc, this is also what the
965 * omap_hsmmc.c driver does.
967 if (!IS_ERR(mmc->supply.vqmmc) && !ret) {
968 ret = regulator_enable(mmc->supply.vqmmc);
969 usleep_range(200, 300);
973 dev_dbg(&host->pdev->dev, "Regulators failed to power up: %d\n",
977 static void tmio_mmc_power_off(struct tmio_mmc_host *host)
979 struct mmc_host *mmc = host->mmc;
981 if (!IS_ERR(mmc->supply.vqmmc))
982 regulator_disable(mmc->supply.vqmmc);
984 if (!IS_ERR(mmc->supply.vmmc))
985 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0);
988 host->set_pwr(host->pdev, 0);
991 static void tmio_mmc_set_bus_width(struct tmio_mmc_host *host,
992 unsigned char bus_width)
994 u16 reg = sd_ctrl_read16(host, CTL_SD_MEM_CARD_OPT)
995 & ~(CARD_OPT_WIDTH | CARD_OPT_WIDTH8);
997 /* reg now applies to MMC_BUS_WIDTH_4 */
998 if (bus_width == MMC_BUS_WIDTH_1)
999 reg |= CARD_OPT_WIDTH;
1000 else if (bus_width == MMC_BUS_WIDTH_8)
1001 reg |= CARD_OPT_WIDTH8;
1003 sd_ctrl_write16(host, CTL_SD_MEM_CARD_OPT, reg);
1006 /* Set MMC clock / power.
1007 * Note: This controller uses a simple divider scheme therefore it cannot
1008 * run a MMC card at full speed (20MHz). The max clock is 24MHz on SD, but as
1009 * MMC wont run that fast, it has to be clocked at 12MHz which is the next
1012 static void tmio_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1014 struct tmio_mmc_host *host = mmc_priv(mmc);
1015 struct device *dev = &host->pdev->dev;
1016 unsigned long flags;
1018 mutex_lock(&host->ios_lock);
1020 spin_lock_irqsave(&host->lock, flags);
1022 if (IS_ERR(host->mrq)) {
1024 "%s.%d: concurrent .set_ios(), clk %u, mode %u\n",
1025 current->comm, task_pid_nr(current),
1026 ios->clock, ios->power_mode);
1027 host->mrq = ERR_PTR(-EINTR);
1030 "%s.%d: CMD%u active since %lu, now %lu!\n",
1031 current->comm, task_pid_nr(current),
1032 host->mrq->cmd->opcode, host->last_req_ts,
1035 spin_unlock_irqrestore(&host->lock, flags);
1037 mutex_unlock(&host->ios_lock);
1041 host->mrq = ERR_PTR(-EBUSY);
1043 spin_unlock_irqrestore(&host->lock, flags);
1045 switch (ios->power_mode) {
1047 tmio_mmc_power_off(host);
1048 tmio_mmc_clk_stop(host);
1051 tmio_mmc_power_on(host, ios->vdd);
1052 tmio_mmc_set_clock(host, ios->clock);
1053 tmio_mmc_set_bus_width(host, ios->bus_width);
1056 tmio_mmc_set_clock(host, ios->clock);
1057 tmio_mmc_set_bus_width(host, ios->bus_width);
1061 /* Let things settle. delay taken from winCE driver */
1062 usleep_range(140, 200);
1063 if (PTR_ERR(host->mrq) == -EINTR)
1064 dev_dbg(&host->pdev->dev,
1065 "%s.%d: IOS interrupted: clk %u, mode %u",
1066 current->comm, task_pid_nr(current),
1067 ios->clock, ios->power_mode);
1070 host->clk_cache = ios->clock;
1072 mutex_unlock(&host->ios_lock);
1075 static int tmio_mmc_get_ro(struct mmc_host *mmc)
1077 struct tmio_mmc_host *host = mmc_priv(mmc);
1078 struct tmio_mmc_data *pdata = host->pdata;
1079 int ret = mmc_gpio_get_ro(mmc);
1084 ret = !((pdata->flags & TMIO_MMC_WRPROTECT_DISABLE) ||
1085 (sd_ctrl_read16_and_16_as_32(host, CTL_STATUS) & TMIO_STAT_WRPROTECT));
1090 static int tmio_multi_io_quirk(struct mmc_card *card,
1091 unsigned int direction, int blk_size)
1093 struct tmio_mmc_host *host = mmc_priv(card->host);
1095 if (host->multi_io_quirk)
1096 return host->multi_io_quirk(card, direction, blk_size);
1101 static const struct mmc_host_ops tmio_mmc_ops = {
1102 .request = tmio_mmc_request,
1103 .set_ios = tmio_mmc_set_ios,
1104 .get_ro = tmio_mmc_get_ro,
1105 .get_cd = mmc_gpio_get_cd,
1106 .enable_sdio_irq = tmio_mmc_enable_sdio_irq,
1107 .multi_io_quirk = tmio_multi_io_quirk,
1108 .hw_reset = tmio_mmc_hw_reset,
1109 .execute_tuning = tmio_mmc_execute_tuning,
1112 static int tmio_mmc_init_ocr(struct tmio_mmc_host *host)
1114 struct tmio_mmc_data *pdata = host->pdata;
1115 struct mmc_host *mmc = host->mmc;
1118 err = mmc_regulator_get_supply(mmc);
1122 /* use ocr_mask if no regulator */
1123 if (!mmc->ocr_avail)
1124 mmc->ocr_avail = pdata->ocr_mask;
1128 * There is possibility that regulator has not been probed
1130 if (!mmc->ocr_avail)
1131 return -EPROBE_DEFER;
1136 static void tmio_mmc_of_parse(struct platform_device *pdev,
1137 struct tmio_mmc_data *pdata)
1139 const struct device_node *np = pdev->dev.of_node;
1144 if (of_get_property(np, "toshiba,mmc-wrprotect-disable", NULL))
1145 pdata->flags |= TMIO_MMC_WRPROTECT_DISABLE;
1148 struct tmio_mmc_host*
1149 tmio_mmc_host_alloc(struct platform_device *pdev)
1151 struct tmio_mmc_host *host;
1152 struct mmc_host *mmc;
1154 mmc = mmc_alloc_host(sizeof(struct tmio_mmc_host), &pdev->dev);
1158 host = mmc_priv(mmc);
1161 host->ops = tmio_mmc_ops;
1162 mmc->ops = &host->ops;
1166 EXPORT_SYMBOL_GPL(tmio_mmc_host_alloc);
1168 void tmio_mmc_host_free(struct tmio_mmc_host *host)
1170 mmc_free_host(host->mmc);
1172 EXPORT_SYMBOL_GPL(tmio_mmc_host_free);
1174 int tmio_mmc_host_probe(struct tmio_mmc_host *_host,
1175 struct tmio_mmc_data *pdata,
1176 const struct tmio_mmc_dma_ops *dma_ops)
1178 struct platform_device *pdev = _host->pdev;
1179 struct mmc_host *mmc = _host->mmc;
1180 struct resource *res_ctl;
1182 u32 irq_mask = TMIO_MASK_CMD;
1184 tmio_mmc_of_parse(pdev, pdata);
1186 if (!(pdata->flags & TMIO_MMC_HAS_IDLE_WAIT))
1187 _host->write16_hook = NULL;
1189 res_ctl = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1190 _host->ctl = devm_ioremap_resource(&pdev->dev, res_ctl);
1191 if (IS_ERR(_host->ctl))
1192 return PTR_ERR(_host->ctl);
1194 ret = mmc_of_parse(mmc);
1198 _host->pdata = pdata;
1199 platform_set_drvdata(pdev, _host);
1201 _host->set_pwr = pdata->set_pwr;
1202 _host->set_clk_div = pdata->set_clk_div;
1204 ret = tmio_mmc_init_ocr(_host);
1208 mmc->caps |= MMC_CAP_4_BIT_DATA | pdata->capabilities;
1209 mmc->caps2 |= pdata->capabilities2;
1210 mmc->max_segs = pdata->max_segs ? : 32;
1211 mmc->max_blk_size = 512;
1212 mmc->max_blk_count = pdata->max_blk_count ? :
1213 (PAGE_SIZE / mmc->max_blk_size) * mmc->max_segs;
1214 mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count;
1216 * Since swiotlb has memory size limitation, this will calculate
1217 * the maximum size locally (because we don't have any APIs for it now)
1218 * and check the current max_req_size. And then, this will update
1219 * the max_req_size if needed as a workaround.
1221 if (swiotlb_max_segment()) {
1222 unsigned int max_size = (1 << IO_TLB_SHIFT) * IO_TLB_SEGSIZE;
1224 if (mmc->max_req_size > max_size)
1225 mmc->max_req_size = max_size;
1227 mmc->max_seg_size = mmc->max_req_size;
1229 _host->native_hotplug = !(pdata->flags & TMIO_MMC_USE_GPIO_CD ||
1230 mmc->caps & MMC_CAP_NEEDS_POLL ||
1231 !mmc_card_is_removable(mmc));
1234 * On Gen2+, eMMC with NONREMOVABLE currently fails because native
1235 * hotplug gets disabled. It seems RuntimePM related yet we need further
1236 * research. Since we are planning a PM overhaul anyway, let's enforce
1237 * for now the device being active by enabling native hotplug always.
1239 if (pdata->flags & TMIO_MMC_MIN_RCAR2)
1240 _host->native_hotplug = true;
1242 if (tmio_mmc_clk_enable(_host) < 0) {
1243 mmc->f_max = pdata->hclk;
1244 mmc->f_min = mmc->f_max / 512;
1248 * Check the sanity of mmc->f_min to prevent tmio_mmc_set_clock() from
1249 * looping forever...
1251 if (mmc->f_min == 0)
1255 * While using internal tmio hardware logic for card detection, we need
1256 * to ensure it stays powered for it to work.
1258 if (_host->native_hotplug)
1259 pm_runtime_get_noresume(&pdev->dev);
1261 _host->sdio_irq_enabled = false;
1262 if (pdata->flags & TMIO_MMC_SDIO_IRQ)
1263 _host->sdio_irq_mask = TMIO_SDIO_MASK_ALL;
1265 tmio_mmc_clk_stop(_host);
1266 tmio_mmc_reset(_host);
1268 _host->sdcard_irq_mask = sd_ctrl_read16_and_16_as_32(_host, CTL_IRQ_MASK);
1269 tmio_mmc_disable_mmc_irqs(_host, TMIO_MASK_ALL);
1271 /* Unmask the IRQs we want to know about */
1272 if (!_host->chan_rx)
1273 irq_mask |= TMIO_MASK_READOP;
1274 if (!_host->chan_tx)
1275 irq_mask |= TMIO_MASK_WRITEOP;
1276 if (!_host->native_hotplug)
1277 irq_mask &= ~(TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT);
1279 _host->sdcard_irq_mask &= ~irq_mask;
1281 spin_lock_init(&_host->lock);
1282 mutex_init(&_host->ios_lock);
1284 /* Init delayed work for request timeouts */
1285 INIT_DELAYED_WORK(&_host->delayed_reset_work, tmio_mmc_reset_work);
1286 INIT_WORK(&_host->done, tmio_mmc_done_work);
1288 /* See if we also get DMA */
1289 _host->dma_ops = dma_ops;
1290 tmio_mmc_request_dma(_host, pdata);
1292 pm_runtime_set_active(&pdev->dev);
1293 pm_runtime_set_autosuspend_delay(&pdev->dev, 50);
1294 pm_runtime_use_autosuspend(&pdev->dev);
1295 pm_runtime_enable(&pdev->dev);
1297 ret = mmc_add_host(mmc);
1301 dev_pm_qos_expose_latency_limit(&pdev->dev, 100);
1303 if (pdata->flags & TMIO_MMC_USE_GPIO_CD) {
1304 ret = mmc_gpio_request_cd(mmc, pdata->cd_gpio, 0);
1308 mmc_gpiod_request_cd_irq(mmc);
1314 tmio_mmc_host_remove(_host);
1317 EXPORT_SYMBOL_GPL(tmio_mmc_host_probe);
1319 void tmio_mmc_host_remove(struct tmio_mmc_host *host)
1321 struct platform_device *pdev = host->pdev;
1322 struct mmc_host *mmc = host->mmc;
1324 if (host->pdata->flags & TMIO_MMC_SDIO_IRQ)
1325 sd_ctrl_write16(host, CTL_TRANSACTION_CTL, 0x0000);
1327 if (!host->native_hotplug)
1328 pm_runtime_get_sync(&pdev->dev);
1330 dev_pm_qos_hide_latency_limit(&pdev->dev);
1332 mmc_remove_host(mmc);
1333 cancel_work_sync(&host->done);
1334 cancel_delayed_work_sync(&host->delayed_reset_work);
1335 tmio_mmc_release_dma(host);
1337 pm_runtime_put_sync(&pdev->dev);
1338 pm_runtime_disable(&pdev->dev);
1340 tmio_mmc_clk_disable(host);
1342 EXPORT_SYMBOL_GPL(tmio_mmc_host_remove);
1345 int tmio_mmc_host_runtime_suspend(struct device *dev)
1347 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1349 tmio_mmc_disable_mmc_irqs(host, TMIO_MASK_ALL);
1351 if (host->clk_cache)
1352 tmio_mmc_clk_stop(host);
1354 tmio_mmc_clk_disable(host);
1358 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_suspend);
1360 static bool tmio_mmc_can_retune(struct tmio_mmc_host *host)
1362 return host->tap_num && mmc_can_retune(host->mmc);
1365 int tmio_mmc_host_runtime_resume(struct device *dev)
1367 struct tmio_mmc_host *host = dev_get_drvdata(dev);
1369 tmio_mmc_reset(host);
1370 tmio_mmc_clk_enable(host);
1372 if (host->clk_cache)
1373 tmio_mmc_set_clock(host, host->clk_cache);
1375 tmio_mmc_enable_dma(host, true);
1377 if (tmio_mmc_can_retune(host) && host->select_tuning(host))
1378 dev_warn(&host->pdev->dev, "Tuning selection failed\n");
1382 EXPORT_SYMBOL_GPL(tmio_mmc_host_runtime_resume);
1385 MODULE_LICENSE("GPL v2");