drivers/mmc/host/sdricoh_cs.c

   1 /*
   2  *  sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
   3  *     found on some Ricoh RL5c476 II cardbus bridge
   4  *
   5  *  Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License as published by
   9  * the Free Software Foundation; either version 2 of the License, or
  10  * (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20  *
  21  */
  22
  23 /*
  24 #define DEBUG
  25 #define VERBOSE_DEBUG
  26 */
  27 #include <linux/delay.h>
  28 #include <linux/highmem.h>
  29 #include <linux/module.h>
  30 #include <linux/pci.h>
  31 #include <linux/ioport.h>
  32 #include <linux/scatterlist.h>
  33
  34 #include <pcmcia/cistpl.h>
  35 #include <pcmcia/ds.h>
  36 #include <linux/io.h>
  37
  38 #include <linux/mmc/host.h>
  39
  40 #define DRIVER_NAME "sdricoh_cs"
  41
  42 static unsigned int switchlocked;
  43
  44 /* i/o region */
  45 #define SDRICOH_PCI_REGION 0
  46 #define SDRICOH_PCI_REGION_SIZE 0x1000
  47
  48 /* registers */
  49 #define R104_VERSION     0x104
  50 #define R200_CMD         0x200
  51 #define R204_CMD_ARG     0x204
  52 #define R208_DATAIO      0x208
  53 #define R20C_RESP        0x20c
  54 #define R21C_STATUS      0x21c
  55 #define R2E0_INIT        0x2e0
  56 #define R2E4_STATUS_RESP 0x2e4
  57 #define R2F0_RESET       0x2f0
  58 #define R224_MODE        0x224
  59 #define R226_BLOCKSIZE   0x226
  60 #define R228_POWER       0x228
  61 #define R230_DATA        0x230
  62
  63 /* flags for the R21C_STATUS register */
  64 #define STATUS_CMD_FINISHED      0x00000001
  65 #define STATUS_TRANSFER_FINISHED 0x00000004
  66 #define STATUS_CARD_INSERTED     0x00000020
  67 #define STATUS_CARD_LOCKED       0x00000080
  68 #define STATUS_CMD_TIMEOUT       0x00400000
  69 #define STATUS_READY_TO_READ     0x01000000
  70 #define STATUS_READY_TO_WRITE    0x02000000
  71 #define STATUS_BUSY              0x40000000
  72
  73 /* timeouts */
  74 #define INIT_TIMEOUT      100
  75 #define CMD_TIMEOUT       100000
  76 #define TRANSFER_TIMEOUT  100000
  77 #define BUSY_TIMEOUT      32767
  78
  79 /* list of supported pcmcia devices */
  80 static const struct pcmcia_device_id pcmcia_ids[] = {
  81         /* vendor and device strings followed by their crc32 hashes */
  82         PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed,
  83                                 0xc3901202),
  84         PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed,
  85                                 0xace80909),
  86         PCMCIA_DEVICE_NULL,
  87 };
  88
  89 MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids);
  90
  91 /* mmc privdata */
  92 struct sdricoh_host {
  93         struct device *dev;
  94         struct mmc_host *mmc;   /* MMC structure */
  95         unsigned char __iomem *iobase;
  96         struct pci_dev *pci_dev;
  97         int app_cmd;
  98 };
  99
 100 /***************** register i/o helper functions *****************************/
 101
 102 static inline unsigned int sdricoh_readl(struct sdricoh_host *host,
 103                                          unsigned int reg)
 104 {
 105         unsigned int value = readl(host->iobase + reg);
 106         dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value);
 107         return value;
 108 }
 109
 110 static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg,
 111                                   unsigned int value)
 112 {
 113         writel(value, host->iobase + reg);
 114         dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value);
 115
 116 }
 117
 118 static inline unsigned int sdricoh_readw(struct sdricoh_host *host,
 119                                          unsigned int reg)
 120 {
 121         unsigned int value = readw(host->iobase + reg);
 122         dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
 123         return value;
 124 }
 125
 126 static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg,
 127                                          unsigned short value)
 128 {
 129         writew(value, host->iobase + reg);
 130         dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value);
 131 }
 132
 133 static inline unsigned int sdricoh_readb(struct sdricoh_host *host,
 134                                          unsigned int reg)
 135 {
 136         unsigned int value = readb(host->iobase + reg);
 137         dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
 138         return value;
 139 }
 140
 141 static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted,
 142                                 unsigned int timeout){
 143         unsigned int loop;
 144         unsigned int status = 0;
 145         struct device *dev = host->dev;
 146         for (loop = 0; loop < timeout; loop++) {
 147                 status = sdricoh_readl(host, R21C_STATUS);
 148                 sdricoh_writel(host, R2E4_STATUS_RESP, status);
 149                 if (status & wanted)
 150                         break;
 151         }
 152
 153         if (loop == timeout) {
 154                 dev_err(dev, "query_status: timeout waiting for %x\n", wanted);
 155                 return -ETIMEDOUT;
 156         }
 157
 158         /* do not do this check in the loop as some commands fail otherwise */
 159         if (status & 0x7F0000) {
 160                 dev_err(dev, "waiting for status bit %x failed\n", wanted);
 161                 return -EINVAL;
 162         }
 163         return 0;
 164
 165 }
 166
 167 static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode,
 168                            unsigned int arg)
 169 {
 170         unsigned int status;
 171         int result = 0;
 172         unsigned int loop = 0;
 173         /* reset status reg? */
 174         sdricoh_writel(host, R21C_STATUS, 0x18);
 175         /* fill parameters */
 176         sdricoh_writel(host, R204_CMD_ARG, arg);
 177         sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode);
 178         /* wait for command completion */
 179         if (opcode) {
 180                 for (loop = 0; loop < CMD_TIMEOUT; loop++) {
 181                         status = sdricoh_readl(host, R21C_STATUS);
 182                         sdricoh_writel(host, R2E4_STATUS_RESP, status);
 183                         if (status  & STATUS_CMD_FINISHED)
 184                                 break;
 185                 }
 186                 /* don't check for timeout in the loop it is not always
 187                    reset correctly
 188                 */
 189                 if (loop == CMD_TIMEOUT || status & STATUS_CMD_TIMEOUT)
 190                         result = -ETIMEDOUT;
 191
 192         }
 193
 194         return result;
 195
 196 }
 197
 198 static int sdricoh_reset(struct sdricoh_host *host)
 199 {
 200         dev_dbg(host->dev, "reset\n");
 201         sdricoh_writel(host, R2F0_RESET, 0x10001);
 202         sdricoh_writel(host, R2E0_INIT, 0x10000);
 203         if (sdricoh_readl(host, R2E0_INIT) != 0x10000)
 204                 return -EIO;
 205         sdricoh_writel(host, R2E0_INIT, 0x10007);
 206
 207         sdricoh_writel(host, R224_MODE, 0x2000000);
 208         sdricoh_writel(host, R228_POWER, 0xe0);
 209
 210
 211         /* status register ? */
 212         sdricoh_writel(host, R21C_STATUS, 0x18);
 213
 214         return 0;
 215 }
 216
 217 static int sdricoh_blockio(struct sdricoh_host *host, int read,
 218                                 u8 *buf, int len)
 219 {
 220         int size;
 221         u32 data = 0;
 222         /* wait until the data is available */
 223         if (read) {
 224                 if (sdricoh_query_status(host, STATUS_READY_TO_READ,
 225                                                 TRANSFER_TIMEOUT))
 226                         return -ETIMEDOUT;
 227                 sdricoh_writel(host, R21C_STATUS, 0x18);
 228                 /* read data */
 229                 while (len) {
 230                         data = sdricoh_readl(host, R230_DATA);
 231                         size = min(len, 4);
 232                         len -= size;
 233                         while (size) {
 234                                 *buf = data & 0xFF;
 235                                 buf++;
 236                                 data >>= 8;
 237                                 size--;
 238                         }
 239                 }
 240         } else {
 241                 if (sdricoh_query_status(host, STATUS_READY_TO_WRITE,
 242                                                 TRANSFER_TIMEOUT))
 243                         return -ETIMEDOUT;
 244                 sdricoh_writel(host, R21C_STATUS, 0x18);
 245                 /* write data */
 246                 while (len) {
 247                         size = min(len, 4);
 248                         len -= size;
 249                         while (size) {
 250                                 data >>= 8;
 251                                 data |= (u32)*buf << 24;
 252                                 buf++;
 253                                 size--;
 254                         }
 255                         sdricoh_writel(host, R230_DATA, data);
 256                 }
 257         }
 258
 259         return 0;
 260 }
 261
 262 static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq)
 263 {
 264         struct sdricoh_host *host = mmc_priv(mmc);
 265         struct mmc_command *cmd = mrq->cmd;
 266         struct mmc_data *data = cmd->data;
 267         struct device *dev = host->dev;
 268         unsigned char opcode = cmd->opcode;
 269         int i;
 270
 271         dev_dbg(dev, "=============================\n");
 272         dev_dbg(dev, "sdricoh_request opcode=%i\n", opcode);
 273
 274         sdricoh_writel(host, R21C_STATUS, 0x18);
 275
 276         /* MMC_APP_CMDs need some special handling */
 277         if (host->app_cmd) {
 278                 opcode |= 64;
 279                 host->app_cmd = 0;
 280         } else if (opcode == 55)
 281                 host->app_cmd = 1;
 282
 283         /* read/write commands seem to require this */
 284         if (data) {
 285                 sdricoh_writew(host, R226_BLOCKSIZE, data->blksz);
 286                 sdricoh_writel(host, R208_DATAIO, 0);
 287         }
 288
 289         cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg);
 290
 291         /* read response buffer */
 292         if (cmd->flags & MMC_RSP_PRESENT) {
 293                 if (cmd->flags & MMC_RSP_136) {
 294                         /* CRC is stripped so we need to do some shifting. */
 295                         for (i = 0; i < 4; i++) {
 296                                 cmd->resp[i] =
 297                                     sdricoh_readl(host,
 298                                                   R20C_RESP + (3 - i) * 4) << 8;
 299                                 if (i != 3)
 300                                         cmd->resp[i] |=
 301                                             sdricoh_readb(host, R20C_RESP +
 302                                                           (3 - i) * 4 - 1);
 303                         }
 304                 } else
 305                         cmd->resp[0] = sdricoh_readl(host, R20C_RESP);
 306         }
 307
 308         /* transfer data */
 309         if (data && cmd->error == 0) {
 310                 dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i "
 311                         "sg length %i\n", data->blksz, data->blocks,
 312                         data->sg_len, data->sg->length);
 313
 314                 /* enter data reading mode */
 315                 sdricoh_writel(host, R21C_STATUS, 0x837f031e);
 316                 for (i = 0; i < data->blocks; i++) {
 317                         size_t len = data->blksz;
 318                         u8 *buf;
 319                         struct page *page;
 320                         int result;
 321                         page = sg_page(data->sg);
 322
 323                         buf = kmap(page) + data->sg->offset + (len * i);
 324                         result =
 325                                 sdricoh_blockio(host,
 326                                         data->flags & MMC_DATA_READ, buf, len);
 327                         kunmap(page);
 328                         flush_dcache_page(page);
 329                         if (result) {
 330                                 dev_err(dev, "sdricoh_request: cmd %i "
 331                                         "block transfer failed\n", cmd->opcode);
 332                                 cmd->error = result;
 333                                 break;
 334                         } else
 335                                 data->bytes_xfered += len;
 336                 }
 337
 338                 sdricoh_writel(host, R208_DATAIO, 1);
 339
 340                 if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED,
 341                                         TRANSFER_TIMEOUT)) {
 342                         dev_err(dev, "sdricoh_request: transfer end error\n");
 343                         cmd->error = -EINVAL;
 344                 }
 345         }
 346         /* FIXME check busy flag */
 347
 348         mmc_request_done(mmc, mrq);
 349         dev_dbg(dev, "=============================\n");
 350 }
 351
 352 static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
 353 {
 354         struct sdricoh_host *host = mmc_priv(mmc);
 355         dev_dbg(host->dev, "set_ios\n");
 356
 357         if (ios->power_mode == MMC_POWER_ON) {
 358                 sdricoh_writel(host, R228_POWER, 0xc0e0);
 359
 360                 if (ios->bus_width == MMC_BUS_WIDTH_4) {
 361                         sdricoh_writel(host, R224_MODE, 0x2000300);
 362                         sdricoh_writel(host, R228_POWER, 0x40e0);
 363                 } else {
 364                         sdricoh_writel(host, R224_MODE, 0x2000340);
 365                 }
 366
 367         } else if (ios->power_mode == MMC_POWER_UP) {
 368                 sdricoh_writel(host, R224_MODE, 0x2000320);
 369                 sdricoh_writel(host, R228_POWER, 0xe0);
 370         }
 371 }
 372
 373 static int sdricoh_get_ro(struct mmc_host *mmc)
 374 {
 375         struct sdricoh_host *host = mmc_priv(mmc);
 376         unsigned int status;
 377
 378         status = sdricoh_readl(host, R21C_STATUS);
 379         sdricoh_writel(host, R2E4_STATUS_RESP, status);
 380
 381         /* some notebooks seem to have the locked flag switched */
 382         if (switchlocked)
 383                 return !(status & STATUS_CARD_LOCKED);
 384
 385         return (status & STATUS_CARD_LOCKED);
 386 }
 387
 388 static struct mmc_host_ops sdricoh_ops = {
 389         .request = sdricoh_request,
 390         .set_ios = sdricoh_set_ios,
 391         .get_ro = sdricoh_get_ro,
 392 };
 393
 394 /* initialize the control and register it to the mmc framework */
 395 static int sdricoh_init_mmc(struct pci_dev *pci_dev,
 396                             struct pcmcia_device *pcmcia_dev)
 397 {
 398         int result;
 399         void __iomem *iobase;
 400         struct mmc_host *mmc;
 401         struct sdricoh_host *host;
 402         struct device *dev = &pcmcia_dev->dev;
 403         /* map iomem */
 404         if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) !=
 405             SDRICOH_PCI_REGION_SIZE) {
 406                 dev_dbg(dev, "unexpected pci resource len\n");
 407                 return -ENODEV;
 408         }
 409         iobase =
 410             pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE);
 411         if (!iobase) {
 412                 dev_err(dev, "unable to map iobase\n");
 413                 return -ENODEV;
 414         }
 415         /* check version? */
 416         if (readl(iobase + R104_VERSION) != 0x4000) {
 417                 dev_dbg(dev, "no supported mmc controller found\n");
 418                 result = -ENODEV;
 419                 goto unmap_io;
 420         }
 421         /* allocate privdata */
 422         mmc = pcmcia_dev->priv =
 423             mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev);
 424         if (!mmc) {
 425                 dev_err(dev, "mmc_alloc_host failed\n");
 426                 result = -ENOMEM;
 427                 goto unmap_io;
 428         }
 429         host = mmc_priv(mmc);
 430
 431         host->iobase = iobase;
 432         host->dev = dev;
 433         host->pci_dev = pci_dev;
 434
 435         mmc->ops = &sdricoh_ops;
 436
 437         /* FIXME: frequency and voltage handling is done by the controller
 438          */
 439         mmc->f_min = 450000;
 440         mmc->f_max = 24000000;
 441         mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
 442         mmc->caps |= MMC_CAP_4_BIT_DATA;
 443
 444         mmc->max_seg_size = 1024 * 512;
 445         mmc->max_blk_size = 512;
 446
 447         /* reset the controller */
 448         if (sdricoh_reset(host)) {
 449                 dev_dbg(dev, "could not reset\n");
 450                 result = -EIO;
 451                 goto free_host;
 452         }
 453
 454         result = mmc_add_host(mmc);
 455
 456         if (!result) {
 457                 dev_dbg(dev, "mmc host registered\n");
 458                 return 0;
 459         }
 460 free_host:
 461         mmc_free_host(mmc);
 462 unmap_io:
 463         pci_iounmap(pci_dev, iobase);
 464         return result;
 465 }
 466
 467 /* search for supported mmc controllers */
 468 static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev)
 469 {
 470         struct pci_dev *pci_dev = NULL;
 471
 472         dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device"
 473                 " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]);
 474
 475         /* search pci cardbus bridge that contains the mmc controller */
 476         /* the io region is already claimed by yenta_socket... */
 477         while ((pci_dev =
 478                 pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476,
 479                                pci_dev))) {
 480                 /* try to init the device */
 481                 if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) {
 482                         dev_info(&pcmcia_dev->dev, "MMC controller found\n");
 483                         return 0;
 484                 }
 485
 486         }
 487         dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n");
 488         return -ENODEV;
 489 }
 490
 491 static void sdricoh_pcmcia_detach(struct pcmcia_device *link)
 492 {
 493         struct mmc_host *mmc = link->priv;
 494
 495         dev_dbg(&link->dev, "detach\n");
 496
 497         /* remove mmc host */
 498         if (mmc) {
 499                 struct sdricoh_host *host = mmc_priv(mmc);
 500                 mmc_remove_host(mmc);
 501                 pci_iounmap(host->pci_dev, host->iobase);
 502                 pci_dev_put(host->pci_dev);
 503                 mmc_free_host(mmc);
 504         }
 505         pcmcia_disable_device(link);
 506
 507 }
 508
 509 #ifdef CONFIG_PM
 510 static int sdricoh_pcmcia_suspend(struct pcmcia_device *link)
 511 {
 512         dev_dbg(&link->dev, "suspend\n");
 513         return 0;
 514 }
 515
 516 static int sdricoh_pcmcia_resume(struct pcmcia_device *link)
 517 {
 518         struct mmc_host *mmc = link->priv;
 519         dev_dbg(&link->dev, "resume\n");
 520         sdricoh_reset(mmc_priv(mmc));
 521         return 0;
 522 }
 523 #else
 524 #define sdricoh_pcmcia_suspend NULL
 525 #define sdricoh_pcmcia_resume NULL
 526 #endif
 527
 528 static struct pcmcia_driver sdricoh_driver = {
 529         .name = DRIVER_NAME,
 530         .probe = sdricoh_pcmcia_probe,
 531         .remove = sdricoh_pcmcia_detach,
 532         .id_table = pcmcia_ids,
 533         .suspend = sdricoh_pcmcia_suspend,
 534         .resume = sdricoh_pcmcia_resume,
 535 };
 536 module_pcmcia_driver(sdricoh_driver);
 537
 538 module_param(switchlocked, uint, 0444);
 539
 540 MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>");
 541 MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver");
 542 MODULE_LICENSE("GPL");
 543
 544 MODULE_PARM_DESC(switchlocked, "Switch the cards locked status."
 545                 "Use this when unlocked cards are shown readonly (default 0)");