1 /* linux/drivers/mmc/host/sdhci-s3c.c
3 * Copyright 2008 Openmoko Inc.
4 * Copyright 2008 Simtec Electronics
5 * Ben Dooks <ben@simtec.co.uk>
6 * http://armlinux.simtec.co.uk/
8 * SDHCI (HSMMC) support for Samsung SoC
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/clk.h>
21 #include <linux/gpio.h>
22 #include <linux/regulator/consumer.h>
24 #include <linux/mmc/host.h>
26 #include <plat/sdhci.h>
27 #include <plat/regs-sdhci.h>
31 #define MAX_BUS_CLK (4)
34 * struct sdhci_s3c - S3C SDHCI instance
35 * @host: The SDHCI host created
36 * @pdev: The platform device we where created from.
37 * @ioarea: The resource created when we claimed the IO area.
38 * @pdata: The platform data for this controller.
39 * @cur_clk: The index of the current bus clock.
40 * @clk_io: The clock for the internal bus interface.
41 * @clk_bus: The clocks that are available for the SD/MMC bus clock.
44 struct sdhci_host *host;
45 struct platform_device *pdev;
46 struct resource *ioarea;
47 struct s3c_sdhci_platdata *pdata;
55 struct clk *clk_bus[MAX_BUS_CLK];
58 static inline struct sdhci_s3c *to_s3c(struct sdhci_host *host)
60 return sdhci_priv(host);
64 * get_curclk - convert ctrl2 register to clock source number
65 * @ctrl2: Control2 register value.
67 static u32 get_curclk(u32 ctrl2)
69 ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
70 ctrl2 >>= S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
75 static void sdhci_s3c_check_sclk(struct sdhci_host *host)
77 struct sdhci_s3c *ourhost = to_s3c(host);
78 u32 tmp = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
80 if (get_curclk(tmp) != ourhost->cur_clk) {
81 dev_dbg(&ourhost->pdev->dev, "restored ctrl2 clock setting\n");
83 tmp &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
84 tmp |= ourhost->cur_clk << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
85 writel(tmp, host->ioaddr + 0x80);
90 * sdhci_s3c_get_max_clk - callback to get maximum clock frequency.
91 * @host: The SDHCI host instance.
93 * Callback to return the maximum clock rate acheivable by the controller.
95 static unsigned int sdhci_s3c_get_max_clk(struct sdhci_host *host)
97 struct sdhci_s3c *ourhost = to_s3c(host);
99 unsigned int rate, max;
102 /* note, a reset will reset the clock source */
104 sdhci_s3c_check_sclk(host);
106 for (max = 0, clk = 0; clk < MAX_BUS_CLK; clk++) {
107 busclk = ourhost->clk_bus[clk];
111 rate = clk_get_rate(busclk);
120 * sdhci_s3c_consider_clock - consider one the bus clocks for current setting
121 * @ourhost: Our SDHCI instance.
122 * @src: The source clock index.
123 * @wanted: The clock frequency wanted.
125 static unsigned int sdhci_s3c_consider_clock(struct sdhci_s3c *ourhost,
130 struct clk *clksrc = ourhost->clk_bus[src];
136 if(ourhost->pdata->clk_type == S3C_SDHCI_CLK_DIV_EXTERNAL) {
137 rate = clk_round_rate(clksrc,wanted);
138 return (wanted - rate);
141 rate = clk_get_rate(clksrc);
143 for (div = 1; div < 256; div *= 2) {
144 if ((rate / div) <= wanted)
148 dev_dbg(&ourhost->pdev->dev, "clk %d: rate %ld, want %d, got %ld\n",
149 src, rate, wanted, rate / div);
151 return (wanted - (rate / div));
155 * sdhci_s3c_set_clock - callback on clock change
156 * @host: The SDHCI host being changed
157 * @clock: The clock rate being requested.
159 * When the card's clock is going to be changed, look at the new frequency
160 * and find the best clock source to go with it.
162 static void sdhci_s3c_set_clock(struct sdhci_host *host, unsigned int clock)
164 struct sdhci_s3c *ourhost = to_s3c(host);
165 unsigned int best = UINT_MAX;
171 /* don't bother if the clock is going off. */
175 for (src = 0; src < MAX_BUS_CLK; src++) {
176 delta = sdhci_s3c_consider_clock(ourhost, src, clock);
183 dev_dbg(&ourhost->pdev->dev,
184 "selected source %d, clock %d, delta %d\n",
185 best_src, clock, best);
187 /* select the new clock source */
189 if (ourhost->cur_clk != best_src) {
190 struct clk *clk = ourhost->clk_bus[best_src];
192 /* turn clock off to card before changing clock source */
193 writew(0, host->ioaddr + SDHCI_CLOCK_CONTROL);
195 ourhost->cur_clk = best_src;
196 host->max_clk = clk_get_rate(clk);
198 ctrl = readl(host->ioaddr + S3C_SDHCI_CONTROL2);
199 ctrl &= ~S3C_SDHCI_CTRL2_SELBASECLK_MASK;
200 ctrl |= best_src << S3C_SDHCI_CTRL2_SELBASECLK_SHIFT;
201 writel(ctrl, host->ioaddr + S3C_SDHCI_CONTROL2);
204 /* reconfigure the hardware for new clock rate */
211 if (ourhost->pdata->cfg_card)
212 (ourhost->pdata->cfg_card)(ourhost->pdev, host->ioaddr,
218 * sdhci_s3c_get_min_clock - callback to get minimal supported clock value
219 * @host: The SDHCI host being queried
221 * To init mmc host properly a minimal clock value is needed. For high system
222 * bus clock's values the standard formula gives values out of allowed range.
223 * The clock still can be set to lower values, if clock source other then
224 * system bus is selected.
226 static unsigned int sdhci_s3c_get_min_clock(struct sdhci_host *host)
228 struct sdhci_s3c *ourhost = to_s3c(host);
229 unsigned int delta, min = UINT_MAX;
232 for (src = 0; src < MAX_BUS_CLK; src++) {
233 delta = sdhci_s3c_consider_clock(ourhost, src, 0);
234 if (delta == UINT_MAX)
236 /* delta is a negative value in this case */
243 static unsigned int sdhci_cmu_get_max_clock(struct sdhci_host *host)
245 struct sdhci_s3c *ourhost = to_s3c(host);
247 return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], UINT_MAX);
250 static unsigned int sdhci_cmu_get_min_clock(struct sdhci_host *host)
252 struct sdhci_s3c *ourhost = to_s3c(host);
254 return clk_round_rate(ourhost->clk_bus[ourhost->cur_clk], 400000);
257 static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
259 struct sdhci_s3c *ourhost = to_s3c(host);
264 sdhci_s3c_set_clock(host, clock);
266 clk_set_rate(ourhost->clk_bus[ourhost->cur_clk], clock);
271 static int sdhci_s3c_enable_clk(struct sdhci_host *host)
273 struct sdhci_s3c *sc = to_s3c(host);
276 clk_disable(sc->clk_io);
277 clk_disable(sc->clk_bus[sc->cur_clk]);
280 if (sc->host->clk_cnt == 0) {
281 clk_enable(sc->clk_io);
282 clk_enable(sc->clk_bus[sc->cur_clk]);
290 static int sdhci_s3c_disable_clk(struct sdhci_host *host, int lazy)
292 struct sdhci_s3c *sc = to_s3c(host);
294 if (sc->host->clk_cnt) {
295 clk_disable(sc->clk_io);
296 clk_disable(sc->clk_bus[sc->cur_clk]);
297 if(sc->host->clk_cnt)
304 static struct sdhci_ops sdhci_s3c_ops = {
305 .get_max_clock = sdhci_s3c_get_max_clk,
306 .set_clock = sdhci_s3c_set_clock,
307 .get_min_clock = sdhci_s3c_get_min_clock,
308 .enable = sdhci_s3c_enable_clk,
309 .disable = sdhci_s3c_disable_clk,
312 static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
314 struct sdhci_host *host = platform_get_drvdata(dev);
318 struct sdhci_s3c *sc = to_s3c(host);
320 * FIXME : Why need clk_get & clk_put for clk_io
322 sc->clk_io = clk_get(&dev->dev, "hsmmc");
325 if (state && sc->cd_status == 0) {
326 dev_dbg(&dev->dev, "card inserted.\n");
328 spin_lock_irqsave(&host->lock, flags);
329 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
331 spin_unlock_irqrestore(&host->lock, flags);
333 if (host->vmmc && !regulator_is_enabled(host->vmmc))
334 regulator_enable(host->vmmc);
335 } else if (!state && sc->cd_status == 1) {
336 dev_dbg(&dev->dev, "card removed.\n");
338 spin_lock_irqsave(&host->lock, flags);
339 host->quirks &= ~SDHCI_QUIRK_BROKEN_CARD_DETECTION;
341 spin_unlock_irqrestore(&host->lock, flags);
343 if (host->vmmc && regulator_is_enabled(host->vmmc))
344 regulator_disable(host->vmmc);
347 spin_lock_irqsave(&host->lock, flags);
348 tasklet_schedule(&host->card_tasklet);
349 spin_unlock_irqrestore(&host->lock, flags);
356 static irqreturn_t sdhci_s3c_gpio_card_detect_thread(int irq, void *dev_id)
358 struct sdhci_s3c *sc = dev_id;
359 int status = gpio_get_value(sc->ext_cd_gpio);
360 if (sc->pdata->ext_cd_gpio_invert)
362 sdhci_s3c_notify_change(sc->pdev, status);
366 static void sdhci_s3c_setup_card_detect_gpio(struct sdhci_s3c *sc)
368 struct s3c_sdhci_platdata *pdata = sc->pdata;
369 struct device *dev = &sc->pdev->dev;
371 if (gpio_request(pdata->ext_cd_gpio, "SDHCI EXT CD") == 0) {
372 sc->ext_cd_gpio = pdata->ext_cd_gpio;
373 sc->ext_cd_irq = gpio_to_irq(pdata->ext_cd_gpio);
374 if (sc->ext_cd_irq &&
375 request_threaded_irq(sc->ext_cd_irq, NULL,
376 sdhci_s3c_gpio_card_detect_thread,
377 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
378 dev_name(dev), sc) == 0) {
379 int status = gpio_get_value(sc->ext_cd_gpio);
380 if (pdata->ext_cd_gpio_invert)
382 sdhci_s3c_notify_change(sc->pdev, status);
383 device_init_wakeup(dev, pdata->wakeup);
385 dev_warn(dev, "cannot request irq for card detect\n");
389 dev_err(dev, "cannot request gpio for card detect\n");
393 static ssize_t card_status(struct device *dev, struct device_attribute *attr,
396 struct platform_device *pdev = to_platform_device(dev);
397 struct s3c_sdhci_platdata *pdata = (struct s3c_sdhci_platdata *)
398 pdev->dev.platform_data;
401 if(!pdata->ext_cd_gpio)
402 return sprintf(buf,"-1");
403 status = gpio_get_value(pdata->ext_cd_gpio);
405 if (pdata->ext_cd_gpio_invert)
408 return sprintf(buf,"%d",!!status);
411 static DEVICE_ATTR(mmc_sd_detect, S_IRUGO, card_status, NULL);
413 static int __devinit sdhci_s3c_probe(struct platform_device *pdev)
415 struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
416 struct device *dev = &pdev->dev;
417 struct sdhci_host *host;
418 struct sdhci_s3c *sc;
419 struct resource *res;
420 int ret, irq, ptr, clks, rc;
423 dev_err(dev, "no device data specified\n");
427 irq = platform_get_irq(pdev, 0);
429 dev_err(dev, "no irq specified\n");
433 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
435 dev_err(dev, "no memory specified\n");
439 host = sdhci_alloc_host(dev, sizeof(struct sdhci_s3c));
441 dev_err(dev, "sdhci_alloc_host() failed\n");
442 return PTR_ERR(host);
445 sc = sdhci_priv(host);
450 sc->ext_cd_gpio = -1; /* invalid gpio number */
452 platform_set_drvdata(pdev, host);
454 sc->clk_io = clk_get(dev, "hsmmc");
455 if (IS_ERR(sc->clk_io)) {
456 dev_err(dev, "failed to get io clock\n");
457 ret = PTR_ERR(sc->clk_io);
461 /* enable the local io clock and keep it running for the moment. */
462 clk_enable(sc->clk_io);
463 sc->host->clk_cnt = 1; /* initialize clk_cnt for clk_enable*/
465 for (clks = 0, ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
467 char *name = pdata->clocks[ptr];
472 clk = clk_get(dev, name);
474 dev_err(dev, "failed to get clock %s\n", name);
479 sc->clk_bus[ptr] = clk;
483 dev_info(dev, "clock source %d: %s (%ld Hz)\n",
484 ptr, name, clk_get_rate(clk));
488 dev_err(dev, "failed to find any bus clocks\n");
493 sc->ioarea = request_mem_region(res->start, resource_size(res),
494 mmc_hostname(host->mmc));
496 dev_err(dev, "failed to reserve register area\n");
501 host->ioaddr = ioremap_nocache(res->start, resource_size(res));
503 dev_err(dev, "failed to map registers\n");
508 /* Ensure we have minimal gpio selected CMD/CLK/Detect */
510 pdata->cfg_gpio(pdev, pdata->max_width);
512 host->hw_name = "samsung-hsmmc";
513 host->ops = &sdhci_s3c_ops;
517 /* Setup quirks for the controller */
518 host->quirks |= SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC;
519 host->quirks |= SDHCI_QUIRK_NO_HISPD_BIT;
521 /* This host treats ADMA descriptors with leght 0000h incorrecyly */
522 host->quirks |= SDHCI_QUIRK_BROKEN_ADMA_ZEROLEN_DESC;
524 #ifndef CONFIG_MMC_SDHCI_S3C_DMA
526 /* we currently see overruns on errors, so disable the SDMA
527 * support as well. */
528 host->quirks |= SDHCI_QUIRK_BROKEN_DMA;
530 #endif /* CONFIG_MMC_SDHCI_S3C_DMA */
532 /* It seems we do not get an DATA transfer complete on non-busy
533 * transfers, not sure if this is a problem with this specific
534 * SDHCI block, or a missing configuration that needs to be set. */
535 host->quirks |= SDHCI_QUIRK_NO_BUSY_IRQ;
537 /* This host supports the Auto CMD12 */
538 /* Auto CMD12 can be harmful with a defected MMC card which has bad
539 * sectors. May system seems be lockup.
540 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12; */
542 if (pdata->cd_type == S3C_SDHCI_CD_NONE ||
543 pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
544 host->quirks |= SDHCI_QUIRK_BROKEN_CARD_DETECTION;
546 if (pdata->cd_type == S3C_SDHCI_CD_PERMANENT)
547 host->mmc->caps = MMC_CAP_NONREMOVABLE;
549 host->quirks |= (SDHCI_QUIRK_32BIT_DMA_ADDR |
550 SDHCI_QUIRK_32BIT_DMA_SIZE);
552 /* HSMMC on Samsung SoCs uses SDCLK as timeout clock */
553 host->quirks |= SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK;
555 if (pdata->clk_type == S3C_SDHCI_CLK_DIV_EXTERNAL) {
556 sdhci_s3c_ops.set_clock = sdhci_cmu_set_clock;
557 sdhci_s3c_ops.get_min_clock = sdhci_cmu_get_min_clock;
558 sdhci_s3c_ops.get_max_clock = sdhci_cmu_get_max_clock;
562 host->mmc->caps |= pdata->host_caps;
565 host->mmc->pm_flags = pdata->pm_caps;
567 ret = sdhci_add_host(host);
569 dev_err(dev, "sdhci_add_host() failed\n");
574 if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL ||
575 pdata->cd_type == S3C_SDHCI_CD_GPIO)
576 sdhci_s3c_notify_change(pdev, 0);
578 /* The following two methods of card detection might call
579 sdhci_s3c_notify_change() immediately, so they can be called
580 only after sdhci_add_host(). Setup errors are ignored. */
581 if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_init)
582 pdata->ext_cd_init(&sdhci_s3c_notify_change);
584 if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
585 gpio_is_valid(pdata->ext_cd_gpio)) {
586 sdhci_s3c_setup_card_detect_gpio(sc);
587 rc = device_create_file(&(pdev->dev), &dev_attr_mmc_sd_detect);
589 dev_err(dev, "Can't device_create_file\n");
591 dev_info(dev, "Add a card detection sysfs file\n");
597 release_resource(sc->ioarea);
601 for (ptr = 0; ptr < MAX_BUS_CLK; ptr++) {
602 if (sc->clk_bus[ptr]) {
603 clk_disable(sc->clk_bus[ptr]);
604 clk_put(sc->clk_bus[ptr]);
609 clk_disable(sc->clk_io);
613 sdhci_free_host(host);
618 static int __devexit sdhci_s3c_remove(struct platform_device *pdev)
620 struct s3c_sdhci_platdata *pdata = pdev->dev.platform_data;
621 struct sdhci_host *host = platform_get_drvdata(pdev);
622 struct sdhci_s3c *sc = sdhci_priv(host);
625 if (pdata->cd_type == S3C_SDHCI_CD_EXTERNAL && pdata->ext_cd_cleanup)
626 pdata->ext_cd_cleanup(&sdhci_s3c_notify_change);
629 free_irq(sc->ext_cd_irq, sc);
631 if (gpio_is_valid(sc->ext_cd_gpio))
632 gpio_free(sc->ext_cd_gpio);
634 if (pdata->cd_type == S3C_SDHCI_CD_GPIO &&
635 gpio_is_valid(pdata->ext_cd_gpio))
636 device_remove_file(&(pdev->dev), &dev_attr_mmc_sd_detect);
638 sdhci_remove_host(host, 1);
640 for (ptr = 0; ptr < 3; ptr++) {
641 if (sc->clk_bus[ptr]) {
642 clk_disable(sc->clk_bus[ptr]);
643 clk_put(sc->clk_bus[ptr]);
646 clk_disable(sc->clk_io);
649 iounmap(host->ioaddr);
650 release_resource(sc->ioarea);
653 sdhci_free_host(host);
654 platform_set_drvdata(pdev, NULL);
661 static int sdhci_s3c_suspend(struct device *dev)
663 struct sdhci_host *host = dev_get_drvdata(dev);
664 struct sdhci_s3c *sc = sdhci_priv(host);
667 ret = sdhci_suspend_host(host, PMSG_SUSPEND);
669 if (!ret && host->clk_cnt)
670 sdhci_s3c_disable_clk(host, 0);
672 if (!ret && device_may_wakeup(dev))
674 enable_irq_wake(sc->ext_cd_irq);
679 static int sdhci_s3c_resume(struct device *dev)
681 struct sdhci_host *host = dev_get_drvdata(dev);
682 struct sdhci_s3c *sc = sdhci_priv(host);
684 if (device_may_wakeup(dev))
686 disable_irq_wake(sc->ext_cd_irq);
689 sdhci_s3c_enable_clk(host);
691 return sdhci_resume_host(host);
694 static const struct dev_pm_ops sdhci_s3c_pmops = {
695 .suspend = sdhci_s3c_suspend,
696 .resume = sdhci_s3c_resume,
699 #define SDHCI_S3C_PMOPS (&sdhci_s3c_pmops)
702 #define SDHCI_S3C_PMOPS NULL
705 static struct platform_driver sdhci_s3c_driver = {
706 .probe = sdhci_s3c_probe,
707 .remove = __devexit_p(sdhci_s3c_remove),
709 .owner = THIS_MODULE,
711 .pm = SDHCI_S3C_PMOPS,
715 static int __init sdhci_s3c_init(void)
717 return platform_driver_register(&sdhci_s3c_driver);
720 static void __exit sdhci_s3c_exit(void)
722 platform_driver_unregister(&sdhci_s3c_driver);
725 #ifdef CONFIG_FAST_RESUME
726 beforeresume_initcall(sdhci_s3c_init);
728 module_init(sdhci_s3c_init);
730 module_exit(sdhci_s3c_exit);
732 MODULE_DESCRIPTION("Samsung SDHCI (HSMMC) glue");
733 MODULE_AUTHOR("Ben Dooks, <ben@simtec.co.uk>");
734 MODULE_LICENSE("GPL v2");
735 MODULE_ALIAS("platform:s3c-sdhci");