2 * DMA function for TMIO MMC implementations
4 * Copyright (C) 2016-17 Renesas Electronics Corporation
5 * Copyright (C) 2016-17 Sang Engineering, Wolfram Sang
6 * Copyright (C) 2017 Horms Solutions, Simon Horman
7 * Copyright (C) 2010-2011 Guennadi Liakhovetski
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
14 #include <linux/device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/dmaengine.h>
17 #include <linux/mfd/tmio.h>
18 #include <linux/mmc/host.h>
19 #include <linux/mod_devicetable.h>
20 #include <linux/module.h>
21 #include <linux/pagemap.h>
22 #include <linux/scatterlist.h>
24 #include "renesas_sdhi.h"
27 #define TMIO_MMC_MIN_DMA_LEN 8
29 static const struct renesas_sdhi_of_data of_default_cfg = {
30 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
33 static const struct renesas_sdhi_of_data of_rz_compatible = {
34 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_32BIT_DATA_PORT,
35 .tmio_ocr_mask = MMC_VDD_32_33,
36 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
39 static const struct renesas_sdhi_of_data of_rcar_gen1_compatible = {
40 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
42 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
45 /* Definitions for sampling clocks */
46 static struct renesas_sdhi_scc rcar_gen2_scc_taps[] = {
48 .clk_rate = 156000000,
57 static const struct renesas_sdhi_of_data of_rcar_gen2_compatible = {
58 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
59 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
60 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
62 .dma_buswidth = DMA_SLAVE_BUSWIDTH_4_BYTES,
63 .dma_rx_offset = 0x2000,
65 .taps = rcar_gen2_scc_taps,
66 .taps_num = ARRAY_SIZE(rcar_gen2_scc_taps),
69 /* Definitions for sampling clocks */
70 static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
77 static const struct renesas_sdhi_of_data of_rcar_gen3_compatible = {
78 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_WRPROTECT_DISABLE |
79 TMIO_MMC_CLK_ACTUAL | TMIO_MMC_MIN_RCAR2,
80 .capabilities = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
84 .taps = rcar_gen3_scc_taps,
85 .taps_num = ARRAY_SIZE(rcar_gen3_scc_taps),
88 static const struct of_device_id renesas_sdhi_sys_dmac_of_match[] = {
89 { .compatible = "renesas,sdhi-shmobile" },
90 { .compatible = "renesas,sdhi-sh73a0", .data = &of_default_cfg, },
91 { .compatible = "renesas,sdhi-r8a73a4", .data = &of_default_cfg, },
92 { .compatible = "renesas,sdhi-r8a7740", .data = &of_default_cfg, },
93 { .compatible = "renesas,sdhi-r7s72100", .data = &of_rz_compatible, },
94 { .compatible = "renesas,sdhi-r8a7778", .data = &of_rcar_gen1_compatible, },
95 { .compatible = "renesas,sdhi-r8a7779", .data = &of_rcar_gen1_compatible, },
96 { .compatible = "renesas,sdhi-r8a7790", .data = &of_rcar_gen2_compatible, },
97 { .compatible = "renesas,sdhi-r8a7791", .data = &of_rcar_gen2_compatible, },
98 { .compatible = "renesas,sdhi-r8a7792", .data = &of_rcar_gen2_compatible, },
99 { .compatible = "renesas,sdhi-r8a7793", .data = &of_rcar_gen2_compatible, },
100 { .compatible = "renesas,sdhi-r8a7794", .data = &of_rcar_gen2_compatible, },
101 { .compatible = "renesas,sdhi-r8a7795", .data = &of_rcar_gen3_compatible, },
102 { .compatible = "renesas,sdhi-r8a7796", .data = &of_rcar_gen3_compatible, },
105 MODULE_DEVICE_TABLE(of, renesas_sdhi_sys_dmac_of_match);
108 static void renesas_sdhi_sys_dmac_enable_dma(struct tmio_mmc_host *host,
111 if (!host->chan_tx || !host->chan_rx)
114 if (host->dma->enable)
115 host->dma->enable(host, enable);
118 static void renesas_sdhi_sys_dmac_abort_dma(struct tmio_mmc_host *host)
120 renesas_sdhi_sys_dmac_enable_dma(host, false);
123 dmaengine_terminate_all(host->chan_rx);
125 dmaengine_terminate_all(host->chan_tx);
127 renesas_sdhi_sys_dmac_enable_dma(host, true);
130 static void renesas_sdhi_sys_dmac_dma_callback(void *arg)
132 struct tmio_mmc_host *host = arg;
134 spin_lock_irq(&host->lock);
139 if (host->data->flags & MMC_DATA_READ)
140 dma_unmap_sg(host->chan_rx->device->dev,
141 host->sg_ptr, host->sg_len,
144 dma_unmap_sg(host->chan_tx->device->dev,
145 host->sg_ptr, host->sg_len,
148 spin_unlock_irq(&host->lock);
150 wait_for_completion(&host->dma_dataend);
152 spin_lock_irq(&host->lock);
153 tmio_mmc_do_data_irq(host);
155 spin_unlock_irq(&host->lock);
158 static void renesas_sdhi_sys_dmac_start_dma_rx(struct tmio_mmc_host *host)
160 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
161 struct dma_async_tx_descriptor *desc = NULL;
162 struct dma_chan *chan = host->chan_rx;
165 bool aligned = true, multiple = true;
166 unsigned int align = (1 << host->pdata->alignment_shift) - 1;
168 for_each_sg(sg, sg_tmp, host->sg_len, i) {
169 if (sg_tmp->offset & align)
171 if (sg_tmp->length & align) {
177 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
178 (align & PAGE_MASK))) || !multiple) {
183 if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
184 host->force_pio = true;
188 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_RXRDY);
190 /* The only sg element can be unaligned, use our bounce buffer then */
192 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
193 host->sg_ptr = &host->bounce_sg;
197 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_FROM_DEVICE);
199 desc = dmaengine_prep_slave_sg(chan, sg, ret,
200 DMA_DEV_TO_MEM, DMA_CTRL_ACK);
203 reinit_completion(&host->dma_dataend);
204 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
205 desc->callback_param = host;
207 cookie = dmaengine_submit(desc);
215 /* DMA failed, fall back to PIO */
216 renesas_sdhi_sys_dmac_enable_dma(host, false);
219 host->chan_rx = NULL;
220 dma_release_channel(chan);
221 /* Free the Tx channel too */
222 chan = host->chan_tx;
224 host->chan_tx = NULL;
225 dma_release_channel(chan);
227 dev_warn(&host->pdev->dev,
228 "DMA failed: %d, falling back to PIO\n", ret);
232 static void renesas_sdhi_sys_dmac_start_dma_tx(struct tmio_mmc_host *host)
234 struct scatterlist *sg = host->sg_ptr, *sg_tmp;
235 struct dma_async_tx_descriptor *desc = NULL;
236 struct dma_chan *chan = host->chan_tx;
239 bool aligned = true, multiple = true;
240 unsigned int align = (1 << host->pdata->alignment_shift) - 1;
242 for_each_sg(sg, sg_tmp, host->sg_len, i) {
243 if (sg_tmp->offset & align)
245 if (sg_tmp->length & align) {
251 if ((!aligned && (host->sg_len > 1 || sg->length > PAGE_SIZE ||
252 (align & PAGE_MASK))) || !multiple) {
257 if (sg->length < TMIO_MMC_MIN_DMA_LEN) {
258 host->force_pio = true;
262 tmio_mmc_disable_mmc_irqs(host, TMIO_STAT_TXRQ);
264 /* The only sg element can be unaligned, use our bounce buffer then */
267 void *sg_vaddr = tmio_mmc_kmap_atomic(sg, &flags);
268 sg_init_one(&host->bounce_sg, host->bounce_buf, sg->length);
269 memcpy(host->bounce_buf, sg_vaddr, host->bounce_sg.length);
270 tmio_mmc_kunmap_atomic(sg, &flags, sg_vaddr);
271 host->sg_ptr = &host->bounce_sg;
275 ret = dma_map_sg(chan->device->dev, sg, host->sg_len, DMA_TO_DEVICE);
277 desc = dmaengine_prep_slave_sg(chan, sg, ret,
278 DMA_MEM_TO_DEV, DMA_CTRL_ACK);
281 reinit_completion(&host->dma_dataend);
282 desc->callback = renesas_sdhi_sys_dmac_dma_callback;
283 desc->callback_param = host;
285 cookie = dmaengine_submit(desc);
293 /* DMA failed, fall back to PIO */
294 renesas_sdhi_sys_dmac_enable_dma(host, false);
297 host->chan_tx = NULL;
298 dma_release_channel(chan);
299 /* Free the Rx channel too */
300 chan = host->chan_rx;
302 host->chan_rx = NULL;
303 dma_release_channel(chan);
305 dev_warn(&host->pdev->dev,
306 "DMA failed: %d, falling back to PIO\n", ret);
310 static void renesas_sdhi_sys_dmac_start_dma(struct tmio_mmc_host *host,
311 struct mmc_data *data)
313 if (data->flags & MMC_DATA_READ) {
315 renesas_sdhi_sys_dmac_start_dma_rx(host);
318 renesas_sdhi_sys_dmac_start_dma_tx(host);
322 static void renesas_sdhi_sys_dmac_issue_tasklet_fn(unsigned long priv)
324 struct tmio_mmc_host *host = (struct tmio_mmc_host *)priv;
325 struct dma_chan *chan = NULL;
327 spin_lock_irq(&host->lock);
329 if (host && host->data) {
330 if (host->data->flags & MMC_DATA_READ)
331 chan = host->chan_rx;
333 chan = host->chan_tx;
336 spin_unlock_irq(&host->lock);
338 tmio_mmc_enable_mmc_irqs(host, TMIO_STAT_DATAEND);
341 dma_async_issue_pending(chan);
344 static void renesas_sdhi_sys_dmac_request_dma(struct tmio_mmc_host *host,
345 struct tmio_mmc_data *pdata)
347 /* We can only either use DMA for both Tx and Rx or not use it at all */
348 if (!host->dma || (!host->pdev->dev.of_node &&
349 (!pdata->chan_priv_tx || !pdata->chan_priv_rx)))
352 if (!host->chan_tx && !host->chan_rx) {
353 struct resource *res = platform_get_resource(host->pdev,
355 struct dma_slave_config cfg = {};
363 dma_cap_set(DMA_SLAVE, mask);
365 host->chan_tx = dma_request_slave_channel_compat(mask,
366 host->dma->filter, pdata->chan_priv_tx,
367 &host->pdev->dev, "tx");
368 dev_dbg(&host->pdev->dev, "%s: TX: got channel %p\n", __func__,
374 cfg.direction = DMA_MEM_TO_DEV;
375 cfg.dst_addr = res->start + (CTL_SD_DATA_PORT << host->bus_shift);
376 cfg.dst_addr_width = host->dma->dma_buswidth;
377 if (!cfg.dst_addr_width)
378 cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
380 ret = dmaengine_slave_config(host->chan_tx, &cfg);
384 host->chan_rx = dma_request_slave_channel_compat(mask,
385 host->dma->filter, pdata->chan_priv_rx,
386 &host->pdev->dev, "rx");
387 dev_dbg(&host->pdev->dev, "%s: RX: got channel %p\n", __func__,
393 cfg.direction = DMA_DEV_TO_MEM;
394 cfg.src_addr = cfg.dst_addr + host->pdata->dma_rx_offset;
395 cfg.src_addr_width = host->dma->dma_buswidth;
396 if (!cfg.src_addr_width)
397 cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_2_BYTES;
399 ret = dmaengine_slave_config(host->chan_rx, &cfg);
403 host->bounce_buf = (u8 *)__get_free_page(GFP_KERNEL | GFP_DMA);
404 if (!host->bounce_buf)
407 init_completion(&host->dma_dataend);
408 tasklet_init(&host->dma_issue,
409 renesas_sdhi_sys_dmac_issue_tasklet_fn,
410 (unsigned long)host);
413 renesas_sdhi_sys_dmac_enable_dma(host, true);
419 dma_release_channel(host->chan_rx);
420 host->chan_rx = NULL;
423 dma_release_channel(host->chan_tx);
424 host->chan_tx = NULL;
427 static void renesas_sdhi_sys_dmac_release_dma(struct tmio_mmc_host *host)
430 struct dma_chan *chan = host->chan_tx;
431 host->chan_tx = NULL;
432 dma_release_channel(chan);
435 struct dma_chan *chan = host->chan_rx;
436 host->chan_rx = NULL;
437 dma_release_channel(chan);
439 if (host->bounce_buf) {
440 free_pages((unsigned long)host->bounce_buf, 0);
441 host->bounce_buf = NULL;
445 static const struct tmio_mmc_dma_ops renesas_sdhi_sys_dmac_dma_ops = {
446 .start = renesas_sdhi_sys_dmac_start_dma,
447 .enable = renesas_sdhi_sys_dmac_enable_dma,
448 .request = renesas_sdhi_sys_dmac_request_dma,
449 .release = renesas_sdhi_sys_dmac_release_dma,
450 .abort = renesas_sdhi_sys_dmac_abort_dma,
453 static int renesas_sdhi_sys_dmac_probe(struct platform_device *pdev)
455 return renesas_sdhi_probe(pdev, &renesas_sdhi_sys_dmac_dma_ops);
458 static const struct dev_pm_ops renesas_sdhi_sys_dmac_dev_pm_ops = {
459 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
460 pm_runtime_force_resume)
461 SET_RUNTIME_PM_OPS(tmio_mmc_host_runtime_suspend,
462 tmio_mmc_host_runtime_resume,
466 static struct platform_driver renesas_sys_dmac_sdhi_driver = {
468 .name = "sh_mobile_sdhi",
469 .pm = &renesas_sdhi_sys_dmac_dev_pm_ops,
470 .of_match_table = renesas_sdhi_sys_dmac_of_match,
472 .probe = renesas_sdhi_sys_dmac_probe,
473 .remove = renesas_sdhi_remove,
476 module_platform_driver(renesas_sys_dmac_sdhi_driver);
478 MODULE_DESCRIPTION("Renesas SDHI driver");
479 MODULE_AUTHOR("Magnus Damm");
480 MODULE_LICENSE("GPL v2");
481 MODULE_ALIAS("platform:sh_mobile_sdhi");