2 * Portions copyright (C) 2003 Russell King, PXA MMCI Driver
3 * Portions copyright (C) 2004-2005 Pierre Ossman, W83L51xD SD/MMC driver
5 * Copyright 2008 Embedded Alley Solutions, Inc.
6 * Copyright 2009-2011 Freescale Semiconductor, Inc.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
23 #include <linux/kernel.h>
24 #include <linux/init.h>
25 #include <linux/ioport.h>
27 #include <linux/of_device.h>
28 #include <linux/of_gpio.h>
29 #include <linux/platform_device.h>
30 #include <linux/delay.h>
31 #include <linux/interrupt.h>
32 #include <linux/dma-mapping.h>
33 #include <linux/dmaengine.h>
34 #include <linux/highmem.h>
35 #include <linux/clk.h>
36 #include <linux/err.h>
37 #include <linux/completion.h>
38 #include <linux/mmc/host.h>
39 #include <linux/mmc/mmc.h>
40 #include <linux/mmc/sdio.h>
41 #include <linux/gpio.h>
42 #include <linux/regulator/consumer.h>
43 #include <linux/module.h>
44 #include <linux/stmp_device.h>
45 #include <linux/spi/mxs-spi.h>
47 #define DRIVER_NAME "mxs-mmc"
49 #define MXS_MMC_IRQ_BITS (BM_SSP_CTRL1_SDIO_IRQ | \
50 BM_SSP_CTRL1_RESP_ERR_IRQ | \
51 BM_SSP_CTRL1_RESP_TIMEOUT_IRQ | \
52 BM_SSP_CTRL1_DATA_TIMEOUT_IRQ | \
53 BM_SSP_CTRL1_DATA_CRC_IRQ | \
54 BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ | \
55 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ | \
56 BM_SSP_CTRL1_FIFO_OVERRUN_IRQ)
58 /* card detect polling timeout */
59 #define MXS_MMC_DETECT_TIMEOUT (HZ/2)
65 struct mmc_request *mrq;
66 struct mmc_command *cmd;
67 struct mmc_data *data;
69 unsigned char bus_width;
78 static int mxs_mmc_get_ro(struct mmc_host *mmc)
80 struct mxs_mmc_host *host = mmc_priv(mmc);
83 if (!gpio_is_valid(host->wp_gpio))
86 ret = gpio_get_value(host->wp_gpio);
88 if (host->wp_inverted)
94 static int mxs_mmc_get_cd(struct mmc_host *mmc)
96 struct mxs_mmc_host *host = mmc_priv(mmc);
97 struct mxs_ssp *ssp = &host->ssp;
99 return host->broken_cd ||
100 !(readl(ssp->base + HW_SSP_STATUS(ssp)) &
101 BM_SSP_STATUS_CARD_DETECT) ^ host->cd_inverted;
104 static int mxs_mmc_reset(struct mxs_mmc_host *host)
106 struct mxs_ssp *ssp = &host->ssp;
110 ret = stmp_reset_block(ssp->base);
114 ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;
115 ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
116 BF_SSP(0x7, CTRL1_WORD_LENGTH) |
117 BM_SSP_CTRL1_DMA_ENABLE |
118 BM_SSP_CTRL1_POLARITY |
119 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN |
120 BM_SSP_CTRL1_DATA_CRC_IRQ_EN |
121 BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN |
122 BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN |
123 BM_SSP_CTRL1_RESP_ERR_IRQ_EN;
125 writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
126 BF_SSP(2, TIMING_CLOCK_DIVIDE) |
127 BF_SSP(0, TIMING_CLOCK_RATE),
128 ssp->base + HW_SSP_TIMING(ssp));
130 if (host->sdio_irq_en) {
131 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
132 ctrl1 |= BM_SSP_CTRL1_SDIO_IRQ_EN;
135 writel(ctrl0, ssp->base + HW_SSP_CTRL0);
136 writel(ctrl1, ssp->base + HW_SSP_CTRL1(ssp));
140 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
141 struct mmc_command *cmd);
143 static void mxs_mmc_request_done(struct mxs_mmc_host *host)
145 struct mmc_command *cmd = host->cmd;
146 struct mmc_data *data = host->data;
147 struct mmc_request *mrq = host->mrq;
148 struct mxs_ssp *ssp = &host->ssp;
150 if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) {
151 if (mmc_resp_type(cmd) & MMC_RSP_136) {
152 cmd->resp[3] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
153 cmd->resp[2] = readl(ssp->base + HW_SSP_SDRESP1(ssp));
154 cmd->resp[1] = readl(ssp->base + HW_SSP_SDRESP2(ssp));
155 cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP3(ssp));
157 cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
162 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
163 data->sg_len, ssp->dma_dir);
165 * If there was an error on any block, we mark all
166 * data blocks as being in error.
169 data->bytes_xfered = data->blocks * data->blksz;
171 data->bytes_xfered = 0;
175 mxs_mmc_start_cmd(host, mrq->stop);
181 mmc_request_done(host->mmc, mrq);
184 static void mxs_mmc_dma_irq_callback(void *param)
186 struct mxs_mmc_host *host = param;
188 mxs_mmc_request_done(host);
191 static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
193 struct mxs_mmc_host *host = dev_id;
194 struct mmc_command *cmd = host->cmd;
195 struct mmc_data *data = host->data;
196 struct mxs_ssp *ssp = &host->ssp;
199 spin_lock(&host->lock);
201 stat = readl(ssp->base + HW_SSP_CTRL1(ssp));
202 writel(stat & MXS_MMC_IRQ_BITS,
203 ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
205 spin_unlock(&host->lock);
207 if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
208 mmc_signal_sdio_irq(host->mmc);
210 if (stat & BM_SSP_CTRL1_RESP_TIMEOUT_IRQ)
211 cmd->error = -ETIMEDOUT;
212 else if (stat & BM_SSP_CTRL1_RESP_ERR_IRQ)
216 if (stat & (BM_SSP_CTRL1_DATA_TIMEOUT_IRQ |
217 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ))
218 data->error = -ETIMEDOUT;
219 else if (stat & BM_SSP_CTRL1_DATA_CRC_IRQ)
220 data->error = -EILSEQ;
221 else if (stat & (BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ |
222 BM_SSP_CTRL1_FIFO_OVERRUN_IRQ))
229 static struct dma_async_tx_descriptor *mxs_mmc_prep_dma(
230 struct mxs_mmc_host *host, unsigned long flags)
232 struct mxs_ssp *ssp = &host->ssp;
233 struct dma_async_tx_descriptor *desc;
234 struct mmc_data *data = host->data;
235 struct scatterlist * sgl;
240 dma_map_sg(mmc_dev(host->mmc), data->sg,
241 data->sg_len, ssp->dma_dir);
243 sg_len = data->sg_len;
246 sgl = (struct scatterlist *) ssp->ssp_pio_words;
247 sg_len = SSP_PIO_NUM;
250 desc = dmaengine_prep_slave_sg(ssp->dmach,
251 sgl, sg_len, ssp->slave_dirn, flags);
253 desc->callback = mxs_mmc_dma_irq_callback;
254 desc->callback_param = host;
257 dma_unmap_sg(mmc_dev(host->mmc), data->sg,
258 data->sg_len, ssp->dma_dir);
264 static void mxs_mmc_bc(struct mxs_mmc_host *host)
266 struct mxs_ssp *ssp = &host->ssp;
267 struct mmc_command *cmd = host->cmd;
268 struct dma_async_tx_descriptor *desc;
269 u32 ctrl0, cmd0, cmd1;
271 ctrl0 = BM_SSP_CTRL0_ENABLE | BM_SSP_CTRL0_IGNORE_CRC;
272 cmd0 = BF_SSP(cmd->opcode, CMD0_CMD) | BM_SSP_CMD0_APPEND_8CYC;
275 if (host->sdio_irq_en) {
276 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
277 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
280 ssp->ssp_pio_words[0] = ctrl0;
281 ssp->ssp_pio_words[1] = cmd0;
282 ssp->ssp_pio_words[2] = cmd1;
283 ssp->dma_dir = DMA_NONE;
284 ssp->slave_dirn = DMA_TRANS_NONE;
285 desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
289 dmaengine_submit(desc);
290 dma_async_issue_pending(ssp->dmach);
294 dev_warn(mmc_dev(host->mmc),
295 "%s: failed to prep dma\n", __func__);
298 static void mxs_mmc_ac(struct mxs_mmc_host *host)
300 struct mxs_ssp *ssp = &host->ssp;
301 struct mmc_command *cmd = host->cmd;
302 struct dma_async_tx_descriptor *desc;
303 u32 ignore_crc, get_resp, long_resp;
304 u32 ctrl0, cmd0, cmd1;
306 ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
307 0 : BM_SSP_CTRL0_IGNORE_CRC;
308 get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
309 BM_SSP_CTRL0_GET_RESP : 0;
310 long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
311 BM_SSP_CTRL0_LONG_RESP : 0;
313 ctrl0 = BM_SSP_CTRL0_ENABLE | ignore_crc | get_resp | long_resp;
314 cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
317 if (host->sdio_irq_en) {
318 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
319 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
322 ssp->ssp_pio_words[0] = ctrl0;
323 ssp->ssp_pio_words[1] = cmd0;
324 ssp->ssp_pio_words[2] = cmd1;
325 ssp->dma_dir = DMA_NONE;
326 ssp->slave_dirn = DMA_TRANS_NONE;
327 desc = mxs_mmc_prep_dma(host, DMA_CTRL_ACK);
331 dmaengine_submit(desc);
332 dma_async_issue_pending(ssp->dmach);
336 dev_warn(mmc_dev(host->mmc),
337 "%s: failed to prep dma\n", __func__);
340 static unsigned short mxs_ns_to_ssp_ticks(unsigned clock_rate, unsigned ns)
342 const unsigned int ssp_timeout_mul = 4096;
344 * Calculate ticks in ms since ns are large numbers
347 const unsigned int clock_per_ms = clock_rate / 1000;
348 const unsigned int ms = ns / 1000;
349 const unsigned int ticks = ms * clock_per_ms;
350 const unsigned int ssp_ticks = ticks / ssp_timeout_mul;
352 WARN_ON(ssp_ticks == 0);
356 static void mxs_mmc_adtc(struct mxs_mmc_host *host)
358 struct mmc_command *cmd = host->cmd;
359 struct mmc_data *data = cmd->data;
360 struct dma_async_tx_descriptor *desc;
361 struct scatterlist *sgl = data->sg, *sg;
362 unsigned int sg_len = data->sg_len;
365 unsigned short dma_data_dir, timeout;
366 enum dma_transfer_direction slave_dirn;
367 unsigned int data_size = 0, log2_blksz;
368 unsigned int blocks = data->blocks;
370 struct mxs_ssp *ssp = &host->ssp;
372 u32 ignore_crc, get_resp, long_resp, read;
373 u32 ctrl0, cmd0, cmd1, val;
375 ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
376 0 : BM_SSP_CTRL0_IGNORE_CRC;
377 get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
378 BM_SSP_CTRL0_GET_RESP : 0;
379 long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
380 BM_SSP_CTRL0_LONG_RESP : 0;
382 if (data->flags & MMC_DATA_WRITE) {
383 dma_data_dir = DMA_TO_DEVICE;
384 slave_dirn = DMA_MEM_TO_DEV;
387 dma_data_dir = DMA_FROM_DEVICE;
388 slave_dirn = DMA_DEV_TO_MEM;
389 read = BM_SSP_CTRL0_READ;
392 ctrl0 = BF_SSP(host->bus_width, CTRL0_BUS_WIDTH) |
393 ignore_crc | get_resp | long_resp |
394 BM_SSP_CTRL0_DATA_XFER | read |
395 BM_SSP_CTRL0_WAIT_FOR_IRQ |
398 cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
400 /* get logarithm to base 2 of block size for setting register */
401 log2_blksz = ilog2(data->blksz);
404 * take special care of the case that data size from data->sg
405 * is not equal to blocks x blksz
407 for_each_sg(sgl, sg, sg_len, i)
408 data_size += sg->length;
410 if (data_size != data->blocks * data->blksz)
413 /* xfer count, block size and count need to be set differently */
414 if (ssp_is_old(ssp)) {
415 ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);
416 cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |
417 BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);
419 writel(data_size, ssp->base + HW_SSP_XFER_SIZE);
420 writel(BF_SSP(log2_blksz, BLOCK_SIZE_BLOCK_SIZE) |
421 BF_SSP(blocks - 1, BLOCK_SIZE_BLOCK_COUNT),
422 ssp->base + HW_SSP_BLOCK_SIZE);
425 if ((cmd->opcode == MMC_STOP_TRANSMISSION) ||
426 (cmd->opcode == SD_IO_RW_EXTENDED))
427 cmd0 |= BM_SSP_CMD0_APPEND_8CYC;
431 if (host->sdio_irq_en) {
432 ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
433 cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
436 /* set the timeout count */
437 timeout = mxs_ns_to_ssp_ticks(ssp->clk_rate, data->timeout_ns);
438 val = readl(ssp->base + HW_SSP_TIMING(ssp));
439 val &= ~(BM_SSP_TIMING_TIMEOUT);
440 val |= BF_SSP(timeout, TIMING_TIMEOUT);
441 writel(val, ssp->base + HW_SSP_TIMING(ssp));
444 ssp->ssp_pio_words[0] = ctrl0;
445 ssp->ssp_pio_words[1] = cmd0;
446 ssp->ssp_pio_words[2] = cmd1;
447 ssp->dma_dir = DMA_NONE;
448 ssp->slave_dirn = DMA_TRANS_NONE;
449 desc = mxs_mmc_prep_dma(host, 0);
454 WARN_ON(host->data != NULL);
456 ssp->dma_dir = dma_data_dir;
457 ssp->slave_dirn = slave_dirn;
458 desc = mxs_mmc_prep_dma(host, DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
462 dmaengine_submit(desc);
463 dma_async_issue_pending(ssp->dmach);
466 dev_warn(mmc_dev(host->mmc),
467 "%s: failed to prep dma\n", __func__);
470 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
471 struct mmc_command *cmd)
475 switch (mmc_cmd_type(cmd)) {
489 dev_warn(mmc_dev(host->mmc),
490 "%s: unknown MMC command\n", __func__);
495 static void mxs_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
497 struct mxs_mmc_host *host = mmc_priv(mmc);
499 WARN_ON(host->mrq != NULL);
501 mxs_mmc_start_cmd(host, mrq->cmd);
504 static void mxs_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
506 struct mxs_mmc_host *host = mmc_priv(mmc);
508 if (ios->bus_width == MMC_BUS_WIDTH_8)
510 else if (ios->bus_width == MMC_BUS_WIDTH_4)
516 mxs_ssp_set_clk_rate(&host->ssp, ios->clock);
519 static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
521 struct mxs_mmc_host *host = mmc_priv(mmc);
522 struct mxs_ssp *ssp = &host->ssp;
525 spin_lock_irqsave(&host->lock, flags);
527 host->sdio_irq_en = enable;
530 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
531 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
532 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
533 ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_SET);
535 writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
536 ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
537 writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
538 ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
541 spin_unlock_irqrestore(&host->lock, flags);
543 if (enable && readl(ssp->base + HW_SSP_STATUS(ssp)) &
544 BM_SSP_STATUS_SDIO_IRQ)
545 mmc_signal_sdio_irq(host->mmc);
549 static const struct mmc_host_ops mxs_mmc_ops = {
550 .request = mxs_mmc_request,
551 .get_ro = mxs_mmc_get_ro,
552 .get_cd = mxs_mmc_get_cd,
553 .set_ios = mxs_mmc_set_ios,
554 .enable_sdio_irq = mxs_mmc_enable_sdio_irq,
557 static struct platform_device_id mxs_ssp_ids[] = {
560 .driver_data = IMX23_SSP,
563 .driver_data = IMX28_SSP,
568 MODULE_DEVICE_TABLE(platform, mxs_ssp_ids);
570 static const struct of_device_id mxs_mmc_dt_ids[] = {
571 { .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_SSP, },
572 { .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_SSP, },
575 MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids);
577 static int mxs_mmc_probe(struct platform_device *pdev)
579 const struct of_device_id *of_id =
580 of_match_device(mxs_mmc_dt_ids, &pdev->dev);
581 struct device_node *np = pdev->dev.of_node;
582 struct mxs_mmc_host *host;
583 struct mmc_host *mmc;
584 struct resource *iores;
585 int ret = 0, irq_err;
586 struct regulator *reg_vmmc;
587 enum of_gpio_flags flags;
591 iores = platform_get_resource(pdev, IORESOURCE_MEM, 0);
592 irq_err = platform_get_irq(pdev, 0);
593 if (!iores || irq_err < 0)
596 mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev);
600 host = mmc_priv(mmc);
602 ssp->dev = &pdev->dev;
603 ssp->base = devm_ioremap_resource(&pdev->dev, iores);
604 if (IS_ERR(ssp->base)) {
605 ret = PTR_ERR(ssp->base);
609 ssp->devid = (enum mxs_ssp_id) of_id->data;
612 host->sdio_irq_en = 0;
614 reg_vmmc = devm_regulator_get(&pdev->dev, "vmmc");
615 if (!IS_ERR(reg_vmmc)) {
616 ret = regulator_enable(reg_vmmc);
619 "Failed to enable vmmc regulator: %d\n", ret);
624 ssp->clk = devm_clk_get(&pdev->dev, NULL);
625 if (IS_ERR(ssp->clk)) {
626 ret = PTR_ERR(ssp->clk);
629 clk_prepare_enable(ssp->clk);
631 ret = mxs_mmc_reset(host);
633 dev_err(&pdev->dev, "Failed to reset mmc: %d\n", ret);
634 goto out_clk_disable;
637 ssp->dmach = dma_request_slave_channel(&pdev->dev, "rx-tx");
639 dev_err(mmc_dev(host->mmc),
640 "%s: failed to request dma\n", __func__);
642 goto out_clk_disable;
645 /* set mmc core parameters */
646 mmc->ops = &mxs_mmc_ops;
647 mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
648 MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL;
650 of_property_read_u32(np, "bus-width", &bus_width);
652 mmc->caps |= MMC_CAP_4_BIT_DATA;
653 else if (bus_width == 8)
654 mmc->caps |= MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA;
655 host->broken_cd = of_property_read_bool(np, "broken-cd");
656 if (of_property_read_bool(np, "non-removable"))
657 mmc->caps |= MMC_CAP_NONREMOVABLE;
658 host->wp_gpio = of_get_named_gpio_flags(np, "wp-gpios", 0, &flags);
659 if (flags & OF_GPIO_ACTIVE_LOW)
660 host->wp_inverted = 1;
662 host->cd_inverted = of_property_read_bool(np, "cd-inverted");
665 mmc->f_max = 288000000;
666 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
669 mmc->max_blk_size = 1 << 0xf;
670 mmc->max_blk_count = (ssp_is_old(ssp)) ? 0xff : 0xffffff;
671 mmc->max_req_size = (ssp_is_old(ssp)) ? 0xffff : 0xffffffff;
672 mmc->max_seg_size = dma_get_max_seg_size(ssp->dmach->device->dev);
674 platform_set_drvdata(pdev, mmc);
676 ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0,
681 spin_lock_init(&host->lock);
683 ret = mmc_add_host(mmc);
687 dev_info(mmc_dev(host->mmc), "initialized\n");
693 dma_release_channel(ssp->dmach);
695 clk_disable_unprepare(ssp->clk);
701 static int mxs_mmc_remove(struct platform_device *pdev)
703 struct mmc_host *mmc = platform_get_drvdata(pdev);
704 struct mxs_mmc_host *host = mmc_priv(mmc);
705 struct mxs_ssp *ssp = &host->ssp;
707 mmc_remove_host(mmc);
710 dma_release_channel(ssp->dmach);
712 clk_disable_unprepare(ssp->clk);
720 static int mxs_mmc_suspend(struct device *dev)
722 struct mmc_host *mmc = dev_get_drvdata(dev);
723 struct mxs_mmc_host *host = mmc_priv(mmc);
724 struct mxs_ssp *ssp = &host->ssp;
726 clk_disable_unprepare(ssp->clk);
730 static int mxs_mmc_resume(struct device *dev)
732 struct mmc_host *mmc = dev_get_drvdata(dev);
733 struct mxs_mmc_host *host = mmc_priv(mmc);
734 struct mxs_ssp *ssp = &host->ssp;
736 clk_prepare_enable(ssp->clk);
740 static const struct dev_pm_ops mxs_mmc_pm_ops = {
741 .suspend = mxs_mmc_suspend,
742 .resume = mxs_mmc_resume,
746 static struct platform_driver mxs_mmc_driver = {
747 .probe = mxs_mmc_probe,
748 .remove = mxs_mmc_remove,
749 .id_table = mxs_ssp_ids,
752 .owner = THIS_MODULE,
754 .pm = &mxs_mmc_pm_ops,
756 .of_match_table = mxs_mmc_dt_ids,
760 module_platform_driver(mxs_mmc_driver);
762 MODULE_DESCRIPTION("FREESCALE MXS MMC peripheral");
763 MODULE_AUTHOR("Freescale Semiconductor");
764 MODULE_LICENSE("GPL");
765 MODULE_ALIAS("platform:" DRIVER_NAME);