2 * Driver for Blackfin on-chip SDH controller
4 * Copyright (c) 2008 Analog Devices Inc.
6 * Licensed under the GPL-2 or later.
15 #include <asm/errno.h>
16 #include <asm/byteorder.h>
17 #include <asm/blackfin.h>
18 #include <asm/mach-common/bits/sdh.h>
19 #include <asm/mach-common/bits/dma.h>
23 /* SD_CLK frequency must be less than 400k in identification mode */
24 #ifndef CONFIG_SYS_MMC_CLK_ID
25 #define CONFIG_SYS_MMC_CLK_ID 200000
27 /* SD_CLK for normal working */
28 #ifndef CONFIG_SYS_MMC_CLK_OP
29 #define CONFIG_SYS_MMC_CLK_OP 25000000
31 /* support 3.2-3.3V and 3.3-3.4V */
32 #define CONFIG_SYS_MMC_OP_COND 0x00300000
33 #define MMC_DEFAULT_RCA 1
35 #if defined(__ADSPBF51x__)
36 # define bfin_read_SDH_PWR_CTL bfin_read_RSI_PWR_CONTROL
37 # define bfin_write_SDH_PWR_CTL bfin_write_RSI_PWR_CONTROL
38 # define bfin_read_SDH_CLK_CTL bfin_read_RSI_CLK_CONTROL
39 # define bfin_write_SDH_CLK_CTL bfin_write_RSI_CLK_CONTROL
40 # define bfin_write_SDH_ARGUMENT bfin_write_RSI_ARGUMENT
41 # define bfin_write_SDH_COMMAND bfin_write_RSI_COMMAND
42 # define bfin_read_SDH_RESPONSE0 bfin_read_RSI_RESPONSE0
43 # define bfin_read_SDH_RESPONSE1 bfin_read_RSI_RESPONSE1
44 # define bfin_read_SDH_RESPONSE2 bfin_read_RSI_RESPONSE2
45 # define bfin_read_SDH_RESPONSE3 bfin_read_RSI_RESPONSE3
46 # define bfin_write_SDH_DATA_TIMER bfin_write_RSI_DATA_TIMER
47 # define bfin_write_SDH_DATA_LGTH bfin_write_RSI_DATA_LGTH
48 # define bfin_read_SDH_DATA_CTL bfin_read_RSI_DATA_CONTROL
49 # define bfin_write_SDH_DATA_CTL bfin_write_RSI_DATA_CONTROL
50 # define bfin_read_SDH_STATUS bfin_read_RSI_STATUS
51 # define bfin_write_SDH_STATUS_CLR bfin_write_RSI_STATUSCL
52 # define bfin_read_SDH_CFG bfin_read_RSI_CONFIG
53 # define bfin_write_SDH_CFG bfin_write_RSI_CONFIG
54 # define bfin_write_DMA_START_ADDR bfin_write_DMA4_START_ADDR
55 # define bfin_write_DMA_X_COUNT bfin_write_DMA4_X_COUNT
56 # define bfin_write_DMA_X_MODIFY bfin_write_DMA4_X_MODIFY
57 # define bfin_write_DMA_CONFIG bfin_write_DMA4_CONFIG
58 #elif defined(__ADSPBF54x__)
59 # define bfin_write_DMA_START_ADDR bfin_write_DMA22_START_ADDR
60 # define bfin_write_DMA_X_COUNT bfin_write_DMA22_X_COUNT
61 # define bfin_write_DMA_X_MODIFY bfin_write_DMA22_X_MODIFY
62 # define bfin_write_DMA_CONFIG bfin_write_DMA22_CONFIG
64 # error no support for this proc yet
67 static unsigned int mmc_rca;
68 static int mmc_card_is_sd;
69 static block_dev_desc_t mmc_blkdev;
73 #define get_bits(resp, start, size) \
75 const int __size = size; \
76 const uint32_t __mask = (__size < 32 ? 1 << __size : 0) - 1; \
77 const int32_t __off = 3 - ((start) / 32); \
78 const int32_t __shft = (start) & 31; \
81 __res = resp[__off] >> __shft; \
82 if (__size + __shft > 32) \
83 __res |= resp[__off-1] << ((32 - __shft) % 32); \
88 block_dev_desc_t *mmc_get_dev(int dev)
93 static void mci_set_clk(unsigned long clk)
95 unsigned long sys_clk;
96 unsigned long clk_div;
100 sys_clk = get_sclk();
101 bfin_write_SDH_CLK_CTL(0);
102 if (sys_clk % (2 * clk) == 0)
103 clk_div = sys_clk / (2 * clk) - 1;
105 clk_div = sys_clk / (2 * clk);
109 clk_ctl |= (clk_div & 0xff);
111 bfin_write_SDH_CLK_CTL(clk_ctl);
115 mmc_cmd(unsigned long cmd, unsigned long arg, void *resp, unsigned long flags)
117 unsigned int sdh_cmd;
121 unsigned long *response = resp;
124 if (flags & MMC_RSP_PRESENT)
127 if (flags & MMC_RSP_136)
128 sdh_cmd |= CMD_L_RSP;
130 bfin_write_SDH_ARGUMENT(arg);
131 bfin_write_SDH_COMMAND(sdh_cmd | CMD_E);
133 /* wait for a while */
136 status = bfin_read_SDH_STATUS();
137 } while (!(status & (CMD_SENT | CMD_RESP_END | CMD_TIME_OUT |
140 if (flags & MMC_RSP_PRESENT) {
141 response[0] = bfin_read_SDH_RESPONSE0();
142 if (flags & MMC_RSP_136) {
143 response[1] = bfin_read_SDH_RESPONSE1();
144 response[2] = bfin_read_SDH_RESPONSE2();
145 response[3] = bfin_read_SDH_RESPONSE3();
149 if (status & CMD_TIME_OUT) {
150 printf("CMD%d timeout\n", (int)cmd);
152 } else if (status & CMD_CRC_FAIL && flags & MMC_RSP_CRC) {
153 printf("CMD%d CRC failure\n", (int)cmd);
156 bfin_write_SDH_STATUS_CLR(CMD_SENT_STAT | CMD_RESP_END_STAT |
157 CMD_TIMEOUT_STAT | CMD_CRC_FAIL_STAT);
162 mmc_acmd(unsigned long cmd, unsigned long arg, void *resp, unsigned long flags)
164 unsigned long aresp[4];
167 ret = mmc_cmd(MMC_CMD_APP_CMD, 0, aresp,
172 if ((aresp[0] & (ILLEGAL_COMMAND | APP_CMD)) != APP_CMD)
174 ret = mmc_cmd(cmd, arg, resp, flags);
179 mmc_bread(int dev, unsigned long start, lbaint_t blkcnt, void *buffer)
182 unsigned long resp[4];
183 unsigned long card_status;
191 debug("mmc_bread: dev %d, start %d, blkcnt %d\n", dev, start, blkcnt);
192 /* Force to use 512-byte block,because a lot of code depends on this */
195 bfin_write_SDH_DATA_CTL(data_ctl);
196 dma_cfg |= WDSIZE_32 | RESTART | WNR | DMAEN;
199 bfin_write_SDH_DATA_TIMER(0xFFFFFFFF);
200 for (i = 0; i < blkcnt; ++i, ++start) {
201 blackfin_dcache_flush_invalidate_range(buf + i * mmc_blkdev.blksz,
202 buf + (i + 1) * mmc_blkdev.blksz);
203 bfin_write_DMA_START_ADDR(buf + i * mmc_blkdev.blksz);
204 bfin_write_DMA_X_COUNT(mmc_blkdev.blksz / 4);
205 bfin_write_DMA_X_MODIFY(4);
206 bfin_write_DMA_CONFIG(dma_cfg);
207 bfin_write_SDH_DATA_LGTH(mmc_blkdev.blksz);
208 /* Put the device into Transfer state */
209 ret = mmc_cmd(MMC_CMD_SELECT_CARD, mmc_rca << 16, resp, MMC_RSP_R1);
211 printf("MMC_CMD_SELECT_CARD failed\n");
214 /* Set block length */
215 ret = mmc_cmd(MMC_CMD_SET_BLOCKLEN, mmc_blkdev.blksz, resp, MMC_RSP_R1);
217 printf("MMC_CMD_SET_BLOCKLEN failed\n");
220 ret = mmc_cmd(MMC_CMD_READ_SINGLE_BLOCK,
221 start * mmc_blkdev.blksz, resp,
224 printf("MMC_CMD_READ_SINGLE_BLOCK failed\n");
227 bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);
231 status = bfin_read_SDH_STATUS();
232 } while (!(status & (DAT_BLK_END | DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN)));
234 if (status & (DAT_TIME_OUT | DAT_CRC_FAIL | RX_OVERRUN)) {
235 bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT | \
236 DAT_CRC_FAIL_STAT | RX_OVERRUN_STAT);
239 bfin_write_SDH_STATUS_CLR(DAT_BLK_END_STAT | DAT_END_STAT);
240 mmc_cmd(MMC_CMD_SELECT_CARD, 0, resp, 0);
248 mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, MMC_RSP_R1);
249 printf("mmc: bread failed, status = %08x, card status = %08lx\n",
250 status, card_status);
255 mmc_bwrite(int dev, unsigned long start, lbaint_t blkcnt, const void *buffer)
258 unsigned long resp[4];
259 unsigned long card_status;
260 const __u8 *buf = buffer;
268 debug("mmc_bwrite: dev %d, start %lx, blkcnt %lx\n",
270 /* Force to use 512-byte block,because a lot of code depends on this */
272 data_ctl &= ~DTX_DIR;
273 bfin_write_SDH_DATA_CTL(data_ctl);
274 dma_cfg |= WDSIZE_32 | RESTART | DMAEN;
276 bfin_write_SDH_DATA_TIMER(0xFFFFFFFF);
277 for (i = 0; i < blkcnt; ++i, ++start) {
278 bfin_write_DMA_START_ADDR(buf + i * mmc_blkdev.blksz);
279 bfin_write_DMA_X_COUNT(mmc_blkdev.blksz / 4);
280 bfin_write_DMA_X_MODIFY(4);
281 bfin_write_DMA_CONFIG(dma_cfg);
282 bfin_write_SDH_DATA_LGTH(mmc_blkdev.blksz);
284 /* Put the device into Transfer state */
285 ret = mmc_cmd(MMC_CMD_SELECT_CARD, mmc_rca << 16, resp, MMC_RSP_R1);
287 printf("MMC_CMD_SELECT_CARD failed\n");
290 /* Set block length */
291 ret = mmc_cmd(MMC_CMD_SET_BLOCKLEN, mmc_blkdev.blksz, resp, MMC_RSP_R1);
293 printf("MMC_CMD_SET_BLOCKLEN failed\n");
296 ret = mmc_cmd(MMC_CMD_WRITE_SINGLE_BLOCK,
297 start * mmc_blkdev.blksz, resp,
300 printf("MMC_CMD_WRITE_SINGLE_BLOCK failed\n");
303 bfin_write_SDH_DATA_CTL(bfin_read_SDH_DATA_CTL() | DTX_DMA_E | DTX_E);
307 status = bfin_read_SDH_STATUS();
308 } while (!(status & (DAT_BLK_END | DAT_END | DAT_TIME_OUT | DAT_CRC_FAIL | TX_UNDERRUN)));
310 if (status & (DAT_TIME_OUT | DAT_CRC_FAIL | TX_UNDERRUN)) {
311 bfin_write_SDH_STATUS_CLR(DAT_TIMEOUT_STAT |
312 DAT_CRC_FAIL_STAT | TX_UNDERRUN_STAT);
315 bfin_write_SDH_STATUS_CLR(DAT_BLK_END_STAT | DAT_END_STAT);
316 mmc_cmd(MMC_CMD_SELECT_CARD, 0, resp, 0);
323 mmc_cmd(MMC_CMD_SEND_STATUS, mmc_rca << 16, &card_status, MMC_RSP_R1);
324 printf("mmc: bwrite failed, status = %08x, card status = %08lx\n",
325 status, card_status);
329 static void mmc_parse_cid(struct mmc_cid *cid, unsigned long *resp)
331 cid->mid = resp[0] >> 24;
332 cid->oid = (resp[0] >> 8) & 0xffff;
333 cid->pnm[0] = resp[0];
334 cid->pnm[1] = resp[1] >> 24;
335 cid->pnm[2] = resp[1] >> 16;
336 cid->pnm[3] = resp[1] >> 8;
337 cid->pnm[4] = resp[1];
338 cid->pnm[5] = resp[2] >> 24;
340 cid->prv = resp[2] >> 16;
341 cid->psn = (resp[2] << 16) | (resp[3] >> 16);
342 cid->mdt = resp[3] >> 8;
345 static void sd_parse_cid(struct mmc_cid *cid, unsigned long *resp)
347 cid->mid = resp[0] >> 24;
348 cid->oid = (resp[0] >> 8) & 0xffff;
349 cid->pnm[0] = resp[0];
350 cid->pnm[1] = resp[1] >> 24;
351 cid->pnm[2] = resp[1] >> 16;
352 cid->pnm[3] = resp[1] >> 8;
353 cid->pnm[4] = resp[1];
356 cid->prv = resp[2] >> 24;
357 cid->psn = (resp[2] << 8) | (resp[3] >> 24);
358 cid->mdt = (resp[3] >> 8) & 0x0fff;
361 static void mmc_dump_cid(const struct mmc_cid *cid)
363 printf("CID information:\n");
364 printf("Manufacturer ID: %02X\n", cid->mid);
365 printf("OEM/Application ID: %04X\n", cid->oid);
366 printf("Product name: %s\n", cid->pnm);
367 printf("Product Revision: %u.%u\n",
368 cid->prv >> 4, cid->prv & 0x0f);
369 printf("Product Serial Number: %lu\n", cid->psn);
370 printf("Manufacturing Date: %02u/%02u\n",
371 cid->mdt >> 4, cid->mdt & 0x0f);
374 static void mmc_dump_csd(__u32 *csd)
376 printf("CSD information:\n");
377 printf("CSD structure version: 1.%u\n", get_bits(csd, 126, 2));
378 printf("Card command classes: %03x\n", get_bits(csd, 84, 12));
379 printf("Max trans speed: %s\n", (get_bits(csd, 96, 8) == 0x32) ? "25MHz" : "50MHz");
380 printf("Read block length: %d\n", 1 << get_bits(csd, 80, 4));
381 printf("Write block length: %u\n", 1 << get_bits(csd, 22, 4));
382 printf("Card capacity: %u bytes\n",
383 (get_bits(csd, 62, 12) + 1) * (1 << (get_bits(csd, 47, 3) + 2)) *
384 (1 << get_bits(csd, 80, 4)));
388 static int mmc_idle_cards(void)
392 /* Reset all cards */
393 ret = mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, NULL, 0);
397 return mmc_cmd(MMC_CMD_GO_IDLE_STATE, 0, NULL, 0);
400 static int sd_init_card(struct mmc_cid *cid, int verbose)
402 unsigned long resp[4];
406 for (i = 0; i < 1000; ++i) {
407 ret = mmc_acmd(SD_CMD_APP_SEND_OP_COND, CONFIG_SYS_MMC_OP_COND,
409 if (ret || (resp[0] & 0x80000000))
416 ret = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, resp, MMC_RSP_R2);
419 sd_parse_cid(cid, resp);
423 /* Get RCA of the card that responded */
424 ret = mmc_cmd(SD_CMD_SEND_RELATIVE_ADDR, 0, resp, MMC_RSP_R6);
428 mmc_rca = (resp[0] >> 16) & 0xffff;
430 printf("SD Card detected (RCA %u)\n", mmc_rca);
435 static int mmc_init_card(struct mmc_cid *cid, int verbose)
437 unsigned long resp[4];
441 for (i = 0; i < 1000; ++i) {
442 ret = mmc_cmd(MMC_CMD_SEND_OP_COND, CONFIG_SYS_MMC_OP_COND, resp,
444 if (ret || (resp[0] & 0x80000000))
451 /* Get CID of all cards. FIXME: Support more than one card */
452 ret = mmc_cmd(MMC_CMD_ALL_SEND_CID, 0, resp, MMC_RSP_R2);
455 mmc_parse_cid(cid, resp);
459 /* Set Relative Address of the card that responded */
460 ret = mmc_cmd(MMC_CMD_SET_RELATIVE_ADDR, mmc_rca << 16, resp,
465 int mmc_legacy_init(int verbose)
469 unsigned int max_blksz;
470 /* Initialize sdh controller */
471 #if defined(__ADSPBF54x__)
472 bfin_write_DMAC1_PERIMUX(bfin_read_DMAC1_PERIMUX() | 0x1);
473 bfin_write_PORTC_FER(bfin_read_PORTC_FER() | 0x3F00);
474 bfin_write_PORTC_MUX(bfin_read_PORTC_MUX() & ~0xFFF0000);
475 #elif defined(__ADSPBF51x__)
476 bfin_write_PORTG_FER(bfin_read_PORTG_FER() | 0x01F8);
477 bfin_write_PORTG_MUX((bfin_read_PORTG_MUX() & ~0x3FC) | 0x154);
479 # error no portmux for this proc yet
481 bfin_write_SDH_CFG(bfin_read_SDH_CFG() | CLKS_EN);
482 /* Disable card detect pin */
483 bfin_write_SDH_CFG((bfin_read_SDH_CFG() & 0x1F) | 0x60);
484 mci_set_clk(CONFIG_SYS_MMC_CLK_ID);
485 /* setting power control */
488 bfin_write_SDH_PWR_CTL(pwr_ctl);
490 ret = sd_init_card(&cid, verbose);
492 mmc_rca = MMC_DEFAULT_RCA;
493 ret = mmc_init_card(&cid, verbose);
497 /* Get CSD from the card */
498 ret = mmc_cmd(MMC_CMD_SEND_CSD, mmc_rca << 16, csd, MMC_RSP_R2);
503 /* Initialize the blockdev structure */
504 mmc_blkdev.if_type = IF_TYPE_MMC;
505 mmc_blkdev.part_type = PART_TYPE_DOS;
506 mmc_blkdev.block_read = mmc_bread;
507 mmc_blkdev.block_write = mmc_bwrite;
508 sprintf(mmc_blkdev.vendor,
509 "Man %02x%04x Snr %08lx",
510 cid.mid, cid.oid, cid.psn);
511 strncpy(mmc_blkdev.product, cid.pnm,
512 sizeof(mmc_blkdev.product));
513 sprintf(mmc_blkdev.revision, "%x %x",
514 cid.prv >> 4, cid.prv & 0x0f);
516 max_blksz = 1 << get_bits(csd, 80, 4);
518 * If we can't use 512 byte blocks, refuse to deal with the
519 * card. Tons of code elsewhere seems to depend on this.
521 if (max_blksz < 512 || (max_blksz > 512 && !get_bits(csd, 79, 1))) {
522 printf("Card does not support 512 byte reads, aborting.\n");
526 mmc_blkdev.blksz = 512;
527 mmc_blkdev.lba = (get_bits(csd, 62, 12) + 1) * (1 << (get_bits(csd, 47, 3) + 2));
528 mci_set_clk(CONFIG_SYS_MMC_CLK_OP);
529 init_part(&mmc_blkdev);
533 int mmc2info(ulong addr)