1 // SPDX-License-Identifier: GPL-2.0+
3 * PCI emulation device which swaps the case of text
5 * Copyright (c) 2014 Google, Inc
6 * Written by Simon Glass <sjg@chromium.org>
14 #include <linux/ctype.h>
17 * struct swap_case_platdata - platform data for this device
19 * @command: Current PCI command value
20 * @bar: Current base address values
22 struct swap_case_platdata {
27 #define offset_to_barnum(offset) \
28 (((offset) - PCI_BASE_ADDRESS_0) / sizeof(u32))
31 MEM_TEXT_SIZE = 0x100,
40 static struct pci_bar {
44 { PCI_BASE_ADDRESS_SPACE_IO, 1 },
45 { PCI_BASE_ADDRESS_MEM_TYPE_32, MEM_TEXT_SIZE },
52 struct swap_case_priv {
54 char mem_text[MEM_TEXT_SIZE];
57 static int sandbox_swap_case_get_devfn(struct udevice *dev)
59 struct pci_child_platdata *plat = dev_get_parent_platdata(dev);
64 static int sandbox_swap_case_read_config(struct udevice *emul, uint offset,
65 ulong *valuep, enum pci_size_t size)
67 struct swap_case_platdata *plat = dev_get_platdata(emul);
71 *valuep = plat->command;
77 *valuep = SANDBOX_PCI_VENDOR_ID;
80 *valuep = SANDBOX_PCI_DEVICE_ID;
82 case PCI_CLASS_DEVICE:
83 if (size == PCI_SIZE_8) {
84 *valuep = SANDBOX_PCI_CLASS_SUB_CODE;
86 *valuep = (SANDBOX_PCI_CLASS_CODE << 8) |
87 SANDBOX_PCI_CLASS_SUB_CODE;
91 *valuep = SANDBOX_PCI_CLASS_CODE;
93 case PCI_BASE_ADDRESS_0:
94 case PCI_BASE_ADDRESS_1:
95 case PCI_BASE_ADDRESS_2:
96 case PCI_BASE_ADDRESS_3:
97 case PCI_BASE_ADDRESS_4:
98 case PCI_BASE_ADDRESS_5: {
102 barnum = offset_to_barnum(offset);
103 bar = &plat->bar[barnum];
106 if (*bar == 0xffffffff) {
107 if (barinfo[barnum].type) {
108 result = (~(barinfo[barnum].size - 1) &
109 PCI_BASE_ADDRESS_IO_MASK) |
110 PCI_BASE_ADDRESS_SPACE_IO;
112 result = (~(barinfo[barnum].size - 1) &
113 PCI_BASE_ADDRESS_MEM_MASK) |
114 PCI_BASE_ADDRESS_MEM_TYPE_32;
117 debug("r bar %d=%x\n", barnum, result);
121 case PCI_CAPABILITY_LIST:
122 *valuep = PCI_CAP_ID_PM_OFFSET;
124 case PCI_CAP_ID_PM_OFFSET:
125 *valuep = (PCI_CAP_ID_EXP_OFFSET << 8) | PCI_CAP_ID_PM;
127 case PCI_CAP_ID_PM_OFFSET + PCI_CAP_LIST_NEXT:
128 *valuep = PCI_CAP_ID_EXP_OFFSET;
130 case PCI_CAP_ID_EXP_OFFSET:
131 *valuep = (PCI_CAP_ID_MSIX_OFFSET << 8) | PCI_CAP_ID_EXP;
133 case PCI_CAP_ID_EXP_OFFSET + PCI_CAP_LIST_NEXT:
134 *valuep = PCI_CAP_ID_MSIX_OFFSET;
136 case PCI_CAP_ID_MSIX_OFFSET:
137 *valuep = PCI_CAP_ID_MSIX;
139 case PCI_CAP_ID_MSIX_OFFSET + PCI_CAP_LIST_NEXT:
142 case PCI_EXT_CAP_ID_ERR_OFFSET:
143 *valuep = (PCI_EXT_CAP_ID_VC_OFFSET << 20) | PCI_EXT_CAP_ID_ERR;
145 case PCI_EXT_CAP_ID_VC_OFFSET:
146 *valuep = (PCI_EXT_CAP_ID_DSN_OFFSET << 20) | PCI_EXT_CAP_ID_VC;
148 case PCI_EXT_CAP_ID_DSN_OFFSET:
149 *valuep = PCI_EXT_CAP_ID_DSN;
156 static int sandbox_swap_case_write_config(struct udevice *emul, uint offset,
157 ulong value, enum pci_size_t size)
159 struct swap_case_platdata *plat = dev_get_platdata(emul);
163 plat->command = value;
165 case PCI_BASE_ADDRESS_0:
166 case PCI_BASE_ADDRESS_1: {
170 barnum = offset_to_barnum(offset);
171 bar = &plat->bar[barnum];
173 debug("w bar %d=%lx\n", barnum, value);
175 /* space indicator (bit#0) is read-only */
176 *bar |= barinfo[barnum].type;
184 static int sandbox_swap_case_find_bar(struct udevice *emul, unsigned int addr,
185 int *barnump, unsigned int *offsetp)
187 struct swap_case_platdata *plat = dev_get_platdata(emul);
190 for (barnum = 0; barnum < ARRAY_SIZE(barinfo); barnum++) {
191 unsigned int size = barinfo[barnum].size;
192 u32 base = plat->bar[barnum] & ~PCI_BASE_ADDRESS_SPACE;
194 if (addr >= base && addr < base + size) {
196 *offsetp = addr - base;
205 static void sandbox_swap_case_do_op(enum swap_case_op op, char *str, int len)
207 for (; len > 0; len--, str++) {
210 *str = toupper(*str);
213 *str = tolower(*str);
217 *str = tolower(*str);
219 *str = toupper(*str);
225 int sandbox_swap_case_read_io(struct udevice *dev, unsigned int addr,
226 ulong *valuep, enum pci_size_t size)
228 struct swap_case_priv *priv = dev_get_priv(dev);
233 ret = sandbox_swap_case_find_bar(dev, addr, &barnum, &offset);
237 if (barnum == 0 && offset == 0)
238 *valuep = (*valuep & ~0xff) | priv->op;
243 int sandbox_swap_case_write_io(struct udevice *dev, unsigned int addr,
244 ulong value, enum pci_size_t size)
246 struct swap_case_priv *priv = dev_get_priv(dev);
251 ret = sandbox_swap_case_find_bar(dev, addr, &barnum, &offset);
254 if (barnum == 0 && offset == 0)
260 static int sandbox_swap_case_map_physmem(struct udevice *dev,
261 phys_addr_t addr, unsigned long *lenp, void **ptrp)
263 struct swap_case_priv *priv = dev_get_priv(dev);
264 unsigned int offset, avail;
268 ret = sandbox_swap_case_find_bar(dev, addr, &barnum, &offset);
272 *ptrp = priv->mem_text + offset;
273 avail = barinfo[1].size - offset;
274 if (avail > barinfo[1].size)
277 *lenp = min(*lenp, (ulong)avail);
285 static int sandbox_swap_case_unmap_physmem(struct udevice *dev,
286 const void *vaddr, unsigned long len)
288 struct swap_case_priv *priv = dev_get_priv(dev);
290 sandbox_swap_case_do_op(priv->op, (void *)vaddr, len);
295 struct dm_pci_emul_ops sandbox_swap_case_emul_ops = {
296 .get_devfn = sandbox_swap_case_get_devfn,
297 .read_config = sandbox_swap_case_read_config,
298 .write_config = sandbox_swap_case_write_config,
299 .read_io = sandbox_swap_case_read_io,
300 .write_io = sandbox_swap_case_write_io,
301 .map_physmem = sandbox_swap_case_map_physmem,
302 .unmap_physmem = sandbox_swap_case_unmap_physmem,
305 static const struct udevice_id sandbox_swap_case_ids[] = {
306 { .compatible = "sandbox,swap-case" },
310 U_BOOT_DRIVER(sandbox_swap_case_emul) = {
311 .name = "sandbox_swap_case_emul",
312 .id = UCLASS_PCI_EMUL,
313 .of_match = sandbox_swap_case_ids,
314 .ops = &sandbox_swap_case_emul_ops,
315 .priv_auto_alloc_size = sizeof(struct swap_case_priv),
316 .platdata_auto_alloc_size = sizeof(struct swap_case_platdata),
319 static struct pci_device_id sandbox_swap_case_supported[] = {
320 { PCI_VDEVICE(SANDBOX, SANDBOX_PCI_DEVICE_ID), SWAP_CASE_DRV_DATA },
324 U_BOOT_PCI_DEVICE(sandbox_swap_case_emul, sandbox_swap_case_supported);