1 // SPDX-License-Identifier: GPL-2.0-only
3 * Host side test driver to test endpoint functionality
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
9 #include <linux/crc32.h>
10 #include <linux/delay.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/miscdevice.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/random.h>
19 #include <linux/slab.h>
20 #include <linux/uaccess.h>
21 #include <linux/pci.h>
22 #include <linux/pci_ids.h>
24 #include <linux/pci_regs.h>
26 #include <uapi/linux/pcitest.h>
28 #define DRV_MODULE_NAME "pci-endpoint-test"
30 #define IRQ_TYPE_UNDEFINED -1
31 #define IRQ_TYPE_LEGACY 0
32 #define IRQ_TYPE_MSI 1
33 #define IRQ_TYPE_MSIX 2
35 #define PCI_ENDPOINT_TEST_MAGIC 0x0
37 #define PCI_ENDPOINT_TEST_COMMAND 0x4
38 #define COMMAND_RAISE_LEGACY_IRQ BIT(0)
39 #define COMMAND_RAISE_MSI_IRQ BIT(1)
40 #define COMMAND_RAISE_MSIX_IRQ BIT(2)
41 #define COMMAND_READ BIT(3)
42 #define COMMAND_WRITE BIT(4)
43 #define COMMAND_COPY BIT(5)
45 #define PCI_ENDPOINT_TEST_STATUS 0x8
46 #define STATUS_READ_SUCCESS BIT(0)
47 #define STATUS_READ_FAIL BIT(1)
48 #define STATUS_WRITE_SUCCESS BIT(2)
49 #define STATUS_WRITE_FAIL BIT(3)
50 #define STATUS_COPY_SUCCESS BIT(4)
51 #define STATUS_COPY_FAIL BIT(5)
52 #define STATUS_IRQ_RAISED BIT(6)
53 #define STATUS_SRC_ADDR_INVALID BIT(7)
54 #define STATUS_DST_ADDR_INVALID BIT(8)
56 #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c
57 #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10
59 #define PCI_ENDPOINT_TEST_LOWER_DST_ADDR 0x14
60 #define PCI_ENDPOINT_TEST_UPPER_DST_ADDR 0x18
62 #define PCI_ENDPOINT_TEST_SIZE 0x1c
63 #define PCI_ENDPOINT_TEST_CHECKSUM 0x20
65 #define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
66 #define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
68 #define PCI_ENDPOINT_TEST_FLAGS 0x2c
69 #define FLAG_USE_DMA BIT(0)
71 #define PCI_DEVICE_ID_TI_AM654 0xb00c
72 #define PCI_DEVICE_ID_LS1088A 0x80c0
74 #define is_am654_pci_dev(pdev) \
75 ((pdev)->device == PCI_DEVICE_ID_TI_AM654)
77 #define PCI_DEVICE_ID_RENESAS_R8A774A1 0x0028
78 #define PCI_DEVICE_ID_RENESAS_R8A774B1 0x002b
79 #define PCI_DEVICE_ID_RENESAS_R8A774C0 0x002d
80 #define PCI_DEVICE_ID_RENESAS_R8A774E1 0x0025
82 static DEFINE_IDA(pci_endpoint_test_ida);
84 #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
88 module_param(no_msi, bool, 0444);
89 MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
91 static int irq_type = IRQ_TYPE_MSI;
92 module_param(irq_type, int, 0444);
93 MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X)");
104 struct pci_endpoint_test {
105 struct pci_dev *pdev;
107 void __iomem *bar[PCI_STD_NUM_BARS];
108 struct completion irq_raised;
112 /* mutex to protect the ioctls */
114 struct miscdevice miscdev;
115 enum pci_barno test_reg_bar;
120 struct pci_endpoint_test_data {
121 enum pci_barno test_reg_bar;
126 static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
129 return readl(test->base + offset);
132 static inline void pci_endpoint_test_writel(struct pci_endpoint_test *test,
133 u32 offset, u32 value)
135 writel(value, test->base + offset);
138 static inline u32 pci_endpoint_test_bar_readl(struct pci_endpoint_test *test,
141 return readl(test->bar[bar] + offset);
144 static inline void pci_endpoint_test_bar_writel(struct pci_endpoint_test *test,
145 int bar, u32 offset, u32 value)
147 writel(value, test->bar[bar] + offset);
150 static irqreturn_t pci_endpoint_test_irqhandler(int irq, void *dev_id)
152 struct pci_endpoint_test *test = dev_id;
155 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
156 if (reg & STATUS_IRQ_RAISED) {
157 test->last_irq = irq;
158 complete(&test->irq_raised);
159 reg &= ~STATUS_IRQ_RAISED;
161 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_STATUS,
167 static void pci_endpoint_test_free_irq_vectors(struct pci_endpoint_test *test)
169 struct pci_dev *pdev = test->pdev;
171 pci_free_irq_vectors(pdev);
172 test->irq_type = IRQ_TYPE_UNDEFINED;
175 static bool pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test,
179 struct pci_dev *pdev = test->pdev;
180 struct device *dev = &pdev->dev;
184 case IRQ_TYPE_LEGACY:
185 irq = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
187 dev_err(dev, "Failed to get Legacy interrupt\n");
190 irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
192 dev_err(dev, "Failed to get MSI interrupts\n");
195 irq = pci_alloc_irq_vectors(pdev, 1, 2048, PCI_IRQ_MSIX);
197 dev_err(dev, "Failed to get MSI-X interrupts\n");
200 dev_err(dev, "Invalid IRQ type selected\n");
208 test->irq_type = type;
209 test->num_irqs = irq;
214 static void pci_endpoint_test_release_irq(struct pci_endpoint_test *test)
217 struct pci_dev *pdev = test->pdev;
218 struct device *dev = &pdev->dev;
220 for (i = 0; i < test->num_irqs; i++)
221 devm_free_irq(dev, pci_irq_vector(pdev, i), test);
226 static bool pci_endpoint_test_request_irq(struct pci_endpoint_test *test)
230 struct pci_dev *pdev = test->pdev;
231 struct device *dev = &pdev->dev;
233 for (i = 0; i < test->num_irqs; i++) {
234 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
235 pci_endpoint_test_irqhandler,
236 IRQF_SHARED, test->name, test);
245 case IRQ_TYPE_LEGACY:
246 dev_err(dev, "Failed to request IRQ %d for Legacy\n",
247 pci_irq_vector(pdev, i));
250 dev_err(dev, "Failed to request IRQ %d for MSI %d\n",
251 pci_irq_vector(pdev, i),
255 dev_err(dev, "Failed to request IRQ %d for MSI-X %d\n",
256 pci_irq_vector(pdev, i),
264 static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
265 enum pci_barno barno)
270 struct pci_dev *pdev = test->pdev;
272 if (!test->bar[barno])
275 size = pci_resource_len(pdev, barno);
277 if (barno == test->test_reg_bar)
280 for (j = 0; j < size; j += 4)
281 pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);
283 for (j = 0; j < size; j += 4) {
284 val = pci_endpoint_test_bar_readl(test, barno, j);
285 if (val != 0xA0A0A0A0)
292 static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
296 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
298 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 0);
299 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
300 COMMAND_RAISE_LEGACY_IRQ);
301 val = wait_for_completion_timeout(&test->irq_raised,
302 msecs_to_jiffies(1000));
309 static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
310 u16 msi_num, bool msix)
313 struct pci_dev *pdev = test->pdev;
315 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
316 msix == false ? IRQ_TYPE_MSI :
318 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, msi_num);
319 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
320 msix == false ? COMMAND_RAISE_MSI_IRQ :
321 COMMAND_RAISE_MSIX_IRQ);
322 val = wait_for_completion_timeout(&test->irq_raised,
323 msecs_to_jiffies(1000));
327 if (pci_irq_vector(pdev, msi_num - 1) == test->last_irq)
333 static bool pci_endpoint_test_copy(struct pci_endpoint_test *test,
336 struct pci_endpoint_test_xfer_param param;
343 dma_addr_t src_phys_addr;
344 dma_addr_t dst_phys_addr;
345 struct pci_dev *pdev = test->pdev;
346 struct device *dev = &pdev->dev;
348 dma_addr_t orig_src_phys_addr;
350 dma_addr_t orig_dst_phys_addr;
352 size_t alignment = test->alignment;
353 int irq_type = test->irq_type;
358 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
360 dev_err(dev, "Failed to get transfer param\n");
365 if (size > SIZE_MAX - alignment)
368 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
370 flags |= FLAG_USE_DMA;
372 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
373 dev_err(dev, "Invalid IRQ type option\n");
377 orig_src_addr = kzalloc(size + alignment, GFP_KERNEL);
378 if (!orig_src_addr) {
379 dev_err(dev, "Failed to allocate source buffer\n");
384 get_random_bytes(orig_src_addr, size + alignment);
385 orig_src_phys_addr = dma_map_single(dev, orig_src_addr,
386 size + alignment, DMA_TO_DEVICE);
387 if (dma_mapping_error(dev, orig_src_phys_addr)) {
388 dev_err(dev, "failed to map source buffer address\n");
390 goto err_src_phys_addr;
393 if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) {
394 src_phys_addr = PTR_ALIGN(orig_src_phys_addr, alignment);
395 offset = src_phys_addr - orig_src_phys_addr;
396 src_addr = orig_src_addr + offset;
398 src_phys_addr = orig_src_phys_addr;
399 src_addr = orig_src_addr;
402 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
403 lower_32_bits(src_phys_addr));
405 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
406 upper_32_bits(src_phys_addr));
408 src_crc32 = crc32_le(~0, src_addr, size);
410 orig_dst_addr = kzalloc(size + alignment, GFP_KERNEL);
411 if (!orig_dst_addr) {
412 dev_err(dev, "Failed to allocate destination address\n");
417 orig_dst_phys_addr = dma_map_single(dev, orig_dst_addr,
418 size + alignment, DMA_FROM_DEVICE);
419 if (dma_mapping_error(dev, orig_dst_phys_addr)) {
420 dev_err(dev, "failed to map destination buffer address\n");
422 goto err_dst_phys_addr;
425 if (alignment && !IS_ALIGNED(orig_dst_phys_addr, alignment)) {
426 dst_phys_addr = PTR_ALIGN(orig_dst_phys_addr, alignment);
427 offset = dst_phys_addr - orig_dst_phys_addr;
428 dst_addr = orig_dst_addr + offset;
430 dst_phys_addr = orig_dst_phys_addr;
431 dst_addr = orig_dst_addr;
434 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
435 lower_32_bits(dst_phys_addr));
436 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
437 upper_32_bits(dst_phys_addr));
439 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE,
442 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
443 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
444 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
445 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
448 wait_for_completion(&test->irq_raised);
450 dma_unmap_single(dev, orig_dst_phys_addr, size + alignment,
453 dst_crc32 = crc32_le(~0, dst_addr, size);
454 if (dst_crc32 == src_crc32)
458 kfree(orig_dst_addr);
461 dma_unmap_single(dev, orig_src_phys_addr, size + alignment,
465 kfree(orig_src_addr);
471 static bool pci_endpoint_test_write(struct pci_endpoint_test *test,
474 struct pci_endpoint_test_xfer_param param;
480 dma_addr_t phys_addr;
481 struct pci_dev *pdev = test->pdev;
482 struct device *dev = &pdev->dev;
484 dma_addr_t orig_phys_addr;
486 size_t alignment = test->alignment;
487 int irq_type = test->irq_type;
492 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
494 dev_err(dev, "Failed to get transfer param\n");
499 if (size > SIZE_MAX - alignment)
502 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
504 flags |= FLAG_USE_DMA;
506 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
507 dev_err(dev, "Invalid IRQ type option\n");
511 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
513 dev_err(dev, "Failed to allocate address\n");
518 get_random_bytes(orig_addr, size + alignment);
520 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
522 if (dma_mapping_error(dev, orig_phys_addr)) {
523 dev_err(dev, "failed to map source buffer address\n");
528 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
529 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
530 offset = phys_addr - orig_phys_addr;
531 addr = orig_addr + offset;
533 phys_addr = orig_phys_addr;
537 crc32 = crc32_le(~0, addr, size);
538 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_CHECKSUM,
541 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
542 lower_32_bits(phys_addr));
543 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
544 upper_32_bits(phys_addr));
546 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
548 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
549 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
550 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
551 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
554 wait_for_completion(&test->irq_raised);
556 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
557 if (reg & STATUS_READ_SUCCESS)
560 dma_unmap_single(dev, orig_phys_addr, size + alignment,
570 static bool pci_endpoint_test_read(struct pci_endpoint_test *test,
573 struct pci_endpoint_test_xfer_param param;
579 dma_addr_t phys_addr;
580 struct pci_dev *pdev = test->pdev;
581 struct device *dev = &pdev->dev;
583 dma_addr_t orig_phys_addr;
585 size_t alignment = test->alignment;
586 int irq_type = test->irq_type;
590 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
592 dev_err(dev, "Failed to get transfer param\n");
597 if (size > SIZE_MAX - alignment)
600 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
602 flags |= FLAG_USE_DMA;
604 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
605 dev_err(dev, "Invalid IRQ type option\n");
609 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
611 dev_err(dev, "Failed to allocate destination address\n");
616 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
618 if (dma_mapping_error(dev, orig_phys_addr)) {
619 dev_err(dev, "failed to map source buffer address\n");
624 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
625 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
626 offset = phys_addr - orig_phys_addr;
627 addr = orig_addr + offset;
629 phys_addr = orig_phys_addr;
633 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
634 lower_32_bits(phys_addr));
635 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
636 upper_32_bits(phys_addr));
638 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
640 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
641 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
642 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
643 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
646 wait_for_completion(&test->irq_raised);
648 dma_unmap_single(dev, orig_phys_addr, size + alignment,
651 crc32 = crc32_le(~0, addr, size);
652 if (crc32 == pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_CHECKSUM))
661 static bool pci_endpoint_test_clear_irq(struct pci_endpoint_test *test)
663 pci_endpoint_test_release_irq(test);
664 pci_endpoint_test_free_irq_vectors(test);
668 static bool pci_endpoint_test_set_irq(struct pci_endpoint_test *test,
671 struct pci_dev *pdev = test->pdev;
672 struct device *dev = &pdev->dev;
674 if (req_irq_type < IRQ_TYPE_LEGACY || req_irq_type > IRQ_TYPE_MSIX) {
675 dev_err(dev, "Invalid IRQ type option\n");
679 if (test->irq_type == req_irq_type)
682 pci_endpoint_test_release_irq(test);
683 pci_endpoint_test_free_irq_vectors(test);
685 if (!pci_endpoint_test_alloc_irq_vectors(test, req_irq_type))
688 if (!pci_endpoint_test_request_irq(test))
694 pci_endpoint_test_free_irq_vectors(test);
698 static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
703 struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
704 struct pci_dev *pdev = test->pdev;
706 mutex_lock(&test->mutex);
712 if (is_am654_pci_dev(pdev) && bar == BAR_0)
714 ret = pci_endpoint_test_bar(test, bar);
716 case PCITEST_LEGACY_IRQ:
717 ret = pci_endpoint_test_legacy_irq(test);
721 ret = pci_endpoint_test_msi_irq(test, arg, cmd == PCITEST_MSIX);
724 ret = pci_endpoint_test_write(test, arg);
727 ret = pci_endpoint_test_read(test, arg);
730 ret = pci_endpoint_test_copy(test, arg);
732 case PCITEST_SET_IRQTYPE:
733 ret = pci_endpoint_test_set_irq(test, arg);
735 case PCITEST_GET_IRQTYPE:
738 case PCITEST_CLEAR_IRQ:
739 ret = pci_endpoint_test_clear_irq(test);
744 mutex_unlock(&test->mutex);
748 static const struct file_operations pci_endpoint_test_fops = {
749 .owner = THIS_MODULE,
750 .unlocked_ioctl = pci_endpoint_test_ioctl,
753 static int pci_endpoint_test_probe(struct pci_dev *pdev,
754 const struct pci_device_id *ent)
761 struct device *dev = &pdev->dev;
762 struct pci_endpoint_test *test;
763 struct pci_endpoint_test_data *data;
764 enum pci_barno test_reg_bar = BAR_0;
765 struct miscdevice *misc_device;
767 if (pci_is_bridge(pdev))
770 test = devm_kzalloc(dev, sizeof(*test), GFP_KERNEL);
774 test->test_reg_bar = 0;
777 test->irq_type = IRQ_TYPE_UNDEFINED;
780 irq_type = IRQ_TYPE_LEGACY;
782 data = (struct pci_endpoint_test_data *)ent->driver_data;
784 test_reg_bar = data->test_reg_bar;
785 test->test_reg_bar = test_reg_bar;
786 test->alignment = data->alignment;
787 irq_type = data->irq_type;
790 init_completion(&test->irq_raised);
791 mutex_init(&test->mutex);
793 if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) != 0) &&
794 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
795 dev_err(dev, "Cannot set DMA mask\n");
799 err = pci_enable_device(pdev);
801 dev_err(dev, "Cannot enable PCI device\n");
805 err = pci_request_regions(pdev, DRV_MODULE_NAME);
807 dev_err(dev, "Cannot obtain PCI resources\n");
808 goto err_disable_pdev;
811 pci_set_master(pdev);
813 if (!pci_endpoint_test_alloc_irq_vectors(test, irq_type)) {
815 goto err_disable_irq;
818 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
819 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
820 base = pci_ioremap_bar(pdev, bar);
822 dev_err(dev, "Failed to read BAR%d\n", bar);
823 WARN_ON(bar == test_reg_bar);
825 test->bar[bar] = base;
829 test->base = test->bar[test_reg_bar];
832 dev_err(dev, "Cannot perform PCI test without BAR%d\n",
837 pci_set_drvdata(pdev, test);
839 id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);
842 dev_err(dev, "Unable to get id\n");
846 snprintf(name, sizeof(name), DRV_MODULE_NAME ".%d", id);
847 test->name = kstrdup(name, GFP_KERNEL);
853 if (!pci_endpoint_test_request_irq(test)) {
855 goto err_kfree_test_name;
858 misc_device = &test->miscdev;
859 misc_device->minor = MISC_DYNAMIC_MINOR;
860 misc_device->name = kstrdup(name, GFP_KERNEL);
861 if (!misc_device->name) {
863 goto err_release_irq;
865 misc_device->fops = &pci_endpoint_test_fops,
867 err = misc_register(misc_device);
869 dev_err(dev, "Failed to register device\n");
876 kfree(misc_device->name);
879 pci_endpoint_test_release_irq(test);
885 ida_simple_remove(&pci_endpoint_test_ida, id);
888 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
890 pci_iounmap(pdev, test->bar[bar]);
894 pci_endpoint_test_free_irq_vectors(test);
895 pci_release_regions(pdev);
898 pci_disable_device(pdev);
903 static void pci_endpoint_test_remove(struct pci_dev *pdev)
907 struct pci_endpoint_test *test = pci_get_drvdata(pdev);
908 struct miscdevice *misc_device = &test->miscdev;
910 if (sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) != 1)
915 misc_deregister(&test->miscdev);
916 kfree(misc_device->name);
918 ida_simple_remove(&pci_endpoint_test_ida, id);
919 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
921 pci_iounmap(pdev, test->bar[bar]);
924 pci_endpoint_test_release_irq(test);
925 pci_endpoint_test_free_irq_vectors(test);
927 pci_release_regions(pdev);
928 pci_disable_device(pdev);
931 static const struct pci_endpoint_test_data default_data = {
932 .test_reg_bar = BAR_0,
934 .irq_type = IRQ_TYPE_MSI,
937 static const struct pci_endpoint_test_data am654_data = {
938 .test_reg_bar = BAR_2,
940 .irq_type = IRQ_TYPE_MSI,
943 static const struct pci_endpoint_test_data j721e_data = {
945 .irq_type = IRQ_TYPE_MSI,
948 static const struct pci_device_id pci_endpoint_test_tbl[] = {
949 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x),
950 .driver_data = (kernel_ulong_t)&default_data,
952 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x),
953 .driver_data = (kernel_ulong_t)&default_data,
955 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0),
956 .driver_data = (kernel_ulong_t)&default_data,
958 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_LS1088A),
959 .driver_data = (kernel_ulong_t)&default_data,
961 { PCI_DEVICE_DATA(SYNOPSYS, EDDA, NULL) },
962 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
963 .driver_data = (kernel_ulong_t)&am654_data
965 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774A1),},
966 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774B1),},
967 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774C0),},
968 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774E1),},
969 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721E),
970 .driver_data = (kernel_ulong_t)&j721e_data,
974 MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
976 static struct pci_driver pci_endpoint_test_driver = {
977 .name = DRV_MODULE_NAME,
978 .id_table = pci_endpoint_test_tbl,
979 .probe = pci_endpoint_test_probe,
980 .remove = pci_endpoint_test_remove,
981 .sriov_configure = pci_sriov_configure_simple,
983 module_pci_driver(pci_endpoint_test_driver);
985 MODULE_DESCRIPTION("PCI ENDPOINT TEST HOST DRIVER");
986 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
987 MODULE_LICENSE("GPL v2");