1 // SPDX-License-Identifier: GPL-2.0-only
3 * Host side test driver to test endpoint functionality
5 * Copyright (C) 2017 Texas Instruments
6 * Author: Kishon Vijay Abraham I <kishon@ti.com>
9 #include <linux/crc32.h>
10 #include <linux/delay.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
15 #include <linux/miscdevice.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/random.h>
19 #include <linux/slab.h>
20 #include <linux/uaccess.h>
21 #include <linux/pci.h>
22 #include <linux/pci_ids.h>
24 #include <linux/pci_regs.h>
26 #include <uapi/linux/pcitest.h>
28 #define DRV_MODULE_NAME "pci-endpoint-test"
30 #define IRQ_TYPE_UNDEFINED -1
31 #define IRQ_TYPE_LEGACY 0
32 #define IRQ_TYPE_MSI 1
33 #define IRQ_TYPE_MSIX 2
35 #define PCI_ENDPOINT_TEST_MAGIC 0x0
37 #define PCI_ENDPOINT_TEST_COMMAND 0x4
38 #define COMMAND_RAISE_LEGACY_IRQ BIT(0)
39 #define COMMAND_RAISE_MSI_IRQ BIT(1)
40 #define COMMAND_RAISE_MSIX_IRQ BIT(2)
41 #define COMMAND_READ BIT(3)
42 #define COMMAND_WRITE BIT(4)
43 #define COMMAND_COPY BIT(5)
45 #define PCI_ENDPOINT_TEST_STATUS 0x8
46 #define STATUS_READ_SUCCESS BIT(0)
47 #define STATUS_READ_FAIL BIT(1)
48 #define STATUS_WRITE_SUCCESS BIT(2)
49 #define STATUS_WRITE_FAIL BIT(3)
50 #define STATUS_COPY_SUCCESS BIT(4)
51 #define STATUS_COPY_FAIL BIT(5)
52 #define STATUS_IRQ_RAISED BIT(6)
53 #define STATUS_SRC_ADDR_INVALID BIT(7)
54 #define STATUS_DST_ADDR_INVALID BIT(8)
56 #define PCI_ENDPOINT_TEST_LOWER_SRC_ADDR 0x0c
57 #define PCI_ENDPOINT_TEST_UPPER_SRC_ADDR 0x10
59 #define PCI_ENDPOINT_TEST_LOWER_DST_ADDR 0x14
60 #define PCI_ENDPOINT_TEST_UPPER_DST_ADDR 0x18
62 #define PCI_ENDPOINT_TEST_SIZE 0x1c
63 #define PCI_ENDPOINT_TEST_CHECKSUM 0x20
65 #define PCI_ENDPOINT_TEST_IRQ_TYPE 0x24
66 #define PCI_ENDPOINT_TEST_IRQ_NUMBER 0x28
68 #define PCI_ENDPOINT_TEST_FLAGS 0x2c
69 #define FLAG_USE_DMA BIT(0)
71 #define PCI_DEVICE_ID_TI_AM654 0xb00c
72 #define PCI_DEVICE_ID_TI_J7200 0xb00f
73 #define PCI_DEVICE_ID_TI_AM64 0xb010
74 #define PCI_DEVICE_ID_LS1088A 0x80c0
76 #define is_am654_pci_dev(pdev) \
77 ((pdev)->device == PCI_DEVICE_ID_TI_AM654)
79 #define PCI_DEVICE_ID_RENESAS_R8A774A1 0x0028
80 #define PCI_DEVICE_ID_RENESAS_R8A774B1 0x002b
81 #define PCI_DEVICE_ID_RENESAS_R8A774C0 0x002d
82 #define PCI_DEVICE_ID_RENESAS_R8A774E1 0x0025
84 static DEFINE_IDA(pci_endpoint_test_ida);
86 #define to_endpoint_test(priv) container_of((priv), struct pci_endpoint_test, \
90 module_param(no_msi, bool, 0444);
91 MODULE_PARM_DESC(no_msi, "Disable MSI interrupt in pci_endpoint_test");
93 static int irq_type = IRQ_TYPE_MSI;
94 module_param(irq_type, int, 0444);
95 MODULE_PARM_DESC(irq_type, "IRQ mode selection in pci_endpoint_test (0 - Legacy, 1 - MSI, 2 - MSI-X)");
106 struct pci_endpoint_test {
107 struct pci_dev *pdev;
109 void __iomem *bar[PCI_STD_NUM_BARS];
110 struct completion irq_raised;
114 /* mutex to protect the ioctls */
116 struct miscdevice miscdev;
117 enum pci_barno test_reg_bar;
122 struct pci_endpoint_test_data {
123 enum pci_barno test_reg_bar;
128 static inline u32 pci_endpoint_test_readl(struct pci_endpoint_test *test,
131 return readl(test->base + offset);
134 static inline void pci_endpoint_test_writel(struct pci_endpoint_test *test,
135 u32 offset, u32 value)
137 writel(value, test->base + offset);
140 static inline u32 pci_endpoint_test_bar_readl(struct pci_endpoint_test *test,
143 return readl(test->bar[bar] + offset);
146 static inline void pci_endpoint_test_bar_writel(struct pci_endpoint_test *test,
147 int bar, u32 offset, u32 value)
149 writel(value, test->bar[bar] + offset);
152 static irqreturn_t pci_endpoint_test_irqhandler(int irq, void *dev_id)
154 struct pci_endpoint_test *test = dev_id;
157 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
158 if (reg & STATUS_IRQ_RAISED) {
159 test->last_irq = irq;
160 complete(&test->irq_raised);
161 reg &= ~STATUS_IRQ_RAISED;
163 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_STATUS,
169 static void pci_endpoint_test_free_irq_vectors(struct pci_endpoint_test *test)
171 struct pci_dev *pdev = test->pdev;
173 pci_free_irq_vectors(pdev);
174 test->irq_type = IRQ_TYPE_UNDEFINED;
177 static bool pci_endpoint_test_alloc_irq_vectors(struct pci_endpoint_test *test,
181 struct pci_dev *pdev = test->pdev;
182 struct device *dev = &pdev->dev;
186 case IRQ_TYPE_LEGACY:
187 irq = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_LEGACY);
189 dev_err(dev, "Failed to get Legacy interrupt\n");
192 irq = pci_alloc_irq_vectors(pdev, 1, 32, PCI_IRQ_MSI);
194 dev_err(dev, "Failed to get MSI interrupts\n");
197 irq = pci_alloc_irq_vectors(pdev, 1, 2048, PCI_IRQ_MSIX);
199 dev_err(dev, "Failed to get MSI-X interrupts\n");
202 dev_err(dev, "Invalid IRQ type selected\n");
210 test->irq_type = type;
211 test->num_irqs = irq;
216 static void pci_endpoint_test_release_irq(struct pci_endpoint_test *test)
219 struct pci_dev *pdev = test->pdev;
220 struct device *dev = &pdev->dev;
222 for (i = 0; i < test->num_irqs; i++)
223 devm_free_irq(dev, pci_irq_vector(pdev, i), test);
228 static bool pci_endpoint_test_request_irq(struct pci_endpoint_test *test)
232 struct pci_dev *pdev = test->pdev;
233 struct device *dev = &pdev->dev;
235 for (i = 0; i < test->num_irqs; i++) {
236 err = devm_request_irq(dev, pci_irq_vector(pdev, i),
237 pci_endpoint_test_irqhandler,
238 IRQF_SHARED, test->name, test);
247 case IRQ_TYPE_LEGACY:
248 dev_err(dev, "Failed to request IRQ %d for Legacy\n",
249 pci_irq_vector(pdev, i));
252 dev_err(dev, "Failed to request IRQ %d for MSI %d\n",
253 pci_irq_vector(pdev, i),
257 dev_err(dev, "Failed to request IRQ %d for MSI-X %d\n",
258 pci_irq_vector(pdev, i),
266 static bool pci_endpoint_test_bar(struct pci_endpoint_test *test,
267 enum pci_barno barno)
272 struct pci_dev *pdev = test->pdev;
274 if (!test->bar[barno])
277 size = pci_resource_len(pdev, barno);
279 if (barno == test->test_reg_bar)
282 for (j = 0; j < size; j += 4)
283 pci_endpoint_test_bar_writel(test, barno, j, 0xA0A0A0A0);
285 for (j = 0; j < size; j += 4) {
286 val = pci_endpoint_test_bar_readl(test, barno, j);
287 if (val != 0xA0A0A0A0)
294 static bool pci_endpoint_test_legacy_irq(struct pci_endpoint_test *test)
298 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
300 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 0);
301 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
302 COMMAND_RAISE_LEGACY_IRQ);
303 val = wait_for_completion_timeout(&test->irq_raised,
304 msecs_to_jiffies(1000));
311 static bool pci_endpoint_test_msi_irq(struct pci_endpoint_test *test,
312 u16 msi_num, bool msix)
315 struct pci_dev *pdev = test->pdev;
317 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE,
318 msix == false ? IRQ_TYPE_MSI :
320 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, msi_num);
321 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
322 msix == false ? COMMAND_RAISE_MSI_IRQ :
323 COMMAND_RAISE_MSIX_IRQ);
324 val = wait_for_completion_timeout(&test->irq_raised,
325 msecs_to_jiffies(1000));
329 if (pci_irq_vector(pdev, msi_num - 1) == test->last_irq)
335 static int pci_endpoint_test_validate_xfer_params(struct device *dev,
336 struct pci_endpoint_test_xfer_param *param, size_t alignment)
338 if (param->size > SIZE_MAX - alignment) {
339 dev_dbg(dev, "Maximum transfer data size exceeded\n");
346 static bool pci_endpoint_test_copy(struct pci_endpoint_test *test,
349 struct pci_endpoint_test_xfer_param param;
356 dma_addr_t src_phys_addr;
357 dma_addr_t dst_phys_addr;
358 struct pci_dev *pdev = test->pdev;
359 struct device *dev = &pdev->dev;
361 dma_addr_t orig_src_phys_addr;
363 dma_addr_t orig_dst_phys_addr;
365 size_t alignment = test->alignment;
366 int irq_type = test->irq_type;
371 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
373 dev_err(dev, "Failed to get transfer param\n");
377 err = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment);
383 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
385 flags |= FLAG_USE_DMA;
387 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
388 dev_err(dev, "Invalid IRQ type option\n");
392 orig_src_addr = kzalloc(size + alignment, GFP_KERNEL);
393 if (!orig_src_addr) {
394 dev_err(dev, "Failed to allocate source buffer\n");
399 get_random_bytes(orig_src_addr, size + alignment);
400 orig_src_phys_addr = dma_map_single(dev, orig_src_addr,
401 size + alignment, DMA_TO_DEVICE);
402 if (dma_mapping_error(dev, orig_src_phys_addr)) {
403 dev_err(dev, "failed to map source buffer address\n");
405 goto err_src_phys_addr;
408 if (alignment && !IS_ALIGNED(orig_src_phys_addr, alignment)) {
409 src_phys_addr = PTR_ALIGN(orig_src_phys_addr, alignment);
410 offset = src_phys_addr - orig_src_phys_addr;
411 src_addr = orig_src_addr + offset;
413 src_phys_addr = orig_src_phys_addr;
414 src_addr = orig_src_addr;
417 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
418 lower_32_bits(src_phys_addr));
420 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
421 upper_32_bits(src_phys_addr));
423 src_crc32 = crc32_le(~0, src_addr, size);
425 orig_dst_addr = kzalloc(size + alignment, GFP_KERNEL);
426 if (!orig_dst_addr) {
427 dev_err(dev, "Failed to allocate destination address\n");
432 orig_dst_phys_addr = dma_map_single(dev, orig_dst_addr,
433 size + alignment, DMA_FROM_DEVICE);
434 if (dma_mapping_error(dev, orig_dst_phys_addr)) {
435 dev_err(dev, "failed to map destination buffer address\n");
437 goto err_dst_phys_addr;
440 if (alignment && !IS_ALIGNED(orig_dst_phys_addr, alignment)) {
441 dst_phys_addr = PTR_ALIGN(orig_dst_phys_addr, alignment);
442 offset = dst_phys_addr - orig_dst_phys_addr;
443 dst_addr = orig_dst_addr + offset;
445 dst_phys_addr = orig_dst_phys_addr;
446 dst_addr = orig_dst_addr;
449 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
450 lower_32_bits(dst_phys_addr));
451 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
452 upper_32_bits(dst_phys_addr));
454 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE,
457 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
458 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
459 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
460 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
463 wait_for_completion(&test->irq_raised);
465 dma_unmap_single(dev, orig_dst_phys_addr, size + alignment,
468 dst_crc32 = crc32_le(~0, dst_addr, size);
469 if (dst_crc32 == src_crc32)
473 kfree(orig_dst_addr);
476 dma_unmap_single(dev, orig_src_phys_addr, size + alignment,
480 kfree(orig_src_addr);
486 static bool pci_endpoint_test_write(struct pci_endpoint_test *test,
489 struct pci_endpoint_test_xfer_param param;
495 dma_addr_t phys_addr;
496 struct pci_dev *pdev = test->pdev;
497 struct device *dev = &pdev->dev;
499 dma_addr_t orig_phys_addr;
501 size_t alignment = test->alignment;
502 int irq_type = test->irq_type;
507 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
509 dev_err(dev, "Failed to get transfer param\n");
513 err = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment);
519 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
521 flags |= FLAG_USE_DMA;
523 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
524 dev_err(dev, "Invalid IRQ type option\n");
528 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
530 dev_err(dev, "Failed to allocate address\n");
535 get_random_bytes(orig_addr, size + alignment);
537 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
539 if (dma_mapping_error(dev, orig_phys_addr)) {
540 dev_err(dev, "failed to map source buffer address\n");
545 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
546 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
547 offset = phys_addr - orig_phys_addr;
548 addr = orig_addr + offset;
550 phys_addr = orig_phys_addr;
554 crc32 = crc32_le(~0, addr, size);
555 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_CHECKSUM,
558 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_SRC_ADDR,
559 lower_32_bits(phys_addr));
560 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_SRC_ADDR,
561 upper_32_bits(phys_addr));
563 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
565 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
566 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
567 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
568 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
571 wait_for_completion(&test->irq_raised);
573 reg = pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_STATUS);
574 if (reg & STATUS_READ_SUCCESS)
577 dma_unmap_single(dev, orig_phys_addr, size + alignment,
587 static bool pci_endpoint_test_read(struct pci_endpoint_test *test,
590 struct pci_endpoint_test_xfer_param param;
596 dma_addr_t phys_addr;
597 struct pci_dev *pdev = test->pdev;
598 struct device *dev = &pdev->dev;
600 dma_addr_t orig_phys_addr;
602 size_t alignment = test->alignment;
603 int irq_type = test->irq_type;
607 err = copy_from_user(¶m, (void __user *)arg, sizeof(param));
609 dev_err(dev, "Failed to get transfer param\n");
613 err = pci_endpoint_test_validate_xfer_params(dev, ¶m, alignment);
619 use_dma = !!(param.flags & PCITEST_FLAGS_USE_DMA);
621 flags |= FLAG_USE_DMA;
623 if (irq_type < IRQ_TYPE_LEGACY || irq_type > IRQ_TYPE_MSIX) {
624 dev_err(dev, "Invalid IRQ type option\n");
628 orig_addr = kzalloc(size + alignment, GFP_KERNEL);
630 dev_err(dev, "Failed to allocate destination address\n");
635 orig_phys_addr = dma_map_single(dev, orig_addr, size + alignment,
637 if (dma_mapping_error(dev, orig_phys_addr)) {
638 dev_err(dev, "failed to map source buffer address\n");
643 if (alignment && !IS_ALIGNED(orig_phys_addr, alignment)) {
644 phys_addr = PTR_ALIGN(orig_phys_addr, alignment);
645 offset = phys_addr - orig_phys_addr;
646 addr = orig_addr + offset;
648 phys_addr = orig_phys_addr;
652 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_LOWER_DST_ADDR,
653 lower_32_bits(phys_addr));
654 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_UPPER_DST_ADDR,
655 upper_32_bits(phys_addr));
657 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_SIZE, size);
659 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_FLAGS, flags);
660 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_TYPE, irq_type);
661 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_IRQ_NUMBER, 1);
662 pci_endpoint_test_writel(test, PCI_ENDPOINT_TEST_COMMAND,
665 wait_for_completion(&test->irq_raised);
667 dma_unmap_single(dev, orig_phys_addr, size + alignment,
670 crc32 = crc32_le(~0, addr, size);
671 if (crc32 == pci_endpoint_test_readl(test, PCI_ENDPOINT_TEST_CHECKSUM))
680 static bool pci_endpoint_test_clear_irq(struct pci_endpoint_test *test)
682 pci_endpoint_test_release_irq(test);
683 pci_endpoint_test_free_irq_vectors(test);
687 static bool pci_endpoint_test_set_irq(struct pci_endpoint_test *test,
690 struct pci_dev *pdev = test->pdev;
691 struct device *dev = &pdev->dev;
693 if (req_irq_type < IRQ_TYPE_LEGACY || req_irq_type > IRQ_TYPE_MSIX) {
694 dev_err(dev, "Invalid IRQ type option\n");
698 if (test->irq_type == req_irq_type)
701 pci_endpoint_test_release_irq(test);
702 pci_endpoint_test_free_irq_vectors(test);
704 if (!pci_endpoint_test_alloc_irq_vectors(test, req_irq_type))
707 if (!pci_endpoint_test_request_irq(test))
713 pci_endpoint_test_free_irq_vectors(test);
717 static long pci_endpoint_test_ioctl(struct file *file, unsigned int cmd,
722 struct pci_endpoint_test *test = to_endpoint_test(file->private_data);
723 struct pci_dev *pdev = test->pdev;
725 mutex_lock(&test->mutex);
731 if (is_am654_pci_dev(pdev) && bar == BAR_0)
733 ret = pci_endpoint_test_bar(test, bar);
735 case PCITEST_LEGACY_IRQ:
736 ret = pci_endpoint_test_legacy_irq(test);
740 ret = pci_endpoint_test_msi_irq(test, arg, cmd == PCITEST_MSIX);
743 ret = pci_endpoint_test_write(test, arg);
746 ret = pci_endpoint_test_read(test, arg);
749 ret = pci_endpoint_test_copy(test, arg);
751 case PCITEST_SET_IRQTYPE:
752 ret = pci_endpoint_test_set_irq(test, arg);
754 case PCITEST_GET_IRQTYPE:
757 case PCITEST_CLEAR_IRQ:
758 ret = pci_endpoint_test_clear_irq(test);
763 mutex_unlock(&test->mutex);
767 static const struct file_operations pci_endpoint_test_fops = {
768 .owner = THIS_MODULE,
769 .unlocked_ioctl = pci_endpoint_test_ioctl,
772 static int pci_endpoint_test_probe(struct pci_dev *pdev,
773 const struct pci_device_id *ent)
780 struct device *dev = &pdev->dev;
781 struct pci_endpoint_test *test;
782 struct pci_endpoint_test_data *data;
783 enum pci_barno test_reg_bar = BAR_0;
784 struct miscdevice *misc_device;
786 if (pci_is_bridge(pdev))
789 test = devm_kzalloc(dev, sizeof(*test), GFP_KERNEL);
793 test->test_reg_bar = 0;
796 test->irq_type = IRQ_TYPE_UNDEFINED;
799 irq_type = IRQ_TYPE_LEGACY;
801 data = (struct pci_endpoint_test_data *)ent->driver_data;
803 test_reg_bar = data->test_reg_bar;
804 test->test_reg_bar = test_reg_bar;
805 test->alignment = data->alignment;
806 irq_type = data->irq_type;
809 init_completion(&test->irq_raised);
810 mutex_init(&test->mutex);
812 if ((dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48)) != 0) &&
813 dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32)) != 0) {
814 dev_err(dev, "Cannot set DMA mask\n");
818 err = pci_enable_device(pdev);
820 dev_err(dev, "Cannot enable PCI device\n");
824 err = pci_request_regions(pdev, DRV_MODULE_NAME);
826 dev_err(dev, "Cannot obtain PCI resources\n");
827 goto err_disable_pdev;
830 pci_set_master(pdev);
832 if (!pci_endpoint_test_alloc_irq_vectors(test, irq_type)) {
834 goto err_disable_irq;
837 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
838 if (pci_resource_flags(pdev, bar) & IORESOURCE_MEM) {
839 base = pci_ioremap_bar(pdev, bar);
841 dev_err(dev, "Failed to read BAR%d\n", bar);
842 WARN_ON(bar == test_reg_bar);
844 test->bar[bar] = base;
848 test->base = test->bar[test_reg_bar];
851 dev_err(dev, "Cannot perform PCI test without BAR%d\n",
856 pci_set_drvdata(pdev, test);
858 id = ida_simple_get(&pci_endpoint_test_ida, 0, 0, GFP_KERNEL);
861 dev_err(dev, "Unable to get id\n");
865 snprintf(name, sizeof(name), DRV_MODULE_NAME ".%d", id);
866 test->name = kstrdup(name, GFP_KERNEL);
872 if (!pci_endpoint_test_request_irq(test)) {
874 goto err_kfree_test_name;
877 misc_device = &test->miscdev;
878 misc_device->minor = MISC_DYNAMIC_MINOR;
879 misc_device->name = kstrdup(name, GFP_KERNEL);
880 if (!misc_device->name) {
882 goto err_release_irq;
884 misc_device->parent = &pdev->dev;
885 misc_device->fops = &pci_endpoint_test_fops,
887 err = misc_register(misc_device);
889 dev_err(dev, "Failed to register device\n");
896 kfree(misc_device->name);
899 pci_endpoint_test_release_irq(test);
905 ida_simple_remove(&pci_endpoint_test_ida, id);
908 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
910 pci_iounmap(pdev, test->bar[bar]);
914 pci_endpoint_test_free_irq_vectors(test);
915 pci_release_regions(pdev);
918 pci_disable_device(pdev);
923 static void pci_endpoint_test_remove(struct pci_dev *pdev)
927 struct pci_endpoint_test *test = pci_get_drvdata(pdev);
928 struct miscdevice *misc_device = &test->miscdev;
930 if (sscanf(misc_device->name, DRV_MODULE_NAME ".%d", &id) != 1)
935 misc_deregister(&test->miscdev);
936 kfree(misc_device->name);
938 ida_simple_remove(&pci_endpoint_test_ida, id);
939 for (bar = 0; bar < PCI_STD_NUM_BARS; bar++) {
941 pci_iounmap(pdev, test->bar[bar]);
944 pci_endpoint_test_release_irq(test);
945 pci_endpoint_test_free_irq_vectors(test);
947 pci_release_regions(pdev);
948 pci_disable_device(pdev);
951 static const struct pci_endpoint_test_data default_data = {
952 .test_reg_bar = BAR_0,
954 .irq_type = IRQ_TYPE_MSI,
957 static const struct pci_endpoint_test_data am654_data = {
958 .test_reg_bar = BAR_2,
960 .irq_type = IRQ_TYPE_MSI,
963 static const struct pci_endpoint_test_data j721e_data = {
965 .irq_type = IRQ_TYPE_MSI,
968 static const struct pci_device_id pci_endpoint_test_tbl[] = {
969 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA74x),
970 .driver_data = (kernel_ulong_t)&default_data,
972 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_DRA72x),
973 .driver_data = (kernel_ulong_t)&default_data,
975 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, 0x81c0),
976 .driver_data = (kernel_ulong_t)&default_data,
978 { PCI_DEVICE(PCI_VENDOR_ID_FREESCALE, PCI_DEVICE_ID_LS1088A),
979 .driver_data = (kernel_ulong_t)&default_data,
981 { PCI_DEVICE_DATA(SYNOPSYS, EDDA, NULL) },
982 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM654),
983 .driver_data = (kernel_ulong_t)&am654_data
985 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774A1),},
986 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774B1),},
987 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774C0),},
988 { PCI_DEVICE(PCI_VENDOR_ID_RENESAS, PCI_DEVICE_ID_RENESAS_R8A774E1),},
989 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J721E),
990 .driver_data = (kernel_ulong_t)&j721e_data,
992 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_J7200),
993 .driver_data = (kernel_ulong_t)&j721e_data,
995 { PCI_DEVICE(PCI_VENDOR_ID_TI, PCI_DEVICE_ID_TI_AM64),
996 .driver_data = (kernel_ulong_t)&j721e_data,
1000 MODULE_DEVICE_TABLE(pci, pci_endpoint_test_tbl);
1002 static struct pci_driver pci_endpoint_test_driver = {
1003 .name = DRV_MODULE_NAME,
1004 .id_table = pci_endpoint_test_tbl,
1005 .probe = pci_endpoint_test_probe,
1006 .remove = pci_endpoint_test_remove,
1007 .sriov_configure = pci_sriov_configure_simple,
1009 module_pci_driver(pci_endpoint_test_driver);
1011 MODULE_DESCRIPTION("PCI ENDPOINT TEST HOST DRIVER");
1012 MODULE_AUTHOR("Kishon Vijay Abraham I <kishon@ti.com>");
1013 MODULE_LICENSE("GPL v2");