1 // SPDX-License-Identifier: GPL-2.0
11 #include <dm/device-internal.h>
12 #include <asm/arch/s400_api.h>
13 #include <asm/arch/imx-regs.h>
14 #include <linux/iopoll.h>
17 DECLARE_GLOBAL_DATA_PTR;
23 #define MU_SR_TE0_MASK BIT(0)
24 #define MU_SR_RF0_MASK BIT(0)
28 void mu_hal_init(ulong base)
30 struct mu_type *mu_base = (struct mu_type *)base;
32 writel(0, &mu_base->tcr);
33 writel(0, &mu_base->rcr);
36 int mu_hal_sendmsg(ulong base, u32 reg_index, u32 msg)
38 struct mu_type *mu_base = (struct mu_type *)base;
39 u32 mask = MU_SR_TE0_MASK << reg_index;
43 assert(reg_index < MU_TR_COUNT);
45 debug("sendmsg sr 0x%x\n", readl(&mu_base->sr));
47 /* Wait TX register to be empty. */
48 ret = readl_poll_timeout(&mu_base->tsr, val, val & mask, 10000);
50 debug("%s timeout\n", __func__);
54 debug("tr[%d] 0x%x\n", reg_index, msg);
56 writel(msg, &mu_base->tr[reg_index]);
61 int mu_hal_receivemsg(ulong base, u32 reg_index, u32 *msg)
63 struct mu_type *mu_base = (struct mu_type *)base;
64 u32 mask = MU_SR_RF0_MASK << reg_index;
68 assert(reg_index < MU_TR_COUNT);
70 debug("receivemsg sr 0x%x\n", readl(&mu_base->sr));
72 /* Wait RX register to be full. */
73 ret = readl_poll_timeout(&mu_base->rsr, val, val & mask, 10000);
75 debug("%s timeout\n", __func__);
79 *msg = readl(&mu_base->rr[reg_index]);
81 debug("rr[%d] 0x%x\n", reg_index, *msg);
86 static int imx8ulp_mu_read(struct mu_type *base, void *data)
88 struct imx8ulp_s400_msg *msg = (struct imx8ulp_s400_msg *)data;
96 ret = mu_hal_receivemsg((ulong)base, 0, (u32 *)msg);
102 if (msg->size > S400_MAX_MSG) {
107 /* Read remaining words */
108 while (count < msg->size) {
109 ret = mu_hal_receivemsg((ulong)base, count % MU_RR_COUNT,
110 &msg->data[count - 1]);
119 static int imx8ulp_mu_write(struct mu_type *base, void *data)
121 struct imx8ulp_s400_msg *msg = (struct imx8ulp_s400_msg *)data;
129 if (msg->size > S400_MAX_MSG)
132 /* Write first word */
133 ret = mu_hal_sendmsg((ulong)base, 0, *((u32 *)msg));
138 /* Write remaining words */
139 while (count < msg->size) {
140 ret = mu_hal_sendmsg((ulong)base, count % MU_TR_COUNT,
141 msg->data[count - 1]);
151 * Note the function prototype use msgid as the 2nd parameter, here
152 * we take it as no_resp.
154 static int imx8ulp_mu_call(struct udevice *dev, int no_resp, void *tx_msg,
155 int tx_size, void *rx_msg, int rx_size)
157 struct imx8ulp_mu *priv = dev_get_priv(dev);
161 /* Expect tx_msg, rx_msg are the same value */
162 if (rx_msg && tx_msg != rx_msg)
163 printf("tx_msg %p, rx_msg %p\n", tx_msg, rx_msg);
165 ret = imx8ulp_mu_write(priv->base, tx_msg);
169 ret = imx8ulp_mu_read(priv->base, rx_msg);
174 result = ((struct imx8ulp_s400_msg *)rx_msg)->data[0];
175 if ((result & 0xff) == 0xd6)
181 static int imx8ulp_mu_probe(struct udevice *dev)
183 struct imx8ulp_mu *priv = dev_get_priv(dev);
186 debug("%s(dev=%p) (priv=%p)\n", __func__, dev, priv);
188 addr = devfdt_get_addr(dev);
189 if (addr == FDT_ADDR_T_NONE)
192 priv->base = (struct mu_type *)addr;
194 debug("mu base 0x%lx\n", (ulong)priv->base);
196 /* U-Boot not enable interrupts, so need to enable RX interrupts */
197 mu_hal_init((ulong)priv->base);
199 gd->arch.s400_dev = dev;
204 static int imx8ulp_mu_remove(struct udevice *dev)
209 static int imx8ulp_mu_bind(struct udevice *dev)
211 debug("%s(dev=%p)\n", __func__, dev);
216 static struct misc_ops imx8ulp_mu_ops = {
217 .call = imx8ulp_mu_call,
220 static const struct udevice_id imx8ulp_mu_ids[] = {
221 { .compatible = "fsl,imx8ulp-mu" },
225 U_BOOT_DRIVER(imx8ulp_mu) = {
226 .name = "imx8ulp_mu",
228 .of_match = imx8ulp_mu_ids,
229 .probe = imx8ulp_mu_probe,
230 .bind = imx8ulp_mu_bind,
231 .remove = imx8ulp_mu_remove,
232 .ops = &imx8ulp_mu_ops,
233 .priv_auto = sizeof(struct imx8ulp_mu),