1 // SPDX-License-Identifier: GPL-2.0
10 #include <asm/arch/sci/sci.h>
11 #include <asm/arch/sys_proto.h>
12 #include <linux/arm-smccc.h>
14 DECLARE_GLOBAL_DATA_PTR;
16 #define FSL_ECC_WORD_START_1 0x10
17 #define FSL_ECC_WORD_END_1 0x10F
20 #define FSL_ECC_WORD_START_2 0x1A0
21 #define FSL_ECC_WORD_END_2 0x1FF
22 #elif defined(CONFIG_IMX8QXP)
23 #define FSL_ECC_WORD_START_2 0x220
24 #define FSL_ECC_WORD_END_2 0x31F
27 #define FSL_QXP_FUSE_GAP_START 0x110
28 #define FSL_QXP_FUSE_GAP_END 0x21F
30 #define FSL_SIP_OTP_READ 0xc200000A
31 #define FSL_SIP_OTP_WRITE 0xc200000B
33 int fuse_read(u32 bank, u32 word, u32 *val)
35 return fuse_sense(bank, word, val);
38 int fuse_sense(u32 bank, u32 word, u32 *val)
40 struct arm_smccc_res res;
43 printf("Invalid bank argument, ONLY bank 0 is supported\n");
47 arm_smccc_smc(FSL_SIP_OTP_READ, (unsigned long)word, 0, 0,
54 int fuse_prog(u32 bank, u32 word, u32 val)
56 struct arm_smccc_res res;
59 printf("Invalid bank argument, ONLY bank 0 is supported\n");
63 if (IS_ENABLED(CONFIG_IMX8QXP)) {
64 if (word >= FSL_QXP_FUSE_GAP_START &&
65 word <= FSL_QXP_FUSE_GAP_END) {
66 printf("Invalid word argument for this SoC\n");
71 if ((word >= FSL_ECC_WORD_START_1 && word <= FSL_ECC_WORD_END_1) ||
72 (word >= FSL_ECC_WORD_START_2 && word <= FSL_ECC_WORD_END_2)) {
73 puts("Warning: Words in this index range have ECC protection\n"
74 "and can only be programmed once per word. Individual bit\n"
75 "operations will be rejected after the first one.\n"
76 "\n\n Really program this word? <y/N>\n");
78 if (!confirm_yesno()) {
79 puts("Word programming aborted\n");
84 arm_smccc_smc(FSL_SIP_OTP_WRITE, (unsigned long)word,
85 (unsigned long)val, 0, 0, 0, 0, 0, &res);
90 int fuse_override(u32 bank, u32 word, u32 val)
92 printf("Override fuse to i.MX8 in u-boot is forbidden\n");