1 /******************************************************************************
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4 * USE OF THIS SOFTWARE (including any copy or compiled version thereof) AND *
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5 * DOCUMENTATION IS SUBJECT TO THE SOFTWARE LICENSE AND RESTRICTIONS AND THE *
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6 * WARRANTY DISLCAIMER SET FORTH IN LEGAL_NOTICE.TXT FILE. IF YOU DO NOT *
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7 * FULLY ACCEPT THE TERMS, YOU MAY NOT INSTALL OR OTHERWISE USE THE SOFTWARE *
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8 * OR DOCUMENTATION. *
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9 * NOTWITHSTANDING ANYTHING TO THE CONTRARY IN THIS NOTICE, INSTALLING OR *
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10 * OTHERISE USING THE SOFTWARE OR DOCUMENTATION INDICATES YOUR ACCEPTANCE OF *
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11 * THE LICENSE TERMS AS STATED. *
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13 ******************************************************************************/
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14 /* Version: 1.8.9\3686 */
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16 /* Date : 12/08/2012 */
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20 \brief CellGuide CGX5900 driver core prototypes (non-OS depended)
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21 \attention This file should not be modified.
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22 If you think something is wrong here, please contact CellGuide
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26 #ifndef CGX_DRIVR_CORE_COMMON_H
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27 #define CGX_DRIVR_CORE_COMMON_H
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30 #include "CgReturnCodes.h"
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31 #include "CgxDriverApi.h"
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33 // Access to the APB
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34 #define CGCORE_REG_OFFSET_SAT_RAM (0x100)
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35 #define CGCORE_REG_OFFSET_SAT_RAM_LAST (0x1FC)
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36 #define CGCORE_REG_OFFSET_APB_COMMAND (0x090)
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37 #define CGCORE_REG_OFFSET_APB_DATA (0x094)
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39 // CG Core interrupt codes
40 #define CGCORE_INT_RTC (0x00000001) // RTC timer has reached its threshold Interrupt
41 #define CGCORE_INT_SNAP_START (0x00000002) // StartSnap occurred Interrupt
42 #define CGCORE_INT_SNAP_END (0x00000004) // Snap completed successfully Interrupt
43 #define CGCORE_INT_TCXO_EXPIRED (0x00000008) // TCXO timer has reached its threshold Interrupt
44 #define CGCORE_INT_OVERRUN (0x00000010) // A buffer overrun occurred interrupt. Hence the last snap is invalid.
45 #define CGCORE_INT_EOT (0x00000020) // End of BS tracking period Interrupt
46 #define CGCORE_INT_EOM (0x00000040) // End of drift meas measurement period Interrupt
48 #ifdef CGCORE_ACCESS_VIA_SPI
49 #define CGCORE_INT_DMA_REQ (0x00002000)
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50 #define CGCORE_INT_DMA_OVERRUN (0x00004000)
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53 #define CGCORE_REG_INT_RAW (0x80)
54 #define CGCORE_REG_INT_SRC (0x84)
55 #define CGCORE_REG_INT_EN (0x88)
56 #define CGCORE_REG_INT_CLR (0x8C)
60 Define the incoming data byte order
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62 extern const TCgByteOrder CGX_DRIVER_NATIVE_BYTE_ORDER;
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64 BOOL isBlockCanceled(TCgxDriverState * apState, U32 aBlockNumber);
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