1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2008 Extreme Engineering Solutions, Inc.
7 * Driver for DS4510, a CPU supervisor with integrated EEPROM, SRAM,
8 * and 4 programmable non-volatile GPIO pins.
13 #include <linux/delay.h>
30 * Write to DS4510, taking page boundaries into account
32 static int ds4510_mem_write(uint8_t chip, int offset, uint8_t *buf, int count)
38 wrlen = DS4510_EEPROM_PAGE_SIZE -
39 DS4510_EEPROM_PAGE_OFFSET(offset);
42 if (i2c_write(chip, offset, 1, &buf[i], wrlen))
46 * This delay isn't needed for SRAM writes but shouldn't delay
47 * things too much, so do it unconditionally for simplicity
49 udelay(DS4510_EEPROM_PAGE_WRITE_DELAY_MS * 1000);
59 * General read from DS4510
61 static int ds4510_mem_read(uint8_t chip, int offset, uint8_t *buf, int count)
63 return i2c_read(chip, offset, 1, buf, count);
67 * Write SEE bit in config register.
68 * nv = 0 - Writes to SEEPROM registers behave like EEPROM
69 * nv = 1 - Writes to SEEPROM registers behave like SRAM
71 static int ds4510_see_write(uint8_t chip, uint8_t nv)
75 if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
78 if (nv) /* Treat SEEPROM bits as EEPROM */
79 data &= ~DS4510_CFG_SEE;
80 else /* Treat SEEPROM bits as SRAM */
81 data |= DS4510_CFG_SEE;
83 return ds4510_mem_write(chip, DS4510_CFG, &data, 1);
87 * Write de-assertion of reset signal delay
89 static int ds4510_rstdelay_write(uint8_t chip, uint8_t delay)
93 if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
96 data &= ~DS4510_RSTDELAY_MASK;
97 data |= delay & DS4510_RSTDELAY_MASK;
99 return ds4510_mem_write(chip, DS4510_RSTDELAY, &data, 1);
103 * Write pullup characteristics of IO pins
105 static int ds4510_pullup_write(uint8_t chip, uint8_t val)
107 val &= DS4510_IO_MASK;
109 return ds4510_mem_write(chip, DS4510_PULLUP, (uint8_t *)&val, 1);
113 * Read pullup characteristics of IO pins
115 static int ds4510_pullup_read(uint8_t chip)
119 if (i2c_read(chip, DS4510_PULLUP, 1, &val, 1))
122 return val & DS4510_IO_MASK;
126 * Write drive level of IO pins
128 static int ds4510_gpio_write(uint8_t chip, uint8_t val)
133 for (i = 0; i < DS4510_NUM_IO; i++) {
134 if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
137 if (val & (0x1 << i))
142 if (ds4510_mem_write(chip, DS4510_IO0 - i, &data, 1))
150 * Read drive level of IO pins
152 static int ds4510_gpio_read(uint8_t chip)
158 for (i = 0; i < DS4510_NUM_IO; i++) {
159 if (i2c_read(chip, DS4510_IO0 - i, 1, &data, 1))
170 * Read physical level of IO pins
172 static int ds4510_gpio_read_val(uint8_t chip)
176 if (i2c_read(chip, DS4510_IO_STATUS, 1, &val, 1))
179 return val & DS4510_IO_MASK;
183 * Display DS4510 information
185 static int ds4510_info(uint8_t chip)
191 printf("DS4510 @ 0x%x:\n\n", chip);
193 if (i2c_read(chip, DS4510_RSTDELAY, 1, &data, 1))
195 printf("rstdelay = 0x%x\n\n", data & DS4510_RSTDELAY_MASK);
197 if (i2c_read(chip, DS4510_CFG, 1, &data, 1))
199 printf("config = 0x%x\n", data);
200 printf(" /ready = %d\n", data & DS4510_CFG_READY ? 1 : 0);
201 printf(" trip pt = %d\n", data & DS4510_CFG_TRIP_POINT ? 1 : 0);
202 printf(" rst sts = %d\n", data & DS4510_CFG_RESET ? 1 : 0);
203 printf(" /see = %d\n", data & DS4510_CFG_SEE ? 1 : 0);
204 printf(" swrst = %d\n\n", data & DS4510_CFG_SWRST ? 1 : 0);
206 printf("gpio pins: 3210\n");
207 printf("---------------\n");
210 tmp = ds4510_pullup_read(chip);
213 for (i = DS4510_NUM_IO - 1; i >= 0; i--)
214 printf("%d", (tmp & (1 << i)) ? 1 : 0);
218 tmp = ds4510_gpio_read(chip);
221 for (i = DS4510_NUM_IO - 1; i >= 0; i--)
222 printf("%d", (tmp & (1 << i)) ? 1 : 0);
226 tmp = ds4510_gpio_read_val(chip);
229 for (i = DS4510_NUM_IO - 1; i >= 0; i--)
230 printf("%d", (tmp & (1 << i)) ? 1 : 0);
236 struct cmd_tbl cmd_ds4510[] = {
237 U_BOOT_CMD_MKENT(device, 3, 0, (void *)DS4510_CMD_DEVICE, "", ""),
238 U_BOOT_CMD_MKENT(nv, 3, 0, (void *)DS4510_CMD_NV, "", ""),
239 U_BOOT_CMD_MKENT(output, 4, 0, (void *)DS4510_CMD_OUTPUT, "", ""),
240 U_BOOT_CMD_MKENT(input, 3, 0, (void *)DS4510_CMD_INPUT, "", ""),
241 U_BOOT_CMD_MKENT(pullup, 4, 0, (void *)DS4510_CMD_PULLUP, "", ""),
242 U_BOOT_CMD_MKENT(info, 2, 0, (void *)DS4510_CMD_INFO, "", ""),
243 U_BOOT_CMD_MKENT(rstdelay, 3, 0, (void *)DS4510_CMD_RSTDELAY, "", ""),
244 U_BOOT_CMD_MKENT(eeprom, 6, 0, (void *)DS4510_CMD_EEPROM, "", ""),
245 U_BOOT_CMD_MKENT(seeprom, 6, 0, (void *)DS4510_CMD_SEEPROM, "", ""),
246 U_BOOT_CMD_MKENT(sram, 6, 0, (void *)DS4510_CMD_SRAM, "", ""),
249 int do_ds4510(struct cmd_tbl *cmdtp, int flag, int argc, char *const argv[])
251 static uint8_t chip = 0x51;
260 int (*rw_func)(uint8_t, int, uint8_t *, int);
262 c = find_cmd_tbl(argv[1], cmd_ds4510, ARRAY_SIZE(cmd_ds4510));
264 /* All commands but "device" require 'maxargs' arguments */
265 if (!c || !((argc == (c->maxargs)) ||
266 (((int)c->cmd == DS4510_CMD_DEVICE) &&
267 (argc == (c->maxargs - 1))))) {
268 return cmd_usage(cmdtp);
271 /* arg2 used as chip addr and pin number */
273 ul_arg2 = hextoul(argv[2], NULL);
275 /* arg3 used as output/pullup value */
277 ul_arg3 = hextoul(argv[3], NULL);
279 switch ((int)c->cmd) {
280 case DS4510_CMD_DEVICE:
283 printf("Current device address: 0x%x\n", chip);
286 return ds4510_see_write(chip, ul_arg2);
287 case DS4510_CMD_OUTPUT:
288 tmp = ds4510_gpio_read(chip);
292 tmp |= (1 << ul_arg2);
294 tmp &= ~(1 << ul_arg2);
295 return ds4510_gpio_write(chip, tmp);
296 case DS4510_CMD_INPUT:
297 tmp = ds4510_gpio_read_val(chip);
300 return (tmp & (1 << ul_arg2)) != 0;
301 case DS4510_CMD_PULLUP:
302 tmp = ds4510_pullup_read(chip);
306 tmp |= (1 << ul_arg2);
308 tmp &= ~(1 << ul_arg2);
309 return ds4510_pullup_write(chip, tmp);
310 case DS4510_CMD_INFO:
311 return ds4510_info(chip);
312 case DS4510_CMD_RSTDELAY:
313 return ds4510_rstdelay_write(chip, ul_arg2);
314 case DS4510_CMD_EEPROM:
315 end = DS4510_EEPROM + DS4510_EEPROM_SIZE;
318 case DS4510_CMD_SEEPROM:
319 end = DS4510_SEEPROM + DS4510_SEEPROM_SIZE;
320 off = DS4510_SEEPROM;
322 case DS4510_CMD_SRAM:
323 end = DS4510_SRAM + DS4510_SRAM_SIZE;
327 /* We should never get here... */
331 /* Only eeprom, seeprom, and sram commands should make it here */
332 if (strcmp(argv[2], "read") == 0)
333 rw_func = ds4510_mem_read;
334 else if (strcmp(argv[2], "write") == 0)
335 rw_func = ds4510_mem_write;
337 return cmd_usage(cmdtp);
339 addr = hextoul(argv[3], NULL);
340 off += hextoul(argv[4], NULL);
341 cnt = hextoul(argv[5], NULL);
343 if ((off + cnt) > end) {
344 printf("ERROR: invalid len\n");
348 return rw_func(chip, off, (uint8_t *)addr, cnt);
352 ds4510, 6, 1, do_ds4510,
353 "ds4510 eeprom/seeprom/sram/gpio access",
355 " - show or set current device address\n"
357 " - display ds4510 info\n"
358 "ds4510 output pin 0|1\n"
359 " - set pin low or high-Z\n"
361 " - read value of pin\n"
362 "ds4510 pullup pin 0|1\n"
363 " - disable/enable pullup on specified pin\n"
365 " - make gpio and seeprom writes volatile/non-volatile"
367 "ds4510 rstdelay 0-3\n"
368 " - set reset output delay"
370 "ds4510 eeprom read addr off cnt\n"
371 "ds4510 eeprom write addr off cnt\n"
372 " - read/write 'cnt' bytes at EEPROM offset 'off'\n"
373 "ds4510 seeprom read addr off cnt\n"
374 "ds4510 seeprom write addr off cnt\n"
375 " - read/write 'cnt' bytes at SRAM-shadowed EEPROM offset 'off'\n"
376 "ds4510 sram read addr off cnt\n"
377 "ds4510 sram write addr off cnt\n"
378 " - read/write 'cnt' bytes at SRAM offset 'off'"