2 * drivers/misc/clkmon/clk_mon_scx35.h
4 * Register address based on scx30 Chipset
7 #ifndef _CLK_MON_SCX35_H_
8 #define _CLK_MON_SCX35_H_
10 #include <linux/clk_mon.h>
11 #include <soc/sprd/sci_glb_regs.h>
13 #define CLK_MON_AHB_EB REG_AP_AHB_AHB_EB
14 #define CLK_MON_AP_SYS_AUTO_SLEEP_CFG REG_AP_AHB_AP_SYS_AUTO_SLEEP_CFG
15 #define CLK_MON_APB_EB REG_AP_APB_APB_EB
16 #define CLK_MON_AON_APB_EB0 REG_AON_APB_APB_EB0
17 #define CLK_MON_AON_APB_EB1 REG_AON_APB_APB_EB1
18 #define CLK_MON_PWR_STATUS0_DBG REG_PMU_APB_PWR_STATUS0_DBG
19 #define CLK_MON_PWR_STATUS1_DBG REG_PMU_APB_PWR_STATUS0_DBG
20 #define CLK_MON_PWR_STATUS2_DBG REG_PMU_APB_PWR_STATUS0_DBG
21 #define CLK_MON_PWR_STATUS3_DBG REG_PMU_APB_PWR_STATUS0_DBG
22 #define CLK_MON_APB_SLEEP_STATUS REG_PMU_APB_SLEEP_STATUS
24 static inline unsigned int vaddr_to_paddr(unsigned long vaddr, int mode)
26 unsigned int paddr = (unsigned int)vaddr;
28 if (mode == PWR_REG) {
31 } else if (mode == CLK_REG) {
32 unsigned int tmp_high, tmp_low;
33 tmp_low = paddr & 0x0000ffff;
34 tmp_high = paddr & 0xffff0000;
35 tmp_high -= 0xE80D0000;
36 paddr = tmp_high | tmp_low;