1 #include <linux/module.h>
4 #include <linux/slab.h>
6 #include <linux/interrupt.h>
7 #include <linux/platform_device.h>
8 #include <linux/atmel_pwm.h>
12 * This is a simple driver for the PWM controller found in various newer
13 * Atmel SOCs, including the AVR32 series and the AT91sam9263.
15 * Chips with current Linux ports have only 4 PWM channels, out of max 32.
16 * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux).
17 * Docs are inconsistent about the width of the channel counter registers;
18 * it's at least 16 bits, but several places say 20 bits.
20 #define PWM_NCHAN 4 /* max 32 */
24 struct platform_device *pdev;
29 struct pwm_channel *channel[PWM_NCHAN];
30 void (*handler[PWM_NCHAN])(struct pwm_channel *);
34 /* global PWM controller registers */
44 static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val)
46 __raw_writel(val, p->base + offset);
49 static inline u32 pwm_readl(const struct pwm *p, unsigned offset)
51 return __raw_readl(p->base + offset);
54 static inline void __iomem *pwmc_regs(const struct pwm *p, int index)
56 return p->base + 0x200 + index * 0x20;
59 static struct pwm *pwm;
61 static void pwm_dumpregs(struct pwm_channel *ch, char *tag)
63 struct device *dev = &pwm->pdev->dev;
65 dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n",
67 pwm_readl(pwm, PWM_MR),
68 pwm_readl(pwm, PWM_SR),
69 pwm_readl(pwm, PWM_IMR));
71 "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n",
73 pwm_channel_readl(ch, PWM_CMR),
74 pwm_channel_readl(ch, PWM_CDTY),
75 pwm_channel_readl(ch, PWM_CPRD),
76 pwm_channel_readl(ch, PWM_CCNT));
81 * pwm_channel_alloc - allocate an unused PWM channel
82 * @index: identifies the channel
83 * @ch: structure to be initialized
85 * Drivers allocate PWM channels according to the board's wiring, and
86 * matching board-specific setup code. Returns zero or negative errno.
88 int pwm_channel_alloc(int index, struct pwm_channel *ch)
96 if (!(pwm->mask & 1 << index))
99 if (index < 0 || index >= PWM_NCHAN || !ch)
101 memset(ch, 0, sizeof *ch);
103 spin_lock_irqsave(&pwm->lock, flags);
104 if (pwm->channel[index])
107 clk_enable(pwm->clk);
109 ch->regs = pwmc_regs(pwm, index);
112 /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */
113 ch->mck = clk_get_rate(pwm->clk);
115 pwm->channel[index] = ch;
116 pwm->handler[index] = NULL;
118 /* channel and irq are always disabled when we return */
119 pwm_writel(pwm, PWM_DIS, 1 << index);
120 pwm_writel(pwm, PWM_IDR, 1 << index);
122 spin_unlock_irqrestore(&pwm->lock, flags);
125 EXPORT_SYMBOL(pwm_channel_alloc);
127 static int pwmcheck(struct pwm_channel *ch)
136 if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch)
143 * pwm_channel_free - release a previously allocated channel
144 * @ch: the channel being released
146 * The channel is completely shut down (counter and IRQ disabled),
147 * and made available for re-use. Returns zero, or negative errno.
149 int pwm_channel_free(struct pwm_channel *ch)
154 spin_lock_irqsave(&pwm->lock, flags);
157 pwm->channel[t] = NULL;
158 pwm->handler[t] = NULL;
160 /* channel and irq are always disabled when we return */
161 pwm_writel(pwm, PWM_DIS, 1 << t);
162 pwm_writel(pwm, PWM_IDR, 1 << t);
164 clk_disable(pwm->clk);
167 spin_unlock_irqrestore(&pwm->lock, flags);
170 EXPORT_SYMBOL(pwm_channel_free);
172 int __pwm_channel_onoff(struct pwm_channel *ch, int enabled)
177 /* OMITTED FUNCTIONALITY: starting several channels in synch */
179 spin_lock_irqsave(&pwm->lock, flags);
182 pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t);
184 pwm_dumpregs(ch, enabled ? "enable" : "disable");
186 spin_unlock_irqrestore(&pwm->lock, flags);
190 EXPORT_SYMBOL(__pwm_channel_onoff);
193 * pwm_clk_alloc - allocate and configure CLKA or CLKB
194 * @prescale: from 0..10, the power of two used to divide MCK
195 * @div: from 1..255, the linear divisor to use
197 * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated
198 * clock will run with a period of (2^prescale * div) / MCK, or twice as
199 * long if center aligned PWM output is used. The clock must later be
200 * deconfigured using pwm_clk_free().
202 int pwm_clk_alloc(unsigned prescale, unsigned div)
206 u32 val = (prescale << 8) | div;
209 if (prescale >= 10 || div == 0 || div > 255)
212 spin_lock_irqsave(&pwm->lock, flags);
213 mr = pwm_readl(pwm, PWM_MR);
214 if ((mr & 0xffff) == 0) {
217 } else if ((mr & (0xffff << 16)) == 0) {
222 pwm_writel(pwm, PWM_MR, mr);
223 spin_unlock_irqrestore(&pwm->lock, flags);
226 EXPORT_SYMBOL(pwm_clk_alloc);
229 * pwm_clk_free - deconfigure and release CLKA or CLKB
231 * Reverses the effect of pwm_clk_alloc().
233 void pwm_clk_free(unsigned clk)
238 spin_lock_irqsave(&pwm->lock, flags);
239 mr = pwm_readl(pwm, PWM_MR);
240 if (clk == PWM_CPR_CLKA)
241 pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0));
242 if (clk == PWM_CPR_CLKB)
243 pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16));
244 spin_unlock_irqrestore(&pwm->lock, flags);
246 EXPORT_SYMBOL(pwm_clk_free);
249 * pwm_channel_handler - manage channel's IRQ handler
251 * @handler: the handler to use, possibly NULL
253 * If the handler is non-null, the handler will be called after every
254 * period of this PWM channel. If the handler is null, this channel
255 * won't generate an IRQ.
257 int pwm_channel_handler(struct pwm_channel *ch,
258 void (*handler)(struct pwm_channel *ch))
263 spin_lock_irqsave(&pwm->lock, flags);
266 pwm->handler[t] = handler;
267 pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t);
270 spin_unlock_irqrestore(&pwm->lock, flags);
274 EXPORT_SYMBOL(pwm_channel_handler);
276 static irqreturn_t pwm_irq(int id, void *_pwm)
278 struct pwm *p = _pwm;
279 irqreturn_t handled = IRQ_NONE;
285 /* ack irqs, then handle them */
286 irqstat = pwm_readl(pwm, PWM_ISR);
289 struct pwm_channel *ch;
290 void (*handler)(struct pwm_channel *ch);
292 index = ffs(irqstat) - 1;
293 irqstat &= ~(1 << index);
294 ch = pwm->channel[index];
295 handler = pwm->handler[index];
297 spin_unlock(&p->lock);
300 handled = IRQ_HANDLED;
304 spin_unlock(&p->lock);
308 static int __init pwm_probe(struct platform_device *pdev)
310 struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
311 int irq = platform_get_irq(pdev, 0);
312 u32 *mp = pdev->dev.platform_data;
318 if (!r || irq < 0 || !mp || !*mp)
320 if (*mp & ~((1<<PWM_NCHAN)-1)) {
321 dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n",
326 p = kzalloc(sizeof(*p), GFP_KERNEL);
330 spin_lock_init(&p->lock);
334 p->base = ioremap(r->start, resource_size(r));
337 p->clk = clk_get(&pdev->dev, "pwm_clk");
338 if (IS_ERR(p->clk)) {
339 status = PTR_ERR(p->clk);
344 status = request_irq(irq, pwm_irq, 0, pdev->name, p);
349 platform_set_drvdata(pdev, p);
363 static int __exit pwm_remove(struct platform_device *pdev)
365 struct pwm *p = platform_get_drvdata(pdev);
370 clk_enable(pwm->clk);
371 pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1);
372 pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1);
373 clk_disable(pwm->clk);
385 static struct platform_driver atmel_pwm_driver = {
388 .owner = THIS_MODULE,
390 .remove = __exit_p(pwm_remove),
392 /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states;
393 * and all AT91sam9263 states, albeit at reduced clock rate if
394 * MCK becomes the slow clock (i.e. what Linux labels STR).
398 module_platform_driver_probe(atmel_pwm_driver, pwm_probe);
400 MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module");
401 MODULE_LICENSE("GPL");
402 MODULE_ALIAS("platform:atmel_pwm");