1 // SPDX-License-Identifier: GPL-2.0-only
4 * Toshiba T7L66XB core mfd support
6 * Copyright (c) 2005, 2007, 2008 Ian Molton
7 * Copyright (c) 2008 Dmitry Baryshkov
11 * Supported in this driver:
13 * SM/NAND flash controller
15 * As yet not supported
16 * GPIO interface (on NAND pins)
18 * TFT 'interface converter'
19 * PCMCIA interface logic
22 #include <linux/kernel.h>
23 #include <linux/module.h>
24 #include <linux/err.h>
26 #include <linux/slab.h>
27 #include <linux/irq.h>
28 #include <linux/clk.h>
29 #include <linux/platform_device.h>
30 #include <linux/mfd/core.h>
31 #include <linux/mfd/tmio.h>
32 #include <linux/mfd/t7l66xb.h>
39 static const struct resource t7l66xb_mmc_resources[] = {
43 .flags = IORESOURCE_MEM,
46 .start = IRQ_T7L66XB_MMC,
47 .end = IRQ_T7L66XB_MMC,
48 .flags = IORESOURCE_IRQ,
52 #define SCR_REVID 0x08 /* b Revision ID */
53 #define SCR_IMR 0x42 /* b Interrupt Mask */
54 #define SCR_DEV_CTL 0xe0 /* b Device control */
55 #define SCR_ISR 0xe1 /* b Interrupt Status */
56 #define SCR_GPO_OC 0xf0 /* b GPO output control */
57 #define SCR_GPO_OS 0xf1 /* b GPO output enable */
58 #define SCR_GPI_S 0xf2 /* w GPI status */
59 #define SCR_APDC 0xf8 /* b Active pullup down ctrl */
61 #define SCR_DEV_CTL_USB BIT(0) /* USB enable */
62 #define SCR_DEV_CTL_MMC BIT(1) /* MMC enable */
64 /*--------------------------------------------------------------------------*/
68 /* Lock to protect registers requiring read/modify/write ops. */
78 /*--------------------------------------------------------------------------*/
80 static int t7l66xb_mmc_enable(struct platform_device *mmc)
82 struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
87 ret = clk_prepare_enable(t7l66xb->clk32k);
91 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
93 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
94 dev_ctl |= SCR_DEV_CTL_MMC;
95 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
97 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
99 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
100 t7l66xb_mmc_resources[0].start & 0xfffe);
105 static int t7l66xb_mmc_disable(struct platform_device *mmc)
107 struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
111 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
113 dev_ctl = tmio_ioread8(t7l66xb->scr + SCR_DEV_CTL);
114 dev_ctl &= ~SCR_DEV_CTL_MMC;
115 tmio_iowrite8(dev_ctl, t7l66xb->scr + SCR_DEV_CTL);
117 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
119 clk_disable_unprepare(t7l66xb->clk32k);
124 static void t7l66xb_mmc_pwr(struct platform_device *mmc, int state)
126 struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
128 tmio_core_mmc_pwr(t7l66xb->scr + 0x200, 0, state);
131 static void t7l66xb_mmc_clk_div(struct platform_device *mmc, int state)
133 struct t7l66xb *t7l66xb = dev_get_drvdata(mmc->dev.parent);
135 tmio_core_mmc_clk_div(t7l66xb->scr + 0x200, 0, state);
138 /*--------------------------------------------------------------------------*/
140 static struct tmio_mmc_data t7166xb_mmc_data = {
142 .set_pwr = t7l66xb_mmc_pwr,
143 .set_clk_div = t7l66xb_mmc_clk_div,
146 static const struct resource t7l66xb_nand_resources[] = {
150 .flags = IORESOURCE_MEM,
155 .flags = IORESOURCE_MEM,
158 .start = IRQ_T7L66XB_NAND,
159 .end = IRQ_T7L66XB_NAND,
160 .flags = IORESOURCE_IRQ,
164 static struct mfd_cell t7l66xb_cells[] = {
165 [T7L66XB_CELL_MMC] = {
167 .enable = t7l66xb_mmc_enable,
168 .disable = t7l66xb_mmc_disable,
169 .platform_data = &t7166xb_mmc_data,
170 .pdata_size = sizeof(t7166xb_mmc_data),
171 .num_resources = ARRAY_SIZE(t7l66xb_mmc_resources),
172 .resources = t7l66xb_mmc_resources,
174 [T7L66XB_CELL_NAND] = {
176 .num_resources = ARRAY_SIZE(t7l66xb_nand_resources),
177 .resources = t7l66xb_nand_resources,
181 /*--------------------------------------------------------------------------*/
183 /* Handle the T7L66XB interrupt mux */
184 static void t7l66xb_irq(struct irq_desc *desc)
186 struct t7l66xb *t7l66xb = irq_desc_get_handler_data(desc);
188 unsigned int i, irq_base;
190 irq_base = t7l66xb->irq_base;
192 while ((isr = tmio_ioread8(t7l66xb->scr + SCR_ISR) &
193 ~tmio_ioread8(t7l66xb->scr + SCR_IMR)))
194 for (i = 0; i < T7L66XB_NR_IRQS; i++)
196 generic_handle_irq(irq_base + i);
199 static void t7l66xb_irq_mask(struct irq_data *data)
201 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
205 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
206 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
207 imr |= 1 << (data->irq - t7l66xb->irq_base);
208 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
209 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
212 static void t7l66xb_irq_unmask(struct irq_data *data)
214 struct t7l66xb *t7l66xb = irq_data_get_irq_chip_data(data);
218 raw_spin_lock_irqsave(&t7l66xb->lock, flags);
219 imr = tmio_ioread8(t7l66xb->scr + SCR_IMR);
220 imr &= ~(1 << (data->irq - t7l66xb->irq_base));
221 tmio_iowrite8(imr, t7l66xb->scr + SCR_IMR);
222 raw_spin_unlock_irqrestore(&t7l66xb->lock, flags);
225 static struct irq_chip t7l66xb_chip = {
227 .irq_ack = t7l66xb_irq_mask,
228 .irq_mask = t7l66xb_irq_mask,
229 .irq_unmask = t7l66xb_irq_unmask,
232 /*--------------------------------------------------------------------------*/
234 /* Install the IRQ handler */
235 static void t7l66xb_attach_irq(struct platform_device *dev)
237 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
238 unsigned int irq, irq_base;
240 irq_base = t7l66xb->irq_base;
242 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
243 irq_set_chip_and_handler(irq, &t7l66xb_chip, handle_level_irq);
244 irq_set_chip_data(irq, t7l66xb);
247 irq_set_irq_type(t7l66xb->irq, IRQ_TYPE_EDGE_FALLING);
248 irq_set_chained_handler_and_data(t7l66xb->irq, t7l66xb_irq, t7l66xb);
251 static void t7l66xb_detach_irq(struct platform_device *dev)
253 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
254 unsigned int irq, irq_base;
256 irq_base = t7l66xb->irq_base;
258 irq_set_chained_handler_and_data(t7l66xb->irq, NULL, NULL);
260 for (irq = irq_base; irq < irq_base + T7L66XB_NR_IRQS; irq++) {
261 irq_set_chip(irq, NULL);
262 irq_set_chip_data(irq, NULL);
266 /*--------------------------------------------------------------------------*/
269 static int t7l66xb_suspend(struct platform_device *dev, pm_message_t state)
271 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
272 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
274 if (pdata && pdata->suspend)
276 clk_disable_unprepare(t7l66xb->clk48m);
281 static int t7l66xb_resume(struct platform_device *dev)
283 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
284 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
287 ret = clk_prepare_enable(t7l66xb->clk48m);
291 if (pdata && pdata->resume)
294 tmio_core_mmc_enable(t7l66xb->scr + 0x200, 0,
295 t7l66xb_mmc_resources[0].start & 0xfffe);
300 #define t7l66xb_suspend NULL
301 #define t7l66xb_resume NULL
304 /*--------------------------------------------------------------------------*/
306 static int t7l66xb_probe(struct platform_device *dev)
308 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
309 struct t7l66xb *t7l66xb;
310 struct resource *iomem, *rscr;
316 iomem = platform_get_resource(dev, IORESOURCE_MEM, 0);
320 t7l66xb = kzalloc(sizeof *t7l66xb, GFP_KERNEL);
324 raw_spin_lock_init(&t7l66xb->lock);
326 platform_set_drvdata(dev, t7l66xb);
328 ret = platform_get_irq(dev, 0);
334 t7l66xb->irq_base = pdata->irq_base;
336 t7l66xb->clk32k = clk_get(&dev->dev, "CLK_CK32K");
337 if (IS_ERR(t7l66xb->clk32k)) {
338 ret = PTR_ERR(t7l66xb->clk32k);
342 t7l66xb->clk48m = clk_get(&dev->dev, "CLK_CK48M");
343 if (IS_ERR(t7l66xb->clk48m)) {
344 ret = PTR_ERR(t7l66xb->clk48m);
348 rscr = &t7l66xb->rscr;
349 rscr->name = "t7l66xb-core";
350 rscr->start = iomem->start;
351 rscr->end = iomem->start + 0xff;
352 rscr->flags = IORESOURCE_MEM;
354 ret = request_resource(iomem, rscr);
356 goto err_request_scr;
358 t7l66xb->scr = ioremap(rscr->start, resource_size(rscr));
364 ret = clk_prepare_enable(t7l66xb->clk48m);
371 /* Mask all interrupts */
372 tmio_iowrite8(0xbf, t7l66xb->scr + SCR_IMR);
374 printk(KERN_INFO "%s rev %d @ 0x%08lx, irq %d\n",
375 dev->name, tmio_ioread8(t7l66xb->scr + SCR_REVID),
376 (unsigned long)iomem->start, t7l66xb->irq);
378 t7l66xb_attach_irq(dev);
380 t7l66xb_cells[T7L66XB_CELL_NAND].platform_data = pdata->nand_data;
381 t7l66xb_cells[T7L66XB_CELL_NAND].pdata_size = sizeof(*pdata->nand_data);
383 ret = mfd_add_devices(&dev->dev, dev->id,
384 t7l66xb_cells, ARRAY_SIZE(t7l66xb_cells),
385 iomem, t7l66xb->irq_base, NULL);
390 t7l66xb_detach_irq(dev);
391 clk_disable_unprepare(t7l66xb->clk48m);
393 iounmap(t7l66xb->scr);
395 release_resource(&t7l66xb->rscr);
397 clk_put(t7l66xb->clk48m);
399 clk_put(t7l66xb->clk32k);
406 static int t7l66xb_remove(struct platform_device *dev)
408 struct t7l66xb_platform_data *pdata = dev_get_platdata(&dev->dev);
409 struct t7l66xb *t7l66xb = platform_get_drvdata(dev);
412 ret = pdata->disable(dev);
413 clk_disable_unprepare(t7l66xb->clk48m);
414 clk_put(t7l66xb->clk48m);
415 clk_disable_unprepare(t7l66xb->clk32k);
416 clk_put(t7l66xb->clk32k);
417 t7l66xb_detach_irq(dev);
418 iounmap(t7l66xb->scr);
419 release_resource(&t7l66xb->rscr);
420 mfd_remove_devices(&dev->dev);
427 static struct platform_driver t7l66xb_platform_driver = {
431 .suspend = t7l66xb_suspend,
432 .resume = t7l66xb_resume,
433 .probe = t7l66xb_probe,
434 .remove = t7l66xb_remove,
437 /*--------------------------------------------------------------------------*/
439 module_platform_driver(t7l66xb_platform_driver);
441 MODULE_DESCRIPTION("Toshiba T7L66XB core driver");
442 MODULE_LICENSE("GPL v2");
443 MODULE_AUTHOR("Ian Molton");
444 MODULE_ALIAS("platform:t7l66xb");