drivers/mfd/palmas.c

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2 /*
   3  * TI Palmas MFD Driver
   4  *
   5  * Copyright 2011-2012 Texas Instruments Inc.
   6  *
   7  * Author: Graeme Gregory <gg@slimlogic.co.uk>
   8  */
   9
  10 #include <linux/module.h>
  11 #include <linux/moduleparam.h>
  12 #include <linux/init.h>
  13 #include <linux/slab.h>
  14 #include <linux/i2c.h>
  15 #include <linux/interrupt.h>
  16 #include <linux/irq.h>
  17 #include <linux/regmap.h>
  18 #include <linux/err.h>
  19 #include <linux/mfd/core.h>
  20 #include <linux/mfd/palmas.h>
  21 #include <linux/of_device.h>
  22
  23 static const struct regmap_config palmas_regmap_config[PALMAS_NUM_CLIENTS] = {
  24         {
  25                 .reg_bits = 8,
  26                 .val_bits = 8,
  27                 .max_register = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
  28                                         PALMAS_PRIMARY_SECONDARY_PAD3),
  29         },
  30         {
  31                 .reg_bits = 8,
  32                 .val_bits = 8,
  33                 .max_register = PALMAS_BASE_TO_REG(PALMAS_GPADC_BASE,
  34                                         PALMAS_GPADC_SMPS_VSEL_MONITORING),
  35         },
  36         {
  37                 .reg_bits = 8,
  38                 .val_bits = 8,
  39                 .max_register = PALMAS_BASE_TO_REG(PALMAS_TRIM_GPADC_BASE,
  40                                         PALMAS_GPADC_TRIM16),
  41         },
  42 };
  43
  44 static const struct regmap_irq tps65917_irqs[] = {
  45         /* INT1 IRQs */
  46         [TPS65917_RESERVED1] = {
  47                 .mask = TPS65917_RESERVED,
  48         },
  49         [TPS65917_PWRON_IRQ] = {
  50                 .mask = TPS65917_INT1_STATUS_PWRON,
  51         },
  52         [TPS65917_LONG_PRESS_KEY_IRQ] = {
  53                 .mask = TPS65917_INT1_STATUS_LONG_PRESS_KEY,
  54         },
  55         [TPS65917_RESERVED2] = {
  56                 .mask = TPS65917_RESERVED,
  57         },
  58         [TPS65917_PWRDOWN_IRQ] = {
  59                 .mask = TPS65917_INT1_STATUS_PWRDOWN,
  60         },
  61         [TPS65917_HOTDIE_IRQ] = {
  62                 .mask = TPS65917_INT1_STATUS_HOTDIE,
  63         },
  64         [TPS65917_VSYS_MON_IRQ] = {
  65                 .mask = TPS65917_INT1_STATUS_VSYS_MON,
  66         },
  67         [TPS65917_RESERVED3] = {
  68                 .mask = TPS65917_RESERVED,
  69         },
  70         /* INT2 IRQs*/
  71         [TPS65917_RESERVED4] = {
  72                 .mask = TPS65917_RESERVED,
  73                 .reg_offset = 1,
  74         },
  75         [TPS65917_OTP_ERROR_IRQ] = {
  76                 .mask = TPS65917_INT2_STATUS_OTP_ERROR,
  77                 .reg_offset = 1,
  78         },
  79         [TPS65917_WDT_IRQ] = {
  80                 .mask = TPS65917_INT2_STATUS_WDT,
  81                 .reg_offset = 1,
  82         },
  83         [TPS65917_RESERVED5] = {
  84                 .mask = TPS65917_RESERVED,
  85                 .reg_offset = 1,
  86         },
  87         [TPS65917_RESET_IN_IRQ] = {
  88                 .mask = TPS65917_INT2_STATUS_RESET_IN,
  89                 .reg_offset = 1,
  90         },
  91         [TPS65917_FSD_IRQ] = {
  92                 .mask = TPS65917_INT2_STATUS_FSD,
  93                 .reg_offset = 1,
  94         },
  95         [TPS65917_SHORT_IRQ] = {
  96                 .mask = TPS65917_INT2_STATUS_SHORT,
  97                 .reg_offset = 1,
  98         },
  99         [TPS65917_RESERVED6] = {
 100                 .mask = TPS65917_RESERVED,
 101                 .reg_offset = 1,
 102         },
 103         /* INT3 IRQs */
 104         [TPS65917_GPADC_AUTO_0_IRQ] = {
 105                 .mask = TPS65917_INT3_STATUS_GPADC_AUTO_0,
 106                 .reg_offset = 2,
 107         },
 108         [TPS65917_GPADC_AUTO_1_IRQ] = {
 109                 .mask = TPS65917_INT3_STATUS_GPADC_AUTO_1,
 110                 .reg_offset = 2,
 111         },
 112         [TPS65917_GPADC_EOC_SW_IRQ] = {
 113                 .mask = TPS65917_INT3_STATUS_GPADC_EOC_SW,
 114                 .reg_offset = 2,
 115         },
 116         [TPS65917_RESREVED6] = {
 117                 .mask = TPS65917_RESERVED6,
 118                 .reg_offset = 2,
 119         },
 120         [TPS65917_RESERVED7] = {
 121                 .mask = TPS65917_RESERVED,
 122                 .reg_offset = 2,
 123         },
 124         [TPS65917_RESERVED8] = {
 125                 .mask = TPS65917_RESERVED,
 126                 .reg_offset = 2,
 127         },
 128         [TPS65917_RESERVED9] = {
 129                 .mask = TPS65917_RESERVED,
 130                 .reg_offset = 2,
 131         },
 132         [TPS65917_VBUS_IRQ] = {
 133                 .mask = TPS65917_INT3_STATUS_VBUS,
 134                 .reg_offset = 2,
 135         },
 136         /* INT4 IRQs */
 137         [TPS65917_GPIO_0_IRQ] = {
 138                 .mask = TPS65917_INT4_STATUS_GPIO_0,
 139                 .reg_offset = 3,
 140         },
 141         [TPS65917_GPIO_1_IRQ] = {
 142                 .mask = TPS65917_INT4_STATUS_GPIO_1,
 143                 .reg_offset = 3,
 144         },
 145         [TPS65917_GPIO_2_IRQ] = {
 146                 .mask = TPS65917_INT4_STATUS_GPIO_2,
 147                 .reg_offset = 3,
 148         },
 149         [TPS65917_GPIO_3_IRQ] = {
 150                 .mask = TPS65917_INT4_STATUS_GPIO_3,
 151                 .reg_offset = 3,
 152         },
 153         [TPS65917_GPIO_4_IRQ] = {
 154                 .mask = TPS65917_INT4_STATUS_GPIO_4,
 155                 .reg_offset = 3,
 156         },
 157         [TPS65917_GPIO_5_IRQ] = {
 158                 .mask = TPS65917_INT4_STATUS_GPIO_5,
 159                 .reg_offset = 3,
 160         },
 161         [TPS65917_GPIO_6_IRQ] = {
 162                 .mask = TPS65917_INT4_STATUS_GPIO_6,
 163                 .reg_offset = 3,
 164         },
 165         [TPS65917_RESERVED10] = {
 166                 .mask = TPS65917_RESERVED10,
 167                 .reg_offset = 3,
 168         },
 169 };
 170
 171 static const struct regmap_irq palmas_irqs[] = {
 172         /* INT1 IRQs */
 173         [PALMAS_CHARG_DET_N_VBUS_OVV_IRQ] = {
 174                 .mask = PALMAS_INT1_STATUS_CHARG_DET_N_VBUS_OVV,
 175         },
 176         [PALMAS_PWRON_IRQ] = {
 177                 .mask = PALMAS_INT1_STATUS_PWRON,
 178         },
 179         [PALMAS_LONG_PRESS_KEY_IRQ] = {
 180                 .mask = PALMAS_INT1_STATUS_LONG_PRESS_KEY,
 181         },
 182         [PALMAS_RPWRON_IRQ] = {
 183                 .mask = PALMAS_INT1_STATUS_RPWRON,
 184         },
 185         [PALMAS_PWRDOWN_IRQ] = {
 186                 .mask = PALMAS_INT1_STATUS_PWRDOWN,
 187         },
 188         [PALMAS_HOTDIE_IRQ] = {
 189                 .mask = PALMAS_INT1_STATUS_HOTDIE,
 190         },
 191         [PALMAS_VSYS_MON_IRQ] = {
 192                 .mask = PALMAS_INT1_STATUS_VSYS_MON,
 193         },
 194         [PALMAS_VBAT_MON_IRQ] = {
 195                 .mask = PALMAS_INT1_STATUS_VBAT_MON,
 196         },
 197         /* INT2 IRQs*/
 198         [PALMAS_RTC_ALARM_IRQ] = {
 199                 .mask = PALMAS_INT2_STATUS_RTC_ALARM,
 200                 .reg_offset = 1,
 201         },
 202         [PALMAS_RTC_TIMER_IRQ] = {
 203                 .mask = PALMAS_INT2_STATUS_RTC_TIMER,
 204                 .reg_offset = 1,
 205         },
 206         [PALMAS_WDT_IRQ] = {
 207                 .mask = PALMAS_INT2_STATUS_WDT,
 208                 .reg_offset = 1,
 209         },
 210         [PALMAS_BATREMOVAL_IRQ] = {
 211                 .mask = PALMAS_INT2_STATUS_BATREMOVAL,
 212                 .reg_offset = 1,
 213         },
 214         [PALMAS_RESET_IN_IRQ] = {
 215                 .mask = PALMAS_INT2_STATUS_RESET_IN,
 216                 .reg_offset = 1,
 217         },
 218         [PALMAS_FBI_BB_IRQ] = {
 219                 .mask = PALMAS_INT2_STATUS_FBI_BB,
 220                 .reg_offset = 1,
 221         },
 222         [PALMAS_SHORT_IRQ] = {
 223                 .mask = PALMAS_INT2_STATUS_SHORT,
 224                 .reg_offset = 1,
 225         },
 226         [PALMAS_VAC_ACOK_IRQ] = {
 227                 .mask = PALMAS_INT2_STATUS_VAC_ACOK,
 228                 .reg_offset = 1,
 229         },
 230         /* INT3 IRQs */
 231         [PALMAS_GPADC_AUTO_0_IRQ] = {
 232                 .mask = PALMAS_INT3_STATUS_GPADC_AUTO_0,
 233                 .reg_offset = 2,
 234         },
 235         [PALMAS_GPADC_AUTO_1_IRQ] = {
 236                 .mask = PALMAS_INT3_STATUS_GPADC_AUTO_1,
 237                 .reg_offset = 2,
 238         },
 239         [PALMAS_GPADC_EOC_SW_IRQ] = {
 240                 .mask = PALMAS_INT3_STATUS_GPADC_EOC_SW,
 241                 .reg_offset = 2,
 242         },
 243         [PALMAS_GPADC_EOC_RT_IRQ] = {
 244                 .mask = PALMAS_INT3_STATUS_GPADC_EOC_RT,
 245                 .reg_offset = 2,
 246         },
 247         [PALMAS_ID_OTG_IRQ] = {
 248                 .mask = PALMAS_INT3_STATUS_ID_OTG,
 249                 .reg_offset = 2,
 250         },
 251         [PALMAS_ID_IRQ] = {
 252                 .mask = PALMAS_INT3_STATUS_ID,
 253                 .reg_offset = 2,
 254         },
 255         [PALMAS_VBUS_OTG_IRQ] = {
 256                 .mask = PALMAS_INT3_STATUS_VBUS_OTG,
 257                 .reg_offset = 2,
 258         },
 259         [PALMAS_VBUS_IRQ] = {
 260                 .mask = PALMAS_INT3_STATUS_VBUS,
 261                 .reg_offset = 2,
 262         },
 263         /* INT4 IRQs */
 264         [PALMAS_GPIO_0_IRQ] = {
 265                 .mask = PALMAS_INT4_STATUS_GPIO_0,
 266                 .reg_offset = 3,
 267         },
 268         [PALMAS_GPIO_1_IRQ] = {
 269                 .mask = PALMAS_INT4_STATUS_GPIO_1,
 270                 .reg_offset = 3,
 271         },
 272         [PALMAS_GPIO_2_IRQ] = {
 273                 .mask = PALMAS_INT4_STATUS_GPIO_2,
 274                 .reg_offset = 3,
 275         },
 276         [PALMAS_GPIO_3_IRQ] = {
 277                 .mask = PALMAS_INT4_STATUS_GPIO_3,
 278                 .reg_offset = 3,
 279         },
 280         [PALMAS_GPIO_4_IRQ] = {
 281                 .mask = PALMAS_INT4_STATUS_GPIO_4,
 282                 .reg_offset = 3,
 283         },
 284         [PALMAS_GPIO_5_IRQ] = {
 285                 .mask = PALMAS_INT4_STATUS_GPIO_5,
 286                 .reg_offset = 3,
 287         },
 288         [PALMAS_GPIO_6_IRQ] = {
 289                 .mask = PALMAS_INT4_STATUS_GPIO_6,
 290                 .reg_offset = 3,
 291         },
 292         [PALMAS_GPIO_7_IRQ] = {
 293                 .mask = PALMAS_INT4_STATUS_GPIO_7,
 294                 .reg_offset = 3,
 295         },
 296 };
 297
 298 static struct regmap_irq_chip palmas_irq_chip = {
 299         .name = "palmas",
 300         .irqs = palmas_irqs,
 301         .num_irqs = ARRAY_SIZE(palmas_irqs),
 302
 303         .num_regs = 4,
 304         .irq_reg_stride = 5,
 305         .status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
 306                         PALMAS_INT1_STATUS),
 307         .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
 308                         PALMAS_INT1_MASK),
 309 };
 310
 311 static struct regmap_irq_chip tps65917_irq_chip = {
 312         .name = "tps65917",
 313         .irqs = tps65917_irqs,
 314         .num_irqs = ARRAY_SIZE(tps65917_irqs),
 315
 316         .num_regs = 4,
 317         .irq_reg_stride = 5,
 318         .status_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
 319                         PALMAS_INT1_STATUS),
 320         .mask_base = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE,
 321                         PALMAS_INT1_MASK),
 322 };
 323
 324 int palmas_ext_control_req_config(struct palmas *palmas,
 325         enum palmas_external_requestor_id id,  int ext_ctrl, bool enable)
 326 {
 327         struct palmas_pmic_driver_data *pmic_ddata = palmas->pmic_ddata;
 328         int preq_mask_bit = 0;
 329         int reg_add = 0;
 330         int bit_pos, ret;
 331
 332         if (!(ext_ctrl & PALMAS_EXT_REQ))
 333                 return 0;
 334
 335         if (id >= PALMAS_EXTERNAL_REQSTR_ID_MAX)
 336                 return 0;
 337
 338         if (ext_ctrl & PALMAS_EXT_CONTROL_NSLEEP) {
 339                 reg_add = PALMAS_NSLEEP_RES_ASSIGN;
 340                 preq_mask_bit = 0;
 341         } else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE1) {
 342                 reg_add = PALMAS_ENABLE1_RES_ASSIGN;
 343                 preq_mask_bit = 1;
 344         } else if (ext_ctrl & PALMAS_EXT_CONTROL_ENABLE2) {
 345                 reg_add = PALMAS_ENABLE2_RES_ASSIGN;
 346                 preq_mask_bit = 2;
 347         }
 348
 349         bit_pos = pmic_ddata->sleep_req_info[id].bit_pos;
 350         reg_add += pmic_ddata->sleep_req_info[id].reg_offset;
 351         if (enable)
 352                 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
 353                                 reg_add, BIT(bit_pos), BIT(bit_pos));
 354         else
 355                 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
 356                                 reg_add, BIT(bit_pos), 0);
 357         if (ret < 0) {
 358                 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
 359                         reg_add, ret);
 360                 return ret;
 361         }
 362
 363         /* Unmask the PREQ */
 364         ret = palmas_update_bits(palmas, PALMAS_PMU_CONTROL_BASE,
 365                         PALMAS_POWER_CTRL, BIT(preq_mask_bit), 0);
 366         if (ret < 0) {
 367                 dev_err(palmas->dev, "POWER_CTRL register update failed %d\n",
 368                         ret);
 369                 return ret;
 370         }
 371         return ret;
 372 }
 373 EXPORT_SYMBOL_GPL(palmas_ext_control_req_config);
 374
 375 static int palmas_set_pdata_irq_flag(struct i2c_client *i2c,
 376                 struct palmas_platform_data *pdata)
 377 {
 378         struct irq_data *irq_data = irq_get_irq_data(i2c->irq);
 379         if (!irq_data) {
 380                 dev_err(&i2c->dev, "Invalid IRQ: %d\n", i2c->irq);
 381                 return -EINVAL;
 382         }
 383
 384         pdata->irq_flags = irqd_get_trigger_type(irq_data);
 385         dev_info(&i2c->dev, "Irq flag is 0x%08x\n", pdata->irq_flags);
 386         return 0;
 387 }
 388
 389 static void palmas_dt_to_pdata(struct i2c_client *i2c,
 390                 struct palmas_platform_data *pdata)
 391 {
 392         struct device_node *node = i2c->dev.of_node;
 393         int ret;
 394         u32 prop;
 395
 396         ret = of_property_read_u32(node, "ti,mux-pad1", &prop);
 397         if (!ret) {
 398                 pdata->mux_from_pdata = 1;
 399                 pdata->pad1 = prop;
 400         }
 401
 402         ret = of_property_read_u32(node, "ti,mux-pad2", &prop);
 403         if (!ret) {
 404                 pdata->mux_from_pdata = 1;
 405                 pdata->pad2 = prop;
 406         }
 407
 408         /* The default for this register is all masked */
 409         ret = of_property_read_u32(node, "ti,power-ctrl", &prop);
 410         if (!ret)
 411                 pdata->power_ctrl = prop;
 412         else
 413                 pdata->power_ctrl = PALMAS_POWER_CTRL_NSLEEP_MASK |
 414                                         PALMAS_POWER_CTRL_ENABLE1_MASK |
 415                                         PALMAS_POWER_CTRL_ENABLE2_MASK;
 416         if (i2c->irq)
 417                 palmas_set_pdata_irq_flag(i2c, pdata);
 418
 419         pdata->pm_off = of_property_read_bool(node,
 420                         "ti,system-power-controller");
 421 }
 422
 423 static struct palmas *palmas_dev;
 424 static void palmas_power_off(void)
 425 {
 426         unsigned int addr;
 427         int ret, slave;
 428         u8 powerhold_mask;
 429         struct device_node *np = palmas_dev->dev->of_node;
 430
 431         if (of_property_read_bool(np, "ti,palmas-override-powerhold")) {
 432                 addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
 433                                           PALMAS_PRIMARY_SECONDARY_PAD2);
 434                 slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
 435
 436                 if (of_device_is_compatible(np, "ti,tps65917"))
 437                         powerhold_mask =
 438                                 TPS65917_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK;
 439                 else
 440                         powerhold_mask =
 441                                 PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK;
 442
 443                 ret = regmap_update_bits(palmas_dev->regmap[slave], addr,
 444                                          powerhold_mask, 0);
 445                 if (ret)
 446                         dev_err(palmas_dev->dev,
 447                                 "Unable to write PRIMARY_SECONDARY_PAD2 %d\n",
 448                                 ret);
 449         }
 450
 451         slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
 452         addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_DEV_CTRL);
 453
 454         ret = regmap_update_bits(
 455                         palmas_dev->regmap[slave],
 456                         addr,
 457                         PALMAS_DEV_CTRL_DEV_ON,
 458                         0);
 459
 460         if (ret)
 461                 pr_err("%s: Unable to write to DEV_CTRL_DEV_ON: %d\n",
 462                                 __func__, ret);
 463 }
 464
 465 static unsigned int palmas_features = PALMAS_PMIC_FEATURE_SMPS10_BOOST;
 466 static unsigned int tps659038_features;
 467
 468 struct palmas_driver_data {
 469         unsigned int *features;
 470         struct regmap_irq_chip *irq_chip;
 471 };
 472
 473 static struct palmas_driver_data palmas_data = {
 474         .features = &palmas_features,
 475         .irq_chip = &palmas_irq_chip,
 476 };
 477
 478 static struct palmas_driver_data tps659038_data = {
 479         .features = &tps659038_features,
 480         .irq_chip = &palmas_irq_chip,
 481 };
 482
 483 static struct palmas_driver_data tps65917_data = {
 484         .features = &tps659038_features,
 485         .irq_chip = &tps65917_irq_chip,
 486 };
 487
 488 static const struct of_device_id of_palmas_match_tbl[] = {
 489         {
 490                 .compatible = "ti,palmas",
 491                 .data = &palmas_data,
 492         },
 493         {
 494                 .compatible = "ti,tps659038",
 495                 .data = &tps659038_data,
 496         },
 497         {
 498                 .compatible = "ti,tps65917",
 499                 .data = &tps65917_data,
 500         },
 501         { },
 502 };
 503 MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
 504
 505 static int palmas_i2c_probe(struct i2c_client *i2c)
 506 {
 507         struct palmas *palmas;
 508         struct palmas_platform_data *pdata;
 509         struct palmas_driver_data *driver_data;
 510         struct device_node *node = i2c->dev.of_node;
 511         int ret = 0, i;
 512         unsigned int reg, addr;
 513         int slave;
 514
 515         pdata = dev_get_platdata(&i2c->dev);
 516
 517         if (node && !pdata) {
 518                 pdata = devm_kzalloc(&i2c->dev, sizeof(*pdata), GFP_KERNEL);
 519
 520                 if (!pdata)
 521                         return -ENOMEM;
 522
 523                 palmas_dt_to_pdata(i2c, pdata);
 524         }
 525
 526         if (!pdata)
 527                 return -EINVAL;
 528
 529         palmas = devm_kzalloc(&i2c->dev, sizeof(struct palmas), GFP_KERNEL);
 530         if (palmas == NULL)
 531                 return -ENOMEM;
 532
 533         i2c_set_clientdata(i2c, palmas);
 534         palmas->dev = &i2c->dev;
 535         palmas->irq = i2c->irq;
 536
 537         driver_data = (struct palmas_driver_data *) device_get_match_data(&i2c->dev);
 538         palmas->features = *driver_data->features;
 539
 540         for (i = 0; i < PALMAS_NUM_CLIENTS; i++) {
 541                 if (i == 0)
 542                         palmas->i2c_clients[i] = i2c;
 543                 else {
 544                         palmas->i2c_clients[i] =
 545                                         i2c_new_dummy_device(i2c->adapter,
 546                                                         i2c->addr + i);
 547                         if (IS_ERR(palmas->i2c_clients[i])) {
 548                                 dev_err(palmas->dev,
 549                                         "can't attach client %d\n", i);
 550                                 ret = PTR_ERR(palmas->i2c_clients[i]);
 551                                 goto err_i2c;
 552                         }
 553                         palmas->i2c_clients[i]->dev.of_node = of_node_get(node);
 554                 }
 555                 palmas->regmap[i] = devm_regmap_init_i2c(palmas->i2c_clients[i],
 556                                 &palmas_regmap_config[i]);
 557                 if (IS_ERR(palmas->regmap[i])) {
 558                         ret = PTR_ERR(palmas->regmap[i]);
 559                         dev_err(palmas->dev,
 560                                 "Failed to allocate regmap %d, err: %d\n",
 561                                 i, ret);
 562                         goto err_i2c;
 563                 }
 564         }
 565
 566         if (!palmas->irq) {
 567                 dev_warn(palmas->dev, "IRQ missing: skipping irq request\n");
 568                 goto no_irq;
 569         }
 570
 571         /* Change interrupt line output polarity */
 572         if (pdata->irq_flags & IRQ_TYPE_LEVEL_HIGH)
 573                 reg = PALMAS_POLARITY_CTRL_INT_POLARITY;
 574         else
 575                 reg = 0;
 576         ret = palmas_update_bits(palmas, PALMAS_PU_PD_OD_BASE,
 577                         PALMAS_POLARITY_CTRL, PALMAS_POLARITY_CTRL_INT_POLARITY,
 578                         reg);
 579         if (ret < 0) {
 580                 dev_err(palmas->dev, "POLARITY_CTRL update failed: %d\n", ret);
 581                 goto err_i2c;
 582         }
 583
 584         /* Change IRQ into clear on read mode for efficiency */
 585         slave = PALMAS_BASE_TO_SLAVE(PALMAS_INTERRUPT_BASE);
 586         addr = PALMAS_BASE_TO_REG(PALMAS_INTERRUPT_BASE, PALMAS_INT_CTRL);
 587         reg = PALMAS_INT_CTRL_INT_CLEAR;
 588
 589         regmap_write(palmas->regmap[slave], addr, reg);
 590
 591         ret = regmap_add_irq_chip(palmas->regmap[slave], palmas->irq,
 592                                   IRQF_ONESHOT | pdata->irq_flags, 0,
 593                                   driver_data->irq_chip, &palmas->irq_data);
 594         if (ret < 0)
 595                 goto err_i2c;
 596
 597 no_irq:
 598         slave = PALMAS_BASE_TO_SLAVE(PALMAS_PU_PD_OD_BASE);
 599         addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
 600                         PALMAS_PRIMARY_SECONDARY_PAD1);
 601
 602         if (pdata->mux_from_pdata) {
 603                 reg = pdata->pad1;
 604                 ret = regmap_write(palmas->regmap[slave], addr, reg);
 605                 if (ret)
 606                         goto err_irq;
 607         } else {
 608                 ret = regmap_read(palmas->regmap[slave], addr, &reg);
 609                 if (ret)
 610                         goto err_irq;
 611         }
 612
 613         if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_0))
 614                 palmas->gpio_muxed |= PALMAS_GPIO_0_MUXED;
 615         if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK))
 616                 palmas->gpio_muxed |= PALMAS_GPIO_1_MUXED;
 617         else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
 618                         (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
 619                 palmas->led_muxed |= PALMAS_LED1_MUXED;
 620         else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_MASK) ==
 621                         (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_1_SHIFT))
 622                 palmas->pwm_muxed |= PALMAS_PWM1_MUXED;
 623         if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK))
 624                 palmas->gpio_muxed |= PALMAS_GPIO_2_MUXED;
 625         else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
 626                         (2 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
 627                 palmas->led_muxed |= PALMAS_LED2_MUXED;
 628         else if ((reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_MASK) ==
 629                         (3 << PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_2_SHIFT))
 630                 palmas->pwm_muxed |= PALMAS_PWM2_MUXED;
 631         if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD1_GPIO_3))
 632                 palmas->gpio_muxed |= PALMAS_GPIO_3_MUXED;
 633
 634         addr = PALMAS_BASE_TO_REG(PALMAS_PU_PD_OD_BASE,
 635                         PALMAS_PRIMARY_SECONDARY_PAD2);
 636
 637         if (pdata->mux_from_pdata) {
 638                 reg = pdata->pad2;
 639                 ret = regmap_write(palmas->regmap[slave], addr, reg);
 640                 if (ret)
 641                         goto err_irq;
 642         } else {
 643                 ret = regmap_read(palmas->regmap[slave], addr, &reg);
 644                 if (ret)
 645                         goto err_irq;
 646         }
 647
 648         if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_4))
 649                 palmas->gpio_muxed |= PALMAS_GPIO_4_MUXED;
 650         if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_5_MASK))
 651                 palmas->gpio_muxed |= PALMAS_GPIO_5_MUXED;
 652         if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_6))
 653                 palmas->gpio_muxed |= PALMAS_GPIO_6_MUXED;
 654         if (!(reg & PALMAS_PRIMARY_SECONDARY_PAD2_GPIO_7_MASK))
 655                 palmas->gpio_muxed |= PALMAS_GPIO_7_MUXED;
 656
 657         dev_info(palmas->dev, "Muxing GPIO %x, PWM %x, LED %x\n",
 658                         palmas->gpio_muxed, palmas->pwm_muxed,
 659                         palmas->led_muxed);
 660
 661         reg = pdata->power_ctrl;
 662
 663         slave = PALMAS_BASE_TO_SLAVE(PALMAS_PMU_CONTROL_BASE);
 664         addr = PALMAS_BASE_TO_REG(PALMAS_PMU_CONTROL_BASE, PALMAS_POWER_CTRL);
 665
 666         ret = regmap_write(palmas->regmap[slave], addr, reg);
 667         if (ret)
 668                 goto err_irq;
 669
 670         /*
 671          * If we are probing with DT do this the DT way and return here
 672          * otherwise continue and add devices using mfd helpers.
 673          */
 674         if (node) {
 675                 ret = devm_of_platform_populate(&i2c->dev);
 676                 if (ret < 0) {
 677                         goto err_irq;
 678                 } else if (pdata->pm_off && !pm_power_off) {
 679                         palmas_dev = palmas;
 680                         pm_power_off = palmas_power_off;
 681                 }
 682         }
 683
 684         return ret;
 685
 686 err_irq:
 687         regmap_del_irq_chip(palmas->irq, palmas->irq_data);
 688 err_i2c:
 689         for (i = 1; i < PALMAS_NUM_CLIENTS; i++) {
 690                 if (palmas->i2c_clients[i])
 691                         i2c_unregister_device(palmas->i2c_clients[i]);
 692         }
 693         return ret;
 694 }
 695
 696 static void palmas_i2c_remove(struct i2c_client *i2c)
 697 {
 698         struct palmas *palmas = i2c_get_clientdata(i2c);
 699         int i;
 700
 701         regmap_del_irq_chip(palmas->irq, palmas->irq_data);
 702
 703         for (i = 1; i < PALMAS_NUM_CLIENTS; i++) {
 704                 if (palmas->i2c_clients[i])
 705                         i2c_unregister_device(palmas->i2c_clients[i]);
 706         }
 707
 708         if (palmas == palmas_dev) {
 709                 pm_power_off = NULL;
 710                 palmas_dev = NULL;
 711         }
 712 }
 713
 714 static const struct i2c_device_id palmas_i2c_id[] = {
 715         { "palmas", },
 716         { "twl6035", },
 717         { "twl6037", },
 718         { "tps65913", },
 719         { /* end */ }
 720 };
 721 MODULE_DEVICE_TABLE(i2c, palmas_i2c_id);
 722
 723 static struct i2c_driver palmas_i2c_driver = {
 724         .driver = {
 725                    .name = "palmas",
 726                    .of_match_table = of_palmas_match_tbl,
 727         },
 728         .probe = palmas_i2c_probe,
 729         .remove = palmas_i2c_remove,
 730         .id_table = palmas_i2c_id,
 731 };
 732
 733 static int __init palmas_i2c_init(void)
 734 {
 735         return i2c_add_driver(&palmas_i2c_driver);
 736 }
 737 /* init early so consumer devices can complete system boot */
 738 subsys_initcall(palmas_i2c_init);
 739
 740 static void __exit palmas_i2c_exit(void)
 741 {
 742         i2c_del_driver(&palmas_i2c_driver);
 743 }
 744 module_exit(palmas_i2c_exit);
 745
 746 MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
 747 MODULE_DESCRIPTION("Palmas chip family multi-function driver");
 748 MODULE_LICENSE("GPL");