drivers/mfd/omap-usb-host.c

   1 /**
   2  * omap-usb-host.c - The USBHS core driver for OMAP EHCI & OHCI
   3  *
   4  * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com
   5  * Author: Keshava Munegowda <keshava_mgowda@ti.com>
   6  *
   7  * This program is free software: you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2  of
   9  * the License as published by the Free Software Foundation.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
  18  */
  19 #include <linux/kernel.h>
  20 #include <linux/module.h>
  21 #include <linux/types.h>
  22 #include <linux/slab.h>
  23 #include <linux/delay.h>
  24 #include <linux/clk.h>
  25 #include <linux/dma-mapping.h>
  26 #include <linux/spinlock.h>
  27 #include <linux/gpio.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/platform_data/usb-omap.h>
  30 #include <linux/pm_runtime.h>
  31
  32 #include "omap-usb.h"
  33
  34 #define USBHS_DRIVER_NAME       "usbhs_omap"
  35 #define OMAP_EHCI_DEVICE        "ehci-omap"
  36 #define OMAP_OHCI_DEVICE        "ohci-omap3"
  37
  38 /* OMAP USBHOST Register addresses  */
  39
  40 /* UHH Register Set */
  41 #define OMAP_UHH_REVISION                               (0x00)
  42 #define OMAP_UHH_SYSCONFIG                              (0x10)
  43 #define OMAP_UHH_SYSCONFIG_MIDLEMODE                    (1 << 12)
  44 #define OMAP_UHH_SYSCONFIG_CACTIVITY                    (1 << 8)
  45 #define OMAP_UHH_SYSCONFIG_SIDLEMODE                    (1 << 3)
  46 #define OMAP_UHH_SYSCONFIG_ENAWAKEUP                    (1 << 2)
  47 #define OMAP_UHH_SYSCONFIG_SOFTRESET                    (1 << 1)
  48 #define OMAP_UHH_SYSCONFIG_AUTOIDLE                     (1 << 0)
  49
  50 #define OMAP_UHH_SYSSTATUS                              (0x14)
  51 #define OMAP_UHH_HOSTCONFIG                             (0x40)
  52 #define OMAP_UHH_HOSTCONFIG_ULPI_BYPASS                 (1 << 0)
  53 #define OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS              (1 << 0)
  54 #define OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS              (1 << 11)
  55 #define OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS              (1 << 12)
  56 #define OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN              (1 << 2)
  57 #define OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN              (1 << 3)
  58 #define OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN             (1 << 4)
  59 #define OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN              (1 << 5)
  60 #define OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS           (1 << 8)
  61 #define OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS           (1 << 9)
  62 #define OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS           (1 << 10)
  63 #define OMAP4_UHH_HOSTCONFIG_APP_START_CLK              (1 << 31)
  64
  65 /* OMAP4-specific defines */
  66 #define OMAP4_UHH_SYSCONFIG_IDLEMODE_CLEAR              (3 << 2)
  67 #define OMAP4_UHH_SYSCONFIG_NOIDLE                      (1 << 2)
  68 #define OMAP4_UHH_SYSCONFIG_STDBYMODE_CLEAR             (3 << 4)
  69 #define OMAP4_UHH_SYSCONFIG_NOSTDBY                     (1 << 4)
  70 #define OMAP4_UHH_SYSCONFIG_SOFTRESET                   (1 << 0)
  71
  72 #define OMAP4_P1_MODE_CLEAR                             (3 << 16)
  73 #define OMAP4_P1_MODE_TLL                               (1 << 16)
  74 #define OMAP4_P1_MODE_HSIC                              (3 << 16)
  75 #define OMAP4_P2_MODE_CLEAR                             (3 << 18)
  76 #define OMAP4_P2_MODE_TLL                               (1 << 18)
  77 #define OMAP4_P2_MODE_HSIC                              (3 << 18)
  78
  79 #define OMAP_UHH_DEBUG_CSR                              (0x44)
  80
  81 /* Values of UHH_REVISION - Note: these are not given in the TRM */
  82 #define OMAP_USBHS_REV1         0x00000010      /* OMAP3 */
  83 #define OMAP_USBHS_REV2         0x50700100      /* OMAP4 */
  84
  85 #define is_omap_usbhs_rev1(x)   (x->usbhs_rev == OMAP_USBHS_REV1)
  86 #define is_omap_usbhs_rev2(x)   (x->usbhs_rev == OMAP_USBHS_REV2)
  87
  88 #define is_ehci_phy_mode(x)     (x == OMAP_EHCI_PORT_MODE_PHY)
  89 #define is_ehci_tll_mode(x)     (x == OMAP_EHCI_PORT_MODE_TLL)
  90 #define is_ehci_hsic_mode(x)    (x == OMAP_EHCI_PORT_MODE_HSIC)
  91
  92
  93 struct usbhs_hcd_omap {
  94         struct clk                      *xclk60mhsp1_ck;
  95         struct clk                      *xclk60mhsp2_ck;
  96         struct clk                      *utmi_p1_fck;
  97         struct clk                      *usbhost_p1_fck;
  98         struct clk                      *utmi_p2_fck;
  99         struct clk                      *usbhost_p2_fck;
 100         struct clk                      *init_60m_fclk;
 101         struct clk                      *ehci_logic_fck;
 102
 103         void __iomem                    *uhh_base;
 104
 105         struct usbhs_omap_platform_data *pdata;
 106
 107         u32                             usbhs_rev;
 108         spinlock_t                      lock;
 109 };
 110 /*-------------------------------------------------------------------------*/
 111
 112 const char usbhs_driver_name[] = USBHS_DRIVER_NAME;
 113 static u64 usbhs_dmamask = DMA_BIT_MASK(32);
 114
 115 /*-------------------------------------------------------------------------*/
 116
 117 static inline void usbhs_write(void __iomem *base, u32 reg, u32 val)
 118 {
 119         __raw_writel(val, base + reg);
 120 }
 121
 122 static inline u32 usbhs_read(void __iomem *base, u32 reg)
 123 {
 124         return __raw_readl(base + reg);
 125 }
 126
 127 static inline void usbhs_writeb(void __iomem *base, u8 reg, u8 val)
 128 {
 129         __raw_writeb(val, base + reg);
 130 }
 131
 132 static inline u8 usbhs_readb(void __iomem *base, u8 reg)
 133 {
 134         return __raw_readb(base + reg);
 135 }
 136
 137 /*-------------------------------------------------------------------------*/
 138
 139 static struct platform_device *omap_usbhs_alloc_child(const char *name,
 140                         struct resource *res, int num_resources, void *pdata,
 141                         size_t pdata_size, struct device *dev)
 142 {
 143         struct platform_device  *child;
 144         int                     ret;
 145
 146         child = platform_device_alloc(name, 0);
 147
 148         if (!child) {
 149                 dev_err(dev, "platform_device_alloc %s failed\n", name);
 150                 goto err_end;
 151         }
 152
 153         ret = platform_device_add_resources(child, res, num_resources);
 154         if (ret) {
 155                 dev_err(dev, "platform_device_add_resources failed\n");
 156                 goto err_alloc;
 157         }
 158
 159         ret = platform_device_add_data(child, pdata, pdata_size);
 160         if (ret) {
 161                 dev_err(dev, "platform_device_add_data failed\n");
 162                 goto err_alloc;
 163         }
 164
 165         child->dev.dma_mask             = &usbhs_dmamask;
 166         dma_set_coherent_mask(&child->dev, DMA_BIT_MASK(32));
 167         child->dev.parent               = dev;
 168
 169         ret = platform_device_add(child);
 170         if (ret) {
 171                 dev_err(dev, "platform_device_add failed\n");
 172                 goto err_alloc;
 173         }
 174
 175         return child;
 176
 177 err_alloc:
 178         platform_device_put(child);
 179
 180 err_end:
 181         return NULL;
 182 }
 183
 184 static int omap_usbhs_alloc_children(struct platform_device *pdev)
 185 {
 186         struct device                           *dev = &pdev->dev;
 187         struct usbhs_omap_platform_data         *pdata = dev->platform_data;
 188         struct platform_device                  *ehci;
 189         struct platform_device                  *ohci;
 190         struct resource                         *res;
 191         struct resource                         resources[2];
 192         int                                     ret;
 193
 194         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ehci");
 195         if (!res) {
 196                 dev_err(dev, "EHCI get resource IORESOURCE_MEM failed\n");
 197                 ret = -ENODEV;
 198                 goto err_end;
 199         }
 200         resources[0] = *res;
 201
 202         res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ehci-irq");
 203         if (!res) {
 204                 dev_err(dev, " EHCI get resource IORESOURCE_IRQ failed\n");
 205                 ret = -ENODEV;
 206                 goto err_end;
 207         }
 208         resources[1] = *res;
 209
 210         ehci = omap_usbhs_alloc_child(OMAP_EHCI_DEVICE, resources, 2, pdata,
 211                 sizeof(*pdata), dev);
 212
 213         if (!ehci) {
 214                 dev_err(dev, "omap_usbhs_alloc_child failed\n");
 215                 ret = -ENOMEM;
 216                 goto err_end;
 217         }
 218
 219         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ohci");
 220         if (!res) {
 221                 dev_err(dev, "OHCI get resource IORESOURCE_MEM failed\n");
 222                 ret = -ENODEV;
 223                 goto err_ehci;
 224         }
 225         resources[0] = *res;
 226
 227         res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "ohci-irq");
 228         if (!res) {
 229                 dev_err(dev, "OHCI get resource IORESOURCE_IRQ failed\n");
 230                 ret = -ENODEV;
 231                 goto err_ehci;
 232         }
 233         resources[1] = *res;
 234
 235         ohci = omap_usbhs_alloc_child(OMAP_OHCI_DEVICE, resources, 2, pdata,
 236                 sizeof(*pdata), dev);
 237         if (!ohci) {
 238                 dev_err(dev, "omap_usbhs_alloc_child failed\n");
 239                 ret = -ENOMEM;
 240                 goto err_ehci;
 241         }
 242
 243         return 0;
 244
 245 err_ehci:
 246         platform_device_unregister(ehci);
 247
 248 err_end:
 249         return ret;
 250 }
 251
 252 static bool is_ohci_port(enum usbhs_omap_port_mode pmode)
 253 {
 254         switch (pmode) {
 255         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DATSE0:
 256         case OMAP_OHCI_PORT_MODE_PHY_6PIN_DPDM:
 257         case OMAP_OHCI_PORT_MODE_PHY_3PIN_DATSE0:
 258         case OMAP_OHCI_PORT_MODE_PHY_4PIN_DPDM:
 259         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DATSE0:
 260         case OMAP_OHCI_PORT_MODE_TLL_6PIN_DPDM:
 261         case OMAP_OHCI_PORT_MODE_TLL_3PIN_DATSE0:
 262         case OMAP_OHCI_PORT_MODE_TLL_4PIN_DPDM:
 263         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DATSE0:
 264         case OMAP_OHCI_PORT_MODE_TLL_2PIN_DPDM:
 265                 return true;
 266
 267         default:
 268                 return false;
 269         }
 270 }
 271
 272 static int usbhs_runtime_resume(struct device *dev)
 273 {
 274         struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 275         struct usbhs_omap_platform_data *pdata = omap->pdata;
 276         unsigned long                   flags;
 277
 278         dev_dbg(dev, "usbhs_runtime_resume\n");
 279
 280         if (!pdata) {
 281                 dev_dbg(dev, "missing platform_data\n");
 282                 return  -ENODEV;
 283         }
 284
 285         omap_tll_enable();
 286         spin_lock_irqsave(&omap->lock, flags);
 287
 288         if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
 289                 clk_enable(omap->ehci_logic_fck);
 290
 291         if (is_ehci_tll_mode(pdata->port_mode[0]))
 292                 clk_enable(omap->usbhost_p1_fck);
 293         if (is_ehci_tll_mode(pdata->port_mode[1]))
 294                 clk_enable(omap->usbhost_p2_fck);
 295
 296         clk_enable(omap->utmi_p1_fck);
 297         clk_enable(omap->utmi_p2_fck);
 298
 299         spin_unlock_irqrestore(&omap->lock, flags);
 300
 301         return 0;
 302 }
 303
 304 static int usbhs_runtime_suspend(struct device *dev)
 305 {
 306         struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 307         struct usbhs_omap_platform_data *pdata = omap->pdata;
 308         unsigned long                   flags;
 309
 310         dev_dbg(dev, "usbhs_runtime_suspend\n");
 311
 312         if (!pdata) {
 313                 dev_dbg(dev, "missing platform_data\n");
 314                 return  -ENODEV;
 315         }
 316
 317         spin_lock_irqsave(&omap->lock, flags);
 318
 319         if (is_ehci_tll_mode(pdata->port_mode[0]))
 320                 clk_disable(omap->usbhost_p1_fck);
 321         if (is_ehci_tll_mode(pdata->port_mode[1]))
 322                 clk_disable(omap->usbhost_p2_fck);
 323
 324         clk_disable(omap->utmi_p2_fck);
 325         clk_disable(omap->utmi_p1_fck);
 326
 327         if (omap->ehci_logic_fck && !IS_ERR(omap->ehci_logic_fck))
 328                 clk_disable(omap->ehci_logic_fck);
 329
 330         spin_unlock_irqrestore(&omap->lock, flags);
 331         omap_tll_disable();
 332
 333         return 0;
 334 }
 335
 336 static void omap_usbhs_init(struct device *dev)
 337 {
 338         struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 339         struct usbhs_omap_platform_data *pdata = omap->pdata;
 340         unsigned long                   flags;
 341         unsigned                        reg;
 342
 343         dev_dbg(dev, "starting TI HSUSB Controller\n");
 344
 345         if (pdata->phy_reset) {
 346                 if (gpio_is_valid(pdata->reset_gpio_port[0]))
 347                         gpio_request_one(pdata->reset_gpio_port[0],
 348                                          GPIOF_OUT_INIT_LOW, "USB1 PHY reset");
 349
 350                 if (gpio_is_valid(pdata->reset_gpio_port[1]))
 351                         gpio_request_one(pdata->reset_gpio_port[1],
 352                                          GPIOF_OUT_INIT_LOW, "USB2 PHY reset");
 353
 354                 /* Hold the PHY in RESET for enough time till DIR is high */
 355                 udelay(10);
 356         }
 357
 358         pm_runtime_get_sync(dev);
 359         spin_lock_irqsave(&omap->lock, flags);
 360         omap->usbhs_rev = usbhs_read(omap->uhh_base, OMAP_UHH_REVISION);
 361         dev_dbg(dev, "OMAP UHH_REVISION 0x%x\n", omap->usbhs_rev);
 362
 363         reg = usbhs_read(omap->uhh_base, OMAP_UHH_HOSTCONFIG);
 364         /* setup ULPI bypass and burst configurations */
 365         reg |= (OMAP_UHH_HOSTCONFIG_INCR4_BURST_EN
 366                         | OMAP_UHH_HOSTCONFIG_INCR8_BURST_EN
 367                         | OMAP_UHH_HOSTCONFIG_INCR16_BURST_EN);
 368         reg |= OMAP4_UHH_HOSTCONFIG_APP_START_CLK;
 369         reg &= ~OMAP_UHH_HOSTCONFIG_INCRX_ALIGN_EN;
 370
 371         if (is_omap_usbhs_rev1(omap)) {
 372                 if (pdata->port_mode[0] == OMAP_USBHS_PORT_MODE_UNUSED)
 373                         reg &= ~OMAP_UHH_HOSTCONFIG_P1_CONNECT_STATUS;
 374                 if (pdata->port_mode[1] == OMAP_USBHS_PORT_MODE_UNUSED)
 375                         reg &= ~OMAP_UHH_HOSTCONFIG_P2_CONNECT_STATUS;
 376                 if (pdata->port_mode[2] == OMAP_USBHS_PORT_MODE_UNUSED)
 377                         reg &= ~OMAP_UHH_HOSTCONFIG_P3_CONNECT_STATUS;
 378
 379                 /* Bypass the TLL module for PHY mode operation */
 380                 if (pdata->single_ulpi_bypass) {
 381                         dev_dbg(dev, "OMAP3 ES version <= ES2.1\n");
 382                         if (is_ehci_phy_mode(pdata->port_mode[0]) ||
 383                                 is_ehci_phy_mode(pdata->port_mode[1]) ||
 384                                         is_ehci_phy_mode(pdata->port_mode[2]))
 385                                 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
 386                         else
 387                                 reg |= OMAP_UHH_HOSTCONFIG_ULPI_BYPASS;
 388                 } else {
 389                         dev_dbg(dev, "OMAP3 ES version > ES2.1\n");
 390                         if (is_ehci_phy_mode(pdata->port_mode[0]))
 391                                 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
 392                         else
 393                                 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P1_BYPASS;
 394                         if (is_ehci_phy_mode(pdata->port_mode[1]))
 395                                 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
 396                         else
 397                                 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P2_BYPASS;
 398                         if (is_ehci_phy_mode(pdata->port_mode[2]))
 399                                 reg &= ~OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
 400                         else
 401                                 reg |= OMAP_UHH_HOSTCONFIG_ULPI_P3_BYPASS;
 402                 }
 403         } else if (is_omap_usbhs_rev2(omap)) {
 404                 /* Clear port mode fields for PHY mode*/
 405                 reg &= ~OMAP4_P1_MODE_CLEAR;
 406                 reg &= ~OMAP4_P2_MODE_CLEAR;
 407
 408                 if (is_ehci_tll_mode(pdata->port_mode[0]) ||
 409                         (is_ohci_port(pdata->port_mode[0])))
 410                         reg |= OMAP4_P1_MODE_TLL;
 411                 else if (is_ehci_hsic_mode(pdata->port_mode[0]))
 412                         reg |= OMAP4_P1_MODE_HSIC;
 413
 414                 if (is_ehci_tll_mode(pdata->port_mode[1]) ||
 415                         (is_ohci_port(pdata->port_mode[1])))
 416                         reg |= OMAP4_P2_MODE_TLL;
 417                 else if (is_ehci_hsic_mode(pdata->port_mode[1]))
 418                         reg |= OMAP4_P2_MODE_HSIC;
 419         }
 420
 421         usbhs_write(omap->uhh_base, OMAP_UHH_HOSTCONFIG, reg);
 422         dev_dbg(dev, "UHH setup done, uhh_hostconfig=%x\n", reg);
 423
 424         spin_unlock_irqrestore(&omap->lock, flags);
 425
 426         pm_runtime_put_sync(dev);
 427         if (pdata->phy_reset) {
 428                 /* Hold the PHY in RESET for enough time till
 429                  * PHY is settled and ready
 430                  */
 431                 udelay(10);
 432
 433                 if (gpio_is_valid(pdata->reset_gpio_port[0]))
 434                         gpio_set_value_cansleep
 435                                 (pdata->reset_gpio_port[0], 1);
 436
 437                 if (gpio_is_valid(pdata->reset_gpio_port[1]))
 438                         gpio_set_value_cansleep
 439                                 (pdata->reset_gpio_port[1], 1);
 440         }
 441 }
 442
 443 static void omap_usbhs_deinit(struct device *dev)
 444 {
 445         struct usbhs_hcd_omap           *omap = dev_get_drvdata(dev);
 446         struct usbhs_omap_platform_data *pdata = omap->pdata;
 447
 448         if (pdata->phy_reset) {
 449                 if (gpio_is_valid(pdata->reset_gpio_port[0]))
 450                         gpio_free(pdata->reset_gpio_port[0]);
 451
 452                 if (gpio_is_valid(pdata->reset_gpio_port[1]))
 453                         gpio_free(pdata->reset_gpio_port[1]);
 454         }
 455 }
 456
 457
 458 /**
 459  * usbhs_omap_probe - initialize TI-based HCDs
 460  *
 461  * Allocates basic resources for this USB host controller.
 462  */
 463 static int usbhs_omap_probe(struct platform_device *pdev)
 464 {
 465         struct device                   *dev =  &pdev->dev;
 466         struct usbhs_omap_platform_data *pdata = dev->platform_data;
 467         struct usbhs_hcd_omap           *omap;
 468         struct resource                 *res;
 469         int                             ret = 0;
 470         int                             i;
 471
 472         if (!pdata) {
 473                 dev_err(dev, "Missing platform data\n");
 474                 ret = -ENOMEM;
 475                 goto end_probe;
 476         }
 477
 478         omap = kzalloc(sizeof(*omap), GFP_KERNEL);
 479         if (!omap) {
 480                 dev_err(dev, "Memory allocation failed\n");
 481                 ret = -ENOMEM;
 482                 goto end_probe;
 483         }
 484
 485         spin_lock_init(&omap->lock);
 486
 487         omap->pdata = pdata;
 488
 489         pm_runtime_enable(dev);
 490
 491         for (i = 0; i < OMAP3_HS_USB_PORTS; i++)
 492                 if (is_ehci_phy_mode(i) || is_ehci_tll_mode(i) ||
 493                         is_ehci_hsic_mode(i)) {
 494                         omap->ehci_logic_fck = clk_get(dev, "ehci_logic_fck");
 495                         if (IS_ERR(omap->ehci_logic_fck)) {
 496                                 ret = PTR_ERR(omap->ehci_logic_fck);
 497                                 dev_warn(dev, "ehci_logic_fck failed:%d\n",
 498                                          ret);
 499                         }
 500                         break;
 501                 }
 502
 503         omap->utmi_p1_fck = clk_get(dev, "utmi_p1_gfclk");
 504         if (IS_ERR(omap->utmi_p1_fck)) {
 505                 ret = PTR_ERR(omap->utmi_p1_fck);
 506                 dev_err(dev, "utmi_p1_gfclk failed error:%d\n", ret);
 507                 goto err_end;
 508         }
 509
 510         omap->xclk60mhsp1_ck = clk_get(dev, "xclk60mhsp1_ck");
 511         if (IS_ERR(omap->xclk60mhsp1_ck)) {
 512                 ret = PTR_ERR(omap->xclk60mhsp1_ck);
 513                 dev_err(dev, "xclk60mhsp1_ck failed error:%d\n", ret);
 514                 goto err_utmi_p1_fck;
 515         }
 516
 517         omap->utmi_p2_fck = clk_get(dev, "utmi_p2_gfclk");
 518         if (IS_ERR(omap->utmi_p2_fck)) {
 519                 ret = PTR_ERR(omap->utmi_p2_fck);
 520                 dev_err(dev, "utmi_p2_gfclk failed error:%d\n", ret);
 521                 goto err_xclk60mhsp1_ck;
 522         }
 523
 524         omap->xclk60mhsp2_ck = clk_get(dev, "xclk60mhsp2_ck");
 525         if (IS_ERR(omap->xclk60mhsp2_ck)) {
 526                 ret = PTR_ERR(omap->xclk60mhsp2_ck);
 527                 dev_err(dev, "xclk60mhsp2_ck failed error:%d\n", ret);
 528                 goto err_utmi_p2_fck;
 529         }
 530
 531         omap->usbhost_p1_fck = clk_get(dev, "usb_host_hs_utmi_p1_clk");
 532         if (IS_ERR(omap->usbhost_p1_fck)) {
 533                 ret = PTR_ERR(omap->usbhost_p1_fck);
 534                 dev_err(dev, "usbhost_p1_fck failed error:%d\n", ret);
 535                 goto err_xclk60mhsp2_ck;
 536         }
 537
 538         omap->usbhost_p2_fck = clk_get(dev, "usb_host_hs_utmi_p2_clk");
 539         if (IS_ERR(omap->usbhost_p2_fck)) {
 540                 ret = PTR_ERR(omap->usbhost_p2_fck);
 541                 dev_err(dev, "usbhost_p2_fck failed error:%d\n", ret);
 542                 goto err_usbhost_p1_fck;
 543         }
 544
 545         omap->init_60m_fclk = clk_get(dev, "init_60m_fclk");
 546         if (IS_ERR(omap->init_60m_fclk)) {
 547                 ret = PTR_ERR(omap->init_60m_fclk);
 548                 dev_err(dev, "init_60m_fclk failed error:%d\n", ret);
 549                 goto err_usbhost_p2_fck;
 550         }
 551
 552         if (is_ehci_phy_mode(pdata->port_mode[0])) {
 553                 /* for OMAP3 , the clk set paretn fails */
 554                 ret = clk_set_parent(omap->utmi_p1_fck,
 555                                         omap->xclk60mhsp1_ck);
 556                 if (ret != 0)
 557                         dev_err(dev, "xclk60mhsp1_ck set parent"
 558                                 "failed error:%d\n", ret);
 559         } else if (is_ehci_tll_mode(pdata->port_mode[0])) {
 560                 ret = clk_set_parent(omap->utmi_p1_fck,
 561                                         omap->init_60m_fclk);
 562                 if (ret != 0)
 563                         dev_err(dev, "init_60m_fclk set parent"
 564                                 "failed error:%d\n", ret);
 565         }
 566
 567         if (is_ehci_phy_mode(pdata->port_mode[1])) {
 568                 ret = clk_set_parent(omap->utmi_p2_fck,
 569                                         omap->xclk60mhsp2_ck);
 570                 if (ret != 0)
 571                         dev_err(dev, "xclk60mhsp2_ck set parent"
 572                                         "failed error:%d\n", ret);
 573         } else if (is_ehci_tll_mode(pdata->port_mode[1])) {
 574                 ret = clk_set_parent(omap->utmi_p2_fck,
 575                                                 omap->init_60m_fclk);
 576                 if (ret != 0)
 577                         dev_err(dev, "init_60m_fclk set parent"
 578                                 "failed error:%d\n", ret);
 579         }
 580
 581         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "uhh");
 582         if (!res) {
 583                 dev_err(dev, "UHH EHCI get resource failed\n");
 584                 ret = -ENODEV;
 585                 goto err_init_60m_fclk;
 586         }
 587
 588         omap->uhh_base = ioremap(res->start, resource_size(res));
 589         if (!omap->uhh_base) {
 590                 dev_err(dev, "UHH ioremap failed\n");
 591                 ret = -ENOMEM;
 592                 goto err_init_60m_fclk;
 593         }
 594
 595         platform_set_drvdata(pdev, omap);
 596
 597         omap_usbhs_init(dev);
 598         ret = omap_usbhs_alloc_children(pdev);
 599         if (ret) {
 600                 dev_err(dev, "omap_usbhs_alloc_children failed\n");
 601                 goto err_alloc;
 602         }
 603
 604         goto end_probe;
 605
 606 err_alloc:
 607         omap_usbhs_deinit(&pdev->dev);
 608         iounmap(omap->uhh_base);
 609
 610 err_init_60m_fclk:
 611         clk_put(omap->init_60m_fclk);
 612
 613 err_usbhost_p2_fck:
 614         clk_put(omap->usbhost_p2_fck);
 615
 616 err_usbhost_p1_fck:
 617         clk_put(omap->usbhost_p1_fck);
 618
 619 err_xclk60mhsp2_ck:
 620         clk_put(omap->xclk60mhsp2_ck);
 621
 622 err_utmi_p2_fck:
 623         clk_put(omap->utmi_p2_fck);
 624
 625 err_xclk60mhsp1_ck:
 626         clk_put(omap->xclk60mhsp1_ck);
 627
 628 err_utmi_p1_fck:
 629         clk_put(omap->utmi_p1_fck);
 630
 631 err_end:
 632         clk_put(omap->ehci_logic_fck);
 633         pm_runtime_disable(dev);
 634         kfree(omap);
 635
 636 end_probe:
 637         return ret;
 638 }
 639
 640 /**
 641  * usbhs_omap_remove - shutdown processing for UHH & TLL HCDs
 642  * @pdev: USB Host Controller being removed
 643  *
 644  * Reverses the effect of usbhs_omap_probe().
 645  */
 646 static int usbhs_omap_remove(struct platform_device *pdev)
 647 {
 648         struct usbhs_hcd_omap *omap = platform_get_drvdata(pdev);
 649
 650         omap_usbhs_deinit(&pdev->dev);
 651         iounmap(omap->uhh_base);
 652         clk_put(omap->init_60m_fclk);
 653         clk_put(omap->usbhost_p2_fck);
 654         clk_put(omap->usbhost_p1_fck);
 655         clk_put(omap->xclk60mhsp2_ck);
 656         clk_put(omap->utmi_p2_fck);
 657         clk_put(omap->xclk60mhsp1_ck);
 658         clk_put(omap->utmi_p1_fck);
 659         clk_put(omap->ehci_logic_fck);
 660         pm_runtime_disable(&pdev->dev);
 661         kfree(omap);
 662
 663         return 0;
 664 }
 665
 666 static const struct dev_pm_ops usbhsomap_dev_pm_ops = {
 667         .runtime_suspend        = usbhs_runtime_suspend,
 668         .runtime_resume         = usbhs_runtime_resume,
 669 };
 670
 671 static struct platform_driver usbhs_omap_driver = {
 672         .driver = {
 673                 .name           = (char *)usbhs_driver_name,
 674                 .owner          = THIS_MODULE,
 675                 .pm             = &usbhsomap_dev_pm_ops,
 676         },
 677         .remove         = __exit_p(usbhs_omap_remove),
 678 };
 679
 680 MODULE_AUTHOR("Keshava Munegowda <keshava_mgowda@ti.com>");
 681 MODULE_ALIAS("platform:" USBHS_DRIVER_NAME);
 682 MODULE_LICENSE("GPL v2");
 683 MODULE_DESCRIPTION("usb host common core driver for omap EHCI and OHCI");
 684
 685 static int __init omap_usbhs_drvinit(void)
 686 {
 687         return platform_driver_probe(&usbhs_omap_driver, usbhs_omap_probe);
 688 }
 689
 690 /*
 691  * init before ehci and ohci drivers;
 692  * The usbhs core driver should be initialized much before
 693  * the omap ehci and ohci probe functions are called.
 694  * This usbhs core driver should be initialized after
 695  * usb tll driver
 696  */
 697 fs_initcall_sync(omap_usbhs_drvinit);
 698
 699 static void __exit omap_usbhs_drvexit(void)
 700 {
 701         platform_driver_unregister(&usbhs_omap_driver);
 702 }
 703 module_exit(omap_usbhs_drvexit);