2 * Support for the GPIO/IRQ expander chips present on several HTC phones.
3 * These are implemented in CPLD chips present on the board.
5 * Copyright (c) 2007 Kevin O'Connor <kevin@koconnor.net>
6 * Copyright (c) 2007 Philipp Zabel <philipp.zabel@gmail.com>
8 * This file may be distributed under the terms of the GNU GPL license.
11 #include <linux/kernel.h>
12 #include <linux/errno.h>
13 #include <linux/interrupt.h>
14 #include <linux/irq.h>
16 #include <linux/spinlock.h>
17 #include <linux/platform_device.h>
18 #include <linux/slab.h>
19 #include <linux/module.h>
20 #include <linux/mfd/htc-egpio.h>
27 struct gpio_chip chip;
34 void __iomem *base_addr;
35 int bus_shift; /* byte shift */
36 int reg_shift; /* bit shift */
48 struct egpio_chip *chip;
52 static inline void egpio_writew(u16 value, struct egpio_info *ei, int reg)
54 writew(value, ei->base_addr + (reg << ei->bus_shift));
57 static inline u16 egpio_readw(struct egpio_info *ei, int reg)
59 return readw(ei->base_addr + (reg << ei->bus_shift));
66 static inline void ack_irqs(struct egpio_info *ei)
68 egpio_writew(ei->ack_write, ei, ei->ack_register);
69 pr_debug("EGPIO ack - write %x to base+%x\n",
70 ei->ack_write, ei->ack_register << ei->bus_shift);
73 static void egpio_ack(unsigned int irq)
77 /* There does not appear to be a way to proactively mask interrupts
78 * on the egpio chip itself. So, we simply ignore interrupts that
80 static void egpio_mask(unsigned int irq)
82 struct egpio_info *ei = get_irq_chip_data(irq);
83 ei->irqs_enabled &= ~(1 << (irq - ei->irq_start));
84 pr_debug("EGPIO mask %d %04x\n", irq, ei->irqs_enabled);
86 static void egpio_unmask(unsigned int irq)
88 struct egpio_info *ei = get_irq_chip_data(irq);
89 ei->irqs_enabled |= 1 << (irq - ei->irq_start);
90 pr_debug("EGPIO unmask %d %04x\n", irq, ei->irqs_enabled);
93 static struct irq_chip egpio_muxed_chip = {
97 .unmask = egpio_unmask,
100 static void egpio_handler(unsigned int irq, struct irq_desc *desc)
102 struct egpio_info *ei = get_irq_data(irq);
105 /* Read current pins. */
106 unsigned long readval = egpio_readw(ei, ei->ack_register);
107 pr_debug("IRQ reg: %x\n", (unsigned int)readval);
108 /* Ack/unmask interrupts. */
110 /* Process all set pins. */
111 readval &= ei->irqs_enabled;
112 for_each_set_bit(irqpin, &readval, ei->nirqs) {
113 /* Run irq handler */
114 pr_debug("got IRQ %d\n", irqpin);
115 irq = ei->irq_start + irqpin;
116 desc = irq_to_desc(irq);
117 desc->handle_irq(irq, desc);
121 int htc_egpio_get_wakeup_irq(struct device *dev)
123 struct egpio_info *ei = dev_get_drvdata(dev);
125 /* Read current pins. */
126 u16 readval = egpio_readw(ei, ei->ack_register);
127 /* Ack/unmask interrupts. */
129 /* Return first set pin. */
130 readval &= ei->irqs_enabled;
131 return ei->irq_start + ffs(readval) - 1;
133 EXPORT_SYMBOL(htc_egpio_get_wakeup_irq);
135 static inline int egpio_pos(struct egpio_info *ei, int bit)
137 return bit >> ei->reg_shift;
140 static inline int egpio_bit(struct egpio_info *ei, int bit)
142 return 1 << (bit & ((1 << ei->reg_shift)-1));
149 static int egpio_get(struct gpio_chip *chip, unsigned offset)
151 struct egpio_chip *egpio;
152 struct egpio_info *ei;
157 pr_debug("egpio_get_value(%d)\n", chip->base + offset);
159 egpio = container_of(chip, struct egpio_chip, chip);
160 ei = dev_get_drvdata(egpio->dev);
161 bit = egpio_bit(ei, offset);
162 reg = egpio->reg_start + egpio_pos(ei, offset);
164 value = egpio_readw(ei, reg);
165 pr_debug("readw(%p + %x) = %x\n",
166 ei->base_addr, reg << ei->bus_shift, value);
170 static int egpio_direction_input(struct gpio_chip *chip, unsigned offset)
172 struct egpio_chip *egpio;
174 egpio = container_of(chip, struct egpio_chip, chip);
175 return test_bit(offset, &egpio->is_out) ? -EINVAL : 0;
183 static void egpio_set(struct gpio_chip *chip, unsigned offset, int value)
186 struct egpio_chip *egpio;
187 struct egpio_info *ei;
193 pr_debug("egpio_set(%s, %d(%d), %d)\n",
194 chip->label, offset, offset+chip->base, value);
196 egpio = container_of(chip, struct egpio_chip, chip);
197 ei = dev_get_drvdata(egpio->dev);
198 bit = egpio_bit(ei, offset);
199 pos = egpio_pos(ei, offset);
200 reg = egpio->reg_start + pos;
201 shift = pos << ei->reg_shift;
203 pr_debug("egpio %s: reg %d = 0x%04x\n", value ? "set" : "clear",
204 reg, (egpio->cached_values >> shift) & ei->reg_mask);
206 spin_lock_irqsave(&ei->lock, flag);
208 egpio->cached_values |= (1 << offset);
210 egpio->cached_values &= ~(1 << offset);
211 egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg);
212 spin_unlock_irqrestore(&ei->lock, flag);
215 static int egpio_direction_output(struct gpio_chip *chip,
216 unsigned offset, int value)
218 struct egpio_chip *egpio;
220 egpio = container_of(chip, struct egpio_chip, chip);
221 if (test_bit(offset, &egpio->is_out)) {
222 egpio_set(chip, offset, value);
229 static void egpio_write_cache(struct egpio_info *ei)
232 struct egpio_chip *egpio;
235 for (i = 0; i < ei->nchips; i++) {
236 egpio = &(ei->chip[i]);
240 for (shift = 0; shift < egpio->chip.ngpio;
241 shift += (1<<ei->reg_shift)) {
243 int reg = egpio->reg_start + egpio_pos(ei, shift);
245 if (!((egpio->is_out >> shift) & ei->reg_mask))
248 pr_debug("EGPIO: setting %x to %x, was %x\n", reg,
249 (egpio->cached_values >> shift) & ei->reg_mask,
250 egpio_readw(ei, reg));
252 egpio_writew((egpio->cached_values >> shift)
253 & ei->reg_mask, ei, reg);
263 static int __init egpio_probe(struct platform_device *pdev)
265 struct htc_egpio_platform_data *pdata = pdev->dev.platform_data;
266 struct resource *res;
267 struct egpio_info *ei;
268 struct gpio_chip *chip;
269 unsigned int irq, irq_end;
273 /* Initialize ei data structure. */
274 ei = kzalloc(sizeof(*ei), GFP_KERNEL);
278 spin_lock_init(&ei->lock);
280 /* Find chained irq */
282 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
284 ei->chained_irq = res->start;
286 /* Map egpio chip into virtual address space. */
287 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
290 ei->base_addr = ioremap_nocache(res->start, resource_size(res));
293 pr_debug("EGPIO phys=%08x virt=%p\n", (u32)res->start, ei->base_addr);
295 if ((pdata->bus_width != 16) && (pdata->bus_width != 32))
297 ei->bus_shift = fls(pdata->bus_width - 1) - 3;
298 pr_debug("bus_shift = %d\n", ei->bus_shift);
300 if ((pdata->reg_width != 8) && (pdata->reg_width != 16))
302 ei->reg_shift = fls(pdata->reg_width - 1);
303 pr_debug("reg_shift = %d\n", ei->reg_shift);
305 ei->reg_mask = (1 << pdata->reg_width) - 1;
307 platform_set_drvdata(pdev, ei);
309 ei->nchips = pdata->num_chips;
310 ei->chip = kzalloc(sizeof(struct egpio_chip) * ei->nchips, GFP_KERNEL);
315 for (i = 0; i < ei->nchips; i++) {
316 ei->chip[i].reg_start = pdata->chip[i].reg_start;
317 ei->chip[i].cached_values = pdata->chip[i].initial_values;
318 ei->chip[i].is_out = pdata->chip[i].direction;
319 ei->chip[i].dev = &(pdev->dev);
320 chip = &(ei->chip[i].chip);
321 chip->label = "htc-egpio";
322 chip->dev = &pdev->dev;
323 chip->owner = THIS_MODULE;
324 chip->get = egpio_get;
325 chip->set = egpio_set;
326 chip->direction_input = egpio_direction_input;
327 chip->direction_output = egpio_direction_output;
328 chip->base = pdata->chip[i].gpio_base;
329 chip->ngpio = pdata->chip[i].num_gpios;
334 /* Set initial pin values */
335 egpio_write_cache(ei);
337 ei->irq_start = pdata->irq_base;
338 ei->nirqs = pdata->num_irqs;
339 ei->ack_register = pdata->ack_register;
341 if (ei->chained_irq) {
342 /* Setup irq handlers */
343 ei->ack_write = 0xFFFF;
344 if (pdata->invert_acks)
346 irq_end = ei->irq_start + ei->nirqs;
347 for (irq = ei->irq_start; irq < irq_end; irq++) {
348 set_irq_chip(irq, &egpio_muxed_chip);
349 set_irq_chip_data(irq, ei);
350 set_irq_handler(irq, handle_simple_irq);
351 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
353 set_irq_type(ei->chained_irq, IRQ_TYPE_EDGE_RISING);
354 set_irq_data(ei->chained_irq, ei);
355 set_irq_chained_handler(ei->chained_irq, egpio_handler);
358 device_init_wakeup(&pdev->dev, 1);
364 printk(KERN_ERR "EGPIO failed to setup\n");
369 static int __exit egpio_remove(struct platform_device *pdev)
371 struct egpio_info *ei = platform_get_drvdata(pdev);
372 unsigned int irq, irq_end;
374 if (ei->chained_irq) {
375 irq_end = ei->irq_start + ei->nirqs;
376 for (irq = ei->irq_start; irq < irq_end; irq++) {
377 set_irq_chip(irq, NULL);
378 set_irq_handler(irq, NULL);
379 set_irq_flags(irq, 0);
381 set_irq_chained_handler(ei->chained_irq, NULL);
382 device_init_wakeup(&pdev->dev, 0);
384 iounmap(ei->base_addr);
392 static int egpio_suspend(struct platform_device *pdev, pm_message_t state)
394 struct egpio_info *ei = platform_get_drvdata(pdev);
396 if (ei->chained_irq && device_may_wakeup(&pdev->dev))
397 enable_irq_wake(ei->chained_irq);
401 static int egpio_resume(struct platform_device *pdev)
403 struct egpio_info *ei = platform_get_drvdata(pdev);
405 if (ei->chained_irq && device_may_wakeup(&pdev->dev))
406 disable_irq_wake(ei->chained_irq);
408 /* Update registers from the cache, in case
409 the CPLD was powered off during suspend */
410 egpio_write_cache(ei);
414 #define egpio_suspend NULL
415 #define egpio_resume NULL
419 static struct platform_driver egpio_driver = {
423 .remove = __exit_p(egpio_remove),
424 .suspend = egpio_suspend,
425 .resume = egpio_resume,
428 static int __init egpio_init(void)
430 return platform_driver_probe(&egpio_driver, egpio_probe);
433 static void __exit egpio_exit(void)
435 platform_driver_unregister(&egpio_driver);
438 /* start early for dependencies */
439 subsys_initcall(egpio_init);
440 module_exit(egpio_exit)
442 MODULE_LICENSE("GPL");
443 MODULE_AUTHOR("Kevin O'Connor <kevin@koconnor.net>");