4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/err.h>
15 #include <linux/gpio.h>
16 #include <linux/interrupt.h>
17 #include <linux/mfd/core.h>
18 #include <linux/module.h>
20 #include <linux/of_device.h>
21 #include <linux/of_gpio.h>
22 #include <linux/pm_runtime.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/regulator/machine.h>
26 #include <linux/slab.h>
28 #include <linux/mfd/arizona/core.h>
29 #include <linux/mfd/arizona/registers.h>
33 static const char *wm5102_core_supplies[] = {
38 int arizona_clk32k_enable(struct arizona *arizona)
42 mutex_lock(&arizona->clk_lock);
44 arizona->clk32k_ref++;
46 if (arizona->clk32k_ref == 1) {
47 switch (arizona->pdata.clk32k_src) {
48 case ARIZONA_32KZ_MCLK1:
49 ret = pm_runtime_get_sync(arizona->dev);
55 ret = regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
62 arizona->clk32k_ref--;
64 mutex_unlock(&arizona->clk_lock);
68 EXPORT_SYMBOL_GPL(arizona_clk32k_enable);
70 int arizona_clk32k_disable(struct arizona *arizona)
74 mutex_lock(&arizona->clk_lock);
76 BUG_ON(arizona->clk32k_ref <= 0);
78 arizona->clk32k_ref--;
80 if (arizona->clk32k_ref == 0) {
81 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
82 ARIZONA_CLK_32K_ENA, 0);
84 switch (arizona->pdata.clk32k_src) {
85 case ARIZONA_32KZ_MCLK1:
86 pm_runtime_put_sync(arizona->dev);
91 mutex_unlock(&arizona->clk_lock);
95 EXPORT_SYMBOL_GPL(arizona_clk32k_disable);
97 static irqreturn_t arizona_clkgen_err(int irq, void *data)
99 struct arizona *arizona = data;
101 dev_err(arizona->dev, "CLKGEN error\n");
106 static irqreturn_t arizona_underclocked(int irq, void *data)
108 struct arizona *arizona = data;
112 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_8,
115 dev_err(arizona->dev, "Failed to read underclock status: %d\n",
120 if (val & ARIZONA_AIF3_UNDERCLOCKED_STS)
121 dev_err(arizona->dev, "AIF3 underclocked\n");
122 if (val & ARIZONA_AIF2_UNDERCLOCKED_STS)
123 dev_err(arizona->dev, "AIF2 underclocked\n");
124 if (val & ARIZONA_AIF1_UNDERCLOCKED_STS)
125 dev_err(arizona->dev, "AIF1 underclocked\n");
126 if (val & ARIZONA_ISRC2_UNDERCLOCKED_STS)
127 dev_err(arizona->dev, "ISRC2 underclocked\n");
128 if (val & ARIZONA_ISRC1_UNDERCLOCKED_STS)
129 dev_err(arizona->dev, "ISRC1 underclocked\n");
130 if (val & ARIZONA_FX_UNDERCLOCKED_STS)
131 dev_err(arizona->dev, "FX underclocked\n");
132 if (val & ARIZONA_ASRC_UNDERCLOCKED_STS)
133 dev_err(arizona->dev, "ASRC underclocked\n");
134 if (val & ARIZONA_DAC_UNDERCLOCKED_STS)
135 dev_err(arizona->dev, "DAC underclocked\n");
136 if (val & ARIZONA_ADC_UNDERCLOCKED_STS)
137 dev_err(arizona->dev, "ADC underclocked\n");
138 if (val & ARIZONA_MIXER_UNDERCLOCKED_STS)
139 dev_err(arizona->dev, "Mixer dropped sample\n");
144 static irqreturn_t arizona_overclocked(int irq, void *data)
146 struct arizona *arizona = data;
150 ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6,
153 dev_err(arizona->dev, "Failed to read overclock status: %d\n",
158 if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS)
159 dev_err(arizona->dev, "PWM overclocked\n");
160 if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS)
161 dev_err(arizona->dev, "FX core overclocked\n");
162 if (val[0] & ARIZONA_DAC_SYS_OVERCLOCKED_STS)
163 dev_err(arizona->dev, "DAC SYS overclocked\n");
164 if (val[0] & ARIZONA_DAC_WARP_OVERCLOCKED_STS)
165 dev_err(arizona->dev, "DAC WARP overclocked\n");
166 if (val[0] & ARIZONA_ADC_OVERCLOCKED_STS)
167 dev_err(arizona->dev, "ADC overclocked\n");
168 if (val[0] & ARIZONA_MIXER_OVERCLOCKED_STS)
169 dev_err(arizona->dev, "Mixer overclocked\n");
170 if (val[0] & ARIZONA_AIF3_SYNC_OVERCLOCKED_STS)
171 dev_err(arizona->dev, "AIF3 overclocked\n");
172 if (val[0] & ARIZONA_AIF2_SYNC_OVERCLOCKED_STS)
173 dev_err(arizona->dev, "AIF2 overclocked\n");
174 if (val[0] & ARIZONA_AIF1_SYNC_OVERCLOCKED_STS)
175 dev_err(arizona->dev, "AIF1 overclocked\n");
176 if (val[0] & ARIZONA_PAD_CTRL_OVERCLOCKED_STS)
177 dev_err(arizona->dev, "Pad control overclocked\n");
179 if (val[1] & ARIZONA_SLIMBUS_SUBSYS_OVERCLOCKED_STS)
180 dev_err(arizona->dev, "Slimbus subsystem overclocked\n");
181 if (val[1] & ARIZONA_SLIMBUS_ASYNC_OVERCLOCKED_STS)
182 dev_err(arizona->dev, "Slimbus async overclocked\n");
183 if (val[1] & ARIZONA_SLIMBUS_SYNC_OVERCLOCKED_STS)
184 dev_err(arizona->dev, "Slimbus sync overclocked\n");
185 if (val[1] & ARIZONA_ASRC_ASYNC_SYS_OVERCLOCKED_STS)
186 dev_err(arizona->dev, "ASRC async system overclocked\n");
187 if (val[1] & ARIZONA_ASRC_ASYNC_WARP_OVERCLOCKED_STS)
188 dev_err(arizona->dev, "ASRC async WARP overclocked\n");
189 if (val[1] & ARIZONA_ASRC_SYNC_SYS_OVERCLOCKED_STS)
190 dev_err(arizona->dev, "ASRC sync system overclocked\n");
191 if (val[1] & ARIZONA_ASRC_SYNC_WARP_OVERCLOCKED_STS)
192 dev_err(arizona->dev, "ASRC sync WARP overclocked\n");
193 if (val[1] & ARIZONA_ADSP2_1_OVERCLOCKED_STS)
194 dev_err(arizona->dev, "DSP1 overclocked\n");
195 if (val[1] & ARIZONA_ISRC2_OVERCLOCKED_STS)
196 dev_err(arizona->dev, "ISRC2 overclocked\n");
197 if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS)
198 dev_err(arizona->dev, "ISRC1 overclocked\n");
203 static int arizona_poll_reg(struct arizona *arizona,
204 int timeout, unsigned int reg,
205 unsigned int mask, unsigned int target)
207 unsigned int val = 0;
210 for (i = 0; i < timeout; i++) {
211 ret = regmap_read(arizona->regmap, reg, &val);
213 dev_err(arizona->dev, "Failed to read reg %u: %d\n",
218 if ((val & mask) == target)
224 dev_err(arizona->dev, "Polling reg %u timed out: %x\n", reg, val);
228 static int arizona_wait_for_boot(struct arizona *arizona)
233 * We can't use an interrupt as we need to runtime resume to do so,
234 * we won't race with the interrupt handler as it'll be blocked on
237 ret = arizona_poll_reg(arizona, 5, ARIZONA_INTERRUPT_RAW_STATUS_5,
238 ARIZONA_BOOT_DONE_STS, ARIZONA_BOOT_DONE_STS);
241 regmap_write(arizona->regmap, ARIZONA_INTERRUPT_STATUS_5,
242 ARIZONA_BOOT_DONE_STS);
244 pm_runtime_mark_last_busy(arizona->dev);
249 static int arizona_apply_hardware_patch(struct arizona* arizona)
251 unsigned int fll, sysclk;
254 regcache_cache_bypass(arizona->regmap, true);
256 /* Cache existing FLL and SYSCLK settings */
257 ret = regmap_read(arizona->regmap, ARIZONA_FLL1_CONTROL_1, &fll);
259 dev_err(arizona->dev, "Failed to cache FLL settings: %d\n",
263 ret = regmap_read(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, &sysclk);
265 dev_err(arizona->dev, "Failed to cache SYSCLK settings: %d\n",
270 /* Start up SYSCLK using the FLL in free running mode */
271 ret = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1,
272 ARIZONA_FLL1_ENA | ARIZONA_FLL1_FREERUN);
274 dev_err(arizona->dev,
275 "Failed to start FLL in freerunning mode: %d\n",
279 ret = arizona_poll_reg(arizona, 25, ARIZONA_INTERRUPT_RAW_STATUS_5,
280 ARIZONA_FLL1_CLOCK_OK_STS,
281 ARIZONA_FLL1_CLOCK_OK_STS);
287 ret = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, 0x0144);
289 dev_err(arizona->dev, "Failed to start SYSCLK: %d\n", ret);
293 /* Start the write sequencer and wait for it to finish */
294 ret = regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
295 ARIZONA_WSEQ_ENA | ARIZONA_WSEQ_START | 160);
297 dev_err(arizona->dev, "Failed to start write sequencer: %d\n",
301 ret = arizona_poll_reg(arizona, 5, ARIZONA_WRITE_SEQUENCER_CTRL_1,
302 ARIZONA_WSEQ_BUSY, 0);
304 regmap_write(arizona->regmap, ARIZONA_WRITE_SEQUENCER_CTRL_0,
310 err = regmap_write(arizona->regmap, ARIZONA_SYSTEM_CLOCK_1, sysclk);
312 dev_err(arizona->dev,
313 "Failed to re-apply old SYSCLK settings: %d\n",
318 err = regmap_write(arizona->regmap, ARIZONA_FLL1_CONTROL_1, fll);
320 dev_err(arizona->dev,
321 "Failed to re-apply old FLL settings: %d\n",
325 regcache_cache_bypass(arizona->regmap, false);
333 #ifdef CONFIG_PM_RUNTIME
334 static int arizona_runtime_resume(struct device *dev)
336 struct arizona *arizona = dev_get_drvdata(dev);
339 dev_dbg(arizona->dev, "Leaving AoD mode\n");
341 ret = regulator_enable(arizona->dcvdd);
343 dev_err(arizona->dev, "Failed to enable DCVDD: %d\n", ret);
347 regcache_cache_only(arizona->regmap, false);
349 switch (arizona->type) {
351 if (arizona->external_dcvdd) {
352 ret = regmap_update_bits(arizona->regmap,
353 ARIZONA_ISOLATION_CONTROL,
354 ARIZONA_ISOLATE_DCVDD1, 0);
356 dev_err(arizona->dev,
357 "Failed to connect DCVDD: %d\n", ret);
362 ret = wm5102_patch(arizona);
364 dev_err(arizona->dev, "Failed to apply patch: %d\n",
369 ret = arizona_apply_hardware_patch(arizona);
371 dev_err(arizona->dev,
372 "Failed to apply hardware patch: %d\n",
378 ret = arizona_wait_for_boot(arizona);
383 if (arizona->external_dcvdd) {
384 ret = regmap_update_bits(arizona->regmap,
385 ARIZONA_ISOLATION_CONTROL,
386 ARIZONA_ISOLATE_DCVDD1, 0);
388 dev_err(arizona->dev,
389 "Failed to connect DCVDD: %d\n", ret);
396 switch (arizona->type) {
398 ret = wm5102_patch(arizona);
400 dev_err(arizona->dev, "Failed to apply patch: %d\n",
408 ret = regcache_sync(arizona->regmap);
410 dev_err(arizona->dev, "Failed to restore register cache\n");
417 regcache_cache_only(arizona->regmap, true);
418 regulator_disable(arizona->dcvdd);
422 static int arizona_runtime_suspend(struct device *dev)
424 struct arizona *arizona = dev_get_drvdata(dev);
427 dev_dbg(arizona->dev, "Entering AoD mode\n");
429 if (arizona->external_dcvdd) {
430 ret = regmap_update_bits(arizona->regmap,
431 ARIZONA_ISOLATION_CONTROL,
432 ARIZONA_ISOLATE_DCVDD1,
433 ARIZONA_ISOLATE_DCVDD1);
435 dev_err(arizona->dev, "Failed to isolate DCVDD: %d\n",
441 regcache_cache_only(arizona->regmap, true);
442 regcache_mark_dirty(arizona->regmap);
443 regulator_disable(arizona->dcvdd);
449 #ifdef CONFIG_PM_SLEEP
450 static int arizona_suspend(struct device *dev)
452 struct arizona *arizona = dev_get_drvdata(dev);
454 dev_dbg(arizona->dev, "Suspend, disabling IRQ\n");
455 disable_irq(arizona->irq);
460 static int arizona_suspend_late(struct device *dev)
462 struct arizona *arizona = dev_get_drvdata(dev);
464 dev_dbg(arizona->dev, "Late suspend, reenabling IRQ\n");
465 enable_irq(arizona->irq);
470 static int arizona_resume_noirq(struct device *dev)
472 struct arizona *arizona = dev_get_drvdata(dev);
474 dev_dbg(arizona->dev, "Early resume, disabling IRQ\n");
475 disable_irq(arizona->irq);
480 static int arizona_resume(struct device *dev)
482 struct arizona *arizona = dev_get_drvdata(dev);
484 dev_dbg(arizona->dev, "Late resume, reenabling IRQ\n");
485 enable_irq(arizona->irq);
491 const struct dev_pm_ops arizona_pm_ops = {
492 SET_RUNTIME_PM_OPS(arizona_runtime_suspend,
493 arizona_runtime_resume,
495 SET_SYSTEM_SLEEP_PM_OPS(arizona_suspend, arizona_resume)
496 #ifdef CONFIG_PM_SLEEP
497 .suspend_late = arizona_suspend_late,
498 .resume_noirq = arizona_resume_noirq,
501 EXPORT_SYMBOL_GPL(arizona_pm_ops);
504 int arizona_of_get_type(struct device *dev)
506 const struct of_device_id *id = of_match_device(arizona_of_match, dev);
509 return (int)id->data;
513 EXPORT_SYMBOL_GPL(arizona_of_get_type);
515 static int arizona_of_get_core_pdata(struct arizona *arizona)
519 arizona->pdata.reset = of_get_named_gpio(arizona->dev->of_node,
521 if (arizona->pdata.reset < 0)
522 arizona->pdata.reset = 0;
524 arizona->pdata.ldoena = of_get_named_gpio(arizona->dev->of_node,
526 if (arizona->pdata.ldoena < 0)
527 arizona->pdata.ldoena = 0;
529 ret = of_property_read_u32_array(arizona->dev->of_node,
531 arizona->pdata.gpio_defaults,
532 ARRAY_SIZE(arizona->pdata.gpio_defaults));
535 * All values are literal except out of range values
536 * which are chip default, translate into platform
537 * data which uses 0 as chip default and out of range
540 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
541 if (arizona->pdata.gpio_defaults[i] > 0xffff)
542 arizona->pdata.gpio_defaults[i] = 0;
543 if (arizona->pdata.gpio_defaults[i] == 0)
544 arizona->pdata.gpio_defaults[i] = 0x10000;
547 dev_err(arizona->dev, "Failed to parse GPIO defaults: %d\n",
554 const struct of_device_id arizona_of_match[] = {
555 { .compatible = "wlf,wm5102", .data = (void *)WM5102 },
556 { .compatible = "wlf,wm5110", .data = (void *)WM5110 },
557 { .compatible = "wlf,wm8997", .data = (void *)WM8997 },
560 EXPORT_SYMBOL_GPL(arizona_of_match);
562 static inline int arizona_of_get_core_pdata(struct arizona *arizona)
568 static struct mfd_cell early_devs[] = {
569 { .name = "arizona-ldo1" },
572 static struct mfd_cell wm5102_devs[] = {
573 { .name = "arizona-micsupp" },
574 { .name = "arizona-extcon" },
575 { .name = "arizona-gpio" },
576 { .name = "arizona-haptics" },
577 { .name = "arizona-pwm" },
578 { .name = "wm5102-codec" },
581 static struct mfd_cell wm5110_devs[] = {
582 { .name = "arizona-micsupp" },
583 { .name = "arizona-extcon" },
584 { .name = "arizona-gpio" },
585 { .name = "arizona-haptics" },
586 { .name = "arizona-pwm" },
587 { .name = "wm5110-codec" },
590 static struct mfd_cell wm8997_devs[] = {
591 { .name = "arizona-micsupp" },
592 { .name = "arizona-extcon" },
593 { .name = "arizona-gpio" },
594 { .name = "arizona-haptics" },
595 { .name = "arizona-pwm" },
596 { .name = "wm8997-codec" },
599 int arizona_dev_init(struct arizona *arizona)
601 struct device *dev = arizona->dev;
602 const char *type_name;
603 unsigned int reg, val;
604 int (*apply_patch)(struct arizona *) = NULL;
607 dev_set_drvdata(arizona->dev, arizona);
608 mutex_init(&arizona->clk_lock);
610 arizona_of_get_core_pdata(arizona);
612 if (dev_get_platdata(arizona->dev))
613 memcpy(&arizona->pdata, dev_get_platdata(arizona->dev),
614 sizeof(arizona->pdata));
616 regcache_cache_only(arizona->regmap, true);
618 switch (arizona->type) {
622 for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++)
623 arizona->core_supplies[i].supply
624 = wm5102_core_supplies[i];
625 arizona->num_core_supplies = ARRAY_SIZE(wm5102_core_supplies);
628 dev_err(arizona->dev, "Unknown device type %d\n",
633 ret = mfd_add_devices(arizona->dev, -1, early_devs,
634 ARRAY_SIZE(early_devs), NULL, 0, NULL);
636 dev_err(dev, "Failed to add early children: %d\n", ret);
640 ret = devm_regulator_bulk_get(dev, arizona->num_core_supplies,
641 arizona->core_supplies);
643 dev_err(dev, "Failed to request core supplies: %d\n",
648 arizona->dcvdd = devm_regulator_get(arizona->dev, "DCVDD");
649 if (IS_ERR(arizona->dcvdd)) {
650 ret = PTR_ERR(arizona->dcvdd);
651 dev_err(dev, "Failed to request DCVDD: %d\n", ret);
655 if (arizona->pdata.reset) {
656 /* Start out with /RESET low to put the chip into reset */
657 ret = gpio_request_one(arizona->pdata.reset,
658 GPIOF_DIR_OUT | GPIOF_INIT_LOW,
661 dev_err(dev, "Failed to request /RESET: %d\n", ret);
666 ret = regulator_bulk_enable(arizona->num_core_supplies,
667 arizona->core_supplies);
669 dev_err(dev, "Failed to enable core supplies: %d\n",
674 ret = regulator_enable(arizona->dcvdd);
676 dev_err(dev, "Failed to enable DCVDD: %d\n", ret);
680 if (arizona->pdata.reset) {
681 gpio_set_value_cansleep(arizona->pdata.reset, 1);
685 regcache_cache_only(arizona->regmap, false);
687 /* Verify that this is a chip we know about */
688 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
690 dev_err(dev, "Failed to read ID register: %d\n", ret);
700 dev_err(arizona->dev, "Unknown device ID: %x\n", reg);
704 /* If we have a /RESET GPIO we'll already be reset */
705 if (!arizona->pdata.reset) {
706 regcache_mark_dirty(arizona->regmap);
708 ret = regmap_write(arizona->regmap, ARIZONA_SOFTWARE_RESET, 0);
710 dev_err(dev, "Failed to reset device: %d\n", ret);
716 ret = regcache_sync(arizona->regmap);
718 dev_err(dev, "Failed to sync device: %d\n", ret);
723 /* Ensure device startup is complete */
724 switch (arizona->type) {
726 ret = regmap_read(arizona->regmap, 0x19, &val);
729 "Failed to check write sequencer state: %d\n",
735 ret = arizona_wait_for_boot(arizona);
737 dev_err(arizona->dev,
738 "Device failed initial boot: %d\n", ret);
744 /* Read the device ID information & do device specific stuff */
745 ret = regmap_read(arizona->regmap, ARIZONA_SOFTWARE_RESET, ®);
747 dev_err(dev, "Failed to read ID register: %d\n", ret);
751 ret = regmap_read(arizona->regmap, ARIZONA_DEVICE_REVISION,
754 dev_err(dev, "Failed to read revision register: %d\n", ret);
757 arizona->rev &= ARIZONA_DEVICE_REVISION_MASK;
760 #ifdef CONFIG_MFD_WM5102
762 type_name = "WM5102";
763 if (arizona->type != WM5102) {
764 dev_err(arizona->dev, "WM5102 registered as %d\n",
766 arizona->type = WM5102;
768 apply_patch = wm5102_patch;
772 #ifdef CONFIG_MFD_WM5110
774 type_name = "WM5110";
775 if (arizona->type != WM5110) {
776 dev_err(arizona->dev, "WM5110 registered as %d\n",
778 arizona->type = WM5110;
780 apply_patch = wm5110_patch;
783 #ifdef CONFIG_MFD_WM8997
785 type_name = "WM8997";
786 if (arizona->type != WM8997) {
787 dev_err(arizona->dev, "WM8997 registered as %d\n",
789 arizona->type = WM8997;
791 apply_patch = wm8997_patch;
795 dev_err(arizona->dev, "Unknown device ID %x\n", reg);
799 dev_info(dev, "%s revision %c\n", type_name, arizona->rev + 'A');
802 ret = apply_patch(arizona);
804 dev_err(arizona->dev, "Failed to apply patch: %d\n",
809 switch (arizona->type) {
811 ret = arizona_apply_hardware_patch(arizona);
813 dev_err(arizona->dev,
814 "Failed to apply hardware patch: %d\n",
824 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
825 if (!arizona->pdata.gpio_defaults[i])
828 regmap_write(arizona->regmap, ARIZONA_GPIO1_CTRL + i,
829 arizona->pdata.gpio_defaults[i]);
833 * LDO1 can only be used to supply DCVDD so if it has no
834 * consumers then DCVDD is supplied externally.
836 if (arizona->pdata.ldo1 &&
837 arizona->pdata.ldo1->num_consumer_supplies == 0)
838 arizona->external_dcvdd = true;
840 pm_runtime_set_autosuspend_delay(arizona->dev, 100);
841 pm_runtime_use_autosuspend(arizona->dev);
842 pm_runtime_enable(arizona->dev);
845 if (!arizona->pdata.clk32k_src)
846 arizona->pdata.clk32k_src = ARIZONA_32KZ_MCLK2;
848 switch (arizona->pdata.clk32k_src) {
849 case ARIZONA_32KZ_MCLK1:
850 case ARIZONA_32KZ_MCLK2:
851 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
852 ARIZONA_CLK_32K_SRC_MASK,
853 arizona->pdata.clk32k_src - 1);
854 arizona_clk32k_enable(arizona);
856 case ARIZONA_32KZ_NONE:
857 regmap_update_bits(arizona->regmap, ARIZONA_CLOCK_32K_1,
858 ARIZONA_CLK_32K_SRC_MASK, 2);
861 dev_err(arizona->dev, "Invalid 32kHz clock source: %d\n",
862 arizona->pdata.clk32k_src);
867 for (i = 0; i < ARIZONA_MAX_MICBIAS; i++) {
868 if (!arizona->pdata.micbias[i].mV &&
869 !arizona->pdata.micbias[i].bypass)
872 /* Apply default for bypass mode */
873 if (!arizona->pdata.micbias[i].mV)
874 arizona->pdata.micbias[i].mV = 2800;
876 val = (arizona->pdata.micbias[i].mV - 1500) / 100;
878 val <<= ARIZONA_MICB1_LVL_SHIFT;
880 if (arizona->pdata.micbias[i].ext_cap)
881 val |= ARIZONA_MICB1_EXT_CAP;
883 if (arizona->pdata.micbias[i].discharge)
884 val |= ARIZONA_MICB1_DISCH;
886 if (arizona->pdata.micbias[i].soft_start)
887 val |= ARIZONA_MICB1_RATE;
889 if (arizona->pdata.micbias[i].bypass)
890 val |= ARIZONA_MICB1_BYPASS;
892 regmap_update_bits(arizona->regmap,
893 ARIZONA_MIC_BIAS_CTRL_1 + i,
894 ARIZONA_MICB1_LVL_MASK |
895 ARIZONA_MICB1_DISCH |
896 ARIZONA_MICB1_BYPASS |
897 ARIZONA_MICB1_RATE, val);
900 for (i = 0; i < ARIZONA_MAX_INPUT; i++) {
901 /* Default for both is 0 so noop with defaults */
902 val = arizona->pdata.dmic_ref[i]
903 << ARIZONA_IN1_DMIC_SUP_SHIFT;
904 val |= arizona->pdata.inmode[i] << ARIZONA_IN1_MODE_SHIFT;
906 regmap_update_bits(arizona->regmap,
907 ARIZONA_IN1L_CONTROL + (i * 8),
908 ARIZONA_IN1_DMIC_SUP_MASK |
909 ARIZONA_IN1_MODE_MASK, val);
912 for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) {
913 /* Default is 0 so noop with defaults */
914 if (arizona->pdata.out_mono[i])
915 val = ARIZONA_OUT1_MONO;
919 regmap_update_bits(arizona->regmap,
920 ARIZONA_OUTPUT_PATH_CONFIG_1L + (i * 8),
921 ARIZONA_OUT1_MONO, val);
924 for (i = 0; i < ARIZONA_MAX_PDM_SPK; i++) {
925 if (arizona->pdata.spk_mute[i])
926 regmap_update_bits(arizona->regmap,
927 ARIZONA_PDM_SPK1_CTRL_1 + (i * 2),
928 ARIZONA_SPK1_MUTE_ENDIAN_MASK |
929 ARIZONA_SPK1_MUTE_SEQ1_MASK,
930 arizona->pdata.spk_mute[i]);
932 if (arizona->pdata.spk_fmt[i])
933 regmap_update_bits(arizona->regmap,
934 ARIZONA_PDM_SPK1_CTRL_2 + (i * 2),
935 ARIZONA_SPK1_FMT_MASK,
936 arizona->pdata.spk_fmt[i]);
939 /* Set up for interrupts */
940 ret = arizona_irq_init(arizona);
944 arizona_request_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, "CLKGEN error",
945 arizona_clkgen_err, arizona);
946 arizona_request_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, "Overclocked",
947 arizona_overclocked, arizona);
948 arizona_request_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, "Underclocked",
949 arizona_underclocked, arizona);
951 switch (arizona->type) {
953 ret = mfd_add_devices(arizona->dev, -1, wm5102_devs,
954 ARRAY_SIZE(wm5102_devs), NULL, 0, NULL);
957 ret = mfd_add_devices(arizona->dev, -1, wm5110_devs,
958 ARRAY_SIZE(wm5110_devs), NULL, 0, NULL);
961 ret = mfd_add_devices(arizona->dev, -1, wm8997_devs,
962 ARRAY_SIZE(wm8997_devs), NULL, 0, NULL);
967 dev_err(arizona->dev, "Failed to add subdevices: %d\n", ret);
971 #ifdef CONFIG_PM_RUNTIME
972 regulator_disable(arizona->dcvdd);
978 arizona_irq_exit(arizona);
980 if (arizona->pdata.reset) {
981 gpio_set_value_cansleep(arizona->pdata.reset, 0);
982 gpio_free(arizona->pdata.reset);
984 regulator_disable(arizona->dcvdd);
986 regulator_bulk_disable(arizona->num_core_supplies,
987 arizona->core_supplies);
989 mfd_remove_devices(dev);
992 EXPORT_SYMBOL_GPL(arizona_dev_init);
994 int arizona_dev_exit(struct arizona *arizona)
996 mfd_remove_devices(arizona->dev);
997 arizona_free_irq(arizona, ARIZONA_IRQ_UNDERCLOCKED, arizona);
998 arizona_free_irq(arizona, ARIZONA_IRQ_OVERCLOCKED, arizona);
999 arizona_free_irq(arizona, ARIZONA_IRQ_CLKGEN_ERR, arizona);
1000 pm_runtime_disable(arizona->dev);
1001 arizona_irq_exit(arizona);
1002 if (arizona->pdata.reset)
1003 gpio_set_value_cansleep(arizona->pdata.reset, 0);
1004 regulator_disable(arizona->dcvdd);
1005 regulator_bulk_disable(ARRAY_SIZE(arizona->core_supplies),
1006 arizona->core_supplies);
1009 EXPORT_SYMBOL_GPL(arizona_dev_exit);