2 * Copyright (C) ST-Ericsson SA 2010
4 * License Terms: GNU General Public License v2
5 * Author: Arun R Murthy <arun.murthy@stericsson.com>
6 * Author: Daniel Willerud <daniel.willerud@stericsson.com>
7 * Author: Johan Palsson <johan.palsson@stericsson.com>
9 #include <linux/init.h>
10 #include <linux/module.h>
11 #include <linux/device.h>
12 #include <linux/interrupt.h>
13 #include <linux/spinlock.h>
14 #include <linux/delay.h>
15 #include <linux/pm_runtime.h>
16 #include <linux/platform_device.h>
17 #include <linux/completion.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/err.h>
20 #include <linux/slab.h>
21 #include <linux/list.h>
22 #include <linux/mfd/abx500.h>
23 #include <linux/mfd/abx500/ab8500.h>
24 #include <linux/mfd/abx500/ab8500-gpadc.h>
27 * GPADC register offsets
30 #define AB8500_GPADC_CTRL1_REG 0x00
31 #define AB8500_GPADC_CTRL2_REG 0x01
32 #define AB8500_GPADC_CTRL3_REG 0x02
33 #define AB8500_GPADC_AUTO_TIMER_REG 0x03
34 #define AB8500_GPADC_STAT_REG 0x04
35 #define AB8500_GPADC_MANDATAL_REG 0x05
36 #define AB8500_GPADC_MANDATAH_REG 0x06
37 #define AB8500_GPADC_AUTODATAL_REG 0x07
38 #define AB8500_GPADC_AUTODATAH_REG 0x08
39 #define AB8500_GPADC_MUX_CTRL_REG 0x09
42 * OTP register offsets
45 #define AB8500_GPADC_CAL_1 0x0F
46 #define AB8500_GPADC_CAL_2 0x10
47 #define AB8500_GPADC_CAL_3 0x11
48 #define AB8500_GPADC_CAL_4 0x12
49 #define AB8500_GPADC_CAL_5 0x13
50 #define AB8500_GPADC_CAL_6 0x14
51 #define AB8500_GPADC_CAL_7 0x15
54 #define EN_VINTCORE12 0x04
55 #define EN_VTVOUT 0x02
57 #define DIS_GPADC 0x00
58 #define SW_AVG_16 0x60
59 #define ADC_SW_CONV 0x04
61 #define BTEMP_PULL_UP 0x08
64 #define GPADC_BUSY 0x01
66 /* GPADC constants from AB8500 spec, UM0836 */
67 #define ADC_RESOLUTION 1024
68 #define ADC_CH_BTEMP_MIN 0
69 #define ADC_CH_BTEMP_MAX 1350
70 #define ADC_CH_DIETEMP_MIN 0
71 #define ADC_CH_DIETEMP_MAX 1350
72 #define ADC_CH_CHG_V_MIN 0
73 #define ADC_CH_CHG_V_MAX 20030
74 #define ADC_CH_ACCDET2_MIN 0
75 #define ADC_CH_ACCDET2_MAX 2500
76 #define ADC_CH_VBAT_MIN 2300
77 #define ADC_CH_VBAT_MAX 4800
78 #define ADC_CH_CHG_I_MIN 0
79 #define ADC_CH_CHG_I_MAX 1500
80 #define ADC_CH_BKBAT_MIN 0
81 #define ADC_CH_BKBAT_MAX 3200
83 /* This is used to not lose precision when dividing to get gain and offset */
84 #define CALIB_SCALE 1000
86 /* Time in ms before disabling regulator */
87 #define GPADC_AUDOSUSPEND_DELAY 1
89 #define CONVERSION_TIME 500 /* ms */
99 * struct adc_cal_data - Table for storing gain and offset for the calibrated
101 * @gain: Gain of the ADC channel
102 * @offset: Offset of the ADC channel
104 struct adc_cal_data {
110 * struct ab8500_gpadc - AB8500 GPADC device information
111 * @dev: pointer to the struct device
112 * @node: a list of AB8500 GPADCs, hence prepared for
114 * @parent: pointer to the struct ab8500
115 * @ab8500_gpadc_complete: pointer to the struct completion, to indicate
116 * the completion of gpadc conversion
117 * @ab8500_gpadc_lock: structure of type mutex
118 * @regu: pointer to the struct regulator
119 * @irq: interrupt number that is used by gpadc
120 * @cal_data array of ADC calibration data structs
122 struct ab8500_gpadc {
124 struct list_head node;
125 struct ab8500 *parent;
126 struct completion ab8500_gpadc_complete;
127 struct mutex ab8500_gpadc_lock;
128 struct regulator *regu;
130 struct adc_cal_data cal_data[NBR_CAL_INPUTS];
133 static LIST_HEAD(ab8500_gpadc_list);
136 * ab8500_gpadc_get() - returns a reference to the primary AB8500 GPADC
137 * (i.e. the first GPADC in the instance list)
139 struct ab8500_gpadc *ab8500_gpadc_get(char *name)
141 struct ab8500_gpadc *gpadc;
143 list_for_each_entry(gpadc, &ab8500_gpadc_list, node) {
144 if (!strcmp(name, dev_name(gpadc->dev)))
148 return ERR_PTR(-ENOENT);
150 EXPORT_SYMBOL(ab8500_gpadc_get);
153 * ab8500_gpadc_ad_to_voltage() - Convert a raw ADC value to a voltage
155 int ab8500_gpadc_ad_to_voltage(struct ab8500_gpadc *gpadc, u8 channel,
162 /* For some reason we don't have calibrated data */
163 if (!gpadc->cal_data[ADC_INPUT_VMAIN].gain) {
164 res = ADC_CH_CHG_V_MIN + (ADC_CH_CHG_V_MAX -
165 ADC_CH_CHG_V_MIN) * ad_value /
169 /* Here we can use the calibrated data */
170 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VMAIN].gain +
171 gpadc->cal_data[ADC_INPUT_VMAIN].offset) / CALIB_SCALE;
179 /* For some reason we don't have calibrated data */
180 if (!gpadc->cal_data[ADC_INPUT_BTEMP].gain) {
181 res = ADC_CH_BTEMP_MIN + (ADC_CH_BTEMP_MAX -
182 ADC_CH_BTEMP_MIN) * ad_value /
186 /* Here we can use the calibrated data */
187 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_BTEMP].gain +
188 gpadc->cal_data[ADC_INPUT_BTEMP].offset) / CALIB_SCALE;
192 /* For some reason we don't have calibrated data */
193 if (!gpadc->cal_data[ADC_INPUT_VBAT].gain) {
194 res = ADC_CH_VBAT_MIN + (ADC_CH_VBAT_MAX -
195 ADC_CH_VBAT_MIN) * ad_value /
199 /* Here we can use the calibrated data */
200 res = (int) (ad_value * gpadc->cal_data[ADC_INPUT_VBAT].gain +
201 gpadc->cal_data[ADC_INPUT_VBAT].offset) / CALIB_SCALE;
205 res = ADC_CH_DIETEMP_MIN +
206 (ADC_CH_DIETEMP_MAX - ADC_CH_DIETEMP_MIN) * ad_value /
211 res = ADC_CH_ACCDET2_MIN +
212 (ADC_CH_ACCDET2_MAX - ADC_CH_ACCDET2_MIN) * ad_value /
217 res = ADC_CH_CHG_V_MIN +
218 (ADC_CH_CHG_V_MAX - ADC_CH_CHG_V_MIN) * ad_value /
224 res = ADC_CH_CHG_I_MIN +
225 (ADC_CH_CHG_I_MAX - ADC_CH_CHG_I_MIN) * ad_value /
230 res = ADC_CH_BKBAT_MIN +
231 (ADC_CH_BKBAT_MAX - ADC_CH_BKBAT_MIN) * ad_value /
237 "unknown channel, not possible to convert\n");
244 EXPORT_SYMBOL(ab8500_gpadc_ad_to_voltage);
247 * ab8500_gpadc_convert() - gpadc conversion
248 * @channel: analog channel to be converted to digital data
250 * This function converts the selected analog i/p to digital
253 int ab8500_gpadc_convert(struct ab8500_gpadc *gpadc, u8 channel)
258 ad_value = ab8500_gpadc_read_raw(gpadc, channel);
260 dev_err(gpadc->dev, "GPADC raw value failed ch: %d\n", channel);
264 voltage = ab8500_gpadc_ad_to_voltage(gpadc, channel, ad_value);
267 dev_err(gpadc->dev, "GPADC to voltage conversion failed ch:"
268 " %d AD: 0x%x\n", channel, ad_value);
272 EXPORT_SYMBOL(ab8500_gpadc_convert);
275 * ab8500_gpadc_read_raw() - gpadc read
276 * @channel: analog channel to be read
278 * This function obtains the raw ADC value, this then needs
279 * to be converted by calling ab8500_gpadc_ad_to_voltage()
281 int ab8500_gpadc_read_raw(struct ab8500_gpadc *gpadc, u8 channel)
285 u8 val, low_data, high_data;
290 mutex_lock(&gpadc->ab8500_gpadc_lock);
292 /* Enable VTVout LDO this is required for GPADC */
293 pm_runtime_get_sync(gpadc->dev);
295 /* Check if ADC is not busy, lock and proceed */
297 ret = abx500_get_register_interruptible(gpadc->dev,
298 AB8500_GPADC, AB8500_GPADC_STAT_REG, &val);
301 if (!(val & GPADC_BUSY))
304 } while (++looplimit < 10);
305 if (looplimit >= 10 && (val & GPADC_BUSY)) {
306 dev_err(gpadc->dev, "gpadc_conversion: GPADC busy");
312 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
313 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_GPADC, EN_GPADC);
315 dev_err(gpadc->dev, "gpadc_conversion: enable gpadc failed\n");
319 /* Select the channel source and set average samples to 16 */
320 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
321 AB8500_GPADC_CTRL2_REG, (channel | SW_AVG_16));
324 "gpadc_conversion: set avg samples failed\n");
329 * Enable ADC, buffering, select rising edge and enable ADC path
330 * charging current sense if it needed, ABB 3.0 needs some special
336 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
337 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
342 if (!is_ab8500_2p0_or_earlier(gpadc->parent)) {
343 /* Turn on btemp pull-up on ABB 3.0 */
344 ret = abx500_mask_and_set_register_interruptible(
346 AB8500_GPADC, AB8500_GPADC_CTRL1_REG,
347 EN_BUF | BTEMP_PULL_UP,
348 EN_BUF | BTEMP_PULL_UP);
351 * Delay might be needed for ABB8500 cut 3.0, if not, remove
352 * when hardware will be available
354 usleep_range(1000, 1000);
357 /* Intentional fallthrough */
359 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
360 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, EN_BUF, EN_BUF);
365 "gpadc_conversion: select falling edge failed\n");
369 ret = abx500_mask_and_set_register_interruptible(gpadc->dev,
370 AB8500_GPADC, AB8500_GPADC_CTRL1_REG, ADC_SW_CONV, ADC_SW_CONV);
373 "gpadc_conversion: start s/w conversion failed\n");
376 /* wait for completion of conversion */
377 if (!wait_for_completion_timeout(&gpadc->ab8500_gpadc_complete,
378 msecs_to_jiffies(CONVERSION_TIME))) {
380 "timeout: didn't receive GPADC conversion interrupt\n");
385 /* Read the converted RAW data */
386 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
387 AB8500_GPADC_MANDATAL_REG, &low_data);
389 dev_err(gpadc->dev, "gpadc_conversion: read low data failed\n");
393 ret = abx500_get_register_interruptible(gpadc->dev, AB8500_GPADC,
394 AB8500_GPADC_MANDATAH_REG, &high_data);
397 "gpadc_conversion: read high data failed\n");
402 ret = abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
403 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
405 dev_err(gpadc->dev, "gpadc_conversion: disable gpadc failed\n");
409 pm_runtime_mark_last_busy(gpadc->dev);
410 pm_runtime_put_autosuspend(gpadc->dev);
412 mutex_unlock(&gpadc->ab8500_gpadc_lock);
414 return (high_data << 8) | low_data;
418 * It has shown to be needed to turn off the GPADC if an error occurs,
419 * otherwise we might have problem when waiting for the busy bit in the
420 * GPADC status register to go low. In V1.1 there wait_for_completion
421 * seems to timeout when waiting for an interrupt.. Not seen in V2.0
423 (void) abx500_set_register_interruptible(gpadc->dev, AB8500_GPADC,
424 AB8500_GPADC_CTRL1_REG, DIS_GPADC);
426 pm_runtime_put(gpadc->dev);
428 mutex_unlock(&gpadc->ab8500_gpadc_lock);
430 "gpadc_conversion: Failed to AD convert channel %d\n", channel);
433 EXPORT_SYMBOL(ab8500_gpadc_read_raw);
436 * ab8500_bm_gpswadcconvend_handler() - isr for s/w gpadc conversion completion
438 * @data: pointer to the data passed during request irq
440 * This is a interrupt service routine for s/w gpadc conversion completion.
441 * Notifies the gpadc completion is completed and the converted raw value
442 * can be read from the registers.
443 * Returns IRQ status(IRQ_HANDLED)
445 static irqreturn_t ab8500_bm_gpswadcconvend_handler(int irq, void *_gpadc)
447 struct ab8500_gpadc *gpadc = _gpadc;
449 complete(&gpadc->ab8500_gpadc_complete);
454 static int otp_cal_regs[] = {
464 static void ab8500_gpadc_read_calibration_data(struct ab8500_gpadc *gpadc)
467 int ret[ARRAY_SIZE(otp_cal_regs)];
468 u8 gpadc_cal[ARRAY_SIZE(otp_cal_regs)];
470 int vmain_high, vmain_low;
471 int btemp_high, btemp_low;
472 int vbat_high, vbat_low;
474 /* First we read all OTP registers and store the error code */
475 for (i = 0; i < ARRAY_SIZE(otp_cal_regs); i++) {
476 ret[i] = abx500_get_register_interruptible(gpadc->dev,
477 AB8500_OTP_EMUL, otp_cal_regs[i], &gpadc_cal[i]);
479 dev_err(gpadc->dev, "%s: read otp reg 0x%02x failed\n",
480 __func__, otp_cal_regs[i]);
484 * The ADC calibration data is stored in OTP registers.
485 * The layout of the calibration data is outlined below and a more
486 * detailed description can be found in UM0836
488 * vm_h/l = vmain_high/low
489 * bt_h/l = btemp_high/low
490 * vb_h/l = vbat_high/low
493 * | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0
494 * |.......|.......|.......|.......|.......|.......|.......|.......
496 * |.......|.......|.......|.......|.......|.......|.......|.......
497 * | | vm_h7 | vm_h6 | vm_h5 | vm_h4 | vm_h3 | vm_h2
498 * |.......|.......|.......|.......|.......|.......|.......|.......
499 * | vm_h1 | vm_h0 | vm_l4 | vm_l3 | vm_l2 | vm_l1 | vm_l0 | bt_h9
500 * |.......|.......|.......|.......|.......|.......|.......|.......
501 * | bt_h8 | bt_h7 | bt_h6 | bt_h5 | bt_h4 | bt_h3 | bt_h2 | bt_h1
502 * |.......|.......|.......|.......|.......|.......|.......|.......
503 * | bt_h0 | bt_l4 | bt_l3 | bt_l2 | bt_l1 | bt_l0 | vb_h9 | vb_h8
504 * |.......|.......|.......|.......|.......|.......|.......|.......
505 * | vb_h7 | vb_h6 | vb_h5 | vb_h4 | vb_h3 | vb_h2 | vb_h1 | vb_h0
506 * |.......|.......|.......|.......|.......|.......|.......|.......
507 * | vb_l5 | vb_l4 | vb_l3 | vb_l2 | vb_l1 | vb_l0 |
508 * |.......|.......|.......|.......|.......|.......|.......|.......
511 * Ideal output ADC codes corresponding to injected input voltages
512 * during manufacturing is:
514 * vmain_high: Vin = 19500mV / ADC ideal code = 997
515 * vmain_low: Vin = 315mV / ADC ideal code = 16
516 * btemp_high: Vin = 1300mV / ADC ideal code = 985
517 * btemp_low: Vin = 21mV / ADC ideal code = 16
518 * vbat_high: Vin = 4700mV / ADC ideal code = 982
519 * vbat_low: Vin = 2380mV / ADC ideal code = 33
522 /* Calculate gain and offset for VMAIN if all reads succeeded */
523 if (!(ret[0] < 0 || ret[1] < 0 || ret[2] < 0)) {
524 vmain_high = (((gpadc_cal[0] & 0x03) << 8) |
525 ((gpadc_cal[1] & 0x3F) << 2) |
526 ((gpadc_cal[2] & 0xC0) >> 6));
528 vmain_low = ((gpadc_cal[2] & 0x3E) >> 1);
530 gpadc->cal_data[ADC_INPUT_VMAIN].gain = CALIB_SCALE *
531 (19500 - 315) / (vmain_high - vmain_low);
533 gpadc->cal_data[ADC_INPUT_VMAIN].offset = CALIB_SCALE * 19500 -
534 (CALIB_SCALE * (19500 - 315) /
535 (vmain_high - vmain_low)) * vmain_high;
537 gpadc->cal_data[ADC_INPUT_VMAIN].gain = 0;
540 /* Calculate gain and offset for BTEMP if all reads succeeded */
541 if (!(ret[2] < 0 || ret[3] < 0 || ret[4] < 0)) {
542 btemp_high = (((gpadc_cal[2] & 0x01) << 9) |
543 (gpadc_cal[3] << 1) |
544 ((gpadc_cal[4] & 0x80) >> 7));
546 btemp_low = ((gpadc_cal[4] & 0x7C) >> 2);
548 gpadc->cal_data[ADC_INPUT_BTEMP].gain =
549 CALIB_SCALE * (1300 - 21) / (btemp_high - btemp_low);
551 gpadc->cal_data[ADC_INPUT_BTEMP].offset = CALIB_SCALE * 1300 -
552 (CALIB_SCALE * (1300 - 21) /
553 (btemp_high - btemp_low)) * btemp_high;
555 gpadc->cal_data[ADC_INPUT_BTEMP].gain = 0;
558 /* Calculate gain and offset for VBAT if all reads succeeded */
559 if (!(ret[4] < 0 || ret[5] < 0 || ret[6] < 0)) {
560 vbat_high = (((gpadc_cal[4] & 0x03) << 8) | gpadc_cal[5]);
561 vbat_low = ((gpadc_cal[6] & 0xFC) >> 2);
563 gpadc->cal_data[ADC_INPUT_VBAT].gain = CALIB_SCALE *
564 (4700 - 2380) / (vbat_high - vbat_low);
566 gpadc->cal_data[ADC_INPUT_VBAT].offset = CALIB_SCALE * 4700 -
567 (CALIB_SCALE * (4700 - 2380) /
568 (vbat_high - vbat_low)) * vbat_high;
570 gpadc->cal_data[ADC_INPUT_VBAT].gain = 0;
573 dev_dbg(gpadc->dev, "VMAIN gain %llu offset %llu\n",
574 gpadc->cal_data[ADC_INPUT_VMAIN].gain,
575 gpadc->cal_data[ADC_INPUT_VMAIN].offset);
577 dev_dbg(gpadc->dev, "BTEMP gain %llu offset %llu\n",
578 gpadc->cal_data[ADC_INPUT_BTEMP].gain,
579 gpadc->cal_data[ADC_INPUT_BTEMP].offset);
581 dev_dbg(gpadc->dev, "VBAT gain %llu offset %llu\n",
582 gpadc->cal_data[ADC_INPUT_VBAT].gain,
583 gpadc->cal_data[ADC_INPUT_VBAT].offset);
586 static int ab8500_gpadc_runtime_suspend(struct device *dev)
588 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
590 regulator_disable(gpadc->regu);
594 static int ab8500_gpadc_runtime_resume(struct device *dev)
596 struct ab8500_gpadc *gpadc = dev_get_drvdata(dev);
599 ret = regulator_enable(gpadc->regu);
601 dev_err(dev, "Failed to enable vtvout LDO: %d\n", ret);
605 static int ab8500_gpadc_runtime_idle(struct device *dev)
607 pm_runtime_suspend(dev);
611 static int ab8500_gpadc_probe(struct platform_device *pdev)
614 struct ab8500_gpadc *gpadc;
616 gpadc = kzalloc(sizeof(struct ab8500_gpadc), GFP_KERNEL);
618 dev_err(&pdev->dev, "Error: No memory\n");
622 gpadc->irq = platform_get_irq_byname(pdev, "SW_CONV_END");
623 if (gpadc->irq < 0) {
624 dev_err(&pdev->dev, "failed to get platform irq-%d\n",
630 gpadc->dev = &pdev->dev;
631 gpadc->parent = dev_get_drvdata(pdev->dev.parent);
632 mutex_init(&gpadc->ab8500_gpadc_lock);
634 /* Initialize completion used to notify completion of conversion */
635 init_completion(&gpadc->ab8500_gpadc_complete);
637 /* Register interrupt - SwAdcComplete */
638 ret = request_threaded_irq(gpadc->irq, NULL,
639 ab8500_bm_gpswadcconvend_handler,
640 IRQF_ONESHOT | IRQF_NO_SUSPEND | IRQF_SHARED,
641 "ab8500-gpadc", gpadc);
643 dev_err(gpadc->dev, "Failed to register interrupt, irq: %d\n",
648 /* VTVout LDO used to power up ab8500-GPADC */
649 gpadc->regu = devm_regulator_get(&pdev->dev, "vddadc");
650 if (IS_ERR(gpadc->regu)) {
651 ret = PTR_ERR(gpadc->regu);
652 dev_err(gpadc->dev, "failed to get vtvout LDO\n");
656 platform_set_drvdata(pdev, gpadc);
658 ret = regulator_enable(gpadc->regu);
660 dev_err(gpadc->dev, "Failed to enable vtvout LDO: %d\n", ret);
664 pm_runtime_set_autosuspend_delay(gpadc->dev, GPADC_AUDOSUSPEND_DELAY);
665 pm_runtime_use_autosuspend(gpadc->dev);
666 pm_runtime_set_active(gpadc->dev);
667 pm_runtime_enable(gpadc->dev);
669 ab8500_gpadc_read_calibration_data(gpadc);
670 list_add_tail(&gpadc->node, &ab8500_gpadc_list);
671 dev_dbg(gpadc->dev, "probe success\n");
676 free_irq(gpadc->irq, gpadc);
683 static int ab8500_gpadc_remove(struct platform_device *pdev)
685 struct ab8500_gpadc *gpadc = platform_get_drvdata(pdev);
687 /* remove this gpadc entry from the list */
688 list_del(&gpadc->node);
689 /* remove interrupt - completion of Sw ADC conversion */
690 free_irq(gpadc->irq, gpadc);
692 pm_runtime_get_sync(gpadc->dev);
693 pm_runtime_disable(gpadc->dev);
695 regulator_disable(gpadc->regu);
697 pm_runtime_set_suspended(gpadc->dev);
699 pm_runtime_put_noidle(gpadc->dev);
706 static const struct dev_pm_ops ab8500_gpadc_pm_ops = {
707 SET_RUNTIME_PM_OPS(ab8500_gpadc_runtime_suspend,
708 ab8500_gpadc_runtime_resume,
709 ab8500_gpadc_runtime_idle)
712 static struct platform_driver ab8500_gpadc_driver = {
713 .probe = ab8500_gpadc_probe,
714 .remove = ab8500_gpadc_remove,
716 .name = "ab8500-gpadc",
717 .owner = THIS_MODULE,
718 .pm = &ab8500_gpadc_pm_ops,
722 static int __init ab8500_gpadc_init(void)
724 return platform_driver_register(&ab8500_gpadc_driver);
727 static void __exit ab8500_gpadc_exit(void)
729 platform_driver_unregister(&ab8500_gpadc_driver);
732 subsys_initcall_sync(ab8500_gpadc_init);
733 module_exit(ab8500_gpadc_exit);
735 MODULE_LICENSE("GPL v2");
736 MODULE_AUTHOR("Arun R Murthy, Daniel Willerud, Johan Palsson");
737 MODULE_ALIAS("platform:ab8500_gpadc");
738 MODULE_DESCRIPTION("AB8500 GPADC driver");