drivers/memory/renesas-rpc-if.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * Renesas RPC-IF core driver
   4  *
   5  * Copyright (C) 2018-2019 Renesas Solutions Corp.
   6  * Copyright (C) 2019 Macronix International Co., Ltd.
   7  * Copyright (C) 2019-2020 Cogent Embedded, Inc.
   8  */
   9
  10 #include <linux/clk.h>
  11 #include <linux/io.h>
  12 #include <linux/module.h>
  13 #include <linux/platform_device.h>
  14 #include <linux/of.h>
  15 #include <linux/regmap.h>
  16 #include <linux/reset.h>
  17
  18 #include <memory/renesas-rpc-if.h>
  19
  20 #define RPCIF_CMNCR             0x0000  /* R/W */
  21 #define RPCIF_CMNCR_MD          BIT(31)
  22 #define RPCIF_CMNCR_SFDE        BIT(24) /* undocumented but must be set */
  23 #define RPCIF_CMNCR_MOIIO3(val) (((val) & 0x3) << 22)
  24 #define RPCIF_CMNCR_MOIIO2(val) (((val) & 0x3) << 20)
  25 #define RPCIF_CMNCR_MOIIO1(val) (((val) & 0x3) << 18)
  26 #define RPCIF_CMNCR_MOIIO0(val) (((val) & 0x3) << 16)
  27 #define RPCIF_CMNCR_MOIIO_HIZ   (RPCIF_CMNCR_MOIIO0(3) | \
  28                                  RPCIF_CMNCR_MOIIO1(3) | \
  29                                  RPCIF_CMNCR_MOIIO2(3) | RPCIF_CMNCR_MOIIO3(3))
  30 #define RPCIF_CMNCR_IO3FV(val)  (((val) & 0x3) << 14) /* undocumented */
  31 #define RPCIF_CMNCR_IO2FV(val)  (((val) & 0x3) << 12) /* undocumented */
  32 #define RPCIF_CMNCR_IO0FV(val)  (((val) & 0x3) << 8)
  33 #define RPCIF_CMNCR_IOFV_HIZ    (RPCIF_CMNCR_IO0FV(3) | RPCIF_CMNCR_IO2FV(3) | \
  34                                  RPCIF_CMNCR_IO3FV(3))
  35 #define RPCIF_CMNCR_BSZ(val)    (((val) & 0x3) << 0)
  36
  37 #define RPCIF_SSLDR             0x0004  /* R/W */
  38 #define RPCIF_SSLDR_SPNDL(d)    (((d) & 0x7) << 16)
  39 #define RPCIF_SSLDR_SLNDL(d)    (((d) & 0x7) << 8)
  40 #define RPCIF_SSLDR_SCKDL(d)    (((d) & 0x7) << 0)
  41
  42 #define RPCIF_DRCR              0x000C  /* R/W */
  43 #define RPCIF_DRCR_SSLN         BIT(24)
  44 #define RPCIF_DRCR_RBURST(v)    ((((v) - 1) & 0x1F) << 16)
  45 #define RPCIF_DRCR_RCF          BIT(9)
  46 #define RPCIF_DRCR_RBE          BIT(8)
  47 #define RPCIF_DRCR_SSLE         BIT(0)
  48
  49 #define RPCIF_DRCMR             0x0010  /* R/W */
  50 #define RPCIF_DRCMR_CMD(c)      (((c) & 0xFF) << 16)
  51 #define RPCIF_DRCMR_OCMD(c)     (((c) & 0xFF) << 0)
  52
  53 #define RPCIF_DREAR             0x0014  /* R/W */
  54 #define RPCIF_DREAR_EAV(c)      (((c) & 0xF) << 16)
  55 #define RPCIF_DREAR_EAC(c)      (((c) & 0x7) << 0)
  56
  57 #define RPCIF_DROPR             0x0018  /* R/W */
  58
  59 #define RPCIF_DRENR             0x001C  /* R/W */
  60 #define RPCIF_DRENR_CDB(o)      (u32)((((o) & 0x3) << 30))
  61 #define RPCIF_DRENR_OCDB(o)     (((o) & 0x3) << 28)
  62 #define RPCIF_DRENR_ADB(o)      (((o) & 0x3) << 24)
  63 #define RPCIF_DRENR_OPDB(o)     (((o) & 0x3) << 20)
  64 #define RPCIF_DRENR_DRDB(o)     (((o) & 0x3) << 16)
  65 #define RPCIF_DRENR_DME         BIT(15)
  66 #define RPCIF_DRENR_CDE         BIT(14)
  67 #define RPCIF_DRENR_OCDE        BIT(12)
  68 #define RPCIF_DRENR_ADE(v)      (((v) & 0xF) << 8)
  69 #define RPCIF_DRENR_OPDE(v)     (((v) & 0xF) << 4)
  70
  71 #define RPCIF_SMCR              0x0020  /* R/W */
  72 #define RPCIF_SMCR_SSLKP        BIT(8)
  73 #define RPCIF_SMCR_SPIRE        BIT(2)
  74 #define RPCIF_SMCR_SPIWE        BIT(1)
  75 #define RPCIF_SMCR_SPIE         BIT(0)
  76
  77 #define RPCIF_SMCMR             0x0024  /* R/W */
  78 #define RPCIF_SMCMR_CMD(c)      (((c) & 0xFF) << 16)
  79 #define RPCIF_SMCMR_OCMD(c)     (((c) & 0xFF) << 0)
  80
  81 #define RPCIF_SMADR             0x0028  /* R/W */
  82
  83 #define RPCIF_SMOPR             0x002C  /* R/W */
  84 #define RPCIF_SMOPR_OPD3(o)     (((o) & 0xFF) << 24)
  85 #define RPCIF_SMOPR_OPD2(o)     (((o) & 0xFF) << 16)
  86 #define RPCIF_SMOPR_OPD1(o)     (((o) & 0xFF) << 8)
  87 #define RPCIF_SMOPR_OPD0(o)     (((o) & 0xFF) << 0)
  88
  89 #define RPCIF_SMENR             0x0030  /* R/W */
  90 #define RPCIF_SMENR_CDB(o)      (((o) & 0x3) << 30)
  91 #define RPCIF_SMENR_OCDB(o)     (((o) & 0x3) << 28)
  92 #define RPCIF_SMENR_ADB(o)      (((o) & 0x3) << 24)
  93 #define RPCIF_SMENR_OPDB(o)     (((o) & 0x3) << 20)
  94 #define RPCIF_SMENR_SPIDB(o)    (((o) & 0x3) << 16)
  95 #define RPCIF_SMENR_DME         BIT(15)
  96 #define RPCIF_SMENR_CDE         BIT(14)
  97 #define RPCIF_SMENR_OCDE        BIT(12)
  98 #define RPCIF_SMENR_ADE(v)      (((v) & 0xF) << 8)
  99 #define RPCIF_SMENR_OPDE(v)     (((v) & 0xF) << 4)
 100 #define RPCIF_SMENR_SPIDE(v)    (((v) & 0xF) << 0)
 101
 102 #define RPCIF_SMRDR0            0x0038  /* R */
 103 #define RPCIF_SMRDR1            0x003C  /* R */
 104 #define RPCIF_SMWDR0            0x0040  /* W */
 105 #define RPCIF_SMWDR1            0x0044  /* W */
 106
 107 #define RPCIF_CMNSR             0x0048  /* R */
 108 #define RPCIF_CMNSR_SSLF        BIT(1)
 109 #define RPCIF_CMNSR_TEND        BIT(0)
 110
 111 #define RPCIF_DRDMCR            0x0058  /* R/W */
 112 #define RPCIF_DMDMCR_DMCYC(v)   ((((v) - 1) & 0x1F) << 0)
 113
 114 #define RPCIF_DRDRENR           0x005C  /* R/W */
 115 #define RPCIF_DRDRENR_HYPE(v)   (((v) & 0x7) << 12)
 116 #define RPCIF_DRDRENR_ADDRE     BIT(8)
 117 #define RPCIF_DRDRENR_OPDRE     BIT(4)
 118 #define RPCIF_DRDRENR_DRDRE     BIT(0)
 119
 120 #define RPCIF_SMDMCR            0x0060  /* R/W */
 121 #define RPCIF_SMDMCR_DMCYC(v)   ((((v) - 1) & 0x1F) << 0)
 122
 123 #define RPCIF_SMDRENR           0x0064  /* R/W */
 124 #define RPCIF_SMDRENR_HYPE(v)   (((v) & 0x7) << 12)
 125 #define RPCIF_SMDRENR_ADDRE     BIT(8)
 126 #define RPCIF_SMDRENR_OPDRE     BIT(4)
 127 #define RPCIF_SMDRENR_SPIDRE    BIT(0)
 128
 129 #define RPCIF_PHYCNT            0x007C  /* R/W */
 130 #define RPCIF_PHYCNT_CAL        BIT(31)
 131 #define RPCIF_PHYCNT_OCTA(v)    (((v) & 0x3) << 22)
 132 #define RPCIF_PHYCNT_EXDS       BIT(21)
 133 #define RPCIF_PHYCNT_OCT        BIT(20)
 134 #define RPCIF_PHYCNT_DDRCAL     BIT(19)
 135 #define RPCIF_PHYCNT_HS         BIT(18)
 136 #define RPCIF_PHYCNT_STRTIM(v)  (((v) & 0x7) << 15)
 137 #define RPCIF_PHYCNT_WBUF2      BIT(4)
 138 #define RPCIF_PHYCNT_WBUF       BIT(2)
 139 #define RPCIF_PHYCNT_PHYMEM(v)  (((v) & 0x3) << 0)
 140
 141 #define RPCIF_PHYOFFSET1        0x0080  /* R/W */
 142 #define RPCIF_PHYOFFSET1_DDRTMG(v) (((v) & 0x3) << 28)
 143
 144 #define RPCIF_PHYOFFSET2        0x0084  /* R/W */
 145 #define RPCIF_PHYOFFSET2_OCTTMG(v) (((v) & 0x7) << 8)
 146
 147 #define RPCIF_PHYINT            0x0088  /* R/W */
 148 #define RPCIF_PHYINT_WPVAL      BIT(1)
 149
 150 #define RPCIF_DIRMAP_SIZE       0x4000000
 151
 152 static const struct regmap_range rpcif_volatile_ranges[] = {
 153         regmap_reg_range(RPCIF_SMRDR0, RPCIF_SMRDR1),
 154         regmap_reg_range(RPCIF_SMWDR0, RPCIF_SMWDR1),
 155         regmap_reg_range(RPCIF_CMNSR, RPCIF_CMNSR),
 156 };
 157
 158 static const struct regmap_access_table rpcif_volatile_table = {
 159         .yes_ranges     = rpcif_volatile_ranges,
 160         .n_yes_ranges   = ARRAY_SIZE(rpcif_volatile_ranges),
 161 };
 162
 163
 164 /*
 165  * Custom accessor functions to ensure SM[RW]DR[01] are always accessed with
 166  * proper width.  Requires rpcif.xfer_size to be correctly set before!
 167  */
 168 static int rpcif_reg_read(void *context, unsigned int reg, unsigned int *val)
 169 {
 170         struct rpcif *rpc = context;
 171
 172         switch (reg) {
 173         case RPCIF_SMRDR0:
 174         case RPCIF_SMWDR0:
 175                 switch (rpc->xfer_size) {
 176                 case 1:
 177                         *val = readb(rpc->base + reg);
 178                         return 0;
 179
 180                 case 2:
 181                         *val = readw(rpc->base + reg);
 182                         return 0;
 183
 184                 case 4:
 185                 case 8:
 186                         *val = readl(rpc->base + reg);
 187                         return 0;
 188
 189                 default:
 190                         return -EILSEQ;
 191                 }
 192
 193         case RPCIF_SMRDR1:
 194         case RPCIF_SMWDR1:
 195                 if (rpc->xfer_size != 8)
 196                         return -EILSEQ;
 197                 break;
 198         }
 199
 200         *val = readl(rpc->base + reg);
 201         return 0;
 202 }
 203
 204 static int rpcif_reg_write(void *context, unsigned int reg, unsigned int val)
 205 {
 206         struct rpcif *rpc = context;
 207
 208         switch (reg) {
 209         case RPCIF_SMWDR0:
 210                 switch (rpc->xfer_size) {
 211                 case 1:
 212                         writeb(val, rpc->base + reg);
 213                         return 0;
 214
 215                 case 2:
 216                         writew(val, rpc->base + reg);
 217                         return 0;
 218
 219                 case 4:
 220                 case 8:
 221                         writel(val, rpc->base + reg);
 222                         return 0;
 223
 224                 default:
 225                         return -EILSEQ;
 226                 }
 227
 228         case RPCIF_SMWDR1:
 229                 if (rpc->xfer_size != 8)
 230                         return -EILSEQ;
 231                 break;
 232
 233         case RPCIF_SMRDR0:
 234         case RPCIF_SMRDR1:
 235                 return -EPERM;
 236         }
 237
 238         writel(val, rpc->base + reg);
 239         return 0;
 240 }
 241
 242 static const struct regmap_config rpcif_regmap_config = {
 243         .reg_bits       = 32,
 244         .val_bits       = 32,
 245         .reg_stride     = 4,
 246         .reg_read       = rpcif_reg_read,
 247         .reg_write      = rpcif_reg_write,
 248         .fast_io        = true,
 249         .max_register   = RPCIF_PHYINT,
 250         .volatile_table = &rpcif_volatile_table,
 251 };
 252
 253 int rpcif_sw_init(struct rpcif *rpc, struct device *dev)
 254 {
 255         struct platform_device *pdev = to_platform_device(dev);
 256         struct resource *res;
 257
 258         rpc->dev = dev;
 259
 260         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs");
 261         rpc->base = devm_ioremap_resource(&pdev->dev, res);
 262         if (IS_ERR(rpc->base))
 263                 return PTR_ERR(rpc->base);
 264
 265         rpc->regmap = devm_regmap_init(&pdev->dev, NULL, rpc, &rpcif_regmap_config);
 266         if (IS_ERR(rpc->regmap)) {
 267                 dev_err(&pdev->dev,
 268                         "failed to init regmap for rpcif, error %ld\n",
 269                         PTR_ERR(rpc->regmap));
 270                 return  PTR_ERR(rpc->regmap);
 271         }
 272
 273         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirmap");
 274         rpc->dirmap = devm_ioremap_resource(&pdev->dev, res);
 275         if (IS_ERR(rpc->dirmap))
 276                 return PTR_ERR(rpc->dirmap);
 277         rpc->size = resource_size(res);
 278
 279         rpc->rstc = devm_reset_control_get_exclusive(&pdev->dev, NULL);
 280
 281         return PTR_ERR_OR_ZERO(rpc->rstc);
 282 }
 283 EXPORT_SYMBOL(rpcif_sw_init);
 284
 285 void rpcif_hw_init(struct rpcif *rpc, bool hyperflash)
 286 {
 287         u32 dummy;
 288
 289         pm_runtime_get_sync(rpc->dev);
 290
 291         /*
 292          * NOTE: The 0x260 are undocumented bits, but they must be set.
 293          *       RPCIF_PHYCNT_STRTIM is strobe timing adjustment bits,
 294          *       0x0 : the delay is biggest,
 295          *       0x1 : the delay is 2nd biggest,
 296          *       On H3 ES1.x, the value should be 0, while on others,
 297          *       the value should be 7.
 298          */
 299         regmap_write(rpc->regmap, RPCIF_PHYCNT, RPCIF_PHYCNT_STRTIM(7) |
 300                      RPCIF_PHYCNT_PHYMEM(hyperflash ? 3 : 0) | 0x260);
 301
 302         /*
 303          * NOTE: The 0x1511144 are undocumented bits, but they must be set
 304          *       for RPCIF_PHYOFFSET1.
 305          *       The 0x31 are undocumented bits, but they must be set
 306          *       for RPCIF_PHYOFFSET2.
 307          */
 308         regmap_write(rpc->regmap, RPCIF_PHYOFFSET1, 0x1511144 |
 309                      RPCIF_PHYOFFSET1_DDRTMG(3));
 310         regmap_write(rpc->regmap, RPCIF_PHYOFFSET2, 0x31 |
 311                      RPCIF_PHYOFFSET2_OCTTMG(4));
 312
 313         if (hyperflash)
 314                 regmap_update_bits(rpc->regmap, RPCIF_PHYINT,
 315                                    RPCIF_PHYINT_WPVAL, 0);
 316
 317         regmap_write(rpc->regmap, RPCIF_CMNCR, RPCIF_CMNCR_SFDE |
 318                      RPCIF_CMNCR_MOIIO_HIZ | RPCIF_CMNCR_IOFV_HIZ |
 319                      RPCIF_CMNCR_BSZ(hyperflash ? 1 : 0));
 320         /* Set RCF after BSZ update */
 321         regmap_write(rpc->regmap, RPCIF_DRCR, RPCIF_DRCR_RCF);
 322         /* Dummy read according to spec */
 323         regmap_read(rpc->regmap, RPCIF_DRCR, &dummy);
 324         regmap_write(rpc->regmap, RPCIF_SSLDR, RPCIF_SSLDR_SPNDL(7) |
 325                      RPCIF_SSLDR_SLNDL(7) | RPCIF_SSLDR_SCKDL(7));
 326
 327         pm_runtime_put(rpc->dev);
 328
 329         rpc->bus_size = hyperflash ? 2 : 1;
 330 }
 331 EXPORT_SYMBOL(rpcif_hw_init);
 332
 333 static int wait_msg_xfer_end(struct rpcif *rpc)
 334 {
 335         u32 sts;
 336
 337         return regmap_read_poll_timeout(rpc->regmap, RPCIF_CMNSR, sts,
 338                                         sts & RPCIF_CMNSR_TEND, 0,
 339                                         USEC_PER_SEC);
 340 }
 341
 342 static u8 rpcif_bits_set(struct rpcif *rpc, u32 nbytes)
 343 {
 344         if (rpc->bus_size == 2)
 345                 nbytes /= 2;
 346         nbytes = clamp(nbytes, 1U, 4U);
 347         return GENMASK(3, 4 - nbytes);
 348 }
 349
 350 static u8 rpcif_bit_size(u8 buswidth)
 351 {
 352         return buswidth > 4 ? 2 : ilog2(buswidth);
 353 }
 354
 355 void rpcif_prepare(struct rpcif *rpc, const struct rpcif_op *op, u64 *offs,
 356                    size_t *len)
 357 {
 358         rpc->smcr = 0;
 359         rpc->smadr = 0;
 360         rpc->enable = 0;
 361         rpc->command = 0;
 362         rpc->option = 0;
 363         rpc->dummy = 0;
 364         rpc->ddr = 0;
 365         rpc->xferlen = 0;
 366
 367         if (op->cmd.buswidth) {
 368                 rpc->enable  = RPCIF_SMENR_CDE |
 369                         RPCIF_SMENR_CDB(rpcif_bit_size(op->cmd.buswidth));
 370                 rpc->command = RPCIF_SMCMR_CMD(op->cmd.opcode);
 371                 if (op->cmd.ddr)
 372                         rpc->ddr = RPCIF_SMDRENR_HYPE(0x5);
 373         }
 374         if (op->ocmd.buswidth) {
 375                 rpc->enable  |= RPCIF_SMENR_OCDE |
 376                         RPCIF_SMENR_OCDB(rpcif_bit_size(op->ocmd.buswidth));
 377                 rpc->command |= RPCIF_SMCMR_OCMD(op->ocmd.opcode);
 378         }
 379
 380         if (op->addr.buswidth) {
 381                 rpc->enable |=
 382                         RPCIF_SMENR_ADB(rpcif_bit_size(op->addr.buswidth));
 383                 if (op->addr.nbytes == 4)
 384                         rpc->enable |= RPCIF_SMENR_ADE(0xF);
 385                 else
 386                         rpc->enable |= RPCIF_SMENR_ADE(GENMASK(
 387                                                 2, 3 - op->addr.nbytes));
 388                 if (op->addr.ddr)
 389                         rpc->ddr |= RPCIF_SMDRENR_ADDRE;
 390
 391                 if (offs && len)
 392                         rpc->smadr = *offs;
 393                 else
 394                         rpc->smadr = op->addr.val;
 395         }
 396
 397         if (op->dummy.buswidth) {
 398                 rpc->enable |= RPCIF_SMENR_DME;
 399                 rpc->dummy = RPCIF_SMDMCR_DMCYC(op->dummy.ncycles /
 400                                                 op->dummy.buswidth);
 401         }
 402
 403         if (op->option.buswidth) {
 404                 rpc->enable |= RPCIF_SMENR_OPDE(
 405                         rpcif_bits_set(rpc, op->option.nbytes)) |
 406                         RPCIF_SMENR_OPDB(rpcif_bit_size(op->option.buswidth));
 407                 if (op->option.ddr)
 408                         rpc->ddr |= RPCIF_SMDRENR_OPDRE;
 409                 rpc->option = op->option.val;
 410         }
 411
 412         rpc->dir = op->data.dir;
 413         if (op->data.buswidth) {
 414                 u32 nbytes;
 415
 416                 rpc->buffer = op->data.buf.in;
 417                 switch (op->data.dir) {
 418                 case RPCIF_DATA_IN:
 419                         rpc->smcr = RPCIF_SMCR_SPIRE;
 420                         break;
 421                 case RPCIF_DATA_OUT:
 422                         rpc->smcr = RPCIF_SMCR_SPIWE;
 423                         break;
 424                 default:
 425                         break;
 426                 }
 427                 if (op->data.ddr)
 428                         rpc->ddr |= RPCIF_SMDRENR_SPIDRE;
 429
 430                 if (offs && len)
 431                         nbytes = *len;
 432                 else
 433                         nbytes = op->data.nbytes;
 434                 rpc->xferlen = nbytes;
 435
 436                 rpc->enable |= RPCIF_SMENR_SPIDB(rpcif_bit_size(op->data.buswidth));
 437         }
 438 }
 439 EXPORT_SYMBOL(rpcif_prepare);
 440
 441 int rpcif_manual_xfer(struct rpcif *rpc)
 442 {
 443         u32 smenr, smcr, pos = 0, max = rpc->bus_size == 2 ? 8 : 4;
 444         int ret = 0;
 445
 446         pm_runtime_get_sync(rpc->dev);
 447
 448         regmap_update_bits(rpc->regmap, RPCIF_PHYCNT,
 449                            RPCIF_PHYCNT_CAL, RPCIF_PHYCNT_CAL);
 450         regmap_update_bits(rpc->regmap, RPCIF_CMNCR,
 451                            RPCIF_CMNCR_MD, RPCIF_CMNCR_MD);
 452         regmap_write(rpc->regmap, RPCIF_SMCMR, rpc->command);
 453         regmap_write(rpc->regmap, RPCIF_SMOPR, rpc->option);
 454         regmap_write(rpc->regmap, RPCIF_SMDMCR, rpc->dummy);
 455         regmap_write(rpc->regmap, RPCIF_SMDRENR, rpc->ddr);
 456         regmap_write(rpc->regmap, RPCIF_SMADR, rpc->smadr);
 457         smenr = rpc->enable;
 458
 459         switch (rpc->dir) {
 460         case RPCIF_DATA_OUT:
 461                 while (pos < rpc->xferlen) {
 462                         u32 bytes_left = rpc->xferlen - pos;
 463                         u32 nbytes, data[2];
 464
 465                         smcr = rpc->smcr | RPCIF_SMCR_SPIE;
 466
 467                         /* nbytes may only be 1, 2, 4, or 8 */
 468                         nbytes = bytes_left >= max ? max : (1 << ilog2(bytes_left));
 469                         if (bytes_left > nbytes)
 470                                 smcr |= RPCIF_SMCR_SSLKP;
 471
 472                         smenr |= RPCIF_SMENR_SPIDE(rpcif_bits_set(rpc, nbytes));
 473                         regmap_write(rpc->regmap, RPCIF_SMENR, smenr);
 474                         rpc->xfer_size = nbytes;
 475
 476                         memcpy(data, rpc->buffer + pos, nbytes);
 477                         if (nbytes == 8) {
 478                                 regmap_write(rpc->regmap, RPCIF_SMWDR1,
 479                                              data[0]);
 480                                 regmap_write(rpc->regmap, RPCIF_SMWDR0,
 481                                              data[1]);
 482                         } else {
 483                                 regmap_write(rpc->regmap, RPCIF_SMWDR0,
 484                                              data[0]);
 485                         }
 486
 487                         regmap_write(rpc->regmap, RPCIF_SMCR, smcr);
 488                         ret = wait_msg_xfer_end(rpc);
 489                         if (ret)
 490                                 goto err_out;
 491
 492                         pos += nbytes;
 493                         smenr = rpc->enable &
 494                                 ~RPCIF_SMENR_CDE & ~RPCIF_SMENR_ADE(0xF);
 495                 }
 496                 break;
 497         case RPCIF_DATA_IN:
 498                 /*
 499                  * RPC-IF spoils the data for the commands without an address
 500                  * phase (like RDID) in the manual mode, so we'll have to work
 501                  * around this issue by using the external address space read
 502                  * mode instead.
 503                  */
 504                 if (!(smenr & RPCIF_SMENR_ADE(0xF)) && rpc->dirmap) {
 505                         u32 dummy;
 506
 507                         regmap_update_bits(rpc->regmap, RPCIF_CMNCR,
 508                                            RPCIF_CMNCR_MD, 0);
 509                         regmap_write(rpc->regmap, RPCIF_DRCR,
 510                                      RPCIF_DRCR_RBURST(32) | RPCIF_DRCR_RBE);
 511                         regmap_write(rpc->regmap, RPCIF_DRCMR, rpc->command);
 512                         regmap_write(rpc->regmap, RPCIF_DREAR,
 513                                      RPCIF_DREAR_EAC(1));
 514                         regmap_write(rpc->regmap, RPCIF_DROPR, rpc->option);
 515                         regmap_write(rpc->regmap, RPCIF_DRENR,
 516                                      smenr & ~RPCIF_SMENR_SPIDE(0xF));
 517                         regmap_write(rpc->regmap, RPCIF_DRDMCR,  rpc->dummy);
 518                         regmap_write(rpc->regmap, RPCIF_DRDRENR, rpc->ddr);
 519                         memcpy_fromio(rpc->buffer, rpc->dirmap, rpc->xferlen);
 520                         regmap_write(rpc->regmap, RPCIF_DRCR, RPCIF_DRCR_RCF);
 521                         /* Dummy read according to spec */
 522                         regmap_read(rpc->regmap, RPCIF_DRCR, &dummy);
 523                         break;
 524                 }
 525                 while (pos < rpc->xferlen) {
 526                         u32 bytes_left = rpc->xferlen - pos;
 527                         u32 nbytes, data[2];
 528
 529                         /* nbytes may only be 1, 2, 4, or 8 */
 530                         nbytes = bytes_left >= max ? max : (1 << ilog2(bytes_left));
 531
 532                         regmap_write(rpc->regmap, RPCIF_SMADR,
 533                                      rpc->smadr + pos);
 534                         smenr &= ~RPCIF_SMENR_SPIDE(0xF);
 535                         smenr |= RPCIF_SMENR_SPIDE(rpcif_bits_set(rpc, nbytes));
 536                         regmap_write(rpc->regmap, RPCIF_SMENR, smenr);
 537                         regmap_write(rpc->regmap, RPCIF_SMCR,
 538                                      rpc->smcr | RPCIF_SMCR_SPIE);
 539                         rpc->xfer_size = nbytes;
 540                         ret = wait_msg_xfer_end(rpc);
 541                         if (ret)
 542                                 goto err_out;
 543
 544                         if (nbytes == 8) {
 545                                 regmap_read(rpc->regmap, RPCIF_SMRDR1,
 546                                             &data[0]);
 547                                 regmap_read(rpc->regmap, RPCIF_SMRDR0,
 548                                             &data[1]);
 549                         } else {
 550                                 regmap_read(rpc->regmap, RPCIF_SMRDR0,
 551                                             &data[0]);
 552                         }
 553                         memcpy(rpc->buffer + pos, data, nbytes);
 554
 555                         pos += nbytes;
 556                 }
 557                 break;
 558         default:
 559                 regmap_write(rpc->regmap, RPCIF_SMENR, rpc->enable);
 560                 regmap_write(rpc->regmap, RPCIF_SMCR,
 561                              rpc->smcr | RPCIF_SMCR_SPIE);
 562                 ret = wait_msg_xfer_end(rpc);
 563                 if (ret)
 564                         goto err_out;
 565         }
 566
 567 exit:
 568         pm_runtime_put(rpc->dev);
 569         return ret;
 570
 571 err_out:
 572         if (reset_control_reset(rpc->rstc))
 573                 dev_err(rpc->dev, "Failed to reset HW\n");
 574         rpcif_hw_init(rpc, rpc->bus_size == 2);
 575         goto exit;
 576 }
 577 EXPORT_SYMBOL(rpcif_manual_xfer);
 578
 579 static void memcpy_fromio_readw(void *to,
 580                                 const void __iomem *from,
 581                                 size_t count)
 582 {
 583         const int maxw = (IS_ENABLED(CONFIG_64BIT)) ? 8 : 4;
 584         u8 buf[2];
 585
 586         if (count && ((unsigned long)from & 1)) {
 587                 *(u16 *)buf = __raw_readw((void __iomem *)((unsigned long)from & ~1));
 588                 *(u8 *)to = buf[1];
 589                 from++;
 590                 to++;
 591                 count--;
 592         }
 593         while (count >= 2 && !IS_ALIGNED((unsigned long)from, maxw)) {
 594                 *(u16 *)to = __raw_readw(from);
 595                 from += 2;
 596                 to += 2;
 597                 count -= 2;
 598         }
 599         while (count >= maxw) {
 600 #ifdef CONFIG_64BIT
 601                 *(u64 *)to = __raw_readq(from);
 602 #else
 603                 *(u32 *)to = __raw_readl(from);
 604 #endif
 605                 from += maxw;
 606                 to += maxw;
 607                 count -= maxw;
 608         }
 609         while (count >= 2) {
 610                 *(u16 *)to = __raw_readw(from);
 611                 from += 2;
 612                 to += 2;
 613                 count -= 2;
 614         }
 615         if (count) {
 616                 *(u16 *)buf = __raw_readw(from);
 617                 *(u8 *)to = buf[0];
 618         }
 619 }
 620
 621 ssize_t rpcif_dirmap_read(struct rpcif *rpc, u64 offs, size_t len, void *buf)
 622 {
 623         loff_t from = offs & (RPCIF_DIRMAP_SIZE - 1);
 624         size_t size = RPCIF_DIRMAP_SIZE - from;
 625
 626         if (len > size)
 627                 len = size;
 628
 629         pm_runtime_get_sync(rpc->dev);
 630
 631         regmap_update_bits(rpc->regmap, RPCIF_CMNCR, RPCIF_CMNCR_MD, 0);
 632         regmap_write(rpc->regmap, RPCIF_DRCR, 0);
 633         regmap_write(rpc->regmap, RPCIF_DRCMR, rpc->command);
 634         regmap_write(rpc->regmap, RPCIF_DREAR,
 635                      RPCIF_DREAR_EAV(offs >> 25) | RPCIF_DREAR_EAC(1));
 636         regmap_write(rpc->regmap, RPCIF_DROPR, rpc->option);
 637         regmap_write(rpc->regmap, RPCIF_DRENR,
 638                      rpc->enable & ~RPCIF_SMENR_SPIDE(0xF));
 639         regmap_write(rpc->regmap, RPCIF_DRDMCR, rpc->dummy);
 640         regmap_write(rpc->regmap, RPCIF_DRDRENR, rpc->ddr);
 641
 642         if (rpc->bus_size == 2)
 643                 memcpy_fromio_readw(buf, rpc->dirmap + from, len);
 644         else
 645                 memcpy_fromio(buf, rpc->dirmap + from, len);
 646
 647         pm_runtime_put(rpc->dev);
 648
 649         return len;
 650 }
 651 EXPORT_SYMBOL(rpcif_dirmap_read);
 652
 653 static int rpcif_probe(struct platform_device *pdev)
 654 {
 655         struct platform_device *vdev;
 656         struct device_node *flash;
 657         const char *name;
 658         int ret;
 659
 660         flash = of_get_next_child(pdev->dev.of_node, NULL);
 661         if (!flash) {
 662                 dev_warn(&pdev->dev, "no flash node found\n");
 663                 return -ENODEV;
 664         }
 665
 666         if (of_device_is_compatible(flash, "jedec,spi-nor")) {
 667                 name = "rpc-if-spi";
 668         } else if (of_device_is_compatible(flash, "cfi-flash")) {
 669                 name = "rpc-if-hyperflash";
 670         } else  {
 671                 of_node_put(flash);
 672                 dev_warn(&pdev->dev, "unknown flash type\n");
 673                 return -ENODEV;
 674         }
 675         of_node_put(flash);
 676
 677         vdev = platform_device_alloc(name, pdev->id);
 678         if (!vdev)
 679                 return -ENOMEM;
 680         vdev->dev.parent = &pdev->dev;
 681         platform_set_drvdata(pdev, vdev);
 682
 683         ret = platform_device_add(vdev);
 684         if (ret) {
 685                 platform_device_put(vdev);
 686                 return ret;
 687         }
 688
 689         return 0;
 690 }
 691
 692 static int rpcif_remove(struct platform_device *pdev)
 693 {
 694         struct platform_device *vdev = platform_get_drvdata(pdev);
 695
 696         platform_device_unregister(vdev);
 697
 698         return 0;
 699 }
 700
 701 static const struct of_device_id rpcif_of_match[] = {
 702         { .compatible = "renesas,rcar-gen3-rpc-if", },
 703         {},
 704 };
 705 MODULE_DEVICE_TABLE(of, rpcif_of_match);
 706
 707 static struct platform_driver rpcif_driver = {
 708         .probe  = rpcif_probe,
 709         .remove = rpcif_remove,
 710         .driver = {
 711                 .name = "rpc-if",
 712                 .of_match_table = rpcif_of_match,
 713         },
 714 };
 715 module_platform_driver(rpcif_driver);
 716
 717 MODULE_DESCRIPTION("Renesas RPC-IF core driver");
 718 MODULE_LICENSE("GPL v2");