6 * Copyright (C) 2006-2010 Nokia Corporation
7 * Copyright (C) 2007-2009 Texas Instruments, Inc.
9 * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 * Sakari Ailus <sakari.ailus@iki.fi>
13 * Laurent Pinchart <laurent.pinchart@ideasonboard.com>
14 * Sakari Ailus <sakari.ailus@iki.fi>
15 * David Cohen <dacohen@gmail.com>
16 * Stanimir Varbanov <svarbanov@mm-sol.com>
17 * Vimarsh Zutshi <vimarsh.zutshi@gmail.com>
18 * Tuukka Toivonen <tuukkat76@gmail.com>
19 * Sergio Aguirre <saaguirre@ti.com>
20 * Antti Koskipaa <akoskipa@gmail.com>
21 * Ivan T. Ivanov <iivanov@mm-sol.com>
22 * RaniSuneela <r-m@ti.com>
23 * Atanas Filipov <afilipov@mm-sol.com>
24 * Gjorgji Rosikopulos <grosikopulos@mm-sol.com>
25 * Hiroshi DOYU <hiroshi.doyu@nokia.com>
26 * Nayden Kanchev <nkanchev@mm-sol.com>
27 * Phil Carmody <ext-phil.2.carmody@nokia.com>
28 * Artem Bityutskiy <artem.bityutskiy@nokia.com>
29 * Dominic Curran <dcurran@ti.com>
30 * Ilkka Myllyperkio <ilkka.myllyperkio@sofica.fi>
31 * Pallavi Kulkarni <p-kulkarni@ti.com>
32 * Vaibhav Hiremath <hvaibhav@ti.com>
33 * Mohit Jalori <mjalori@ti.com>
34 * Sameer Venkatraman <sameerv@ti.com>
35 * Senthilvadivu Guruswamy <svadivu@ti.com>
36 * Thara Gopinath <thara@ti.com>
37 * Toni Leinonen <toni.leinonen@nokia.com>
38 * Troy Laramy <t-laramy@ti.com>
40 * This program is free software; you can redistribute it and/or modify
41 * it under the terms of the GNU General Public License version 2 as
42 * published by the Free Software Foundation.
44 * This program is distributed in the hope that it will be useful, but
45 * WITHOUT ANY WARRANTY; without even the implied warranty of
46 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
47 * General Public License for more details.
49 * You should have received a copy of the GNU General Public License
50 * along with this program; if not, write to the Free Software
51 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
55 #include <asm/cacheflush.h>
57 #include <linux/clk.h>
58 #include <linux/delay.h>
59 #include <linux/device.h>
60 #include <linux/dma-mapping.h>
61 #include <linux/i2c.h>
62 #include <linux/interrupt.h>
63 #include <linux/module.h>
64 #include <linux/platform_device.h>
65 #include <linux/regulator/consumer.h>
66 #include <linux/slab.h>
67 #include <linux/sched.h>
68 #include <linux/vmalloc.h>
70 #include <media/v4l2-common.h>
71 #include <media/v4l2-device.h>
76 #include "isppreview.h"
77 #include "ispresizer.h"
84 * this is provided as an interim solution until omap3isp doesn't need
85 * any omap-specific iommu API
87 #define to_iommu(dev) \
88 (struct omap_iommu *)platform_get_drvdata(to_platform_device(dev))
90 static unsigned int autoidle;
91 module_param(autoidle, int, 0444);
92 MODULE_PARM_DESC(autoidle, "Enable OMAP3ISP AUTOIDLE support");
94 static void isp_save_ctx(struct isp_device *isp);
96 static void isp_restore_ctx(struct isp_device *isp);
98 static const struct isp_res_mapping isp_res_maps[] = {
100 .isp_rev = ISP_REVISION_2_0,
101 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
102 1 << OMAP3_ISP_IOMEM_CCP2 |
103 1 << OMAP3_ISP_IOMEM_CCDC |
104 1 << OMAP3_ISP_IOMEM_HIST |
105 1 << OMAP3_ISP_IOMEM_H3A |
106 1 << OMAP3_ISP_IOMEM_PREV |
107 1 << OMAP3_ISP_IOMEM_RESZ |
108 1 << OMAP3_ISP_IOMEM_SBL |
109 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
110 1 << OMAP3_ISP_IOMEM_CSIPHY2,
113 .isp_rev = ISP_REVISION_15_0,
114 .map = 1 << OMAP3_ISP_IOMEM_MAIN |
115 1 << OMAP3_ISP_IOMEM_CCP2 |
116 1 << OMAP3_ISP_IOMEM_CCDC |
117 1 << OMAP3_ISP_IOMEM_HIST |
118 1 << OMAP3_ISP_IOMEM_H3A |
119 1 << OMAP3_ISP_IOMEM_PREV |
120 1 << OMAP3_ISP_IOMEM_RESZ |
121 1 << OMAP3_ISP_IOMEM_SBL |
122 1 << OMAP3_ISP_IOMEM_CSI2A_REGS1 |
123 1 << OMAP3_ISP_IOMEM_CSIPHY2 |
124 1 << OMAP3_ISP_IOMEM_CSI2A_REGS2 |
125 1 << OMAP3_ISP_IOMEM_CSI2C_REGS1 |
126 1 << OMAP3_ISP_IOMEM_CSIPHY1 |
127 1 << OMAP3_ISP_IOMEM_CSI2C_REGS2,
131 /* Structure for saving/restoring ISP module registers */
132 static struct isp_reg isp_reg_list[] = {
133 {OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG, 0},
134 {OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, 0},
135 {OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL, 0},
140 * omap3isp_flush - Post pending L3 bus writes by doing a register readback
141 * @isp: OMAP3 ISP device
143 * In order to force posting of pending writes, we need to write and
144 * readback the same register, in this case the revision register.
146 * See this link for reference:
147 * http://www.mail-archive.com/linux-omap@vger.kernel.org/msg08149.html
149 void omap3isp_flush(struct isp_device *isp)
151 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
152 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
156 * isp_enable_interrupts - Enable ISP interrupts.
157 * @isp: OMAP3 ISP device
159 static void isp_enable_interrupts(struct isp_device *isp)
161 static const u32 irq = IRQ0ENABLE_CSIA_IRQ
162 | IRQ0ENABLE_CSIB_IRQ
163 | IRQ0ENABLE_CCDC_LSC_PREF_ERR_IRQ
164 | IRQ0ENABLE_CCDC_LSC_DONE_IRQ
165 | IRQ0ENABLE_CCDC_VD0_IRQ
166 | IRQ0ENABLE_CCDC_VD1_IRQ
167 | IRQ0ENABLE_HS_VS_IRQ
168 | IRQ0ENABLE_HIST_DONE_IRQ
169 | IRQ0ENABLE_H3A_AWB_DONE_IRQ
170 | IRQ0ENABLE_H3A_AF_DONE_IRQ
171 | IRQ0ENABLE_PRV_DONE_IRQ
172 | IRQ0ENABLE_RSZ_DONE_IRQ;
174 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
175 isp_reg_writel(isp, irq, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
179 * isp_disable_interrupts - Disable ISP interrupts.
180 * @isp: OMAP3 ISP device
182 static void isp_disable_interrupts(struct isp_device *isp)
184 isp_reg_writel(isp, 0, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0ENABLE);
188 * isp_set_xclk - Configures the specified cam_xclk to the desired frequency.
189 * @isp: OMAP3 ISP device
190 * @xclk: Desired frequency of the clock in Hz. 0 = stable low, 1 is stable high
191 * @xclksel: XCLK to configure (0 = A, 1 = B).
193 * Configures the specified MCLK divisor in the ISP timing control register
194 * (TCTRL_CTRL) to generate the desired xclk clock value.
196 * Divisor = cam_mclk_hz / xclk
198 * Returns the final frequency that is actually being generated
200 static u32 isp_set_xclk(struct isp_device *isp, u32 xclk, u8 xclksel)
204 unsigned long mclk_hz;
206 if (!omap3isp_get(isp))
209 mclk_hz = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
211 if (xclk >= mclk_hz) {
212 divisor = ISPTCTRL_CTRL_DIV_BYPASS;
213 currentxclk = mclk_hz;
214 } else if (xclk >= 2) {
215 divisor = mclk_hz / xclk;
216 if (divisor >= ISPTCTRL_CTRL_DIV_BYPASS)
217 divisor = ISPTCTRL_CTRL_DIV_BYPASS - 1;
218 currentxclk = mclk_hz / divisor;
226 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
227 ISPTCTRL_CTRL_DIVA_MASK,
228 divisor << ISPTCTRL_CTRL_DIVA_SHIFT);
229 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclka set to %d Hz\n",
233 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_TCTRL_CTRL,
234 ISPTCTRL_CTRL_DIVB_MASK,
235 divisor << ISPTCTRL_CTRL_DIVB_SHIFT);
236 dev_dbg(isp->dev, "isp_set_xclk(): cam_xclkb set to %d Hz\n",
242 dev_dbg(isp->dev, "ISP_ERR: isp_set_xclk(): Invalid requested "
243 "xclk. Must be 0 (A) or 1 (B).\n");
247 /* Do we go from stable whatever to clock? */
248 if (divisor >= 2 && isp->xclk_divisor[xclksel - 1] < 2)
250 /* Stopping the clock. */
251 else if (divisor < 2 && isp->xclk_divisor[xclksel - 1] >= 2)
254 isp->xclk_divisor[xclksel - 1] = divisor;
262 * isp_power_settings - Sysconfig settings, for Power Management.
263 * @isp: OMAP3 ISP device
264 * @idle: Consider idle state.
266 * Sets the power settings for the ISP, and SBL bus.
268 static void isp_power_settings(struct isp_device *isp, int idle)
271 ((idle ? ISP_SYSCONFIG_MIDLEMODE_SMARTSTANDBY :
272 ISP_SYSCONFIG_MIDLEMODE_FORCESTANDBY) <<
273 ISP_SYSCONFIG_MIDLEMODE_SHIFT) |
274 ((isp->revision == ISP_REVISION_15_0) ?
275 ISP_SYSCONFIG_AUTOIDLE : 0),
276 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
279 isp_reg_writel(isp, ISPCTRL_SBL_AUTOIDLE, OMAP3_ISP_IOMEM_MAIN,
284 * Configure the bridge and lane shifter. Valid inputs are
286 * CCDC_INPUT_PARALLEL: Parallel interface
287 * CCDC_INPUT_CSI2A: CSI2a receiver
288 * CCDC_INPUT_CCP2B: CCP2b receiver
289 * CCDC_INPUT_CSI2C: CSI2c receiver
291 * The bridge and lane shifter are configured according to the selected input
292 * and the ISP platform data.
294 void omap3isp_configure_bridge(struct isp_device *isp,
295 enum ccdc_input_entity input,
296 const struct isp_parallel_platform_data *pdata,
301 ispctrl_val = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
302 ispctrl_val &= ~ISPCTRL_SHIFT_MASK;
303 ispctrl_val &= ~ISPCTRL_PAR_CLK_POL_INV;
304 ispctrl_val &= ~ISPCTRL_PAR_SER_CLK_SEL_MASK;
305 ispctrl_val &= ~ISPCTRL_PAR_BRIDGE_MASK;
308 case CCDC_INPUT_PARALLEL:
309 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_PARALLEL;
310 ispctrl_val |= pdata->clk_pol << ISPCTRL_PAR_CLK_POL_SHIFT;
311 ispctrl_val |= pdata->bridge << ISPCTRL_PAR_BRIDGE_SHIFT;
312 shift += pdata->data_lane_shift * 2;
315 case CCDC_INPUT_CSI2A:
316 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIA;
319 case CCDC_INPUT_CCP2B:
320 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIB;
323 case CCDC_INPUT_CSI2C:
324 ispctrl_val |= ISPCTRL_PAR_SER_CLK_SEL_CSIC;
331 ispctrl_val |= ((shift/2) << ISPCTRL_SHIFT_SHIFT) & ISPCTRL_SHIFT_MASK;
333 ispctrl_val &= ~ISPCTRL_SYNC_DETECT_MASK;
334 ispctrl_val |= ISPCTRL_SYNC_DETECT_VSRISE;
336 isp_reg_writel(isp, ispctrl_val, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL);
340 * isp_set_pixel_clock - Configures the ISP pixel clock
341 * @isp: OMAP3 ISP device
342 * @pixelclk: Average pixel clock in Hz
344 * Set the average pixel clock required by the sensor. The ISP will use the
345 * lowest possible memory bandwidth settings compatible with the clock.
347 static void isp_set_pixel_clock(struct isp_device *isp, unsigned int pixelclk)
349 isp->isp_ccdc.vpcfg.pixelclk = pixelclk;
352 void omap3isp_hist_dma_done(struct isp_device *isp)
354 if (omap3isp_ccdc_busy(&isp->isp_ccdc) ||
355 omap3isp_stat_pcr_busy(&isp->isp_hist)) {
356 /* Histogram cannot be enabled in this frame anymore */
357 atomic_set(&isp->isp_hist.buf_err, 1);
358 dev_dbg(isp->dev, "hist: Out of synchronization with "
359 "CCDC. Ignoring next buffer.\n");
363 static inline void isp_isr_dbg(struct isp_device *isp, u32 irqstatus)
365 static const char *name[] = {
384 "CCDC_LSC_PREFETCH_COMPLETED",
385 "CCDC_LSC_PREFETCH_ERROR",
401 dev_dbg(isp->dev, "ISP IRQ: ");
403 for (i = 0; i < ARRAY_SIZE(name); i++) {
404 if ((1 << i) & irqstatus)
405 printk(KERN_CONT "%s ", name[i]);
407 printk(KERN_CONT "\n");
410 static void isp_isr_sbl(struct isp_device *isp)
412 struct device *dev = isp->dev;
416 * Handle shared buffer logic overflows for video buffers.
417 * ISPSBL_PCR_CCDCPRV_2_RSZ_OVF can be safely ignored.
419 sbl_pcr = isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
420 isp_reg_writel(isp, sbl_pcr, OMAP3_ISP_IOMEM_SBL, ISPSBL_PCR);
421 sbl_pcr &= ~ISPSBL_PCR_CCDCPRV_2_RSZ_OVF;
424 dev_dbg(dev, "SBL overflow (PCR = 0x%08x)\n", sbl_pcr);
426 if (sbl_pcr & (ISPSBL_PCR_CCDC_WBL_OVF | ISPSBL_PCR_CSIA_WBL_OVF
427 | ISPSBL_PCR_CSIB_WBL_OVF)) {
428 isp->isp_ccdc.error = 1;
429 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
430 isp->isp_prev.error = 1;
431 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
432 isp->isp_res.error = 1;
435 if (sbl_pcr & ISPSBL_PCR_PRV_WBL_OVF) {
436 isp->isp_prev.error = 1;
437 if (isp->isp_res.input == RESIZER_INPUT_VP &&
438 !(isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER))
439 isp->isp_res.error = 1;
442 if (sbl_pcr & (ISPSBL_PCR_RSZ1_WBL_OVF
443 | ISPSBL_PCR_RSZ2_WBL_OVF
444 | ISPSBL_PCR_RSZ3_WBL_OVF
445 | ISPSBL_PCR_RSZ4_WBL_OVF))
446 isp->isp_res.error = 1;
448 if (sbl_pcr & ISPSBL_PCR_H3A_AF_WBL_OVF)
449 omap3isp_stat_sbl_overflow(&isp->isp_af);
451 if (sbl_pcr & ISPSBL_PCR_H3A_AEAWB_WBL_OVF)
452 omap3isp_stat_sbl_overflow(&isp->isp_aewb);
456 * isp_isr - Interrupt Service Routine for Camera ISP module.
457 * @irq: Not used currently.
458 * @_isp: Pointer to the OMAP3 ISP device
460 * Handles the corresponding callback if plugged in.
462 * Returns IRQ_HANDLED when IRQ was correctly handled, or IRQ_NONE when the
463 * IRQ wasn't handled.
465 static irqreturn_t isp_isr(int irq, void *_isp)
467 static const u32 ccdc_events = IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ |
468 IRQ0STATUS_CCDC_LSC_DONE_IRQ |
469 IRQ0STATUS_CCDC_VD0_IRQ |
470 IRQ0STATUS_CCDC_VD1_IRQ |
471 IRQ0STATUS_HS_VS_IRQ;
472 struct isp_device *isp = _isp;
476 irqstatus = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
477 isp_reg_writel(isp, irqstatus, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
481 if (irqstatus & IRQ0STATUS_CSIA_IRQ) {
482 ret = omap3isp_csi2_isr(&isp->isp_csi2a);
484 isp->isp_ccdc.error = 1;
487 if (irqstatus & IRQ0STATUS_CSIB_IRQ) {
488 ret = omap3isp_ccp2_isr(&isp->isp_ccp2);
490 isp->isp_ccdc.error = 1;
493 if (irqstatus & IRQ0STATUS_CCDC_VD0_IRQ) {
494 if (isp->isp_ccdc.output & CCDC_OUTPUT_PREVIEW)
495 omap3isp_preview_isr_frame_sync(&isp->isp_prev);
496 if (isp->isp_ccdc.output & CCDC_OUTPUT_RESIZER)
497 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
498 omap3isp_stat_isr_frame_sync(&isp->isp_aewb);
499 omap3isp_stat_isr_frame_sync(&isp->isp_af);
500 omap3isp_stat_isr_frame_sync(&isp->isp_hist);
503 if (irqstatus & ccdc_events)
504 omap3isp_ccdc_isr(&isp->isp_ccdc, irqstatus & ccdc_events);
506 if (irqstatus & IRQ0STATUS_PRV_DONE_IRQ) {
507 if (isp->isp_prev.output & PREVIEW_OUTPUT_RESIZER)
508 omap3isp_resizer_isr_frame_sync(&isp->isp_res);
509 omap3isp_preview_isr(&isp->isp_prev);
512 if (irqstatus & IRQ0STATUS_RSZ_DONE_IRQ)
513 omap3isp_resizer_isr(&isp->isp_res);
515 if (irqstatus & IRQ0STATUS_H3A_AWB_DONE_IRQ)
516 omap3isp_stat_isr(&isp->isp_aewb);
518 if (irqstatus & IRQ0STATUS_H3A_AF_DONE_IRQ)
519 omap3isp_stat_isr(&isp->isp_af);
521 if (irqstatus & IRQ0STATUS_HIST_DONE_IRQ)
522 omap3isp_stat_isr(&isp->isp_hist);
526 #if defined(DEBUG) && defined(ISP_ISR_DEBUG)
527 isp_isr_dbg(isp, irqstatus);
533 /* -----------------------------------------------------------------------------
534 * Pipeline power management
536 * Entities must be powered up when part of a pipeline that contains at least
537 * one open video device node.
539 * To achieve this use the entity use_count field to track the number of users.
540 * For entities corresponding to video device nodes the use_count field stores
541 * the users count of the node. For entities corresponding to subdevs the
542 * use_count field stores the total number of users of all video device nodes
545 * The omap3isp_pipeline_pm_use() function must be called in the open() and
546 * close() handlers of video device nodes. It increments or decrements the use
547 * count of all subdev entities in the pipeline.
549 * To react to link management on powered pipelines, the link setup notification
550 * callback updates the use count of all entities in the source and sink sides
555 * isp_pipeline_pm_use_count - Count the number of users of a pipeline
556 * @entity: The entity
558 * Return the total number of users of all video device nodes in the pipeline.
560 static int isp_pipeline_pm_use_count(struct media_entity *entity)
562 struct media_entity_graph graph;
565 media_entity_graph_walk_start(&graph, entity);
567 while ((entity = media_entity_graph_walk_next(&graph))) {
568 if (media_entity_type(entity) == MEDIA_ENT_T_DEVNODE)
569 use += entity->use_count;
576 * isp_pipeline_pm_power_one - Apply power change to an entity
577 * @entity: The entity
578 * @change: Use count change
580 * Change the entity use count by @change. If the entity is a subdev update its
581 * power state by calling the core::s_power operation when the use count goes
582 * from 0 to != 0 or from != 0 to 0.
584 * Return 0 on success or a negative error code on failure.
586 static int isp_pipeline_pm_power_one(struct media_entity *entity, int change)
588 struct v4l2_subdev *subdev;
591 subdev = media_entity_type(entity) == MEDIA_ENT_T_V4L2_SUBDEV
592 ? media_entity_to_v4l2_subdev(entity) : NULL;
594 if (entity->use_count == 0 && change > 0 && subdev != NULL) {
595 ret = v4l2_subdev_call(subdev, core, s_power, 1);
596 if (ret < 0 && ret != -ENOIOCTLCMD)
600 entity->use_count += change;
601 WARN_ON(entity->use_count < 0);
603 if (entity->use_count == 0 && change < 0 && subdev != NULL)
604 v4l2_subdev_call(subdev, core, s_power, 0);
610 * isp_pipeline_pm_power - Apply power change to all entities in a pipeline
611 * @entity: The entity
612 * @change: Use count change
614 * Walk the pipeline to update the use count and the power state of all non-node
617 * Return 0 on success or a negative error code on failure.
619 static int isp_pipeline_pm_power(struct media_entity *entity, int change)
621 struct media_entity_graph graph;
622 struct media_entity *first = entity;
628 media_entity_graph_walk_start(&graph, entity);
630 while (!ret && (entity = media_entity_graph_walk_next(&graph)))
631 if (media_entity_type(entity) != MEDIA_ENT_T_DEVNODE)
632 ret = isp_pipeline_pm_power_one(entity, change);
637 media_entity_graph_walk_start(&graph, first);
639 while ((first = media_entity_graph_walk_next(&graph))
641 if (media_entity_type(first) != MEDIA_ENT_T_DEVNODE)
642 isp_pipeline_pm_power_one(first, -change);
648 * omap3isp_pipeline_pm_use - Update the use count of an entity
649 * @entity: The entity
650 * @use: Use (1) or stop using (0) the entity
652 * Update the use count of all entities in the pipeline and power entities on or
655 * Return 0 on success or a negative error code on failure. Powering entities
656 * off is assumed to never fail. No failure can occur when the use parameter is
659 int omap3isp_pipeline_pm_use(struct media_entity *entity, int use)
661 int change = use ? 1 : -1;
664 mutex_lock(&entity->parent->graph_mutex);
666 /* Apply use count to node. */
667 entity->use_count += change;
668 WARN_ON(entity->use_count < 0);
670 /* Apply power change to connected non-nodes. */
671 ret = isp_pipeline_pm_power(entity, change);
673 entity->use_count -= change;
675 mutex_unlock(&entity->parent->graph_mutex);
681 * isp_pipeline_link_notify - Link management notification callback
682 * @source: Pad at the start of the link
683 * @sink: Pad at the end of the link
684 * @flags: New link flags that will be applied
686 * React to link management on powered pipelines by updating the use count of
687 * all entities in the source and sink sides of the link. Entities are powered
688 * on or off accordingly.
690 * Return 0 on success or a negative error code on failure. Powering entities
691 * off is assumed to never fail. This function will not fail for disconnection
694 static int isp_pipeline_link_notify(struct media_pad *source,
695 struct media_pad *sink, u32 flags)
697 int source_use = isp_pipeline_pm_use_count(source->entity);
698 int sink_use = isp_pipeline_pm_use_count(sink->entity);
701 if (!(flags & MEDIA_LNK_FL_ENABLED)) {
702 /* Powering off entities is assumed to never fail. */
703 isp_pipeline_pm_power(source->entity, -sink_use);
704 isp_pipeline_pm_power(sink->entity, -source_use);
708 ret = isp_pipeline_pm_power(source->entity, sink_use);
712 ret = isp_pipeline_pm_power(sink->entity, source_use);
714 isp_pipeline_pm_power(source->entity, -sink_use);
719 /* -----------------------------------------------------------------------------
720 * Pipeline stream management
724 * isp_pipeline_enable - Enable streaming on a pipeline
725 * @pipe: ISP pipeline
726 * @mode: Stream mode (single shot or continuous)
728 * Walk the entities chain starting at the pipeline output video node and start
729 * all modules in the chain in the given mode.
731 * Return 0 if successful, or the return value of the failed video::s_stream
732 * operation otherwise.
734 static int isp_pipeline_enable(struct isp_pipeline *pipe,
735 enum isp_pipeline_stream_state mode)
737 struct isp_device *isp = pipe->output->isp;
738 struct media_entity *entity;
739 struct media_pad *pad;
740 struct v4l2_subdev *subdev;
744 spin_lock_irqsave(&pipe->lock, flags);
745 pipe->state &= ~(ISP_PIPELINE_IDLE_INPUT | ISP_PIPELINE_IDLE_OUTPUT);
746 spin_unlock_irqrestore(&pipe->lock, flags);
748 pipe->do_propagation = false;
750 entity = &pipe->output->video.entity;
752 pad = &entity->pads[0];
753 if (!(pad->flags & MEDIA_PAD_FL_SINK))
756 pad = media_entity_remote_source(pad);
758 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
761 entity = pad->entity;
762 subdev = media_entity_to_v4l2_subdev(entity);
764 ret = v4l2_subdev_call(subdev, video, s_stream, mode);
765 if (ret < 0 && ret != -ENOIOCTLCMD)
768 if (subdev == &isp->isp_ccdc.subdev) {
769 v4l2_subdev_call(&isp->isp_aewb.subdev, video,
771 v4l2_subdev_call(&isp->isp_af.subdev, video,
773 v4l2_subdev_call(&isp->isp_hist.subdev, video,
775 pipe->do_propagation = true;
779 /* Frame number propagation. In continuous streaming mode the number
780 * is incremented in the frame start ISR. In mem-to-mem mode
781 * singleshot is used and frame start IRQs are not available.
782 * Thus we have to increment the number here.
784 if (pipe->do_propagation && mode == ISP_PIPELINE_STREAM_SINGLESHOT)
785 atomic_inc(&pipe->frame_number);
790 static int isp_pipeline_wait_resizer(struct isp_device *isp)
792 return omap3isp_resizer_busy(&isp->isp_res);
795 static int isp_pipeline_wait_preview(struct isp_device *isp)
797 return omap3isp_preview_busy(&isp->isp_prev);
800 static int isp_pipeline_wait_ccdc(struct isp_device *isp)
802 return omap3isp_stat_busy(&isp->isp_af)
803 || omap3isp_stat_busy(&isp->isp_aewb)
804 || omap3isp_stat_busy(&isp->isp_hist)
805 || omap3isp_ccdc_busy(&isp->isp_ccdc);
808 #define ISP_STOP_TIMEOUT msecs_to_jiffies(1000)
810 static int isp_pipeline_wait(struct isp_device *isp,
811 int(*busy)(struct isp_device *isp))
813 unsigned long timeout = jiffies + ISP_STOP_TIMEOUT;
815 while (!time_after(jiffies, timeout)) {
824 * isp_pipeline_disable - Disable streaming on a pipeline
825 * @pipe: ISP pipeline
827 * Walk the entities chain starting at the pipeline output video node and stop
828 * all modules in the chain. Wait synchronously for the modules to be stopped if
831 * Return 0 if all modules have been properly stopped, or -ETIMEDOUT if a module
832 * can't be stopped (in which case a software reset of the ISP is probably
835 static int isp_pipeline_disable(struct isp_pipeline *pipe)
837 struct isp_device *isp = pipe->output->isp;
838 struct media_entity *entity;
839 struct media_pad *pad;
840 struct v4l2_subdev *subdev;
845 * We need to stop all the modules after CCDC first or they'll
846 * never stop since they may not get a full frame from CCDC.
848 entity = &pipe->output->video.entity;
850 pad = &entity->pads[0];
851 if (!(pad->flags & MEDIA_PAD_FL_SINK))
854 pad = media_entity_remote_source(pad);
856 media_entity_type(pad->entity) != MEDIA_ENT_T_V4L2_SUBDEV)
859 entity = pad->entity;
860 subdev = media_entity_to_v4l2_subdev(entity);
862 if (subdev == &isp->isp_ccdc.subdev) {
863 v4l2_subdev_call(&isp->isp_aewb.subdev,
865 v4l2_subdev_call(&isp->isp_af.subdev,
867 v4l2_subdev_call(&isp->isp_hist.subdev,
871 v4l2_subdev_call(subdev, video, s_stream, 0);
873 if (subdev == &isp->isp_res.subdev)
874 ret = isp_pipeline_wait(isp, isp_pipeline_wait_resizer);
875 else if (subdev == &isp->isp_prev.subdev)
876 ret = isp_pipeline_wait(isp, isp_pipeline_wait_preview);
877 else if (subdev == &isp->isp_ccdc.subdev)
878 ret = isp_pipeline_wait(isp, isp_pipeline_wait_ccdc);
883 dev_info(isp->dev, "Unable to stop %s\n", subdev->name);
884 failure = -ETIMEDOUT;
889 isp->needs_reset = true;
895 * omap3isp_pipeline_set_stream - Enable/disable streaming on a pipeline
896 * @pipe: ISP pipeline
897 * @state: Stream state (stopped, single shot or continuous)
899 * Set the pipeline to the given stream state. Pipelines can be started in
900 * single-shot or continuous mode.
902 * Return 0 if successful, or the return value of the failed video::s_stream
903 * operation otherwise. The pipeline state is not updated when the operation
904 * fails, except when stopping the pipeline.
906 int omap3isp_pipeline_set_stream(struct isp_pipeline *pipe,
907 enum isp_pipeline_stream_state state)
911 if (state == ISP_PIPELINE_STREAM_STOPPED)
912 ret = isp_pipeline_disable(pipe);
914 ret = isp_pipeline_enable(pipe, state);
916 if (ret == 0 || state == ISP_PIPELINE_STREAM_STOPPED)
917 pipe->stream_state = state;
923 * isp_pipeline_resume - Resume streaming on a pipeline
924 * @pipe: ISP pipeline
926 * Resume video output and input and re-enable pipeline.
928 static void isp_pipeline_resume(struct isp_pipeline *pipe)
930 int singleshot = pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT;
932 omap3isp_video_resume(pipe->output, !singleshot);
934 omap3isp_video_resume(pipe->input, 0);
935 isp_pipeline_enable(pipe, pipe->stream_state);
939 * isp_pipeline_suspend - Suspend streaming on a pipeline
940 * @pipe: ISP pipeline
944 static void isp_pipeline_suspend(struct isp_pipeline *pipe)
946 isp_pipeline_disable(pipe);
950 * isp_pipeline_is_last - Verify if entity has an enabled link to the output
952 * @me: ISP module's media entity
954 * Returns 1 if the entity has an enabled link to the output video node or 0
955 * otherwise. It's true only while pipeline can have no more than one output
958 static int isp_pipeline_is_last(struct media_entity *me)
960 struct isp_pipeline *pipe;
961 struct media_pad *pad;
965 pipe = to_isp_pipeline(me);
966 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED)
968 pad = media_entity_remote_source(&pipe->output->pad);
969 return pad->entity == me;
973 * isp_suspend_module_pipeline - Suspend pipeline to which belongs the module
974 * @me: ISP module's media entity
976 * Suspend the whole pipeline if module's entity has an enabled link to the
977 * output video node. It works only while pipeline can have no more than one
980 static void isp_suspend_module_pipeline(struct media_entity *me)
982 if (isp_pipeline_is_last(me))
983 isp_pipeline_suspend(to_isp_pipeline(me));
987 * isp_resume_module_pipeline - Resume pipeline to which belongs the module
988 * @me: ISP module's media entity
990 * Resume the whole pipeline if module's entity has an enabled link to the
991 * output video node. It works only while pipeline can have no more than one
994 static void isp_resume_module_pipeline(struct media_entity *me)
996 if (isp_pipeline_is_last(me))
997 isp_pipeline_resume(to_isp_pipeline(me));
1001 * isp_suspend_modules - Suspend ISP submodules.
1002 * @isp: OMAP3 ISP device
1004 * Returns 0 if suspend left in idle state all the submodules properly,
1005 * or returns 1 if a general Reset is required to suspend the submodules.
1007 static int isp_suspend_modules(struct isp_device *isp)
1009 unsigned long timeout;
1011 omap3isp_stat_suspend(&isp->isp_aewb);
1012 omap3isp_stat_suspend(&isp->isp_af);
1013 omap3isp_stat_suspend(&isp->isp_hist);
1014 isp_suspend_module_pipeline(&isp->isp_res.subdev.entity);
1015 isp_suspend_module_pipeline(&isp->isp_prev.subdev.entity);
1016 isp_suspend_module_pipeline(&isp->isp_ccdc.subdev.entity);
1017 isp_suspend_module_pipeline(&isp->isp_csi2a.subdev.entity);
1018 isp_suspend_module_pipeline(&isp->isp_ccp2.subdev.entity);
1020 timeout = jiffies + ISP_STOP_TIMEOUT;
1021 while (omap3isp_stat_busy(&isp->isp_af)
1022 || omap3isp_stat_busy(&isp->isp_aewb)
1023 || omap3isp_stat_busy(&isp->isp_hist)
1024 || omap3isp_preview_busy(&isp->isp_prev)
1025 || omap3isp_resizer_busy(&isp->isp_res)
1026 || omap3isp_ccdc_busy(&isp->isp_ccdc)) {
1027 if (time_after(jiffies, timeout)) {
1028 dev_info(isp->dev, "can't stop modules.\n");
1038 * isp_resume_modules - Resume ISP submodules.
1039 * @isp: OMAP3 ISP device
1041 static void isp_resume_modules(struct isp_device *isp)
1043 omap3isp_stat_resume(&isp->isp_aewb);
1044 omap3isp_stat_resume(&isp->isp_af);
1045 omap3isp_stat_resume(&isp->isp_hist);
1046 isp_resume_module_pipeline(&isp->isp_res.subdev.entity);
1047 isp_resume_module_pipeline(&isp->isp_prev.subdev.entity);
1048 isp_resume_module_pipeline(&isp->isp_ccdc.subdev.entity);
1049 isp_resume_module_pipeline(&isp->isp_csi2a.subdev.entity);
1050 isp_resume_module_pipeline(&isp->isp_ccp2.subdev.entity);
1054 * isp_reset - Reset ISP with a timeout wait for idle.
1055 * @isp: OMAP3 ISP device
1057 static int isp_reset(struct isp_device *isp)
1059 unsigned long timeout = 0;
1062 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG)
1063 | ISP_SYSCONFIG_SOFTRESET,
1064 OMAP3_ISP_IOMEM_MAIN, ISP_SYSCONFIG);
1065 while (!(isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN,
1066 ISP_SYSSTATUS) & 0x1)) {
1067 if (timeout++ > 10000) {
1068 dev_alert(isp->dev, "cannot reset ISP\n");
1078 * isp_save_context - Saves the values of the ISP module registers.
1079 * @isp: OMAP3 ISP device
1080 * @reg_list: Structure containing pairs of register address and value to
1084 isp_save_context(struct isp_device *isp, struct isp_reg *reg_list)
1086 struct isp_reg *next = reg_list;
1088 for (; next->reg != ISP_TOK_TERM; next++)
1089 next->val = isp_reg_readl(isp, next->mmio_range, next->reg);
1093 * isp_restore_context - Restores the values of the ISP module registers.
1094 * @isp: OMAP3 ISP device
1095 * @reg_list: Structure containing pairs of register address and value to
1099 isp_restore_context(struct isp_device *isp, struct isp_reg *reg_list)
1101 struct isp_reg *next = reg_list;
1103 for (; next->reg != ISP_TOK_TERM; next++)
1104 isp_reg_writel(isp, next->val, next->mmio_range, next->reg);
1108 * isp_save_ctx - Saves ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1109 * @isp: OMAP3 ISP device
1111 * Routine for saving the context of each module in the ISP.
1112 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1114 static void isp_save_ctx(struct isp_device *isp)
1116 isp_save_context(isp, isp_reg_list);
1118 omap_iommu_save_ctx(isp->iommu);
1122 * isp_restore_ctx - Restores ISP, CCDC, HIST, H3A, PREV, RESZ & MMU context.
1123 * @isp: OMAP3 ISP device
1125 * Routine for restoring the context of each module in the ISP.
1126 * CCDC, HIST, H3A, PREV, RESZ and MMU.
1128 static void isp_restore_ctx(struct isp_device *isp)
1130 isp_restore_context(isp, isp_reg_list);
1132 omap_iommu_restore_ctx(isp->iommu);
1133 omap3isp_ccdc_restore_context(isp);
1134 omap3isp_preview_restore_context(isp);
1137 /* -----------------------------------------------------------------------------
1138 * SBL resources management
1140 #define OMAP3_ISP_SBL_READ (OMAP3_ISP_SBL_CSI1_READ | \
1141 OMAP3_ISP_SBL_CCDC_LSC_READ | \
1142 OMAP3_ISP_SBL_PREVIEW_READ | \
1143 OMAP3_ISP_SBL_RESIZER_READ)
1144 #define OMAP3_ISP_SBL_WRITE (OMAP3_ISP_SBL_CSI1_WRITE | \
1145 OMAP3_ISP_SBL_CSI2A_WRITE | \
1146 OMAP3_ISP_SBL_CSI2C_WRITE | \
1147 OMAP3_ISP_SBL_CCDC_WRITE | \
1148 OMAP3_ISP_SBL_PREVIEW_WRITE)
1150 void omap3isp_sbl_enable(struct isp_device *isp, enum isp_sbl_resource res)
1154 isp->sbl_resources |= res;
1156 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ)
1157 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1159 if (isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ)
1160 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1162 if (isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE)
1163 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1165 if (isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE)
1166 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1168 if (isp->sbl_resources & OMAP3_ISP_SBL_WRITE)
1169 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1171 if (isp->sbl_resources & OMAP3_ISP_SBL_READ)
1172 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1174 isp_reg_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1177 void omap3isp_sbl_disable(struct isp_device *isp, enum isp_sbl_resource res)
1181 isp->sbl_resources &= ~res;
1183 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI1_READ))
1184 sbl |= ISPCTRL_SBL_SHARED_RPORTA;
1186 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CCDC_LSC_READ))
1187 sbl |= ISPCTRL_SBL_SHARED_RPORTB;
1189 if (!(isp->sbl_resources & OMAP3_ISP_SBL_CSI2C_WRITE))
1190 sbl |= ISPCTRL_SBL_SHARED_WPORTC;
1192 if (!(isp->sbl_resources & OMAP3_ISP_SBL_RESIZER_WRITE))
1193 sbl |= ISPCTRL_SBL_WR0_RAM_EN;
1195 if (!(isp->sbl_resources & OMAP3_ISP_SBL_WRITE))
1196 sbl |= ISPCTRL_SBL_WR1_RAM_EN;
1198 if (!(isp->sbl_resources & OMAP3_ISP_SBL_READ))
1199 sbl |= ISPCTRL_SBL_RD_RAM_EN;
1201 isp_reg_clr(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, sbl);
1205 * isp_module_sync_idle - Helper to sync module with its idle state
1206 * @me: ISP submodule's media entity
1207 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1208 * @stopping: flag which tells module wants to stop
1210 * This function checks if ISP submodule needs to wait for next interrupt. If
1211 * yes, makes the caller to sleep while waiting for such event.
1213 int omap3isp_module_sync_idle(struct media_entity *me, wait_queue_head_t *wait,
1216 struct isp_pipeline *pipe = to_isp_pipeline(me);
1218 if (pipe->stream_state == ISP_PIPELINE_STREAM_STOPPED ||
1219 (pipe->stream_state == ISP_PIPELINE_STREAM_SINGLESHOT &&
1220 !isp_pipeline_ready(pipe)))
1224 * atomic_set() doesn't include memory barrier on ARM platform for SMP
1225 * scenario. We'll call it here to avoid race conditions.
1227 atomic_set(stopping, 1);
1231 * If module is the last one, it's writing to memory. In this case,
1232 * it's necessary to check if the module is already paused due to
1233 * DMA queue underrun or if it has to wait for next interrupt to be
1235 * If it isn't the last one, the function won't sleep but *stopping
1236 * will still be set to warn next submodule caller's interrupt the
1237 * module wants to be idle.
1239 if (isp_pipeline_is_last(me)) {
1240 struct isp_video *video = pipe->output;
1241 unsigned long flags;
1242 spin_lock_irqsave(&video->queue->irqlock, flags);
1243 if (video->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_UNDERRUN) {
1244 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1245 atomic_set(stopping, 0);
1249 spin_unlock_irqrestore(&video->queue->irqlock, flags);
1250 if (!wait_event_timeout(*wait, !atomic_read(stopping),
1251 msecs_to_jiffies(1000))) {
1252 atomic_set(stopping, 0);
1262 * omap3isp_module_sync_is_stopped - Helper to verify if module was stopping
1263 * @wait: ISP submodule's wait queue for streamoff/interrupt synchronization
1264 * @stopping: flag which tells module wants to stop
1266 * This function checks if ISP submodule was stopping. In case of yes, it
1267 * notices the caller by setting stopping to 0 and waking up the wait queue.
1268 * Returns 1 if it was stopping or 0 otherwise.
1270 int omap3isp_module_sync_is_stopping(wait_queue_head_t *wait,
1273 if (atomic_cmpxchg(stopping, 1, 0)) {
1281 /* --------------------------------------------------------------------------
1285 #define ISPCTRL_CLKS_MASK (ISPCTRL_H3A_CLK_EN | \
1286 ISPCTRL_HIST_CLK_EN | \
1287 ISPCTRL_RSZ_CLK_EN | \
1288 (ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN) | \
1289 (ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN))
1291 static void __isp_subclk_update(struct isp_device *isp)
1295 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A)
1296 clk |= ISPCTRL_H3A_CLK_EN;
1298 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)
1299 clk |= ISPCTRL_HIST_CLK_EN;
1301 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_RESIZER)
1302 clk |= ISPCTRL_RSZ_CLK_EN;
1304 /* NOTE: For CCDC & Preview submodules, we need to affect internal
1307 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_CCDC)
1308 clk |= ISPCTRL_CCDC_CLK_EN | ISPCTRL_CCDC_RAM_EN;
1310 if (isp->subclk_resources & OMAP3_ISP_SUBCLK_PREVIEW)
1311 clk |= ISPCTRL_PREV_CLK_EN | ISPCTRL_PREV_RAM_EN;
1313 isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
1314 ISPCTRL_CLKS_MASK, clk);
1317 void omap3isp_subclk_enable(struct isp_device *isp,
1318 enum isp_subclk_resource res)
1320 isp->subclk_resources |= res;
1322 __isp_subclk_update(isp);
1325 void omap3isp_subclk_disable(struct isp_device *isp,
1326 enum isp_subclk_resource res)
1328 isp->subclk_resources &= ~res;
1330 __isp_subclk_update(isp);
1334 * isp_enable_clocks - Enable ISP clocks
1335 * @isp: OMAP3 ISP device
1337 * Return 0 if successful, or clk_enable return value if any of tthem fails.
1339 static int isp_enable_clocks(struct isp_device *isp)
1346 * cam_mclk clock chain:
1347 * dpll4 -> dpll4_m5 -> dpll4_m5x2 -> cam_mclk
1349 * In OMAP3630 dpll4_m5x2 != 2 x dpll4_m5 but both are
1350 * set to the same value. Hence the rate set for dpll4_m5
1351 * has to be twice of what is set on OMAP3430 to get
1352 * the required value for cam_mclk
1354 if (cpu_is_omap3630())
1359 r = clk_enable(isp->clock[ISP_CLK_CAM_ICK]);
1361 dev_err(isp->dev, "clk_enable cam_ick failed\n");
1362 goto out_clk_enable_ick;
1364 r = clk_set_rate(isp->clock[ISP_CLK_DPLL4_M5_CK],
1365 CM_CAM_MCLK_HZ/divisor);
1367 dev_err(isp->dev, "clk_set_rate for dpll4_m5_ck failed\n");
1368 goto out_clk_enable_mclk;
1370 r = clk_enable(isp->clock[ISP_CLK_CAM_MCLK]);
1372 dev_err(isp->dev, "clk_enable cam_mclk failed\n");
1373 goto out_clk_enable_mclk;
1375 rate = clk_get_rate(isp->clock[ISP_CLK_CAM_MCLK]);
1376 if (rate != CM_CAM_MCLK_HZ)
1377 dev_warn(isp->dev, "unexpected cam_mclk rate:\n"
1379 " actual : %ld\n", CM_CAM_MCLK_HZ, rate);
1380 r = clk_enable(isp->clock[ISP_CLK_CSI2_FCK]);
1382 dev_err(isp->dev, "clk_enable csi2_fck failed\n");
1383 goto out_clk_enable_csi2_fclk;
1387 out_clk_enable_csi2_fclk:
1388 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1389 out_clk_enable_mclk:
1390 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1396 * isp_disable_clocks - Disable ISP clocks
1397 * @isp: OMAP3 ISP device
1399 static void isp_disable_clocks(struct isp_device *isp)
1401 clk_disable(isp->clock[ISP_CLK_CAM_ICK]);
1402 clk_disable(isp->clock[ISP_CLK_CAM_MCLK]);
1403 clk_disable(isp->clock[ISP_CLK_CSI2_FCK]);
1406 static const char *isp_clocks[] = {
1414 static void isp_put_clocks(struct isp_device *isp)
1418 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1419 if (isp->clock[i]) {
1420 clk_put(isp->clock[i]);
1421 isp->clock[i] = NULL;
1426 static int isp_get_clocks(struct isp_device *isp)
1431 for (i = 0; i < ARRAY_SIZE(isp_clocks); ++i) {
1432 clk = clk_get(isp->dev, isp_clocks[i]);
1434 dev_err(isp->dev, "clk_get %s failed\n", isp_clocks[i]);
1435 isp_put_clocks(isp);
1436 return PTR_ERR(clk);
1439 isp->clock[i] = clk;
1446 * omap3isp_get - Acquire the ISP resource.
1448 * Initializes the clocks for the first acquire.
1450 * Increment the reference count on the ISP. If the first reference is taken,
1451 * enable clocks and power-up all submodules.
1453 * Return a pointer to the ISP device structure, or NULL if an error occurred.
1455 struct isp_device *omap3isp_get(struct isp_device *isp)
1457 struct isp_device *__isp = isp;
1462 mutex_lock(&isp->isp_mutex);
1463 if (isp->ref_count > 0)
1466 if (isp_enable_clocks(isp) < 0) {
1471 /* We don't want to restore context before saving it! */
1472 if (isp->has_context)
1473 isp_restore_ctx(isp);
1475 isp->has_context = 1;
1477 isp_enable_interrupts(isp);
1482 mutex_unlock(&isp->isp_mutex);
1488 * omap3isp_put - Release the ISP
1490 * Decrement the reference count on the ISP. If the last reference is released,
1491 * power-down all submodules, disable clocks and free temporary buffers.
1493 void omap3isp_put(struct isp_device *isp)
1498 mutex_lock(&isp->isp_mutex);
1499 BUG_ON(isp->ref_count == 0);
1500 if (--isp->ref_count == 0) {
1501 isp_disable_interrupts(isp);
1503 if (isp->needs_reset) {
1505 isp->needs_reset = false;
1507 isp_disable_clocks(isp);
1509 mutex_unlock(&isp->isp_mutex);
1512 /* --------------------------------------------------------------------------
1513 * Platform device driver
1517 * omap3isp_print_status - Prints the values of the ISP Control Module registers
1518 * @isp: OMAP3 ISP device
1520 #define ISP_PRINT_REGISTER(isp, name)\
1521 dev_dbg(isp->dev, "###ISP " #name "=0x%08x\n", \
1522 isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_##name))
1523 #define SBL_PRINT_REGISTER(isp, name)\
1524 dev_dbg(isp->dev, "###SBL " #name "=0x%08x\n", \
1525 isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_##name))
1527 void omap3isp_print_status(struct isp_device *isp)
1529 dev_dbg(isp->dev, "-------------ISP Register dump--------------\n");
1531 ISP_PRINT_REGISTER(isp, SYSCONFIG);
1532 ISP_PRINT_REGISTER(isp, SYSSTATUS);
1533 ISP_PRINT_REGISTER(isp, IRQ0ENABLE);
1534 ISP_PRINT_REGISTER(isp, IRQ0STATUS);
1535 ISP_PRINT_REGISTER(isp, TCTRL_GRESET_LENGTH);
1536 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_REPLAY);
1537 ISP_PRINT_REGISTER(isp, CTRL);
1538 ISP_PRINT_REGISTER(isp, TCTRL_CTRL);
1539 ISP_PRINT_REGISTER(isp, TCTRL_FRAME);
1540 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_DELAY);
1541 ISP_PRINT_REGISTER(isp, TCTRL_STRB_DELAY);
1542 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_DELAY);
1543 ISP_PRINT_REGISTER(isp, TCTRL_PSTRB_LENGTH);
1544 ISP_PRINT_REGISTER(isp, TCTRL_STRB_LENGTH);
1545 ISP_PRINT_REGISTER(isp, TCTRL_SHUT_LENGTH);
1547 SBL_PRINT_REGISTER(isp, PCR);
1548 SBL_PRINT_REGISTER(isp, SDR_REQ_EXP);
1550 dev_dbg(isp->dev, "--------------------------------------------\n");
1556 * Power management support.
1558 * As the ISP can't properly handle an input video stream interruption on a non
1559 * frame boundary, the ISP pipelines need to be stopped before sensors get
1560 * suspended. However, as suspending the sensors can require a running clock,
1561 * which can be provided by the ISP, the ISP can't be completely suspended
1562 * before the sensor.
1564 * To solve this problem power management support is split into prepare/complete
1565 * and suspend/resume operations. The pipelines are stopped in prepare() and the
1566 * ISP clocks get disabled in suspend(). Similarly, the clocks are reenabled in
1567 * resume(), and the the pipelines are restarted in complete().
1569 * TODO: PM dependencies between the ISP and sensors are not modeled explicitly
1572 static int isp_pm_prepare(struct device *dev)
1574 struct isp_device *isp = dev_get_drvdata(dev);
1577 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1579 if (isp->ref_count == 0)
1582 reset = isp_suspend_modules(isp);
1583 isp_disable_interrupts(isp);
1591 static int isp_pm_suspend(struct device *dev)
1593 struct isp_device *isp = dev_get_drvdata(dev);
1595 WARN_ON(mutex_is_locked(&isp->isp_mutex));
1598 isp_disable_clocks(isp);
1603 static int isp_pm_resume(struct device *dev)
1605 struct isp_device *isp = dev_get_drvdata(dev);
1607 if (isp->ref_count == 0)
1610 return isp_enable_clocks(isp);
1613 static void isp_pm_complete(struct device *dev)
1615 struct isp_device *isp = dev_get_drvdata(dev);
1617 if (isp->ref_count == 0)
1620 isp_restore_ctx(isp);
1621 isp_enable_interrupts(isp);
1622 isp_resume_modules(isp);
1627 #define isp_pm_prepare NULL
1628 #define isp_pm_suspend NULL
1629 #define isp_pm_resume NULL
1630 #define isp_pm_complete NULL
1632 #endif /* CONFIG_PM */
1634 static void isp_unregister_entities(struct isp_device *isp)
1636 omap3isp_csi2_unregister_entities(&isp->isp_csi2a);
1637 omap3isp_ccp2_unregister_entities(&isp->isp_ccp2);
1638 omap3isp_ccdc_unregister_entities(&isp->isp_ccdc);
1639 omap3isp_preview_unregister_entities(&isp->isp_prev);
1640 omap3isp_resizer_unregister_entities(&isp->isp_res);
1641 omap3isp_stat_unregister_entities(&isp->isp_aewb);
1642 omap3isp_stat_unregister_entities(&isp->isp_af);
1643 omap3isp_stat_unregister_entities(&isp->isp_hist);
1645 v4l2_device_unregister(&isp->v4l2_dev);
1646 media_device_unregister(&isp->media_dev);
1650 * isp_register_subdev_group - Register a group of subdevices
1651 * @isp: OMAP3 ISP device
1652 * @board_info: I2C subdevs board information array
1654 * Register all I2C subdevices in the board_info array. The array must be
1655 * terminated by a NULL entry, and the first entry must be the sensor.
1657 * Return a pointer to the sensor media entity if it has been successfully
1658 * registered, or NULL otherwise.
1660 static struct v4l2_subdev *
1661 isp_register_subdev_group(struct isp_device *isp,
1662 struct isp_subdev_i2c_board_info *board_info)
1664 struct v4l2_subdev *sensor = NULL;
1667 if (board_info->board_info == NULL)
1670 for (first = 1; board_info->board_info; ++board_info, first = 0) {
1671 struct v4l2_subdev *subdev;
1672 struct i2c_adapter *adapter;
1674 adapter = i2c_get_adapter(board_info->i2c_adapter_id);
1675 if (adapter == NULL) {
1676 printk(KERN_ERR "%s: Unable to get I2C adapter %d for "
1677 "device %s\n", __func__,
1678 board_info->i2c_adapter_id,
1679 board_info->board_info->type);
1683 subdev = v4l2_i2c_new_subdev_board(&isp->v4l2_dev, adapter,
1684 board_info->board_info, NULL);
1685 if (subdev == NULL) {
1686 printk(KERN_ERR "%s: Unable to register subdev %s\n",
1687 __func__, board_info->board_info->type);
1698 static int isp_register_entities(struct isp_device *isp)
1700 struct isp_platform_data *pdata = isp->pdata;
1701 struct isp_v4l2_subdevs_group *subdevs;
1704 isp->media_dev.dev = isp->dev;
1705 strlcpy(isp->media_dev.model, "TI OMAP3 ISP",
1706 sizeof(isp->media_dev.model));
1707 isp->media_dev.link_notify = isp_pipeline_link_notify;
1708 ret = media_device_register(&isp->media_dev);
1710 printk(KERN_ERR "%s: Media device registration failed (%d)\n",
1715 isp->v4l2_dev.mdev = &isp->media_dev;
1716 ret = v4l2_device_register(isp->dev, &isp->v4l2_dev);
1718 printk(KERN_ERR "%s: V4L2 device registration failed (%d)\n",
1723 /* Register internal entities */
1724 ret = omap3isp_ccp2_register_entities(&isp->isp_ccp2, &isp->v4l2_dev);
1728 ret = omap3isp_csi2_register_entities(&isp->isp_csi2a, &isp->v4l2_dev);
1732 ret = omap3isp_ccdc_register_entities(&isp->isp_ccdc, &isp->v4l2_dev);
1736 ret = omap3isp_preview_register_entities(&isp->isp_prev,
1741 ret = omap3isp_resizer_register_entities(&isp->isp_res, &isp->v4l2_dev);
1745 ret = omap3isp_stat_register_entities(&isp->isp_aewb, &isp->v4l2_dev);
1749 ret = omap3isp_stat_register_entities(&isp->isp_af, &isp->v4l2_dev);
1753 ret = omap3isp_stat_register_entities(&isp->isp_hist, &isp->v4l2_dev);
1757 /* Register external entities */
1758 for (subdevs = pdata->subdevs; subdevs && subdevs->subdevs; ++subdevs) {
1759 struct v4l2_subdev *sensor;
1760 struct media_entity *input;
1764 sensor = isp_register_subdev_group(isp, subdevs->subdevs);
1768 sensor->host_priv = subdevs;
1770 /* Connect the sensor to the correct interface module. Parallel
1771 * sensors are connected directly to the CCDC, while serial
1772 * sensors are connected to the CSI2a, CCP2b or CSI2c receiver
1773 * through CSIPHY1 or CSIPHY2.
1775 switch (subdevs->interface) {
1776 case ISP_INTERFACE_PARALLEL:
1777 input = &isp->isp_ccdc.subdev.entity;
1778 pad = CCDC_PAD_SINK;
1782 case ISP_INTERFACE_CSI2A_PHY2:
1783 input = &isp->isp_csi2a.subdev.entity;
1784 pad = CSI2_PAD_SINK;
1785 flags = MEDIA_LNK_FL_IMMUTABLE
1786 | MEDIA_LNK_FL_ENABLED;
1789 case ISP_INTERFACE_CCP2B_PHY1:
1790 case ISP_INTERFACE_CCP2B_PHY2:
1791 input = &isp->isp_ccp2.subdev.entity;
1792 pad = CCP2_PAD_SINK;
1796 case ISP_INTERFACE_CSI2C_PHY1:
1797 input = &isp->isp_csi2c.subdev.entity;
1798 pad = CSI2_PAD_SINK;
1799 flags = MEDIA_LNK_FL_IMMUTABLE
1800 | MEDIA_LNK_FL_ENABLED;
1804 printk(KERN_ERR "%s: invalid interface type %u\n",
1805 __func__, subdevs->interface);
1810 ret = media_entity_create_link(&sensor->entity, 0, input, pad,
1816 ret = v4l2_device_register_subdev_nodes(&isp->v4l2_dev);
1820 isp_unregister_entities(isp);
1825 static void isp_cleanup_modules(struct isp_device *isp)
1827 omap3isp_h3a_aewb_cleanup(isp);
1828 omap3isp_h3a_af_cleanup(isp);
1829 omap3isp_hist_cleanup(isp);
1830 omap3isp_resizer_cleanup(isp);
1831 omap3isp_preview_cleanup(isp);
1832 omap3isp_ccdc_cleanup(isp);
1833 omap3isp_ccp2_cleanup(isp);
1834 omap3isp_csi2_cleanup(isp);
1837 static int isp_initialize_modules(struct isp_device *isp)
1841 ret = omap3isp_csiphy_init(isp);
1843 dev_err(isp->dev, "CSI PHY initialization failed\n");
1847 ret = omap3isp_csi2_init(isp);
1849 dev_err(isp->dev, "CSI2 initialization failed\n");
1853 ret = omap3isp_ccp2_init(isp);
1855 dev_err(isp->dev, "CCP2 initialization failed\n");
1859 ret = omap3isp_ccdc_init(isp);
1861 dev_err(isp->dev, "CCDC initialization failed\n");
1865 ret = omap3isp_preview_init(isp);
1867 dev_err(isp->dev, "Preview initialization failed\n");
1871 ret = omap3isp_resizer_init(isp);
1873 dev_err(isp->dev, "Resizer initialization failed\n");
1877 ret = omap3isp_hist_init(isp);
1879 dev_err(isp->dev, "Histogram initialization failed\n");
1883 ret = omap3isp_h3a_aewb_init(isp);
1885 dev_err(isp->dev, "H3A AEWB initialization failed\n");
1886 goto error_h3a_aewb;
1889 ret = omap3isp_h3a_af_init(isp);
1891 dev_err(isp->dev, "H3A AF initialization failed\n");
1895 /* Connect the submodules. */
1896 ret = media_entity_create_link(
1897 &isp->isp_csi2a.subdev.entity, CSI2_PAD_SOURCE,
1898 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1902 ret = media_entity_create_link(
1903 &isp->isp_ccp2.subdev.entity, CCP2_PAD_SOURCE,
1904 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SINK, 0);
1908 ret = media_entity_create_link(
1909 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1910 &isp->isp_prev.subdev.entity, PREV_PAD_SINK, 0);
1914 ret = media_entity_create_link(
1915 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_OF,
1916 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1920 ret = media_entity_create_link(
1921 &isp->isp_prev.subdev.entity, PREV_PAD_SOURCE,
1922 &isp->isp_res.subdev.entity, RESZ_PAD_SINK, 0);
1926 ret = media_entity_create_link(
1927 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1928 &isp->isp_aewb.subdev.entity, 0,
1929 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1933 ret = media_entity_create_link(
1934 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1935 &isp->isp_af.subdev.entity, 0,
1936 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1940 ret = media_entity_create_link(
1941 &isp->isp_ccdc.subdev.entity, CCDC_PAD_SOURCE_VP,
1942 &isp->isp_hist.subdev.entity, 0,
1943 MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE);
1950 omap3isp_h3a_af_cleanup(isp);
1952 omap3isp_h3a_aewb_cleanup(isp);
1954 omap3isp_hist_cleanup(isp);
1956 omap3isp_resizer_cleanup(isp);
1958 omap3isp_preview_cleanup(isp);
1960 omap3isp_ccdc_cleanup(isp);
1962 omap3isp_ccp2_cleanup(isp);
1964 omap3isp_csi2_cleanup(isp);
1971 * isp_remove - Remove ISP platform device
1972 * @pdev: Pointer to ISP platform device
1976 static int isp_remove(struct platform_device *pdev)
1978 struct isp_device *isp = platform_get_drvdata(pdev);
1981 isp_unregister_entities(isp);
1982 isp_cleanup_modules(isp);
1985 iommu_detach_device(isp->domain, isp->iommu_dev);
1986 iommu_domain_free(isp->domain);
1989 free_irq(isp->irq_num, isp);
1990 isp_put_clocks(isp);
1992 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
1993 if (isp->mmio_base[i]) {
1994 iounmap(isp->mmio_base[i]);
1995 isp->mmio_base[i] = NULL;
1998 if (isp->mmio_base_phys[i]) {
1999 release_mem_region(isp->mmio_base_phys[i],
2001 isp->mmio_base_phys[i] = 0;
2005 regulator_put(isp->isp_csiphy1.vdd);
2006 regulator_put(isp->isp_csiphy2.vdd);
2012 static int isp_map_mem_resource(struct platform_device *pdev,
2013 struct isp_device *isp,
2014 enum isp_mem_resources res)
2016 struct resource *mem;
2018 /* request the mem region for the camera registers */
2020 mem = platform_get_resource(pdev, IORESOURCE_MEM, res);
2022 dev_err(isp->dev, "no mem resource?\n");
2026 if (!request_mem_region(mem->start, resource_size(mem), pdev->name)) {
2028 "cannot reserve camera register I/O region\n");
2031 isp->mmio_base_phys[res] = mem->start;
2032 isp->mmio_size[res] = resource_size(mem);
2034 /* map the region */
2035 isp->mmio_base[res] = ioremap_nocache(isp->mmio_base_phys[res],
2036 isp->mmio_size[res]);
2037 if (!isp->mmio_base[res]) {
2038 dev_err(isp->dev, "cannot map camera register I/O region\n");
2046 * isp_probe - Probe ISP platform device
2047 * @pdev: Pointer to ISP platform device
2049 * Returns 0 if successful,
2050 * -ENOMEM if no memory available,
2051 * -ENODEV if no platform device resources found
2052 * or no space for remapping registers,
2053 * -EINVAL if couldn't install ISR,
2054 * or clk_get return error value.
2056 static int isp_probe(struct platform_device *pdev)
2058 struct isp_platform_data *pdata = pdev->dev.platform_data;
2059 struct isp_device *isp;
2066 isp = kzalloc(sizeof(*isp), GFP_KERNEL);
2068 dev_err(&pdev->dev, "could not allocate memory\n");
2072 isp->autoidle = autoidle;
2073 isp->platform_cb.set_xclk = isp_set_xclk;
2074 isp->platform_cb.set_pixel_clock = isp_set_pixel_clock;
2076 mutex_init(&isp->isp_mutex);
2077 spin_lock_init(&isp->stat_lock);
2079 isp->dev = &pdev->dev;
2083 isp->raw_dmamask = DMA_BIT_MASK(32);
2084 isp->dev->dma_mask = &isp->raw_dmamask;
2085 isp->dev->coherent_dma_mask = DMA_BIT_MASK(32);
2087 platform_set_drvdata(pdev, isp);
2090 isp->isp_csiphy1.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY1");
2091 isp->isp_csiphy2.vdd = regulator_get(&pdev->dev, "VDD_CSIPHY2");
2094 ret = isp_map_mem_resource(pdev, isp, OMAP3_ISP_IOMEM_MAIN);
2098 ret = isp_get_clocks(isp);
2102 if (omap3isp_get(isp) == NULL)
2105 ret = isp_reset(isp);
2109 /* Memory resources */
2110 isp->revision = isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_REVISION);
2111 dev_info(isp->dev, "Revision %d.%d found\n",
2112 (isp->revision & 0xf0) >> 4, isp->revision & 0x0f);
2114 for (m = 0; m < ARRAY_SIZE(isp_res_maps); m++)
2115 if (isp->revision == isp_res_maps[m].isp_rev)
2118 if (m == ARRAY_SIZE(isp_res_maps)) {
2119 dev_err(isp->dev, "No resource map found for ISP rev %d.%d\n",
2120 (isp->revision & 0xf0) >> 4, isp->revision & 0xf);
2125 for (i = 1; i < OMAP3_ISP_IOMEM_LAST; i++) {
2126 if (isp_res_maps[m].map & 1 << i) {
2127 ret = isp_map_mem_resource(pdev, isp, i);
2134 isp->iommu_dev = omap_find_iommu_device("isp");
2135 if (!isp->iommu_dev) {
2136 dev_err(isp->dev, "omap_find_iommu_device failed\n");
2141 /* to be removed once iommu migration is complete */
2142 isp->iommu = to_iommu(isp->iommu_dev);
2144 isp->domain = iommu_domain_alloc(pdev->dev.bus);
2146 dev_err(isp->dev, "can't alloc iommu domain\n");
2151 ret = iommu_attach_device(isp->domain, isp->iommu_dev);
2153 dev_err(&pdev->dev, "can't attach iommu device: %d\n", ret);
2158 isp->irq_num = platform_get_irq(pdev, 0);
2159 if (isp->irq_num <= 0) {
2160 dev_err(isp->dev, "No IRQ resource\n");
2165 if (request_irq(isp->irq_num, isp_isr, IRQF_SHARED, "OMAP3 ISP", isp)) {
2166 dev_err(isp->dev, "Unable to request IRQ\n");
2172 ret = isp_initialize_modules(isp);
2176 ret = isp_register_entities(isp);
2180 isp_power_settings(isp, 1);
2186 isp_cleanup_modules(isp);
2188 free_irq(isp->irq_num, isp);
2190 iommu_detach_device(isp->domain, isp->iommu_dev);
2192 iommu_domain_free(isp->domain);
2196 isp_put_clocks(isp);
2198 for (i = 0; i < OMAP3_ISP_IOMEM_LAST; i++) {
2199 if (isp->mmio_base[i]) {
2200 iounmap(isp->mmio_base[i]);
2201 isp->mmio_base[i] = NULL;
2204 if (isp->mmio_base_phys[i]) {
2205 release_mem_region(isp->mmio_base_phys[i],
2207 isp->mmio_base_phys[i] = 0;
2210 regulator_put(isp->isp_csiphy2.vdd);
2211 regulator_put(isp->isp_csiphy1.vdd);
2212 platform_set_drvdata(pdev, NULL);
2218 static const struct dev_pm_ops omap3isp_pm_ops = {
2219 .prepare = isp_pm_prepare,
2220 .suspend = isp_pm_suspend,
2221 .resume = isp_pm_resume,
2222 .complete = isp_pm_complete,
2225 static struct platform_device_id omap3isp_id_table[] = {
2229 MODULE_DEVICE_TABLE(platform, omap3isp_id_table);
2231 static struct platform_driver omap3isp_driver = {
2233 .remove = isp_remove,
2234 .id_table = omap3isp_id_table,
2236 .owner = THIS_MODULE,
2238 .pm = &omap3isp_pm_ops,
2243 * isp_init - ISP module initialization.
2245 static int __init isp_init(void)
2247 return platform_driver_register(&omap3isp_driver);
2251 * isp_cleanup - ISP module cleanup.
2253 static void __exit isp_cleanup(void)
2255 platform_driver_unregister(&omap3isp_driver);
2258 module_init(isp_init);
2259 module_exit(isp_cleanup);
2261 MODULE_AUTHOR("Nokia Corporation");
2262 MODULE_DESCRIPTION("TI OMAP3 ISP driver");
2263 MODULE_LICENSE("GPL");
2264 MODULE_VERSION(ISP_VIDEO_DRIVER_VERSION);