2 * Driver for MT9M111/MT9M112/MT9M131 CMOS Image Sensor from Micron/Aptina
4 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
10 #include <linux/videodev2.h>
11 #include <linux/slab.h>
12 #include <linux/i2c.h>
13 #include <linux/log2.h>
14 #include <linux/gpio.h>
15 #include <linux/delay.h>
17 #include <media/soc_camera.h>
18 #include <media/soc_mediabus.h>
19 #include <media/v4l2-common.h>
20 #include <media/v4l2-chip-ident.h>
23 * MT9M111, MT9M112 and MT9M131:
24 * i2c address is 0x48 or 0x5d (depending on SADDR pin)
25 * The platform has to define i2c_board_info and call i2c_register_board_info()
29 * Sensor core register addresses (0x000..0x0ff)
31 #define MT9M111_CHIP_VERSION 0x000
32 #define MT9M111_ROW_START 0x001
33 #define MT9M111_COLUMN_START 0x002
34 #define MT9M111_WINDOW_HEIGHT 0x003
35 #define MT9M111_WINDOW_WIDTH 0x004
36 #define MT9M111_HORIZONTAL_BLANKING_B 0x005
37 #define MT9M111_VERTICAL_BLANKING_B 0x006
38 #define MT9M111_HORIZONTAL_BLANKING_A 0x007
39 #define MT9M111_VERTICAL_BLANKING_A 0x008
40 #define MT9M111_SHUTTER_WIDTH 0x009
41 #define MT9M111_ROW_SPEED 0x00a
42 #define MT9M111_EXTRA_DELAY 0x00b
43 #define MT9M111_SHUTTER_DELAY 0x00c
44 #define MT9M111_RESET 0x00d
45 #define MT9M111_READ_MODE_B 0x020
46 #define MT9M111_READ_MODE_A 0x021
47 #define MT9M111_FLASH_CONTROL 0x023
48 #define MT9M111_GREEN1_GAIN 0x02b
49 #define MT9M111_BLUE_GAIN 0x02c
50 #define MT9M111_RED_GAIN 0x02d
51 #define MT9M111_GREEN2_GAIN 0x02e
52 #define MT9M111_GLOBAL_GAIN 0x02f
53 #define MT9M111_CONTEXT_CONTROL 0x0c8
54 #define MT9M111_PAGE_MAP 0x0f0
55 #define MT9M111_BYTE_WISE_ADDR 0x0f1
57 #define MT9M111_RESET_SYNC_CHANGES (1 << 15)
58 #define MT9M111_RESET_RESTART_BAD_FRAME (1 << 9)
59 #define MT9M111_RESET_SHOW_BAD_FRAMES (1 << 8)
60 #define MT9M111_RESET_RESET_SOC (1 << 5)
61 #define MT9M111_RESET_OUTPUT_DISABLE (1 << 4)
62 #define MT9M111_RESET_CHIP_ENABLE (1 << 3)
63 #define MT9M111_RESET_ANALOG_STANDBY (1 << 2)
64 #define MT9M111_RESET_RESTART_FRAME (1 << 1)
65 #define MT9M111_RESET_RESET_MODE (1 << 0)
67 #define MT9M111_RM_FULL_POWER_RD (0 << 10)
68 #define MT9M111_RM_LOW_POWER_RD (1 << 10)
69 #define MT9M111_RM_COL_SKIP_4X (1 << 5)
70 #define MT9M111_RM_ROW_SKIP_4X (1 << 4)
71 #define MT9M111_RM_COL_SKIP_2X (1 << 3)
72 #define MT9M111_RM_ROW_SKIP_2X (1 << 2)
73 #define MT9M111_RMB_MIRROR_COLS (1 << 1)
74 #define MT9M111_RMB_MIRROR_ROWS (1 << 0)
75 #define MT9M111_CTXT_CTRL_RESTART (1 << 15)
76 #define MT9M111_CTXT_CTRL_DEFECTCOR_B (1 << 12)
77 #define MT9M111_CTXT_CTRL_RESIZE_B (1 << 10)
78 #define MT9M111_CTXT_CTRL_CTRL2_B (1 << 9)
79 #define MT9M111_CTXT_CTRL_GAMMA_B (1 << 8)
80 #define MT9M111_CTXT_CTRL_XENON_EN (1 << 7)
81 #define MT9M111_CTXT_CTRL_READ_MODE_B (1 << 3)
82 #define MT9M111_CTXT_CTRL_LED_FLASH_EN (1 << 2)
83 #define MT9M111_CTXT_CTRL_VBLANK_SEL_B (1 << 1)
84 #define MT9M111_CTXT_CTRL_HBLANK_SEL_B (1 << 0)
87 * Colorpipe register addresses (0x100..0x1ff)
89 #define MT9M111_OPER_MODE_CTRL 0x106
90 #define MT9M111_OUTPUT_FORMAT_CTRL 0x108
91 #define MT9M111_REDUCER_XZOOM_B 0x1a0
92 #define MT9M111_REDUCER_XSIZE_B 0x1a1
93 #define MT9M111_REDUCER_YZOOM_B 0x1a3
94 #define MT9M111_REDUCER_YSIZE_B 0x1a4
95 #define MT9M111_REDUCER_XZOOM_A 0x1a6
96 #define MT9M111_REDUCER_XSIZE_A 0x1a7
97 #define MT9M111_REDUCER_YZOOM_A 0x1a9
98 #define MT9M111_REDUCER_YSIZE_A 0x1aa
100 #define MT9M111_OUTPUT_FORMAT_CTRL2_A 0x13a
101 #define MT9M111_OUTPUT_FORMAT_CTRL2_B 0x19b
103 #define MT9M111_OPMODE_AUTOEXPO_EN (1 << 14)
104 #define MT9M111_OPMODE_AUTOWHITEBAL_EN (1 << 1)
105 #define MT9M111_OUTFMT_FLIP_BAYER_COL (1 << 9)
106 #define MT9M111_OUTFMT_FLIP_BAYER_ROW (1 << 8)
107 #define MT9M111_OUTFMT_PROCESSED_BAYER (1 << 14)
108 #define MT9M111_OUTFMT_BYPASS_IFP (1 << 10)
109 #define MT9M111_OUTFMT_INV_PIX_CLOCK (1 << 9)
110 #define MT9M111_OUTFMT_RGB (1 << 8)
111 #define MT9M111_OUTFMT_RGB565 (0 << 6)
112 #define MT9M111_OUTFMT_RGB555 (1 << 6)
113 #define MT9M111_OUTFMT_RGB444x (2 << 6)
114 #define MT9M111_OUTFMT_RGBx444 (3 << 6)
115 #define MT9M111_OUTFMT_TST_RAMP_OFF (0 << 4)
116 #define MT9M111_OUTFMT_TST_RAMP_COL (1 << 4)
117 #define MT9M111_OUTFMT_TST_RAMP_ROW (2 << 4)
118 #define MT9M111_OUTFMT_TST_RAMP_FRAME (3 << 4)
119 #define MT9M111_OUTFMT_SHIFT_3_UP (1 << 3)
120 #define MT9M111_OUTFMT_AVG_CHROMA (1 << 2)
121 #define MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN (1 << 1)
122 #define MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B (1 << 0)
125 * Camera control register addresses (0x200..0x2ff not implemented)
128 #define reg_read(reg) mt9m111_reg_read(client, MT9M111_##reg)
129 #define reg_write(reg, val) mt9m111_reg_write(client, MT9M111_##reg, (val))
130 #define reg_set(reg, val) mt9m111_reg_set(client, MT9M111_##reg, (val))
131 #define reg_clear(reg, val) mt9m111_reg_clear(client, MT9M111_##reg, (val))
132 #define reg_mask(reg, val, mask) mt9m111_reg_mask(client, MT9M111_##reg, \
135 #define MT9M111_MIN_DARK_ROWS 8
136 #define MT9M111_MIN_DARK_COLS 26
137 #define MT9M111_MAX_HEIGHT 1024
138 #define MT9M111_MAX_WIDTH 1280
140 /* MT9M111 has only one fixed colorspace per pixelcode */
141 struct mt9m111_datafmt {
142 enum v4l2_mbus_pixelcode code;
143 enum v4l2_colorspace colorspace;
146 /* Find a data format by a pixel code in an array */
147 static const struct mt9m111_datafmt *mt9m111_find_datafmt(
148 enum v4l2_mbus_pixelcode code, const struct mt9m111_datafmt *fmt,
152 for (i = 0; i < n; i++)
153 if (fmt[i].code == code)
159 static const struct mt9m111_datafmt mt9m111_colour_fmts[] = {
160 {V4L2_MBUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
161 {V4L2_MBUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
162 {V4L2_MBUS_FMT_UYVY8_2X8, V4L2_COLORSPACE_JPEG},
163 {V4L2_MBUS_FMT_VYUY8_2X8, V4L2_COLORSPACE_JPEG},
164 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
165 {V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
166 {V4L2_MBUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
167 {V4L2_MBUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
168 {V4L2_MBUS_FMT_BGR565_2X8_LE, V4L2_COLORSPACE_SRGB},
169 {V4L2_MBUS_FMT_BGR565_2X8_BE, V4L2_COLORSPACE_SRGB},
170 {V4L2_MBUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB},
171 {V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
174 enum mt9m111_context {
180 struct v4l2_subdev subdev;
181 int model; /* V4L2_IDENT_MT9M111 or V4L2_IDENT_MT9M112 code
182 * from v4l2-chip-ident.h */
183 enum mt9m111_context context;
184 struct v4l2_rect rect;
185 struct mutex power_lock; /* lock to protect power_count */
187 const struct mt9m111_datafmt *fmt;
188 int lastpage; /* PageMap cache value */
190 unsigned char autoexposure;
191 unsigned char datawidth;
192 unsigned int powered:1;
193 unsigned int hflip:1;
194 unsigned int vflip:1;
195 unsigned int autowhitebalance:1;
198 static struct mt9m111 *to_mt9m111(const struct i2c_client *client)
200 return container_of(i2c_get_clientdata(client), struct mt9m111, subdev);
203 static int reg_page_map_set(struct i2c_client *client, const u16 reg)
207 struct mt9m111 *mt9m111 = to_mt9m111(client);
210 if (page == mt9m111->lastpage)
215 ret = i2c_smbus_write_word_data(client, MT9M111_PAGE_MAP, swab16(page));
217 mt9m111->lastpage = page;
221 static int mt9m111_reg_read(struct i2c_client *client, const u16 reg)
225 ret = reg_page_map_set(client, reg);
227 ret = swab16(i2c_smbus_read_word_data(client, reg & 0xff));
229 dev_dbg(&client->dev, "read reg.%03x -> %04x\n", reg, ret);
233 static int mt9m111_reg_write(struct i2c_client *client, const u16 reg,
238 ret = reg_page_map_set(client, reg);
240 ret = i2c_smbus_write_word_data(client, reg & 0xff,
242 dev_dbg(&client->dev, "write reg.%03x = %04x -> %d\n", reg, data, ret);
246 static int mt9m111_reg_set(struct i2c_client *client, const u16 reg,
251 ret = mt9m111_reg_read(client, reg);
253 ret = mt9m111_reg_write(client, reg, ret | data);
257 static int mt9m111_reg_clear(struct i2c_client *client, const u16 reg,
262 ret = mt9m111_reg_read(client, reg);
264 ret = mt9m111_reg_write(client, reg, ret & ~data);
268 static int mt9m111_reg_mask(struct i2c_client *client, const u16 reg,
269 const u16 data, const u16 mask)
273 ret = mt9m111_reg_read(client, reg);
275 ret = mt9m111_reg_write(client, reg, (ret & ~mask) | data);
279 static int mt9m111_set_context(struct mt9m111 *mt9m111,
280 enum mt9m111_context ctxt)
282 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
283 int valB = MT9M111_CTXT_CTRL_RESTART | MT9M111_CTXT_CTRL_DEFECTCOR_B
284 | MT9M111_CTXT_CTRL_RESIZE_B | MT9M111_CTXT_CTRL_CTRL2_B
285 | MT9M111_CTXT_CTRL_GAMMA_B | MT9M111_CTXT_CTRL_READ_MODE_B
286 | MT9M111_CTXT_CTRL_VBLANK_SEL_B
287 | MT9M111_CTXT_CTRL_HBLANK_SEL_B;
288 int valA = MT9M111_CTXT_CTRL_RESTART;
290 if (ctxt == HIGHPOWER)
291 return reg_write(CONTEXT_CONTROL, valB);
293 return reg_write(CONTEXT_CONTROL, valA);
296 static int mt9m111_setup_rect(struct mt9m111 *mt9m111,
297 struct v4l2_rect *rect)
299 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
300 int ret, is_raw_format;
301 int width = rect->width;
302 int height = rect->height;
304 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
305 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE)
310 ret = reg_write(COLUMN_START, rect->left);
312 ret = reg_write(ROW_START, rect->top);
316 ret = reg_write(WINDOW_WIDTH, width);
318 ret = reg_write(WINDOW_HEIGHT, height);
321 ret = reg_write(REDUCER_XZOOM_B, MT9M111_MAX_WIDTH);
323 ret = reg_write(REDUCER_YZOOM_B, MT9M111_MAX_HEIGHT);
325 ret = reg_write(REDUCER_XSIZE_B, width);
327 ret = reg_write(REDUCER_YSIZE_B, height);
329 ret = reg_write(REDUCER_XZOOM_A, MT9M111_MAX_WIDTH);
331 ret = reg_write(REDUCER_YZOOM_A, MT9M111_MAX_HEIGHT);
333 ret = reg_write(REDUCER_XSIZE_A, width);
335 ret = reg_write(REDUCER_YSIZE_A, height);
341 static int mt9m111_enable(struct mt9m111 *mt9m111)
343 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
346 ret = reg_set(RESET, MT9M111_RESET_CHIP_ENABLE);
348 mt9m111->powered = 1;
352 static int mt9m111_reset(struct mt9m111 *mt9m111)
354 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
357 ret = reg_set(RESET, MT9M111_RESET_RESET_MODE);
359 ret = reg_set(RESET, MT9M111_RESET_RESET_SOC);
361 ret = reg_clear(RESET, MT9M111_RESET_RESET_MODE
362 | MT9M111_RESET_RESET_SOC);
367 static int mt9m111_make_rect(struct mt9m111 *mt9m111,
368 struct v4l2_rect *rect)
370 if (mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
371 mt9m111->fmt->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE) {
372 /* Bayer format - even size lengths */
373 rect->width = ALIGN(rect->width, 2);
374 rect->height = ALIGN(rect->height, 2);
375 /* Let the user play with the starting pixel */
378 /* FIXME: the datasheet doesn't specify minimum sizes */
379 soc_camera_limit_side(&rect->left, &rect->width,
380 MT9M111_MIN_DARK_COLS, 2, MT9M111_MAX_WIDTH);
382 soc_camera_limit_side(&rect->top, &rect->height,
383 MT9M111_MIN_DARK_ROWS, 2, MT9M111_MAX_HEIGHT);
385 return mt9m111_setup_rect(mt9m111, rect);
388 static int mt9m111_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
390 struct v4l2_rect rect = a->c;
391 struct i2c_client *client = v4l2_get_subdevdata(sd);
392 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
395 dev_dbg(&client->dev, "%s left=%d, top=%d, width=%d, height=%d\n",
396 __func__, rect.left, rect.top, rect.width, rect.height);
398 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
401 ret = mt9m111_make_rect(mt9m111, &rect);
403 mt9m111->rect = rect;
407 static int mt9m111_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
409 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
411 a->c = mt9m111->rect;
412 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
417 static int mt9m111_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
419 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
422 a->bounds.left = MT9M111_MIN_DARK_COLS;
423 a->bounds.top = MT9M111_MIN_DARK_ROWS;
424 a->bounds.width = MT9M111_MAX_WIDTH;
425 a->bounds.height = MT9M111_MAX_HEIGHT;
426 a->defrect = a->bounds;
427 a->pixelaspect.numerator = 1;
428 a->pixelaspect.denominator = 1;
433 static int mt9m111_g_fmt(struct v4l2_subdev *sd,
434 struct v4l2_mbus_framefmt *mf)
436 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
438 mf->width = mt9m111->rect.width;
439 mf->height = mt9m111->rect.height;
440 mf->code = mt9m111->fmt->code;
441 mf->colorspace = mt9m111->fmt->colorspace;
442 mf->field = V4L2_FIELD_NONE;
447 static int mt9m111_set_pixfmt(struct mt9m111 *mt9m111,
448 enum v4l2_mbus_pixelcode code)
450 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
451 u16 data_outfmt2, mask_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
452 MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB |
453 MT9M111_OUTFMT_RGB565 | MT9M111_OUTFMT_RGB555 |
454 MT9M111_OUTFMT_RGB444x | MT9M111_OUTFMT_RGBx444 |
455 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
456 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
460 case V4L2_MBUS_FMT_SBGGR8_1X8:
461 data_outfmt2 = MT9M111_OUTFMT_PROCESSED_BAYER |
464 case V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE:
465 data_outfmt2 = MT9M111_OUTFMT_BYPASS_IFP | MT9M111_OUTFMT_RGB;
467 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE:
468 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555 |
469 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
471 case V4L2_MBUS_FMT_RGB555_2X8_PADHI_BE:
472 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB555;
474 case V4L2_MBUS_FMT_RGB565_2X8_LE:
475 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
476 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
478 case V4L2_MBUS_FMT_RGB565_2X8_BE:
479 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565;
481 case V4L2_MBUS_FMT_BGR565_2X8_BE:
482 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
483 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
485 case V4L2_MBUS_FMT_BGR565_2X8_LE:
486 data_outfmt2 = MT9M111_OUTFMT_RGB | MT9M111_OUTFMT_RGB565 |
487 MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
488 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
490 case V4L2_MBUS_FMT_UYVY8_2X8:
493 case V4L2_MBUS_FMT_VYUY8_2X8:
494 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
496 case V4L2_MBUS_FMT_YUYV8_2X8:
497 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN;
499 case V4L2_MBUS_FMT_YVYU8_2X8:
500 data_outfmt2 = MT9M111_OUTFMT_SWAP_YCbCr_C_Y_RGB_EVEN |
501 MT9M111_OUTFMT_SWAP_YCbCr_Cb_Cr_RGB_R_B;
504 dev_err(&client->dev, "Pixel format not handled: %x\n", code);
508 ret = reg_mask(OUTPUT_FORMAT_CTRL2_A, data_outfmt2,
511 ret = reg_mask(OUTPUT_FORMAT_CTRL2_B, data_outfmt2,
517 static int mt9m111_s_fmt(struct v4l2_subdev *sd,
518 struct v4l2_mbus_framefmt *mf)
520 struct i2c_client *client = v4l2_get_subdevdata(sd);
521 const struct mt9m111_datafmt *fmt;
522 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
523 struct v4l2_rect rect = {
524 .left = mt9m111->rect.left,
525 .top = mt9m111->rect.top,
527 .height = mf->height,
531 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
532 ARRAY_SIZE(mt9m111_colour_fmts));
536 dev_dbg(&client->dev,
537 "%s code=%x left=%d, top=%d, width=%d, height=%d\n", __func__,
538 mf->code, rect.left, rect.top, rect.width, rect.height);
540 ret = mt9m111_make_rect(mt9m111, &rect);
542 ret = mt9m111_set_pixfmt(mt9m111, mf->code);
544 mt9m111->rect = rect;
546 mf->colorspace = fmt->colorspace;
552 static int mt9m111_try_fmt(struct v4l2_subdev *sd,
553 struct v4l2_mbus_framefmt *mf)
555 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
556 const struct mt9m111_datafmt *fmt;
557 bool bayer = mf->code == V4L2_MBUS_FMT_SBGGR8_1X8 ||
558 mf->code == V4L2_MBUS_FMT_SBGGR10_2X8_PADHI_LE;
560 fmt = mt9m111_find_datafmt(mf->code, mt9m111_colour_fmts,
561 ARRAY_SIZE(mt9m111_colour_fmts));
564 mf->code = fmt->code;
568 * With Bayer format enforce even side lengths, but let the user play
569 * with the starting pixel
572 if (mf->height > MT9M111_MAX_HEIGHT)
573 mf->height = MT9M111_MAX_HEIGHT;
574 else if (mf->height < 2)
577 mf->height = ALIGN(mf->height, 2);
579 if (mf->width > MT9M111_MAX_WIDTH)
580 mf->width = MT9M111_MAX_WIDTH;
581 else if (mf->width < 2)
584 mf->width = ALIGN(mf->width, 2);
586 mf->colorspace = fmt->colorspace;
591 static int mt9m111_g_chip_ident(struct v4l2_subdev *sd,
592 struct v4l2_dbg_chip_ident *id)
594 struct i2c_client *client = v4l2_get_subdevdata(sd);
595 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
597 if (id->match.type != V4L2_CHIP_MATCH_I2C_ADDR)
600 if (id->match.addr != client->addr)
603 id->ident = mt9m111->model;
609 #ifdef CONFIG_VIDEO_ADV_DEBUG
610 static int mt9m111_g_register(struct v4l2_subdev *sd,
611 struct v4l2_dbg_register *reg)
613 struct i2c_client *client = v4l2_get_subdevdata(sd);
616 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
618 if (reg->match.addr != client->addr)
621 val = mt9m111_reg_read(client, reg->reg);
625 if (reg->val > 0xffff)
631 static int mt9m111_s_register(struct v4l2_subdev *sd,
632 struct v4l2_dbg_register *reg)
634 struct i2c_client *client = v4l2_get_subdevdata(sd);
636 if (reg->match.type != V4L2_CHIP_MATCH_I2C_ADDR || reg->reg > 0x2ff)
639 if (reg->match.addr != client->addr)
642 if (mt9m111_reg_write(client, reg->reg, reg->val) < 0)
649 static const struct v4l2_queryctrl mt9m111_controls[] = {
651 .id = V4L2_CID_VFLIP,
652 .type = V4L2_CTRL_TYPE_BOOLEAN,
653 .name = "Flip Verticaly",
659 .id = V4L2_CID_HFLIP,
660 .type = V4L2_CTRL_TYPE_BOOLEAN,
661 .name = "Flip Horizontaly",
666 }, { /* gain = 1/32*val (=>gain=1 if val==32) */
668 .type = V4L2_CTRL_TYPE_INTEGER,
671 .maximum = 63 * 2 * 2,
674 .flags = V4L2_CTRL_FLAG_SLIDER,
676 .id = V4L2_CID_EXPOSURE_AUTO,
677 .type = V4L2_CTRL_TYPE_BOOLEAN,
678 .name = "Auto Exposure",
686 static struct soc_camera_ops mt9m111_ops = {
687 .controls = mt9m111_controls,
688 .num_controls = ARRAY_SIZE(mt9m111_controls),
691 static int mt9m111_set_flip(struct mt9m111 *mt9m111, int flip, int mask)
693 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
696 if (mt9m111->context == HIGHPOWER) {
698 ret = reg_set(READ_MODE_B, mask);
700 ret = reg_clear(READ_MODE_B, mask);
703 ret = reg_set(READ_MODE_A, mask);
705 ret = reg_clear(READ_MODE_A, mask);
711 static int mt9m111_get_global_gain(struct mt9m111 *mt9m111)
713 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
716 data = reg_read(GLOBAL_GAIN);
718 return (data & 0x2f) * (1 << ((data >> 10) & 1)) *
719 (1 << ((data >> 9) & 1));
723 static int mt9m111_set_global_gain(struct mt9m111 *mt9m111, int gain)
725 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
728 if (gain > 63 * 2 * 2)
731 mt9m111->gain = gain;
732 if ((gain >= 64 * 2) && (gain < 63 * 2 * 2))
733 val = (1 << 10) | (1 << 9) | (gain / 4);
734 else if ((gain >= 64) && (gain < 64 * 2))
735 val = (1 << 9) | (gain / 2);
739 return reg_write(GLOBAL_GAIN, val);
742 static int mt9m111_set_autoexposure(struct mt9m111 *mt9m111, int on)
744 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
748 ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
750 ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOEXPO_EN);
753 mt9m111->autoexposure = on;
758 static int mt9m111_set_autowhitebalance(struct mt9m111 *mt9m111, int on)
760 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
764 ret = reg_set(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
766 ret = reg_clear(OPER_MODE_CTRL, MT9M111_OPMODE_AUTOWHITEBAL_EN);
769 mt9m111->autowhitebalance = on;
774 static int mt9m111_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
776 struct i2c_client *client = v4l2_get_subdevdata(sd);
777 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
782 if (mt9m111->context == HIGHPOWER)
783 data = reg_read(READ_MODE_B);
785 data = reg_read(READ_MODE_A);
789 ctrl->value = !!(data & MT9M111_RMB_MIRROR_ROWS);
792 if (mt9m111->context == HIGHPOWER)
793 data = reg_read(READ_MODE_B);
795 data = reg_read(READ_MODE_A);
799 ctrl->value = !!(data & MT9M111_RMB_MIRROR_COLS);
802 data = mt9m111_get_global_gain(mt9m111);
807 case V4L2_CID_EXPOSURE_AUTO:
808 ctrl->value = mt9m111->autoexposure;
810 case V4L2_CID_AUTO_WHITE_BALANCE:
811 ctrl->value = mt9m111->autowhitebalance;
817 static int mt9m111_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
819 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
820 const struct v4l2_queryctrl *qctrl;
823 qctrl = soc_camera_find_qctrl(&mt9m111_ops, ctrl->id);
829 mt9m111->vflip = ctrl->value;
830 ret = mt9m111_set_flip(mt9m111, ctrl->value,
831 MT9M111_RMB_MIRROR_ROWS);
834 mt9m111->hflip = ctrl->value;
835 ret = mt9m111_set_flip(mt9m111, ctrl->value,
836 MT9M111_RMB_MIRROR_COLS);
839 ret = mt9m111_set_global_gain(mt9m111, ctrl->value);
841 case V4L2_CID_EXPOSURE_AUTO:
842 ret = mt9m111_set_autoexposure(mt9m111, ctrl->value);
844 case V4L2_CID_AUTO_WHITE_BALANCE:
845 ret = mt9m111_set_autowhitebalance(mt9m111, ctrl->value);
854 static int mt9m111_suspend(struct mt9m111 *mt9m111)
856 mt9m111->gain = mt9m111_get_global_gain(mt9m111);
861 static void mt9m111_restore_state(struct mt9m111 *mt9m111)
863 mt9m111_set_context(mt9m111, mt9m111->context);
864 mt9m111_set_pixfmt(mt9m111, mt9m111->fmt->code);
865 mt9m111_setup_rect(mt9m111, &mt9m111->rect);
866 mt9m111_set_flip(mt9m111, mt9m111->hflip, MT9M111_RMB_MIRROR_COLS);
867 mt9m111_set_flip(mt9m111, mt9m111->vflip, MT9M111_RMB_MIRROR_ROWS);
868 mt9m111_set_global_gain(mt9m111, mt9m111->gain);
869 mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
870 mt9m111_set_autowhitebalance(mt9m111, mt9m111->autowhitebalance);
873 static int mt9m111_resume(struct mt9m111 *mt9m111)
877 if (mt9m111->powered) {
878 ret = mt9m111_enable(mt9m111);
880 ret = mt9m111_reset(mt9m111);
882 mt9m111_restore_state(mt9m111);
887 static int mt9m111_init(struct mt9m111 *mt9m111)
889 struct i2c_client *client = v4l2_get_subdevdata(&mt9m111->subdev);
892 mt9m111->context = HIGHPOWER;
893 ret = mt9m111_enable(mt9m111);
895 ret = mt9m111_reset(mt9m111);
897 ret = mt9m111_set_context(mt9m111, mt9m111->context);
899 ret = mt9m111_set_autoexposure(mt9m111, mt9m111->autoexposure);
901 dev_err(&client->dev, "mt9m111 init failed: %d\n", ret);
906 * Interface active, can use i2c. If it fails, it can indeed mean, that
907 * this wasn't our capture interface, so, we wait for the right one
909 static int mt9m111_video_probe(struct soc_camera_device *icd,
910 struct i2c_client *client)
912 struct mt9m111 *mt9m111 = to_mt9m111(client);
916 /* We must have a parent by now. And it cannot be a wrong one. */
917 BUG_ON(!icd->parent ||
918 to_soc_camera_host(icd->parent)->nr != icd->iface);
920 mt9m111->lastpage = -1;
922 mt9m111->autoexposure = 1;
923 mt9m111->autowhitebalance = 1;
925 data = reg_read(CHIP_VERSION);
928 case 0x143a: /* MT9M111 or MT9M131 */
929 mt9m111->model = V4L2_IDENT_MT9M111;
930 dev_info(&client->dev,
931 "Detected a MT9M111/MT9M131 chip ID %x\n", data);
933 case 0x148c: /* MT9M112 */
934 mt9m111->model = V4L2_IDENT_MT9M112;
935 dev_info(&client->dev, "Detected a MT9M112 chip ID %x\n", data);
939 dev_err(&client->dev,
940 "No MT9M111/MT9M112/MT9M131 chip detected register read %x\n",
945 ret = mt9m111_init(mt9m111);
951 static int mt9m111_s_power(struct v4l2_subdev *sd, int on)
953 struct mt9m111 *mt9m111 = container_of(sd, struct mt9m111, subdev);
954 struct i2c_client *client = v4l2_get_subdevdata(sd);
957 mutex_lock(&mt9m111->power_lock);
960 * If the power count is modified from 0 to != 0 or from != 0 to 0,
961 * update the power state.
963 if (mt9m111->power_count == !on) {
965 ret = mt9m111_resume(mt9m111);
967 dev_err(&client->dev,
968 "Failed to resume the sensor: %d\n", ret);
972 mt9m111_suspend(mt9m111);
976 /* Update the power count. */
977 mt9m111->power_count += on ? 1 : -1;
978 WARN_ON(mt9m111->power_count < 0);
981 mutex_unlock(&mt9m111->power_lock);
985 static struct v4l2_subdev_core_ops mt9m111_subdev_core_ops = {
986 .g_ctrl = mt9m111_g_ctrl,
987 .s_ctrl = mt9m111_s_ctrl,
988 .g_chip_ident = mt9m111_g_chip_ident,
989 .s_power = mt9m111_s_power,
990 #ifdef CONFIG_VIDEO_ADV_DEBUG
991 .g_register = mt9m111_g_register,
992 .s_register = mt9m111_s_register,
996 static int mt9m111_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
997 enum v4l2_mbus_pixelcode *code)
999 if (index >= ARRAY_SIZE(mt9m111_colour_fmts))
1002 *code = mt9m111_colour_fmts[index].code;
1006 static int mt9m111_g_mbus_config(struct v4l2_subdev *sd,
1007 struct v4l2_mbus_config *cfg)
1009 struct i2c_client *client = v4l2_get_subdevdata(sd);
1010 struct soc_camera_device *icd = client->dev.platform_data;
1011 struct soc_camera_link *icl = to_soc_camera_link(icd);
1013 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING |
1014 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
1015 V4L2_MBUS_DATA_ACTIVE_HIGH;
1016 cfg->type = V4L2_MBUS_PARALLEL;
1017 cfg->flags = soc_camera_apply_board_flags(icl, cfg);
1022 static struct v4l2_subdev_video_ops mt9m111_subdev_video_ops = {
1023 .s_mbus_fmt = mt9m111_s_fmt,
1024 .g_mbus_fmt = mt9m111_g_fmt,
1025 .try_mbus_fmt = mt9m111_try_fmt,
1026 .s_crop = mt9m111_s_crop,
1027 .g_crop = mt9m111_g_crop,
1028 .cropcap = mt9m111_cropcap,
1029 .enum_mbus_fmt = mt9m111_enum_fmt,
1030 .g_mbus_config = mt9m111_g_mbus_config,
1033 static struct v4l2_subdev_ops mt9m111_subdev_ops = {
1034 .core = &mt9m111_subdev_core_ops,
1035 .video = &mt9m111_subdev_video_ops,
1038 static int mt9m111_probe(struct i2c_client *client,
1039 const struct i2c_device_id *did)
1041 struct mt9m111 *mt9m111;
1042 struct soc_camera_device *icd = client->dev.platform_data;
1043 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
1044 struct soc_camera_link *icl;
1048 dev_err(&client->dev, "mt9m111: soc-camera data missing!\n");
1052 icl = to_soc_camera_link(icd);
1054 dev_err(&client->dev, "mt9m111: driver needs platform data\n");
1058 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
1059 dev_warn(&adapter->dev,
1060 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
1064 mt9m111 = kzalloc(sizeof(struct mt9m111), GFP_KERNEL);
1068 v4l2_i2c_subdev_init(&mt9m111->subdev, client, &mt9m111_subdev_ops);
1070 /* Second stage probe - when a capture adapter is there */
1071 icd->ops = &mt9m111_ops;
1073 mt9m111->rect.left = MT9M111_MIN_DARK_COLS;
1074 mt9m111->rect.top = MT9M111_MIN_DARK_ROWS;
1075 mt9m111->rect.width = MT9M111_MAX_WIDTH;
1076 mt9m111->rect.height = MT9M111_MAX_HEIGHT;
1077 mt9m111->fmt = &mt9m111_colour_fmts[0];
1079 ret = mt9m111_video_probe(icd, client);
1088 static int mt9m111_remove(struct i2c_client *client)
1090 struct mt9m111 *mt9m111 = to_mt9m111(client);
1091 struct soc_camera_device *icd = client->dev.platform_data;
1099 static const struct i2c_device_id mt9m111_id[] = {
1103 MODULE_DEVICE_TABLE(i2c, mt9m111_id);
1105 static struct i2c_driver mt9m111_i2c_driver = {
1109 .probe = mt9m111_probe,
1110 .remove = mt9m111_remove,
1111 .id_table = mt9m111_id,
1114 static int __init mt9m111_mod_init(void)
1116 return i2c_add_driver(&mt9m111_i2c_driver);
1119 static void __exit mt9m111_mod_exit(void)
1121 i2c_del_driver(&mt9m111_i2c_driver);
1124 module_init(mt9m111_mod_init);
1125 module_exit(mt9m111_mod_exit);
1127 MODULE_DESCRIPTION("Micron/Aptina MT9M111/MT9M112/MT9M131 Camera driver");
1128 MODULE_AUTHOR("Robert Jarzmik");
1129 MODULE_LICENSE("GPL");