4 * Author: <linux@telechips.com>
5 * Description: Telechips broadcast driver
7 * Copyright (c) Telechips, Inc.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23 #ifndef __TCBD_API_FEATURE_H__
24 #define __TCBD_API_FEATURE_H__
26 #define __AGC_TABLE_IN_DSP__
31 #undef __ALWAYS_FIC_ON__
32 #undef __CALLBACK_BUFFER_HEADER__
34 #if defined(__I2C_STS__)
35 #define __STATUS_IN_REGISTER__
37 #undef __STATUS_IN_REGISTER__
38 #define __STATUS_IN_STREAM__
39 #endif /*!__I2C_STS__*/
41 #if defined(__CSPI_ONLY__)
42 #define __READ_FIXED_LENGTH__
43 #undef __READ_VARIABLE_LENGTH__
44 #endif /*__CSPI_ONLY__*/
46 #undef __DEBUG_DSP_ROM__
48 #define TCBD_MAX_NUM_SERVICE 6
50 #define TCBD_DEF_BANDWIDTH (1500)
51 #define TCBD_STATUS_SIZE (32)
52 #define TCBD_FIC_SIZE (388)
53 #define TCBD_TS_SIZE (188)
54 #define TCBD_OP_HEADER_SIZE (4)
55 #define TCBD_MAX_FIFO_SIZE (1024*16)
56 #define TCBD_CHIPID_VALUE (0x37)
58 #if defined(__STATUS_IN_REGISTER__)
59 #if defined(__CSPI_ONLY__)
60 #define TCBD_THRESHOLD_FIC\
61 (TCBD_FIC_SIZE + TCBD_STATUS_SIZE + TCBD_OP_HEADER_SIZE*2)
62 #elif defined(__I2C_STS__)
63 #define TCBD_THRESHOLD_FIC (TCBD_FIC_SIZE)
65 #error "you must define __I2C_STS__ or __CSPI_ONLY__"
66 #endif /*!__CSPI_ONLY__ && !__I2C_STS__*/
67 #else /* __STATUS_IN_REGISTER__ */
68 #define TCBD_THRESHOLD_FIC\
69 (TCBD_FIC_SIZE+TCBD_STATUS_SIZE+TCBD_OP_HEADER_SIZE*2)
70 #endif /* !__STATUS_IN_REGISTER__ */
72 #if defined(__CSPI_ONLY__)
73 #define TCBD_BUFFER_A_SIZE (TCBD_MAX_FIFO_SIZE)
74 #define TCBD_BUFFER_B_SIZE (0x0)
75 #define TCBD_BUFFER_C_SIZE (0x0)
76 #define TCBD_BUFFER_D_SIZE (0x0)
78 #define TCBD_MAX_THRESHOLD (((1024*7)>>2)<<2)
80 #elif defined(__I2C_STS__)
81 #define TCBD_BUFFER_A_SIZE (TCBD_THRESHOLD_FIC)
82 #define TCBD_BUFFER_B_SIZE \
83 (((TCBD_MAX_FIFO_SIZE-TCBD_BUFFER_A_SIZE)>>2)<<2)
84 #define TCBD_BUFFER_C_SIZE (0x0)
85 #define TCBD_BUFFER_D_SIZE (0x0)
87 #define TCBD_MAX_THRESHOLD (((TCBD_BUFFER_B_SIZE>>1)>>2)<<2)
88 #endif /* __I2C_STS__ */
90 #define PHY_BASE_ADDR (0x80000000)
91 #define PHY_MEM_FIFO_START_ADDR (0x00000000)
92 #define PHY_MEM_ADDR_A_START (PHY_BASE_ADDR + 0xa000)
93 #define PHY_MEM_ADDR_A_END\
94 (PHY_MEM_ADDR_A_START+TCBD_BUFFER_A_SIZE-1)
95 #define PHY_MEM_ADDR_B_START\
96 (PHY_MEM_ADDR_A_END+1)
97 #define PHY_MEM_ADDR_B_END\
98 (PHY_MEM_ADDR_B_START+TCBD_BUFFER_B_SIZE-1)
99 #define PHY_MEM_ADDR_C_START\
100 (PHY_MEM_ADDR_B_END+1)
101 #define PHY_MEM_ADDR_C_END\
102 (PHY_MEM_ADDR_C_START+TCBD_BUFFER_C_SIZE-1)
103 #define PHY_MEM_ADDR_D_START\
104 (PHY_MEM_ADDR_C_END+1)
105 #define PHY_MEM_ADDR_D_END\
106 (PHY_MEM_ADDR_D_START+TCBD_BUFFER_D_SIZE-1)
108 /* CODE Memory Setting */
109 #define START_PC (0x0000)
110 #define START_PC_OFFSET (0x8000)
111 #define CODE_MEM_BASE (PHY_BASE_ADDR+START_PC_OFFSET)
112 #define CODE_TABLEBASE_RAND (0xF0020000)
113 #define CODE_TABLEBASE_DINT (0xF0024000)
114 #define CODE_TABLEBASE_DAGU (0xF0028000)
115 #define CODE_TABLEBASE_COL_ORDER (0xF002C000)
117 /* lock check time definition */
118 #define TDMB_OFDMDETECT_LOCK (100)
119 #define TDMB_OFDMDETECT_RETRY (2)
120 #define TDMB_CTO_LOCK (100)
121 #define TDMB_CTO_RETRY (3)
122 #define TDMB_CFO_LOCK (20)
123 #define TDMB_CFO_RETRY (3)
125 #endif /*__TCBD_API_FEATURE_H__*/