2 * Copyright (C) 2012 Spreadtrum Communications Inc.
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
14 //#include <mach/hardware.h>
16 #include <soc/sprd/hardware.h>
18 #include "parse_hwinfo_tshark2.h"
20 #define ISP_BASE_ADDR ISP_BASE//SPRD_ISP_BASE
22 /*isp sub block: Interrupt*/
23 #define ISP_INT_STATUS (ISP_BASE_ADDR+0x0000UL)
24 #define ISP_INT_EN0 (ISP_BASE_ADDR+0x0014UL)
25 #define ISP_INT_CLR0 (ISP_BASE_ADDR+0x0018UL)
26 #define ISP_INT_RAW0 (ISP_BASE_ADDR+0x001CUL)
27 #define ISP_INT_INT0 (ISP_BASE_ADDR+0x0020UL)
28 #define ISP_INT_EN1 (ISP_BASE_ADDR+0x0024UL)
29 #define ISP_INT_CLR1 (ISP_BASE_ADDR+0x0028UL)
30 #define ISP_INT_RAW1 (ISP_BASE_ADDR+0x002CUL)
31 #define ISP_INT_INT1 (ISP_BASE_ADDR+0x0030UL)
32 #define ISP_INT_EN2 (ISP_BASE_ADDR+0x0034UL)
33 #define ISP_INT_CLR2 (ISP_BASE_ADDR+0x0038UL)
34 #define ISP_INT_RAW2 (ISP_BASE_ADDR+0x003CUL)
35 #define ISP_INT_INT2 (ISP_BASE_ADDR+0x0040UL)
36 #define ISP_INT_EN3 (ISP_BASE_ADDR+0x0044UL)
37 #define ISP_INT_CLR3 (ISP_BASE_ADDR+0x0048UL)
38 #define ISP_INT_RAW3 (ISP_BASE_ADDR+0x004CUL)
39 #define ISP_INT_INT3 (ISP_BASE_ADDR+0x0050UL)
40 #define ISP_INT_ALL_DONE_CTRL (ISP_BASE_ADDR+0x0054UL)
42 /*isp sub block: Fetch*/
43 #define ISP_FETCH_MEM_STATUS0 (ISP_BASE_ADDR+0x0100UL)
44 #define ISP_FETCH_MEM_STATUS1 (ISP_BASE_ADDR+0x0104UL)
45 #define ISP_FETCH_DCAM_STATUS0 (ISP_BASE_ADDR+0x0108UL)
46 #define ISP_FETCH_DCAM_STATUS1 (ISP_BASE_ADDR+0x010CUL)
47 #define ISP_FETCH_PARAM (ISP_BASE_ADDR+0x0114UL)
48 #define ISP_FETCH_START (ISP_BASE_ADDR+0x0118UL)
49 #define ISP_FETCH_SLICE_SIZE (ISP_BASE_ADDR+0x0120UL)
50 #define ISP_FETCH_SLICE_Y_ADDR (ISP_BASE_ADDR+0x0124UL)
51 #define ISP_FETCH_SLICE_Y_PITCH (ISP_BASE_ADDR+0x0128UL)
52 #define ISP_FETCH_SLICE_U_ADDR (ISP_BASE_ADDR+0x012CUL)
53 #define ISP_FETCH_SLICE_U_PITCH (ISP_BASE_ADDR+0x0130UL)
54 #define ISP_FETCH_SLICE_V_ADDR (ISP_BASE_ADDR+0x0134UL)
55 #define ISP_FETCH_SLICE_V_PITCH (ISP_BASE_ADDR+0x0138UL)
56 #define ISP_FETCH_MIPI_WORD_INFO (ISP_BASE_ADDR+0x013CUL)
57 #define ISP_FETCH_MIPI_BYTE_INFO (ISP_BASE_ADDR+0x0140UL)
58 #define ISP_FETCH_BAYER_MODE (ISP_BASE_ADDR+0x0144UL)
60 /*isp sub block: Store*/
61 #define ISP_STORE_STATUS_MEM0 (ISP_BASE_ADDR+0x0200UL)
62 #define ISP_STORE_STATUS_MEM1 (ISP_BASE_ADDR+0x0204UL)
63 #define ISP_STORE_STATUS_DCAM0 (ISP_BASE_ADDR+0x0208UL)
64 #define ISP_STORE_STATUS_DCAM1 (ISP_BASE_ADDR+0x020CUL)
65 #define ISP_STORE_PARAM (ISP_BASE_ADDR+0x0214UL)
66 #define ISP_STORE_SLICE_SIZE (ISP_BASE_ADDR+0x0218UL)
67 #define ISP_STORE_BORDER (ISP_BASE_ADDR+0x021CUL)
68 #define ISP_STORE_Y_ADDR (ISP_BASE_ADDR+0x0220UL)
69 #define ISP_STORE_Y_PITCH (ISP_BASE_ADDR+0x0224UL)
70 #define ISP_STORE_U_ADDR (ISP_BASE_ADDR+0x0228UL)
71 #define ISP_STORE_U_PITCH (ISP_BASE_ADDR+0x022CUL)
72 #define ISP_STORE_V_ADDR (ISP_BASE_ADDR+0x0230UL)
73 #define ISP_STORE_V_PITCH (ISP_BASE_ADDR+0x0234UL)
74 #define ISP_STORE_SHADOW_CLR (ISP_BASE_ADDR+0x0238UL)
76 /*isp sub block: dispatch(pike different from tshark2)*/
77 #define ISP_DISPATCH_STATUS_CH0 (ISP_BASE_ADDR+0x0300UL)
78 #define ISP_DISPATCH_STATUS_CH1 (ISP_BASE_ADDR+0x0304UL)
79 //#define ISP_DISPATCH_STATUS_COMM (ISP_BASE_ADDR+0x0308UL)
80 //#define ISP_DISPATCH_STATUS1_CH0 (ISP_BASE_ADDR+0x030CUL)
81 //#define ISP_DISPATCH_STATUS1_CH1 (ISP_BASE_ADDR+0x0310UL)
82 #define ISP_DISPATCH_CH0_BAYER (ISP_BASE_ADDR+0x0314UL)
83 #define ISP_DISPATCH_CH0_SIZE (ISP_BASE_ADDR+0x0318UL)
84 #define ISP_DISPATCH_CH1_SIZE (ISP_BASE_ADDR+0x031CUL)
85 //#define ISP_DISPATCH_DLY (ISP_BASE_ADDR+0x0320UL)
86 //#define ISP_DISPATCH_CH1_BAYER (ISP_BASE_ADDR+0x0324UL)
87 //#define ISP_DISPATCH_HW_CTRL_CH0 (ISP_BASE_ADDR+0x0328UL)
88 //#define ISP_DISPATCH_HW_CTRL_CH1 (ISP_BASE_ADDR+0x032CUL)
90 /*isp sub block: arbiter*/
91 #define ISP_ARBITER_WR_STATUS (ISP_BASE_ADDR+0x0400UL)
92 #define ISP_ARBITER_RD_STATUS (ISP_BASE_ADDR+0x0404UL)
93 #define ISP_ARBITER_PARAM (ISP_BASE_ADDR+0x0414UL)
94 #define ISP_ARBITER_ENDIAN_CH0 (ISP_BASE_ADDR+0x0418UL)
95 #define ISP_ARBITER_ENDIAN_CH1 (ISP_BASE_ADDR+0x041CUL)
96 //#define ISP_ARBITER_CTRL (ISP_BASE_ADDR+0x0420UL)//pike has no this register
98 /*isp sub block: axi*/
99 #define ISP_AXI_WR_MASTER_STATUS (ISP_BASE_ADDR+0x0500UL)
100 #define ISP_AXI_RD_MASTER_STATUS (ISP_BASE_ADDR+0x0504UL)
101 #define ISP_AXI_ITI2AXIM_CTRL (ISP_BASE_ADDR+0x0514UL)
102 //#define ISP_AXI_CONVERT_WR_CTRL (ISP_BASE_ADDR+0x0518UL)//pike has no this register
104 /*isp sub block: raw sizer(pike has no this module)*/
105 /*#define ISP_RAW_SIZER_STATUS0 (ISP_BASE_ADDR+0x0600UL)
106 #define ISP_RAW_SIZER_PARAM (ISP_BASE_ADDR+0x0614UL)
107 #define ISP_RAW_SIZER_CROP_SRC (ISP_BASE_ADDR+0x0618UL)
108 #define ISP_RAW_SIZER_CROP_DST (ISP_BASE_ADDR+0x061CUL)
109 #define ISP_RAW_SIZER_CROP_START (ISP_BASE_ADDR+0x0620UL)
110 #define ISP_RAW_SIZER_DST (ISP_BASE_ADDR+0x0624UL)
111 #define ISP_RAW_SIZER_BPC (ISP_BASE_ADDR+0x0628UL)
112 #define ISP_RAW_SIZER_HCOEFF0 (ISP_BASE_ADDR+0x062CUL)
113 #define ISP_RAW_SIZER_VCOEFF0 (ISP_BASE_ADDR+0x0684UL)
114 #define ISP_RAW_SIZER_INIT_HOR0 (ISP_BASE_ADDR+0x06B0UL)
115 #define ISP_RAW_SIZER_INIT_HOR1 (ISP_BASE_ADDR+0x06B4UL)
116 #define ISP_RAW_SIZER_INIT_HOR2 (ISP_BASE_ADDR+0x06B8UL)
117 #define ISP_RAW_SIZER_INIT_VER0 (ISP_BASE_ADDR+0x06BCUL)
118 #define ISP_RAW_SIZER_INIT_VER1 (ISP_BASE_ADDR+0x06C0UL)
119 #define ISP_RAW_SIZER_INIT_VER2 (ISP_BASE_ADDR+0x06C4UL)*/
121 /*isp sub block: common*/
122 #define ISP_COMMON_VERSION (ISP_BASE_ADDR+0x0700UL)
123 #define ISP_COMMON_STATUS0 (ISP_BASE_ADDR+0x0704UL)
124 #define ISP_COMMON_STATUS1 (ISP_BASE_ADDR+0x0708UL)
125 #define ISP_COMMON_CTRL_CH0 (ISP_BASE_ADDR+0x0714UL)
126 #define ISP_COMMON_SPACE_SEL (ISP_BASE_ADDR+0x0718UL)
127 //#define ISP_COMMON_CTRL_CH1 (ISP_BASE_ADDR+0x071CUL)
128 //#define ISP_COMMON_CTRL_AWBM (ISP_BASE_ADDR+0x0720UL)
129 #define ISP_COMMON_PMU_RAW_MASK (ISP_BASE_ADDR+0x0724UL)
130 #define ISP_COMMON_PMU_HW_MASK (ISP_BASE_ADDR+0x0728UL)
131 #define ISP_COMMON_PMU_HW_ENABLE (ISP_BASE_ADDR+0x072CUL)
132 #define ISP_COMMON_PMU_SW_SWITCH (ISP_BASE_ADDR+0x0730UL)
133 #define ISP_COMMON_PMU_SW_TOGGLE (ISP_BASE_ADDR+0x0734UL)
134 #define ISP_COMMON_LBUF_OFFSET (ISP_BASE_ADDR+0x0738UL)
135 #define ISP_SHADOW_CTRL_CH0 (ISP_BASE_ADDR+0x073CUL)
136 #define ISP_SHADOW_CTRL_CH1 (ISP_BASE_ADDR+0x0740UL)
137 //#define ISP_COMMON_3A_CTRL0 (ISP_BASE_ADDR+0x0744UL)
138 //#define ISP_COMMON_LBUF_OFFSET1 (ISP_BASE_ADDR+0x0748UL)
139 //#define ISP_COMMON_3A_CTRL1 (ISP_BASE_ADDR+0x074CUL)
140 #define ISP_COMMON_RESERVED0 (ISP_BASE_ADDR+0x0750UL)
141 #define ISP_COMMON_RESERVED1 (ISP_BASE_ADDR+0x0754UL)
143 /*isp sub block: Pre Global Gain*/
144 #define ISP_PGG_STATUS (ISP_BASE_ADDR+0x1000UL)
145 #define ISP_PGG_PARAM (ISP_BASE_ADDR+0x1014UL)
147 /*isp sub block: BLC: back level calibration*/
148 #define ISP_BLC_STATUS (ISP_BASE_ADDR+0x1100UL)
149 #define ISP_BLC_PARAM (ISP_BASE_ADDR+0x1114UL)
150 #define ISP_BLC_B_PARAM_R_B (ISP_BASE_ADDR+0x1118UL)
151 #define ISP_BLC_B_PARAM_G (ISP_BASE_ADDR+0x111CUL)
153 /*isp sub block: RGBG*/
154 #define ISP_RGBG_STATUS (ISP_BASE_ADDR+0x1200UL)
155 #define ISP_RGBG_PARAM (ISP_BASE_ADDR+0x1214UL)
156 #define ISP_RGBG_RB (ISP_BASE_ADDR+0x1218UL)
157 #define ISP_RGBG_G (ISP_BASE_ADDR+0x121CUL)
159 /*isp sub block: PWD*/
160 #define ISP_PWD_STATUS0 (ISP_BASE_ADDR+0x1300UL)
161 #define ISP_PWD_STATUS1 (ISP_BASE_ADDR+0x1304UL)
162 #define ISP_PWD_PARAM (ISP_BASE_ADDR+0x1314UL)
163 #define ISP_PWD_PARAM1 (ISP_BASE_ADDR+0x1318UL)
164 #define ISP_PWD_PARAM2 (ISP_BASE_ADDR+0x131CUL)
165 #define ISP_PWD_PARAM3 (ISP_BASE_ADDR+0x1320UL)
166 #define ISP_PWD_PARAM4 (ISP_BASE_ADDR+0x1324UL)
167 #define ISP_PWD_PARAM5 (ISP_BASE_ADDR+0x1328UL)
168 #define ISP_PWD_PARAM6 (ISP_BASE_ADDR+0x132CUL)
169 #define ISP_PWD_PARAM7 (ISP_BASE_ADDR+0x1330UL)
170 #define ISP_PWD_PARAM8 (ISP_BASE_ADDR+0x1334UL)
171 #define ISP_PWD_PARAM9 (ISP_BASE_ADDR+0x1338UL)
172 #define ISP_PWD_PARAM10 (ISP_BASE_ADDR+0x133CUL)
174 /*isp sub block: NLC*/
175 #define ISP_NLC_STATUS (ISP_BASE_ADDR+0x1400UL)
176 #define ISP_NLC_PARA (ISP_BASE_ADDR+0x1414UL)
177 #define ISP_NLC_PARA_R0 (ISP_BASE_ADDR+0x1418UL)
178 #define ISP_NLC_PARA_R9 (ISP_BASE_ADDR+0x143CUL)
179 #define ISP_NLC_PARA_G0 (ISP_BASE_ADDR+0x1440UL)
180 #define ISP_NLC_PARA_G9 (ISP_BASE_ADDR+0x1464UL)
181 #define ISP_NLC_PARA_B0 (ISP_BASE_ADDR+0x1468UL)
182 #define ISP_NLC_PARA_B9 (ISP_BASE_ADDR+0x148CUL)
183 #define ISP_NLC_PARA_L0 (ISP_BASE_ADDR+0x1490UL)
185 /*isp sub block: lens shading calibration*/
186 #define ISP_LENS_STATUS (ISP_BASE_ADDR+0x1500UL)
187 #define ISP_LENS_PARAM (ISP_BASE_ADDR+0x1514UL)
188 #define ISP_LENS_PARAM_ADDR (ISP_BASE_ADDR+0x1518UL)
189 #define ISP_LENS_SLICE_POS (ISP_BASE_ADDR+0x151CUL)
190 #define ISP_LENS_LOAD_EB (ISP_BASE_ADDR+0x1520UL)
191 #define ISP_LENS_GRID_PITCH (ISP_BASE_ADDR+0x1524UL)
192 #define ISP_LENS_GRID_SIZE (ISP_BASE_ADDR+0x1528UL)
193 #define ISP_LENS_LOAD_BUF (ISP_BASE_ADDR+0x152CUL)
194 #define ISP_LENS_MISC (ISP_BASE_ADDR+0x1530UL)
195 #define ISP_LENS_SLICE_SIZE (ISP_BASE_ADDR+0x1534UL)
196 #define ISP_LENS_INIT_COOR (ISP_BASE_ADDR+0x1538UL)
197 #define ISP_LENS_Q0_VALUE (ISP_BASE_ADDR+0x153CUL)
199 /*isp sub block: binning*/
200 #define ISP_BINNING_STATUS (ISP_BASE_ADDR+0x1600UL)
201 #define ISP_BINNING_PARAM (ISP_BASE_ADDR+0x1614UL)
202 #define ISP_BINNING_MEM_ADDR (ISP_BASE_ADDR+0x1618UL)
203 #define ISP_BINNING_PITCH (ISP_BASE_ADDR+0x161CUL)
205 /*isp sub block: AWBM*/
206 #define ISP_AWBM_STATUS (ISP_BASE_ADDR+0x1700UL)
207 #define ISP_AWBM_PARAM (ISP_BASE_ADDR+0x1714UL)
208 #define ISP_AWBM_BLOCK_OFFSET (ISP_BASE_ADDR+0x1718UL)
209 #define ISP_AWBM_BLOCK_SIZE (ISP_BASE_ADDR+0x171CUL)
210 #define ISP_AWBM_WR_0_S (ISP_BASE_ADDR+0x1720UL)
211 #define ISP_AWBM_WR_0_E (ISP_BASE_ADDR+0x1724UL)
212 #define ISP_AWBM_NW_0_XYR (ISP_BASE_ADDR+0x1748UL)
213 #define ISP_AWBM_CLCTOR_0_S (ISP_BASE_ADDR+0x175CUL)
214 #define ISP_AWBM_CLCTOR_0_E (ISP_BASE_ADDR+0x1760UL)
215 #define ISP_AWBM_CLCTR_0_PIXEL_NUM (ISP_BASE_ADDR+0x1784UL)
216 #define ISP_AWBM_MEM_ADDR (ISP_BASE_ADDR+0x1798UL)
217 #define ISP_AWBM_POSITION_SEL (ISP_BASE_ADDR+0x179CUL)
218 #define ISP_AWBM_THR_VALUE1 (ISP_BASE_ADDR+0x17A0UL)
219 #define ISP_AWBM_THR_VALUE2 (ISP_BASE_ADDR+0x17A4UL)
221 /*isp sub block: AWBC*/
222 #define ISP_AWBC_STATUS (ISP_BASE_ADDR+0x1800UL)
223 #define ISP_AWBC_PARAM (ISP_BASE_ADDR+0x1814UL)
224 #define ISP_AWBC_GAIN0 (ISP_BASE_ADDR+0x1818UL)
225 #define ISP_AWBC_GAIN1 (ISP_BASE_ADDR+0x181CUL)
226 #define ISP_AWBC_THRD (ISP_BASE_ADDR+0x1820UL)
227 #define ISP_AWBC_OFFSET0 (ISP_BASE_ADDR+0x1824UL)
228 #define ISP_AWBC_OFFSET1 (ISP_BASE_ADDR+0x1828UL)
229 #define ISP_AWBC_GAIN0_BUF (ISP_BASE_ADDR+0x182CUL)
230 #define ISP_AWBC_GAIN1_BUF (ISP_BASE_ADDR+0x1830UL)
231 #define ISP_AWBC_OFFSET0_BUF (ISP_BASE_ADDR+0x1834UL)
232 #define ISP_AWBC_OFFSET1_BUF (ISP_BASE_ADDR+0x1838UL)
233 #define ISP_AWBC_GAIN0_READ (ISP_BASE_ADDR+0x183CUL)
234 #define ISP_AWBC_GAIN1_READ (ISP_BASE_ADDR+0x1840UL)
235 #define ISP_AWBC_OFFSET0_READ (ISP_BASE_ADDR+0x1844UL)
236 #define ISP_AWBC_OFFSET1_READ (ISP_BASE_ADDR+0x1848UL)
238 /*isp sub block: AEM*/
239 #define ISP_AEM_STATUS (ISP_BASE_ADDR+0x1900UL)
240 #define ISP_AEM_PARAM (ISP_BASE_ADDR+0x1914UL)
241 #define ISP_AEM_OFFSET (ISP_BASE_ADDR+0x1918UL)
242 #define ISP_AEM_BLK_SIZE (ISP_BASE_ADDR+0x191CUL)
243 #define ISP_AEM_SLICE_SIZE (ISP_BASE_ADDR+0x1920UL)
245 /*isp sub block: BPC: bad pixel correction*/
246 #define ISP_BPC_STATUS (ISP_BASE_ADDR+0x1A00UL)
247 #define ISP_BPC_PARAM (ISP_BASE_ADDR+0x1A14UL)
248 #define ISP_BPC_CFG (ISP_BASE_ADDR+0x1A18UL)
249 #define ISP_BPC_FACTOR (ISP_BASE_ADDR+0x1A1CUL)
250 #define ISP_BPC_COEFF (ISP_BASE_ADDR+0x1A20UL)
251 #define ISP_BPC_LUTWORD0 (ISP_BASE_ADDR+0x1A24UL)
252 #define ISP_BPC_NEW_OLD_SEL (ISP_BASE_ADDR+0x1A44UL)
253 #define ISP_BPC_MAP_ADDR (ISP_BASE_ADDR+0x1A48UL)
255 /*isp sub block: GRGB*/
256 #define ISP_GRGB_STATUS (ISP_BASE_ADDR+0x1B00UL)
257 #define ISP_GRGB_PARAM (ISP_BASE_ADDR+0x1B14UL)
258 #define ISP_GRGB_GRID (ISP_BASE_ADDR+0x1B18UL)
260 /*isp sub block: BDN*/
261 #define ISP_BDN_STATUS (ISP_BASE_ADDR+0x1C00UL)
262 #define ISP_BDN_PARAM (ISP_BASE_ADDR+0x1C14UL)
263 #define ISP_BDN_DISWEI0_0 (ISP_BASE_ADDR+0x1C18UL)
264 #define ISP_BDN_DISWEI0_1 (ISP_BASE_ADDR+0x1C1CUL)
265 #define ISP_BDN_RANWEI0_0 (ISP_BASE_ADDR+0x1C20UL)
266 #define ISP_BDN_RANWEI0_7 (ISP_BASE_ADDR+0x1C3CUL)
267 #define ISP_BDN_1DLNC_CENTER (ISP_BASE_ADDR+0x1DA8UL)
268 #define ISP_BDN_1DLNC_SQUARE_X (ISP_BASE_ADDR+0x1DACUL)
269 #define ISP_BDN_1DLNC_SQUARE_Y (ISP_BASE_ADDR+0x1DB0UL)
270 #define ISP_BDN_1DLNC_P (ISP_BASE_ADDR+0x1DB4UL)
271 #define ISP_BDN_1DLNC_SIZE (ISP_BASE_ADDR+0x1DB8UL)
272 #define ISP_BDN_1DLNC_POS (ISP_BASE_ADDR+0x1DBCUL)
273 #define ISP_BDN_1DLNC_OFFSET (ISP_BASE_ADDR+0x1DC0UL)
275 /*isp sub block: RGBG2*/
276 #define ISP_RGBG2_STATUS (ISP_BASE_ADDR+0x1E00UL)
277 #define ISP_RGBG2_PARAM (ISP_BASE_ADDR+0x1E14UL)
278 #define ISP_RGBG2_OFFSET (ISP_BASE_ADDR+0x1E18UL)
280 /*isp sub block: 1d lnc*/
281 #define ISP_1D_LNC_STATUS (ISP_BASE_ADDR+0x1F00UL)
282 #define ISP_1D_LNC_PARAM (ISP_BASE_ADDR+0x1F14UL)
283 #define ISP_1D_LNC_PARAM1 (ISP_BASE_ADDR+0x1F18UL)
284 #define ISP_1D_LNC_PARAM2 (ISP_BASE_ADDR+0x1F1CUL)
285 #define ISP_1D_LNC_PARAM3 (ISP_BASE_ADDR+0x1F20UL)
286 #define ISP_1D_LNC_PARAM4 (ISP_BASE_ADDR+0x1F24UL)
287 #define ISP_1D_LNC_PARAM5 (ISP_BASE_ADDR+0x1F28UL)
288 #define ISP_1D_LNC_PARAM6 (ISP_BASE_ADDR+0x1F2CUL)
289 #define ISP_1D_LNC_PARAM7 (ISP_BASE_ADDR+0x1F30UL)
290 #define ISP_1D_LNC_PARAM8 (ISP_BASE_ADDR+0x1F34UL)
291 #define ISP_1D_LNC_PARAM9 (ISP_BASE_ADDR+0x1F38UL)
292 #define ISP_1D_LNC_PARAM10 (ISP_BASE_ADDR+0x1F3CUL)
293 #define ISP_1D_LNC_PARAM11 (ISP_BASE_ADDR+0x1F40UL)
294 #define ISP_1D_LNC_PARAM12 (ISP_BASE_ADDR+0x1F44UL)
295 #define ISP_1D_LNC_PARAM13 (ISP_BASE_ADDR+0x1F48UL)
296 #define ISP_1D_LNC_PARAM14 (ISP_BASE_ADDR+0x1F4CUL)
297 #define ISP_1D_LNC_PARAM15 (ISP_BASE_ADDR+0x1F50UL)
298 #define ISP_1D_LNC_PARAM16 (ISP_BASE_ADDR+0x1F54UL)
299 #define ISP_1D_LNC_PARAM17 (ISP_BASE_ADDR+0x1F58UL)
300 #define ISP_1D_LNC_PARAM18 (ISP_BASE_ADDR+0x1F5CUL)
302 /*isp sub block: NLM VST IVST*/
303 #define ISP_VST_PARA (ISP_BASE_ADDR+0x2014UL)
304 #define ISP_IVST_PARA (ISP_BASE_ADDR+0x2214UL)
305 #define ISP_NLM_LB_STATUS0 (ISP_BASE_ADDR+0x2100UL)
306 #define ISP_NLM_LB_STATUS1 (ISP_BASE_ADDR+0x2104UL)
307 #define ISP_NLM_STATUS (ISP_BASE_ADDR+0x2108UL)
308 #define ISP_NLM_PARA (ISP_BASE_ADDR+0x2114UL)
309 #define ISP_NLM_FLAT_PARA_0 (ISP_BASE_ADDR+0x2118UL)
310 #define ISP_NLM_STERNGTH (ISP_BASE_ADDR+0x212CUL)
311 #define ISP_NLM_IS_FLAT (ISP_BASE_ADDR+0x2130UL)
312 #define ISP_NLM_ADD_BACK (ISP_BASE_ADDR+0x2134UL)
313 //#define ISP_NLM_DIRECTION_0 (ISP_BASE_ADDR+0x2138UL)
314 //#define ISP_NLM_DIRECTION_1 (ISP_BASE_ADDR+0x213CUL)
315 #define ISP_NLM_LUT_W_0 (ISP_BASE_ADDR+0x2140UL)
317 /*isp sub block: CFA: clolor filter array*/
318 #define ISP_CFAE_STATUS (ISP_BASE_ADDR+0x3000UL)
319 #define ISP_CFAE_EE_CFG0 (ISP_BASE_ADDR+0x3014UL)
320 #define ISP_CFAE_THRD_0 (ISP_BASE_ADDR+0x3018UL)
321 #define ISP_CFAE_THRD_1 (ISP_BASE_ADDR+0x301CUL)
322 #define ISP_CFAE_THRD_2 (ISP_BASE_ADDR+0x3020UL)
323 #define ISP_CFAE_THRD_3 (ISP_BASE_ADDR+0x3024UL)
324 #define ISP_CFAE_THRD_4 (ISP_BASE_ADDR+0x3028UL)
325 #define ISP_CFAE_EE_CFG1 (ISP_BASE_ADDR+0x302CUL)
327 /*isp sub block:CMC: Color matrix correction for 10 bit */
328 #define ISP_CMC10_STATUS0 (ISP_BASE_ADDR+0x3100UL)
329 #define ISP_CMC10_STATUS1 (ISP_BASE_ADDR+0x3104UL)
330 #define ISP_CMC10_PARAM (ISP_BASE_ADDR+0x3114UL)
331 #define ISP_CMC10_MATRIX0 (ISP_BASE_ADDR+0x3118UL)
332 #define ISP_CMC10_MATRIX0_BUF (ISP_BASE_ADDR+0x312CUL)
334 /*isp sub block: FRGB WDR */
335 #define ISP_HDR_STATUS (ISP_BASE_ADDR+0x3200UL)
336 #define ISP_HDR_PARAM (ISP_BASE_ADDR+0x3214UL)
338 //#define ISP_HDR_STATUS (ISP_BASE_ADDR+0x1A00UL)
339 //#define ISP_HDR_PARAM (ISP_BASE_ADDR+0x1A14UL)
340 //#define ISP_HDR_INDEX (ISP_BASE_ADDR+0x1A18UL)
342 /*isp sub block: GAMMA */
343 #define ISP_GAMMA_STATUS (ISP_BASE_ADDR+0x3300UL)
344 #define ISP_GAMMA_PARAM (ISP_BASE_ADDR+0x3314UL)
346 /*isp sub block:CMC: Color matrix correction for 8 bit */
347 #define ISP_CMC8_STATUS0 (ISP_BASE_ADDR+0x3500UL)
348 #define ISP_CMC8_STATUS1 (ISP_BASE_ADDR+0x3504UL)
349 #define ISP_CMC8_PARAM (ISP_BASE_ADDR+0x3514UL)
350 #define ISP_CMC8_MATRIX0 (ISP_BASE_ADDR+0x3518UL)
351 #define ISP_CMC8_MATRIX0_BUF (ISP_BASE_ADDR+0x352CUL)
353 /*CT: Color transformation*/
354 #define ISP_CT_STATUS0 (ISP_BASE_ADDR+0x3600UL)
355 #define ISP_CT_STATUS1 (ISP_BASE_ADDR+0x3604UL)
356 #define ISP_CT_PARAM (ISP_BASE_ADDR+0x3614UL)
358 /*isp sub block: CCE: clolor conversion enhancement*/
359 #define ISP_CCE_STATUS0 (ISP_BASE_ADDR+0x3700UL)
360 #define ISP_CCE_STATUS1 (ISP_BASE_ADDR+0x3704UL)
361 #define ISP_CCE_PARAM (ISP_BASE_ADDR+0x3714UL)
362 #define ISP_CCE_MATRIX0 (ISP_BASE_ADDR+0x3718UL)
363 #define ISP_CCE_MATRIX1 (ISP_BASE_ADDR+0x371CUL)
364 #define ISP_CCE_MATRIX2 (ISP_BASE_ADDR+0x3720UL)
365 #define ISP_CCE_MATRIX3 (ISP_BASE_ADDR+0x3724UL)
366 #define ISP_CCE_MATRIX4 (ISP_BASE_ADDR+0x3728UL)
367 #define ISP_CCE_SHIFT (ISP_BASE_ADDR+0x372CUL)
368 #define ISP_CCE_UVD_PARAM0 (ISP_BASE_ADDR+0x3730UL)
369 #define ISP_CCE_UVD_PARAM1 (ISP_BASE_ADDR+0x3734UL)
370 #define ISP_CCE_UVD_PARAM2 (ISP_BASE_ADDR+0x3738UL)
371 #define ISP_CCE_UVD_PARAM3 (ISP_BASE_ADDR+0x373CUL)
372 #define ISP_CCE_UVD_PARAM4 (ISP_BASE_ADDR+0x3740UL)
373 #define ISP_CCE_UVD_PARAM5 (ISP_BASE_ADDR+0x3744UL)
375 /*isp sub block:HSV*/
376 #define ISP_HSV_STATUS (ISP_BASE_ADDR+0x3800UL)
377 #define ISP_HSV_PARAM (ISP_BASE_ADDR+0x3814UL)
379 /*isp sub block:Radial CSC*/
380 #define ISP_CSC_STATUS (ISP_BASE_ADDR + 0x3900UL)
381 #define ISP_CSC_CTRL (ISP_BASE_ADDR + 0x3914UL)
382 #define ISP_CSC_RCC (ISP_BASE_ADDR + 0x3918UL)
383 #define ISP_CSC_BCC (ISP_BASE_ADDR + 0x391CUL)
384 #define ISP_CSC_REDX2INIT (ISP_BASE_ADDR + 0x3920UL)
385 #define ISP_CSC_REDY2INIT (ISP_BASE_ADDR + 0x3924UL)
386 #define ISP_CSC_BLUEX2INIT (ISP_BASE_ADDR + 0x3928UL)
387 #define ISP_CSC_BLUEY2INIT (ISP_BASE_ADDR + 0x392CUL)
388 #define ISP_CSC_REDTHR (ISP_BASE_ADDR + 0x3930UL)
389 #define ISP_CSC_BLUETHR (ISP_BASE_ADDR + 0x3934UL)
390 #define ISP_CSC_REDPOLY (ISP_BASE_ADDR + 0x3938UL)
391 #define ISP_CSC_BLUEPOLY (ISP_BASE_ADDR + 0x393CUL)
392 #define ISP_CSC_MAXGAIN (ISP_BASE_ADDR + 0x3940UL)
393 #define ISP_CSC_PICSIZE (ISP_BASE_ADDR + 0x3944UL)
394 #define ISP_CSC_START_ROW_COL (ISP_BASE_ADDR + 0x3948UL)
396 /*isp sub block:ISP_PRECNRNEW*/
397 #define ISP_PRECNRNEW_STATUS0 (ISP_BASE_ADDR+0x3A00UL)
398 #define ISP_PRECNRNEW_STATUS1 (ISP_BASE_ADDR+0x3A04UL)
399 #define ISP_PRECNRNEW_CFG (ISP_BASE_ADDR+0x3A14UL)
400 #define ISP_PRECNRNEW_MEDIAN_THR (ISP_BASE_ADDR+0x3A18UL)
401 #define ISP_PRECNRNEW_THRU (ISP_BASE_ADDR+0x3A1CUL)
402 #define ISP_PRECNRNEW_THRV (ISP_BASE_ADDR+0x3A20UL)
404 /*isp sub block:ISP_PSTRZ*/
405 #define ISP_PSTRZ_STATUS (ISP_BASE_ADDR+0x3B00UL)
406 #define ISP_PSTRZ_PARAM (ISP_BASE_ADDR+0x3B14UL)
407 #define ISP_PSTRZ_LEVEL0 (ISP_BASE_ADDR+0x3B18UL)
408 #define ISP_PSTRZ_LEVEL1 (ISP_BASE_ADDR+0x3B1CUL)
409 #define ISP_PSTRZ_LEVEL2 (ISP_BASE_ADDR+0x3B20UL)
410 #define ISP_PSTRZ_LEVEL3 (ISP_BASE_ADDR+0x3B24UL)
411 #define ISP_PSTRZ_LEVEL4 (ISP_BASE_ADDR+0x3B28UL)
412 #define ISP_PSTRZ_LEVEL5 (ISP_BASE_ADDR+0x3B2CUL)
413 #define ISP_PSTRZ_LEVEL6 (ISP_BASE_ADDR+0x3B30UL)
414 #define ISP_PSTRZ_LEVEL7 (ISP_BASE_ADDR+0x3B34UL)
416 /*isp sub block: AFM : auto focus monitor*/
417 #define ISP_RGB_AFM_STATUS0 (ISP_BASE_ADDR+0x3C00UL)
418 #define ISP_RGB_AFM_STATUS1 (ISP_BASE_ADDR+0x3C04UL)
419 #define ISP_RGB_AFM_PARAM (ISP_BASE_ADDR+0x3C14UL)
420 #define ISP_RGB_AFM_FRAME_RANGE (ISP_BASE_ADDR+0x3C18UL)
421 #define ISP_RGB_AFM_SOBEL_THRESHOLD (ISP_BASE_ADDR+0x3C1CUL)
422 #define ISP_RGB_AFM_SPSMD_THRESHOLD_MAX (ISP_BASE_ADDR+0x3C20UL)
423 #define ISP_RGB_AFM_WIN_RANGE0 (ISP_BASE_ADDR+0x3C24UL)
424 #define ISP_RGB_AFM_TYPE1_VAL00 (ISP_BASE_ADDR+0x3CECUL)
425 #define ISP_RGB_AFM_TYPE2_VAL00 (ISP_BASE_ADDR+0x3D50UL)
426 #define ISP_RGB_AFM_SPSMD_THRESHOLD_MIN (ISP_BASE_ADDR+0x3DB4UL)
428 /*isp sub block:RGB2Y*/
429 #define ISP_Y_RGB2Y_STATUS0 (ISP_BASE_ADDR+0x4000UL)
430 #define ISP_Y_RGB2Y_STATUS1 (ISP_BASE_ADDR+0x4004UL)
431 #define ISP_Y_RGB2Y_PARAM (ISP_BASE_ADDR+0x4014UL)
433 /*isp sub block:YIQ AEM*/
434 #define ISP_YIQ_AEM_STATUS (ISP_BASE_ADDR + 0x4100UL)
435 #define ISP_YIQ_AEM_PARAM (ISP_BASE_ADDR + 0x4114UL)
436 #define ISP_YIQ_YGAMMA_NODE_X0 (ISP_BASE_ADDR + 0x4118UL)
437 #define ISP_YIQ_YGAMMA_NODE_X1 (ISP_BASE_ADDR + 0x411CUL)
438 #define ISP_YIQ_YGAMMA_NODE_Y0 (ISP_BASE_ADDR + 0x4120UL)
439 #define ISP_YIQ_YGAMMA_NODE_Y1 (ISP_BASE_ADDR + 0x4124UL)
440 #define ISP_YIQ_YGAMMA_NODE_Y2 (ISP_BASE_ADDR + 0x4128UL)
441 #define ISP_YIQ_YGAMMA_NODE_IDX (ISP_BASE_ADDR + 0x412CUL)
442 #define ISP_YIQ_AEM_OFFSET (ISP_BASE_ADDR + 0x4130UL)
443 #define ISP_YIQ_AEM_BLK_SIZE (ISP_BASE_ADDR + 0x4134UL)
444 #define ISP_YIQ_AEM_SLICE_SIZE (ISP_BASE_ADDR + 0x4138UL)
446 /*isp sub block:ANTI FLICKER*/
447 #define ISP_ANTI_FLICKER_STATUS0 (ISP_BASE_ADDR + 0x4200UL)
448 #define ISP_ANTI_FLICKER_STATUS1 (ISP_BASE_ADDR + 0x4204UL)
449 #define ISP_ANTI_FLICKER_PARAM0 (ISP_BASE_ADDR + 0x4214UL)
450 #define ISP_ANTI_FLICKER_PARAM1 (ISP_BASE_ADDR + 0x4218UL)
451 #define ISP_ANTI_FLICKER_COL_POS (ISP_BASE_ADDR + 0x421CUL)
452 #define ISP_ANTI_FLICKER_DDR_INIT_ADDR (ISP_BASE_ADDR + 0x4220UL)
454 /*isp sub block:YIQ AFM*/
455 #define ISP_YIQ_AFM_STATUS0 (ISP_BASE_ADDR + 0x4300UL)
456 #define ISP_YIQ_AFM_STATUS1 (ISP_BASE_ADDR + 0x4304UL)
457 #define ISP_YIQ_AFM_PARAM (ISP_BASE_ADDR + 0x4314UL)
458 #define ISP_YIQ_AFM_WIN_RANGE0 (ISP_BASE_ADDR + 0x4318UL)
459 #define ISP_YIQ_AFM_COEF0_1 (ISP_BASE_ADDR + 0x43E0UL)
460 #define ISP_YIQ_AFM_COEF2_3 (ISP_BASE_ADDR + 0x43E4UL)
461 #define ISP_YIQ_AFM_COEF4_5 (ISP_BASE_ADDR + 0x43E8UL)
462 #define ISP_YIQ_AFM_COEF6_7 (ISP_BASE_ADDR + 0x43ECUL)
463 #define ISP_YIQ_AFM_COEF8_9 (ISP_BASE_ADDR + 0x43F0UL)
464 #define ISP_YIQ_AFM_COEF10 (ISP_BASE_ADDR + 0x43F4UL)
465 #define ISP_YIQ_AFM_LAPLACE0 (ISP_BASE_ADDR + 0x43F8UL)
466 #define ISP_YIQ_AFM_SLICE_SIZE (ISP_BASE_ADDR + 0x4588UL)
468 /*isp sub block: Pre-CDN*/
469 #define ISP_PRECDN_STATUS0 (ISP_BASE_ADDR+0x5000UL)
470 #define ISP_PRECDN_STATUS1 (ISP_BASE_ADDR+0x5004UL)
471 #define ISP_PRECDN_PARAM (ISP_BASE_ADDR+0x5014UL)
472 #define ISP_PRECDN_MEDIAN_THRUV01 (ISP_BASE_ADDR+0x5018UL)
473 #define ISP_PRECDN_THRYUV (ISP_BASE_ADDR+0x501CUL)
474 #define ISP_PRECDN_SEGU_0 (ISP_BASE_ADDR+0x5020UL)
475 #define ISP_PRECDN_SEGU_3 (ISP_BASE_ADDR+0x502CUL)
476 #define ISP_PRECDN_SEGV_0 (ISP_BASE_ADDR+0x5030UL)
477 #define ISP_PRECDN_SEGV_3 (ISP_BASE_ADDR+0x503CUL)
478 #define ISP_PRECDN_SEGY_0 (ISP_BASE_ADDR+0x5040UL)
479 #define ISP_PRECDN_SEGY_3 (ISP_BASE_ADDR+0x504CUL)
480 #define ISP_PRECDN_DISTW0 (ISP_BASE_ADDR+0x5050UL)
481 #define ISP_PRECDN_DISTW3 (ISP_BASE_ADDR+0x505CUL)
483 /*isp sub block: Pre-Filter*/
484 #define ISP_PREF_STATUS0 (ISP_BASE_ADDR+0x5100UL)
485 #define ISP_PREF_STATUS1 (ISP_BASE_ADDR+0x5104UL)
486 #define ISP_PREF_PARAM (ISP_BASE_ADDR+0x5114UL)
487 #define ISP_PREF_THRD (ISP_BASE_ADDR+0x5118UL)
489 /*isp sub block: UV Pre-Filter*/
490 #define ISP_UV_PREF_STATUS0 (ISP_BASE_ADDR+0x5200UL)
491 #define ISP_UV_PREF_STATUS1 (ISP_BASE_ADDR+0x5204UL)
492 #define ISP_UV_PREF_PARAM (ISP_BASE_ADDR+0x5214UL)
493 #define ISP_UV_PREF_THRD (ISP_BASE_ADDR+0x5218UL)
495 /*isp sub block: Brightness*/
496 #define ISP_BRIGHT_STATUS (ISP_BASE_ADDR+0x5300UL)
497 #define ISP_BRIGHT_PARAM (ISP_BASE_ADDR+0x5314UL)
499 /*isp sub block: Contrast*/
500 #define ISP_CONTRAST_STATUS (ISP_BASE_ADDR+0x5400UL)
501 #define ISP_CONTRAST_PARAM (ISP_BASE_ADDR+0x5414UL)
503 /*isp sub block: HIST : histogram*/
504 #define ISP_HIST_STATUS (ISP_BASE_ADDR+0x5500UL)
505 #define ISP_HIST_PARAM (ISP_BASE_ADDR+0x5514UL)
506 #define ISP_HIST_RATIO (ISP_BASE_ADDR+0x5518UL)
507 #define ISP_HIST_MAX_MIN (ISP_BASE_ADDR+0x551CUL)
508 #define ISP_HIST_SLICE_SIZE (ISP_BASE_ADDR+0x5520UL)
509 #define ISP_HIST_ADJUST (ISP_BASE_ADDR+0x5524UL)
511 /*isp sub block: HIST2*/
512 #define ISP_HIST2_STATUS (ISP_BASE_ADDR+0x5600UL)
513 #define ISP_HIST2_PARAM (ISP_BASE_ADDR+0x5614UL)
514 #define ISP_HIST2_ROI_S0 (ISP_BASE_ADDR+0x5618UL)
515 #define ISP_HIST2_ROI_E0 (ISP_BASE_ADDR+0x561CUL)
517 /*isp sub block: AUTOCONT : auto contrast adjustment*/
518 #define ISP_AUTOCONT_STATUS (ISP_BASE_ADDR+0x5700UL)
519 #define ISP_AUTOCONT_PARAM (ISP_BASE_ADDR+0x5714UL)
520 #define ISP_AUTOCONT_MAX_MIN (ISP_BASE_ADDR+0x5718UL)
522 /*isp sub block: cdn*/
523 #define ISP_CDN_STATUS0 (ISP_BASE_ADDR+0x5800UL)
524 #define ISP_CDN_STATUS1 (ISP_BASE_ADDR+0x5804UL)
525 #define ISP_CDN_PARAM (ISP_BASE_ADDR+0x5814UL)
526 #define ISP_CDN_THRUV (ISP_BASE_ADDR+0x5818UL)
527 #define ISP_CDN_U_RANWEI_0 (ISP_BASE_ADDR+0x581CUL)
528 #define ISP_CDN_U_RANWEI_7 (ISP_BASE_ADDR+0x5838UL)
529 #define ISP_CDN_V_RANWEI_0 (ISP_BASE_ADDR+0x583CUL)
530 #define ISP_CDN_V_RANWEI_7 (ISP_BASE_ADDR+0x5858UL)
532 /*isp sub block: edge*/
533 #define ISP_EE_STATUS (ISP_BASE_ADDR+0x5900UL)
534 #define ISP_EE_PARAM (ISP_BASE_ADDR+0x5914UL)
535 #define ISP_EE_CFG0 (ISP_BASE_ADDR+0x5918UL)
536 #define ISP_EE_CFG1 (ISP_BASE_ADDR+0x591CUL)
537 #define ISP_EE_CFG2 (ISP_BASE_ADDR+0x5920UL)
538 #define ISP_EE_CFG3 (ISP_BASE_ADDR+0x5924UL)
539 #define ISP_EE_CFG4 (ISP_BASE_ADDR+0x5928UL)
540 #define ISP_EE_CFG5 (ISP_BASE_ADDR+0x592CUL)
541 #define ISP_EE_CFG6 (ISP_BASE_ADDR+0x5930UL)
542 #define ISP_EE_CFG7 (ISP_BASE_ADDR+0x5934UL)
543 //pike has no registers ISP_EE_ADP_CFG0 ~ ISP_EE_ADP_CFG2
544 //#define ISP_EE_ADP_CFG0 (ISP_BASE_ADDR+0x5938UL)
545 //#define ISP_EE_ADP_CFG1 (ISP_BASE_ADDR+0x593CUL)
546 //#define ISP_EE_ADP_CFG2 (ISP_BASE_ADDR+0x5940UL)
548 /*isp sub block: emboss(pike has no this module)*/
549 #define ISP_EMBOSS_Y_STATUS (ISP_BASE_ADDR+0x5A00UL)
550 #define ISP_EMBOSS_Y_PARAM (ISP_BASE_ADDR+0x5A14UL)
551 #define ISP_EMBOSS_UV_STATUS (ISP_BASE_ADDR+0x5F00UL)
552 #define ISP_EMBOSS_UV_PARAM (ISP_BASE_ADDR+0x5F14UL)
554 /*isp sub block: CSS*/
555 #define ISP_CSS_STATUS (ISP_BASE_ADDR+0x5B00UL)
556 #define ISP_CSS_PARAM (ISP_BASE_ADDR+0x5B14UL)
557 #define ISP_CSS_THRD0 (ISP_BASE_ADDR+0x5B18UL)
558 #define ISP_CSS_LH_RATIO (ISP_BASE_ADDR+0x5B1CUL)
559 #define ISP_CSS_EX_TH_0 (ISP_BASE_ADDR+0x5B20UL)
560 #define ISP_CSS_EX_TH_1 (ISP_BASE_ADDR+0x5B24UL)
561 #define ISP_CSS_CHROM_L_TH_0 (ISP_BASE_ADDR+0x5B28UL)
562 #define ISP_CSS_CHROM_L_TH_1 (ISP_BASE_ADDR+0x5B2CUL)
563 #define ISP_CSS_CHROM_H_TH_0 (ISP_BASE_ADDR+0x5B30UL)
564 #define ISP_CSS_CHROM_H_TH_1 (ISP_BASE_ADDR+0x5B34UL)
565 #define ISP_CSS_RATIO (ISP_BASE_ADDR+0x5B38UL)
567 /*isp sub block: csa*/
568 #define ISP_CSA_STATUS (ISP_BASE_ADDR+0x5C00UL)
569 #define ISP_CSA_PARAM (ISP_BASE_ADDR+0x5C14UL)
571 /*isp sub block: hua*/
572 #define ISP_HUA_STATUS (ISP_BASE_ADDR+0x5D00UL)
573 #define ISP_HUA_PARAM (ISP_BASE_ADDR+0x5D14UL)
575 /*isp sub block: post-cdn*/
576 #define ISP_POSTCDN_STATUS (ISP_BASE_ADDR+0x5E00UL)
577 #define ISP_POSTCDN_COMMON_CTRL (ISP_BASE_ADDR+0x5E14UL)
578 #define ISP_POSTCDN_ADPT_THR (ISP_BASE_ADDR+0x5E18UL)
579 #define ISP_POSTCDN_UVTHR (ISP_BASE_ADDR+0x5E1CUL)
580 #define ISP_POSTCDN_THRU (ISP_BASE_ADDR+0x5E20UL)
581 #define ISP_POSTCDN_THRV (ISP_BASE_ADDR+0x5E24UL)
582 #define ISP_POSTCDN_RSEGU01 (ISP_BASE_ADDR+0x5E28UL)
583 #define ISP_POSTCDN_RSEGU23 (ISP_BASE_ADDR+0x5E2CUL)
584 #define ISP_POSTCDN_RSEGU45 (ISP_BASE_ADDR+0x5E30UL)
585 #define ISP_POSTCDN_RSEGU6 (ISP_BASE_ADDR+0x5E34UL)
586 #define ISP_POSTCDN_RSEGV01 (ISP_BASE_ADDR+0x5E38UL)
587 #define ISP_POSTCDN_RSEGV23 (ISP_BASE_ADDR+0x5E3CUL)
588 #define ISP_POSTCDN_RSEGV45 (ISP_BASE_ADDR+0x5E40UL)
589 #define ISP_POSTCDN_RSEGV6 (ISP_BASE_ADDR+0x5E44UL)
590 #define ISP_POSTCDN_R_DISTW0 (ISP_BASE_ADDR+0x5E48UL)
591 //pike has no this register ISP_POSTCDN_START_ROW_MOD4
592 //#define ISP_POSTCDN_START_ROW_MOD4 (ISP_BASE_ADDR+0x5E84UL)
594 /*isp sub block: ygamma*/
595 #define ISP_YGAMMA_STATUS (ISP_BASE_ADDR+0x6000UL)
596 #define ISP_YGAMMA_PARAM (ISP_BASE_ADDR+0x6014UL)
598 /*isp sub block: ydelay*/
599 #define ISP_YDELAY_STATUS (ISP_BASE_ADDR+0x6100UL)
600 #define ISP_YDELAY_PARAM (ISP_BASE_ADDR+0x6114UL)
602 /*isp sub block: yuv nlm*/
603 #define ISP_YNLM_STATUS0 (ISP_BASE_ADDR+0x6200UL)
604 #define ISP_YNLM_STATUS1 (ISP_BASE_ADDR+0x6204UL)
605 #define ISP_YNLM_PARAM (ISP_BASE_ADDR+0x6214UL)
606 #define ISP_YNLM_ADAPT_PARAM1 (ISP_BASE_ADDR+0x6218UL)
607 #define ISP_YNLM_ADAPT_PARAM2 (ISP_BASE_ADDR+0x621CUL)
608 #define ISP_YNLM_ADAPT_PARAM3 (ISP_BASE_ADDR+0x6220UL)
609 #define ISP_YNLM_ADAPT_PARAM4 (ISP_BASE_ADDR+0x6224UL)
610 #define ISP_YNLM_ADAPT_PARAM5 (ISP_BASE_ADDR+0x6228UL)
611 #define ISP_YNLM_ADAPT_PARAM6 (ISP_BASE_ADDR+0x622CUL)
612 #define ISP_YNLM_ADAPT_PARAM7 (ISP_BASE_ADDR+0x6230UL)
613 #define ISP_YNLM_ADAPT_PARAM8 (ISP_BASE_ADDR+0x6234UL)
614 #define ISP_YNLM_DEN_STERNGTH (ISP_BASE_ADDR+0x6238UL)
615 #define ISP_YNLM_CENTER (ISP_BASE_ADDR+0x623CUL)
616 #define ISP_YNLM_CENTER_X2 (ISP_BASE_ADDR+0x6240UL)
617 #define ISP_YNLM_CENTER_Y2 (ISP_BASE_ADDR+0x6244UL)
618 #define ISP_YNLM_RADIUS (ISP_BASE_ADDR+0x6248UL)
619 #define ISP_YNLM_RADIUS_RANGE (ISP_BASE_ADDR+0x624CUL)
620 #define ISP_YNLM_GAIN_MAX (ISP_BASE_ADDR+0x6250UL)
621 #define ISP_YNLM_IMG_PARAM0 (ISP_BASE_ADDR+0x6254UL)
622 #define ISP_YNLM_IMG_PARAM1 (ISP_BASE_ADDR+0x6258UL)
623 #define ISP_YNLM_ADD_BACK (ISP_BASE_ADDR+0x625CUL)
624 #define ISP_YNLM_LUT_W_0 (ISP_BASE_ADDR+0x6260UL)
625 #define ISP_YNLM_LUT_W_1 (ISP_BASE_ADDR+0x6264UL)
626 #define ISP_YNLM_LUT_W_2 (ISP_BASE_ADDR+0x6268UL)
627 #define ISP_YNLM_LUT_W_3 (ISP_BASE_ADDR+0x626CUL)
628 #define ISP_YNLM_LUT_W_4 (ISP_BASE_ADDR+0x6270UL)
629 #define ISP_YNLM_LUT_W_5 (ISP_BASE_ADDR+0x6274UL)
630 #define ISP_YNLM_LUT_W_6 (ISP_BASE_ADDR+0x6278UL)
631 #define ISP_YNLM_LUT_W_7 (ISP_BASE_ADDR+0x627CUL)
632 #define ISP_YNLM_LUT_W_8 (ISP_BASE_ADDR+0x6280UL)
633 #define ISP_YNLM_LUT_W_9 (ISP_BASE_ADDR+0x6284UL)
634 #define ISP_YNLM_LUT_W_10 (ISP_BASE_ADDR+0x6288UL)
635 #define ISP_YNLM_LUT_W_11 (ISP_BASE_ADDR+0x628CUL)
636 #define ISP_YNLM_LUT_W_12 (ISP_BASE_ADDR+0x6290UL)
637 #define ISP_YNLM_LUT_W_13 (ISP_BASE_ADDR+0x6294UL)
638 #define ISP_YNLM_LUT_W_14 (ISP_BASE_ADDR+0x6298UL)
639 #define ISP_YNLM_LUT_W_15 (ISP_BASE_ADDR+0x629CUL)
640 #define ISP_YNLM_LUT_W_16 (ISP_BASE_ADDR+0x62A0UL)
641 #define ISP_YNLM_LUT_W_17 (ISP_BASE_ADDR+0x62A4UL)
642 #define ISP_YNLM_LUT_W_18 (ISP_BASE_ADDR+0x62A8UL)
643 #define ISP_YNLM_LUT_W_19 (ISP_BASE_ADDR+0x62ACUL)
644 #define ISP_YNLM_LUT_W_20 (ISP_BASE_ADDR+0x62B0UL)
645 #define ISP_YNLM_LUT_W_21 (ISP_BASE_ADDR+0x62B4UL)
646 #define ISP_YNLM_LUT_W_22 (ISP_BASE_ADDR+0x62B8UL)
647 #define ISP_YNLM_LUT_W_23 (ISP_BASE_ADDR+0x62BCUL)
648 #define ISP_YNLM_LUT_VS_0 (ISP_BASE_ADDR+0x6300UL)
649 #define ISP_YNLM_LUT_VS_1 (ISP_BASE_ADDR+0x6304UL)
650 #define ISP_YNLM_LUT_VS_2 (ISP_BASE_ADDR+0x6308UL)
651 #define ISP_YNLM_LUT_VS_3 (ISP_BASE_ADDR+0x630CUL)
652 #define ISP_YNLM_LUT_VS_4 (ISP_BASE_ADDR+0x6310UL)
653 #define ISP_YNLM_LUT_VS_5 (ISP_BASE_ADDR+0x6314UL)
654 #define ISP_YNLM_LUT_VS_6 (ISP_BASE_ADDR+0x6318UL)
655 #define ISP_YNLM_LUT_VS_7 (ISP_BASE_ADDR+0x631CUL)
656 #define ISP_YNLM_LUT_VS_8 (ISP_BASE_ADDR+0x6320UL)
657 #define ISP_YNLM_LUT_VS_9 (ISP_BASE_ADDR+0x6324UL)
658 #define ISP_YNLM_LUT_VS_10 (ISP_BASE_ADDR+0x6328UL)
659 #define ISP_YNLM_LUT_VS_11 (ISP_BASE_ADDR+0x632CUL)
660 #define ISP_YNLM_LUT_VS_12 (ISP_BASE_ADDR+0x6330UL)
661 #define ISP_YNLM_LUT_VS_13 (ISP_BASE_ADDR+0x6334UL)
662 #define ISP_YNLM_LUT_VS_14 (ISP_BASE_ADDR+0x6338UL)
663 #define ISP_YNLM_LUT_VS_15 (ISP_BASE_ADDR+0x633CUL)
664 #define ISP_YNLM_LUT_VS_16 (ISP_BASE_ADDR+0x6340UL)
665 #define ISP_YNLM_LUT_VS_17 (ISP_BASE_ADDR+0x6344UL)
666 #define ISP_YNLM_LUT_VS_18 (ISP_BASE_ADDR+0x6348UL)
667 #define ISP_YNLM_LUT_VS_19 (ISP_BASE_ADDR+0x634CUL)
668 #define ISP_YNLM_LUT_VS_20 (ISP_BASE_ADDR+0x6350UL)
669 #define ISP_YNLM_LUT_VS_21 (ISP_BASE_ADDR+0x6354UL)
670 #define ISP_YNLM_LUT_VS_22 (ISP_BASE_ADDR+0x6358UL)
671 #define ISP_YNLM_LUT_VS_23 (ISP_BASE_ADDR+0x635CUL)
672 #define ISP_YNLM_LUT_VS_24 (ISP_BASE_ADDR+0x6360UL)
673 #define ISP_YNLM_LUT_VS_25 (ISP_BASE_ADDR+0x6364UL)
674 #define ISP_YNLM_LUT_VS_26 (ISP_BASE_ADDR+0x6368UL)
675 #define ISP_YNLM_LUT_VS_27 (ISP_BASE_ADDR+0x636CUL)
676 #define ISP_YNLM_LUT_VS_28 (ISP_BASE_ADDR+0x6370UL)
677 #define ISP_YNLM_LUT_VS_29 (ISP_BASE_ADDR+0x6374UL)
678 #define ISP_YNLM_LUT_VS_30 (ISP_BASE_ADDR+0x6378UL)
679 #define ISP_YNLM_LUT_VS_31 (ISP_BASE_ADDR+0x637CUL)
680 #define ISP_YNLM_LUT_VS_32 (ISP_BASE_ADDR+0x6380UL)
681 #define ISP_YNLM_LUT_VS_33 (ISP_BASE_ADDR+0x6384UL)
682 #define ISP_YNLM_LUT_VS_34 (ISP_BASE_ADDR+0x6388UL)
683 #define ISP_YNLM_LUT_VS_35 (ISP_BASE_ADDR+0x638CUL)
684 #define ISP_YNLM_LUT_VS_36 (ISP_BASE_ADDR+0x6390UL)
685 #define ISP_YNLM_LUT_VS_37 (ISP_BASE_ADDR+0x6394UL)
686 #define ISP_YNLM_LUT_VS_38 (ISP_BASE_ADDR+0x6398UL)
687 #define ISP_YNLM_LUT_VS_39 (ISP_BASE_ADDR+0x639CUL)
688 #define ISP_YNLM_LUT_VS_40 (ISP_BASE_ADDR+0x63A0UL)
689 #define ISP_YNLM_LUT_VS_41 (ISP_BASE_ADDR+0x63A4UL)
690 #define ISP_YNLM_LUT_VS_42 (ISP_BASE_ADDR+0x63A8UL)
691 #define ISP_YNLM_LUT_VS_43 (ISP_BASE_ADDR+0x63ACUL)
692 #define ISP_YNLM_LUT_VS_44 (ISP_BASE_ADDR+0x63B0UL)
693 #define ISP_YNLM_LUT_VS_45 (ISP_BASE_ADDR+0x63B4UL)
694 #define ISP_YNLM_LUT_VS_46 (ISP_BASE_ADDR+0x63B8UL)
695 #define ISP_YNLM_LUT_VS_47 (ISP_BASE_ADDR+0x63BCUL)
696 #define ISP_YNLM_LUT_VS_48 (ISP_BASE_ADDR+0x63C0UL)
697 #define ISP_YNLM_LUT_VS_49 (ISP_BASE_ADDR+0x63C4UL)
698 #define ISP_YNLM_LUT_VS_50 (ISP_BASE_ADDR+0x63C8UL)
699 #define ISP_YNLM_LUT_VS_51 (ISP_BASE_ADDR+0x63CCUL)
700 #define ISP_YNLM_LUT_VS_52 (ISP_BASE_ADDR+0x63D0UL)
701 #define ISP_YNLM_LUT_VS_53 (ISP_BASE_ADDR+0x63D4UL)
702 #define ISP_YNLM_LUT_VS_54 (ISP_BASE_ADDR+0x63D8UL)
703 #define ISP_YNLM_LUT_VS_55 (ISP_BASE_ADDR+0x63DCUL)
704 #define ISP_YNLM_LUT_VS_56 (ISP_BASE_ADDR+0x63E0UL)
705 #define ISP_YNLM_LUT_VS_57 (ISP_BASE_ADDR+0x63E4UL)
706 #define ISP_YNLM_LUT_VS_58 (ISP_BASE_ADDR+0x63E8UL)
707 #define ISP_YNLM_LUT_VS_59 (ISP_BASE_ADDR+0x63ECUL)
708 #define ISP_YNLM_LUT_VS_60 (ISP_BASE_ADDR+0x63F0UL)
709 #define ISP_YNLM_LUT_VS_61 (ISP_BASE_ADDR+0x63F4UL)
710 #define ISP_YNLM_LUT_VS_62 (ISP_BASE_ADDR+0x63F8UL)
711 #define ISP_YNLM_LUT_VS_63 (ISP_BASE_ADDR+0x63FCUL)
715 /*isp sub block: iircnr(pike has no this module)*/
716 /*#define ISP_IIRCNR_STATUS0 (ISP_BASE_ADDR+0x6400UL)
717 #define ISP_IIRCNR_STATUS1 (ISP_BASE_ADDR+0x6404UL)
718 #define ISP_IIRCNR_PARAM (ISP_BASE_ADDR+0x6414UL)
719 #define ISP_IIRCNR_PARAM1 (ISP_BASE_ADDR+0x6418UL)
720 #define ISP_IIRCNR_PARAM2 (ISP_BASE_ADDR+0x641CUL)
721 #define ISP_IIRCNR_PARAM3 (ISP_BASE_ADDR+0x6420UL)
722 #define ISP_IIRCNR_PARAM4 (ISP_BASE_ADDR+0x6424UL)
723 #define ISP_IIRCNR_PARAM5 (ISP_BASE_ADDR+0x6428UL)
724 #define ISP_IIRCNR_PARAM6 (ISP_BASE_ADDR+0x642CUL)
725 #define ISP_IIRCNR_PARAM7 (ISP_BASE_ADDR+0x6430UL)
726 #define ISP_IIRCNR_PARAM8 (ISP_BASE_ADDR+0x6434UL)
727 #define ISP_IIRCNR_PARAM9 (ISP_BASE_ADDR+0x6438UL)
728 #define ISP_YRANDOM_PARAM0 (ISP_BASE_ADDR+0x643CUL)
729 #define ISP_YRANDOM_PARAM1 (ISP_BASE_ADDR+0x6440UL)
730 #define ISP_YRANDOM_PARAM2 (ISP_BASE_ADDR+0x6444UL)
731 #define ISP_YRANDOM_STATUS0 (ISP_BASE_ADDR+0x6448UL)
732 #define ISP_YRANDOM_STATUS1 (ISP_BASE_ADDR+0x644CUL)
733 #define ISP_YRANDOM_STATUS2 (ISP_BASE_ADDR+0x6450UL)*/
736 #define ISP_3D_LUT_BUF0_CH0 (ISP_BASE_ADDR+0x17000UL)
737 #define ISP_HSV_BUF0_CH0 (ISP_BASE_ADDR+0x18000UL)
738 #define ISP_VST_BUF0_CH0 (ISP_BASE_ADDR+0x19000UL)
739 #define ISP_IVST_BUF0_CH0 (ISP_BASE_ADDR+0x1A000UL)
740 #define ISP_FGAMMA_R_BUF0_CH0 (ISP_BASE_ADDR+0x1B000UL)
741 #define ISP_FGAMMA_G_BUF0_CH0 (ISP_BASE_ADDR+0x1C000UL)
742 #define ISP_FGAMMA_B_BUF0_CH0 (ISP_BASE_ADDR+0x1D000UL)
743 #define ISP_YGAMMA_BUF0_CH0 (ISP_BASE_ADDR+0x1E000UL)
744 //#define ISP_NLM_BUF0_CH0 (ISP_BASE_ADDR+0x1F000UL)
745 //#define ISP_3D_LUT_BUF1_CH0 (ISP_BASE_ADDR+0x20000UL)
746 #define ISP_HSV_BUF1_CH0 (ISP_BASE_ADDR+0x1F000UL)
747 //#define ISP_VST_BUF1_CH0 (ISP_BASE_ADDR+0x22000UL)
748 //#define ISP_IVST_BUF1_CH0 (ISP_BASE_ADDR+0x23000UL)
749 //#define ISP_FGAMMA_R_BUF1_CH0 (ISP_BASE_ADDR+0x24000UL)
750 //#define ISP_FGAMMA_G_BUF1_CH0 (ISP_BASE_ADDR+0x25000UL)
751 //#define ISP_FGAMMA_B_BUF1_CH0 (ISP_BASE_ADDR+0x26000UL)
752 //#define ISP_YGAMMA_BUF1_CH0 (ISP_BASE_ADDR+0x27000UL)
753 //#define ISP_NLM_BUF1_CH0 (ISP_BASE_ADDR+0x28000UL)
754 #define ISP_LEN_BUF0_CH0 (ISP_BASE_ADDR+0x29000UL)
755 #define ISP_LEN_BUF1_CH0 (ISP_BASE_ADDR+0x2b000UL)
757 #define ISP_AHB_BASE SPRD_MMAHB_BASE
758 #define ISP_MODULE_EB (ISP_AHB_BASE+0x0000UL)
759 #define ISP_MODULE_RESET (ISP_AHB_BASE+0x0004UL)
760 #define ISP_CORE_CLK_EB (ISP_AHB_BASE+0x0008UL)
762 /*isp v memory1: awbm*/
763 #define ISP_RAW_AWBM_OUTPUT (ISP_BASE_ADDR+0x10000)
764 /*#define ISP_RAW_AWBM_ITEM 256*/
766 /*isp v memory2: aem*/
767 #define ISP_RAW_AEM_OUTPUT (ISP_BASE_ADDR+0x12000)
768 /*#define ISP_RAW_AEM_ITEM 1024*/
770 /*isp v memory11: 3D_LUT0*/
771 #define ISP_3D_LUT0_OUTPUT (ISP_BASE_ADDR+0x17000)
772 /*#define ISP_3D_LUT0_ITEM 729*/
774 /*isp v memory12: HSV BUF0*/
775 #define ISP_HSV_BUF0_OUTPUT (ISP_BASE_ADDR+0x18000)
776 /*#define ISP_HSV_ITEM 361*/
778 /*isp v memory20: 3D_LUT1*/
779 //#define ISP_3D_LUT1_OUTPUT (ISP_BASE_ADDR+0x20000)
780 /*#define ISP_3D_LUT1_ITEM 729*/
782 /*isp v memory21: HSV BUF1*/
783 #define ISP_HSV_BUF1_OUTPUT (ISP_BASE_ADDR+0x21000)
784 /*#define ISP_HSV_ITEM 361*/
786 /*irq line number in system*/
787 #define ISP_IRQ IRQ_ISP_INT
789 #define ISP_RST_LOG_BIT BIT_2
790 #define ISP_RST_CFG_BIT BIT_3
792 #define ISP_IRQ_HW_MASK (0xFFFFFFFF)
793 #define ISP_IRQ_NUM (32)
794 #define ISP_LSC_BUF_SIZE (32 * 1024)
795 #define ISP_REG_BUF_SIZE (4 * 1024)
796 #define ISP_RAW_AE_BUF_SIZE (1024 * 4 * 3)
797 #define ISP_FRGB_GAMMA_BUF_SIZE (129 * 4 * 2)
798 #define ISP_YUV_YGAMMA_BUF_SIZE (129 * 4 * 2)
799 #define ISP_RAW_AWB_BUF_SIZE (256 * 4 * 9)
800 #define ISP_BING4AWB_SIZE (640 * 480 * 2)
801 #define ISP_YIQ_ANTIFLICKER_SIZE (1944 * 4 * 16)
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